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From: Marc Zyngier <maz@kernel.org>
To: Valentin Schneider <valentin.schneider@arm.com>
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Thomas Gleixner <tglx@linutronix.de>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Vincenzo Frascino <vincenzo.frascino@arm.com>,
	Mark Rutland <mark.rutland@arm.com>
Subject: Re: [RFC PATCH v2 00/10] irqchip/irq-gic: Optimize masking by leveraging EOImode=1
Date: Tue, 08 Jun 2021 16:29:14 +0100	[thread overview]
Message-ID: <87a6o0z86t.wl-maz@kernel.org> (raw)
In-Reply-To: <87tumhg9vm.mognet@arm.com>

[+Mark, since we discussed about this on IRC]

Hi Valentin,

On Tue, 01 Jun 2021 11:25:01 +0100,
Valentin Schneider <valentin.schneider@arm.com> wrote:
> 
> On 27/05/21 12:17, Marc Zyngier wrote:
> > On Tue, 25 May 2021 18:32:45 +0100,
> > Valentin Schneider <valentin.schneider@arm.com> wrote:
> >> I've tested this on my Ampere eMAG, which uncovered "fun" interactions with
> >> the MSI domains. Did the same trick as the Juno with the pl011.
> >>
> >> pNMIs cause said eMAG to freeze, but that's true even without my patches. I
> >> did try them out under QEMU+KVM and that looked fine, although that means I
> >> only got to test EOImode=0. I'll try to dig into this when I get some more
> >> cycles.
> >
> > That's interesting/worrying. As far as I remember, this machine uses
> > GIC500, which is a well known quantity. If pNMIs are causing issues,
> > that'd probably be a CPU interface problem. Can you elaborate on how
> > you tried to test that part? Just using the below benchmark?
> >
> 
> Not even that, it would hang somewhere at boot. Julien suggested offline
> that it might be a problem with the secondaries' PMR initial value, but I
> really never got to do dig into it.

I just hit a similar problem on an Altra box, which seems to be
related to using PSCI for idle. PSCI has no idea about priority
masking, and enters CPU suspend with interrupt masked at the PMR
level. Good luck waking up from that.

I've pushed a test branch at [1]. It'd be really good if you could
have a quick look and let me know if that helps in your case (it
certainly does on the box I have access to).

Thanks,

	M.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=arm64/nmi-idle

-- 
Without deviation from the norm, progress is not possible.

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Valentin Schneider <valentin.schneider@arm.com>
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Thomas Gleixner <tglx@linutronix.de>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Vincenzo Frascino <vincenzo.frascino@arm.com>,
	Mark Rutland <mark.rutland@arm.com>
Subject: Re: [RFC PATCH v2 00/10] irqchip/irq-gic: Optimize masking by leveraging EOImode=1
Date: Tue, 08 Jun 2021 16:29:14 +0100	[thread overview]
Message-ID: <87a6o0z86t.wl-maz@kernel.org> (raw)
In-Reply-To: <87tumhg9vm.mognet@arm.com>

[+Mark, since we discussed about this on IRC]

Hi Valentin,

On Tue, 01 Jun 2021 11:25:01 +0100,
Valentin Schneider <valentin.schneider@arm.com> wrote:
> 
> On 27/05/21 12:17, Marc Zyngier wrote:
> > On Tue, 25 May 2021 18:32:45 +0100,
> > Valentin Schneider <valentin.schneider@arm.com> wrote:
> >> I've tested this on my Ampere eMAG, which uncovered "fun" interactions with
> >> the MSI domains. Did the same trick as the Juno with the pl011.
> >>
> >> pNMIs cause said eMAG to freeze, but that's true even without my patches. I
> >> did try them out under QEMU+KVM and that looked fine, although that means I
> >> only got to test EOImode=0. I'll try to dig into this when I get some more
> >> cycles.
> >
> > That's interesting/worrying. As far as I remember, this machine uses
> > GIC500, which is a well known quantity. If pNMIs are causing issues,
> > that'd probably be a CPU interface problem. Can you elaborate on how
> > you tried to test that part? Just using the below benchmark?
> >
> 
> Not even that, it would hang somewhere at boot. Julien suggested offline
> that it might be a problem with the secondaries' PMR initial value, but I
> really never got to do dig into it.

I just hit a similar problem on an Altra box, which seems to be
related to using PSCI for idle. PSCI has no idea about priority
masking, and enters CPU suspend with interrupt masked at the PMR
level. Good luck waking up from that.

I've pushed a test branch at [1]. It'd be really good if you could
have a quick look and let me know if that helps in your case (it
certainly does on the box I have access to).

Thanks,

	M.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=arm64/nmi-idle

-- 
Without deviation from the norm, progress is not possible.

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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-06-08 15:29 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-25 17:32 [RFC PATCH v2 00/10] irqchip/irq-gic: Optimize masking by leveraging EOImode=1 Valentin Schneider
2021-05-25 17:32 ` Valentin Schneider
2021-05-25 17:32 ` [RFC PATCH v2 01/10] genirq: Add chip flag to denote automatic IRQ (un)masking Valentin Schneider
2021-05-25 17:32   ` Valentin Schneider
2021-05-25 17:32 ` [RFC PATCH v2 02/10] genirq: Define irq_ack() and irq_eoi() helpers Valentin Schneider
2021-05-25 17:32   ` Valentin Schneider
2021-05-25 20:54   ` kernel test robot
2021-05-27 10:55   ` Marc Zyngier
2021-05-27 10:55     ` Marc Zyngier
2021-05-27 10:58     ` Marc Zyngier
2021-05-27 10:58       ` Marc Zyngier
2021-06-01 10:25       ` Valentin Schneider
2021-06-01 10:25         ` Valentin Schneider
2021-05-25 17:32 ` [RFC PATCH v2 03/10] genirq: Employ ack_irq() and eoi_irq() where relevant Valentin Schneider
2021-05-25 17:32   ` Valentin Schneider
2021-05-25 17:32 ` [RFC PATCH v2 04/10] genirq: Add handle_strict_flow_irq() flow handler Valentin Schneider
2021-05-25 17:32   ` Valentin Schneider
2021-05-25 17:32 ` [RFC PATCH v2 05/10] genirq: Let purely flow-masked ONESHOT irqs through unmask_threaded_irq() Valentin Schneider
2021-05-25 17:32   ` Valentin Schneider
2021-05-25 17:32 ` [RFC PATCH v2 06/10] genirq: Don't mask IRQ within flow handler if IRQ is flow-masked Valentin Schneider
2021-05-25 17:32   ` Valentin Schneider
2021-05-25 17:32 ` [RFC PATCH v2 07/10] genirq, irq-gic-v3: Make NMI flow handlers use ->irq_ack() if available Valentin Schneider
2021-05-25 17:32   ` Valentin Schneider
2021-05-25 17:32 ` [RFC PATCH v2 08/10] irqchip/gic-v3-its: Use irq_chip_ack_parent() Valentin Schneider
2021-05-25 17:32   ` Valentin Schneider
2021-05-27 12:17   ` Marc Zyngier
2021-05-27 12:17     ` Marc Zyngier
2021-06-01 10:25     ` Valentin Schneider
2021-06-01 10:25       ` Valentin Schneider
2021-05-25 17:32 ` [RFC PATCH v2 09/10] irqchip/gic: Convert to handle_strict_flow_irq() Valentin Schneider
2021-05-25 17:32   ` Valentin Schneider
2021-05-27 12:21   ` Marc Zyngier
2021-05-27 12:21     ` Marc Zyngier
2021-06-01 10:25     ` Valentin Schneider
2021-06-01 10:25       ` Valentin Schneider
2021-06-15 15:20       ` Valentin Schneider
2021-06-15 15:20         ` Valentin Schneider
2021-05-25 17:32 ` [RFC PATCH v2 10/10] irqchip/gic-v3: " Valentin Schneider
2021-05-25 17:32   ` Valentin Schneider
2021-05-25 17:34 ` [RFC PATCH v2 00/10] irqchip/irq-gic: Optimize masking by leveraging EOImode=1 Valentin Schneider
2021-05-25 17:34   ` Valentin Schneider
2021-05-27 11:17 ` Marc Zyngier
2021-05-27 11:17   ` Marc Zyngier
2021-06-01 10:25   ` Valentin Schneider
2021-06-01 10:25     ` Valentin Schneider
2021-06-03 15:32     ` Valentin Schneider
2021-06-03 15:32       ` Valentin Schneider
2021-06-08 15:29     ` Marc Zyngier [this message]
2021-06-08 15:29       ` Marc Zyngier
2021-06-08 17:58       ` Lorenzo Pieralisi
2021-06-08 17:58         ` Lorenzo Pieralisi

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