* [igt-dev] [PATCH i-g-t 1/6] aubdump: Add gen8_map_range
@ 2018-02-21 23:19 Jordan Justen
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 2/6] aubdump: Add bitmap to track gtt pages that have been mapped Jordan Justen
` (7 more replies)
0 siblings, 8 replies; 14+ messages in thread
From: Jordan Justen @ 2018-02-21 23:19 UTC (permalink / raw)
To: IGT GPU Tools
This function should allow us to only write the page table entries
that get used.
Cc: Scott D Phillips <scott.d.phillips@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
---
tools/aubdump.c | 41 ++++++++++++++++++++++++++++++-----------
1 file changed, 30 insertions(+), 11 deletions(-)
diff --git a/tools/aubdump.c b/tools/aubdump.c
index 700296f4..2e60e547 100644
--- a/tools/aubdump.c
+++ b/tools/aubdump.c
@@ -382,12 +382,40 @@ register_write_out(uint32_t addr, uint32_t value)
dword_out(value);
}
+static void
+gen8_map_range(uint64_t start, uint64_t end)
+{
+ uint64_t entry_addr;
+ uint64_t page_num;
+ uint64_t end_aligned = (end + 4096 - 1) & ~(4096 - 1);
+
+ if (start >= end)
+ return;
+
+ entry_addr = start & ~(4096 - 1);
+ do {
+ page_num = entry_addr >> 21;
+ uint64_t last_page_entry =
+ min((page_num + 1) << 21, end_aligned);
+ uint64_t num_entries = (last_page_entry - entry_addr) >> 12;
+ mem_trace_memory_write_header_out(
+ (page_num << 12) + ((entry_addr >> 9) & 0xff8),
+ num_entries * GEN8_PTE_SIZE,
+ AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY);
+ while (num_entries-- > 0) {
+ dword_out((entry_addr & ~(4096 - 1)) |
+ 3 /* read/write | present */);
+ dword_out(entry_addr >> 32);
+ entry_addr += 4096;
+ }
+ } while (entry_addr < end);
+}
+
static void
gen10_write_header(void)
{
char app_name[8 * 4];
int app_name_len, dwords;
- uint32_t entry = 0x3; /* read/write | present */
app_name_len =
snprintf(app_name, sizeof(app_name), "PCI-ID=0x%X %s", device,
@@ -403,16 +431,7 @@ gen10_write_header(void)
dword_out(0); /* version */
data_out(app_name, app_name_len);
- /* GGTT PT */
- for (uint32_t page = 0; page < ALIGN(PT_SIZE, 4096) / 4096; page++) {
- uint32_t to_write = min(PT_SIZE - page * 4096, 4096);
- mem_trace_memory_write_header_out(page << 12, to_write,
- AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY);
- for (uint32_t i = 0; i < to_write / GEN8_PTE_SIZE; i++) {
- dword_out(entry + 0x1000 * i + 0x200000 * page);
- dword_out(0);
- }
- }
+ gen8_map_range(0, MEMORY_MAP_SIZE);
/* RENDER_RING */
mem_trace_memory_write_header_out(RENDER_RING_ADDR, RING_SIZE,
--
2.16.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t 2/6] aubdump: Add bitmap to track gtt pages that have been mapped
2018-02-21 23:19 [igt-dev] [PATCH i-g-t 1/6] aubdump: Add gen8_map_range Jordan Justen
@ 2018-02-21 23:19 ` Jordan Justen
2018-02-22 0:52 ` Scott D Phillips
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 3/6] aubdump: For gen10+ support addresses up to 4GB Jordan Justen
` (6 subsequent siblings)
7 siblings, 1 reply; 14+ messages in thread
From: Jordan Justen @ 2018-02-21 23:19 UTC (permalink / raw)
To: IGT GPU Tools
This will allow us to map ranges as they are used, but prevents
remapping already mapped regions.
By mapping ranges as they are used, we can support pinned pages
without having to map all pages of the first 32-bits.
Cc: Scott D Phillips <scott.d.phillips@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
---
tools/aubdump.c | 75 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 74 insertions(+), 1 deletion(-)
diff --git a/tools/aubdump.c b/tools/aubdump.c
index 2e60e547..661509e3 100644
--- a/tools/aubdump.c
+++ b/tools/aubdump.c
@@ -383,7 +383,7 @@ register_write_out(uint32_t addr, uint32_t value)
}
static void
-gen8_map_range(uint64_t start, uint64_t end)
+gen8_emit_pte_for_range(uint64_t start, uint64_t end)
{
uint64_t entry_addr;
uint64_t page_num;
@@ -411,6 +411,79 @@ gen8_map_range(uint64_t start, uint64_t end)
} while (entry_addr < end);
}
+static uint32_t*
+get_mapped_bitmap()
+{
+ static uint32_t *bitmap = NULL;
+ if (bitmap == NULL)
+ bitmap = calloc(0x100000000 / 0x1000 / 32, sizeof(*bitmap));
+ return bitmap;
+}
+
+static void
+set_mapped(uint64_t start, uint64_t end)
+{
+ uint64_t addr;
+ uint32_t *bitmap = get_mapped_bitmap();
+ if (bitmap == NULL)
+ return;
+
+ addr = start & ~(4096 - 1);
+ while (addr < end) {
+ const uint32_t bit = 1 << ((addr >> 12) & 0x1f);
+ if (bit == 1 && (end - addr) > 32 * 4096) {
+ bitmap[addr >> 17] = 0xffffffff;
+ addr += 32 * 4096;
+ } else {
+ bitmap[addr >> 17] |= bit;
+ addr += 4096;
+ }
+ }
+}
+
+static void
+gen8_map_range(uint64_t start, uint64_t end)
+{
+ uint64_t addr1, addr2;
+ uint32_t *bitmap = get_mapped_bitmap();
+ if (bitmap == NULL)
+ return;
+
+ addr1 = addr2 = start & ~(4096 - 1);
+ while (addr2 < end) {
+ while (addr1 < end) {
+ const uint32_t dw = bitmap[addr1 >> 17];
+ const uint32_t bit = 1 << ((addr1 >> 12) & 0x1f);
+ if ((dw & bit) == 0)
+ break;
+ else if (bit == 1 && dw == 0xffffffff)
+ addr1 += 32 * 4096;
+ else
+ addr1 += 4096;
+ }
+ if (addr1 >= end)
+ break;
+
+ addr2 = addr1;
+ while (addr2 < end) {
+ const uint32_t dw = bitmap[addr2 >> 17];
+ const uint32_t bit = 1 << ((addr2 >> 12) & 0x1f);
+ if ((dw & bit) != 0)
+ break;
+ else if (bit == 1 && dw == 0)
+ addr2 += 32 * 4096;
+ else
+ addr2 += 4096;
+ }
+ if (addr2 > end)
+ addr2 = (end + 4096 - 1) & ~(4096 - 1);
+
+ gen8_emit_pte_for_range(addr1, addr2);
+ set_mapped(addr1, addr2);
+ addr1 = addr2;
+ }
+}
+
static void
gen10_write_header(void)
{
--
2.16.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t 3/6] aubdump: For gen10+ support addresses up to 4GB
2018-02-21 23:19 [igt-dev] [PATCH i-g-t 1/6] aubdump: Add gen8_map_range Jordan Justen
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 2/6] aubdump: Add bitmap to track gtt pages that have been mapped Jordan Justen
@ 2018-02-21 23:19 ` Jordan Justen
2018-02-22 0:58 ` Scott D Phillips
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 4/6] aubdump: Support alignment of BO in execbuffer2 Jordan Justen
` (5 subsequent siblings)
7 siblings, 1 reply; 14+ messages in thread
From: Jordan Justen @ 2018-02-21 23:19 UTC (permalink / raw)
To: IGT GPU Tools; +Cc: Kenneth Graunke
For gen10, we now add mappings for buffers as they are needed.
Instead of doing this dynamically, we could always map the entire 4GB.
With 4KB pages, the tables would take up 8MB in every AUB. AUBs are
often quite huge compared to 8MB, but they can also be just a few
hundred KB.
This should allow the AUB to create up to about 4GB of allocated
buffers, whereas before we were limited to about 64MB.
While it is unlikely that we'll try to capture AUBs that generate
buffers up to 4GB in size, this change also should allow pinned
buffers to be used anywhere in the first 4GB. (I tested a pinned
buffer at 0xf0000000.)
Cc: Scott D Phillips <scott.d.phillips@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
---
tools/aubdump.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/tools/aubdump.c b/tools/aubdump.c
index 661509e3..560aa50f 100644
--- a/tools/aubdump.c
+++ b/tools/aubdump.c
@@ -484,6 +484,12 @@ gen8_map_range(uint64_t start, uint64_t end)
}
}
+static void
+gen8_map_base_size(uint64_t base, uint64_t size)
+{
+ gen8_map_range(base, base + size);
+}
+
static void
gen10_write_header(void)
{
@@ -504,15 +510,16 @@ gen10_write_header(void)
dword_out(0); /* version */
data_out(app_name, app_name_len);
- gen8_map_range(0, MEMORY_MAP_SIZE);
-
/* RENDER_RING */
+ gen8_map_base_size(RENDER_RING_ADDR, RING_SIZE);
mem_trace_memory_write_header_out(RENDER_RING_ADDR, RING_SIZE,
AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL);
for (uint32_t i = 0; i < RING_SIZE; i += sizeof(uint32_t))
dword_out(0);
/* RENDER_PPHWSP */
+ gen8_map_base_size(RENDER_CONTEXT_ADDR,
+ PPHWSP_SIZE + sizeof(render_context_init));
mem_trace_memory_write_header_out(RENDER_CONTEXT_ADDR,
PPHWSP_SIZE +
sizeof(render_context_init),
@@ -524,12 +531,15 @@ gen10_write_header(void)
data_out(render_context_init, sizeof(render_context_init));
/* BLITTER_RING */
+ gen8_map_base_size(BLITTER_RING_ADDR, RING_SIZE);
mem_trace_memory_write_header_out(BLITTER_RING_ADDR, RING_SIZE,
AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL);
for (uint32_t i = 0; i < RING_SIZE; i += sizeof(uint32_t))
dword_out(0);
/* BLITTER_PPHWSP */
+ gen8_map_base_size(BLITTER_CONTEXT_ADDR,
+ PPHWSP_SIZE + sizeof(blitter_context_init));
mem_trace_memory_write_header_out(BLITTER_CONTEXT_ADDR,
PPHWSP_SIZE +
sizeof(blitter_context_init),
@@ -541,12 +551,15 @@ gen10_write_header(void)
data_out(blitter_context_init, sizeof(blitter_context_init));
/* VIDEO_RING */
+ gen8_map_base_size(VIDEO_RING_ADDR, RING_SIZE);
mem_trace_memory_write_header_out(VIDEO_RING_ADDR, RING_SIZE,
AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL);
for (uint32_t i = 0; i < RING_SIZE; i += sizeof(uint32_t))
dword_out(0);
/* VIDEO_PPHWSP */
+ gen8_map_base_size(VIDEO_CONTEXT_ADDR,
+ PPHWSP_SIZE + sizeof(video_context_init));
mem_trace_memory_write_header_out(VIDEO_CONTEXT_ADDR,
PPHWSP_SIZE +
sizeof(video_context_init),
@@ -936,6 +949,9 @@ dump_execbuffer2(int fd, struct drm_i915_gem_execbuffer2 *execbuffer2)
if (bo->map == NULL && bo->size > 0)
bo->map = gem_mmap(fd, obj->handle, 0, bo->size);
fail_if(bo->map == MAP_FAILED, "intel_aubdump: bo mmap failed\n");
+
+ if (gen >= 10)
+ gen8_map_range(bo->offset, bo->offset + bo->size);
}
batch_index = (execbuffer2->flags & I915_EXEC_BATCH_FIRST) ? 0 :
--
2.16.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t 4/6] aubdump: Support alignment of BO in execbuffer2
2018-02-21 23:19 [igt-dev] [PATCH i-g-t 1/6] aubdump: Add gen8_map_range Jordan Justen
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 2/6] aubdump: Add bitmap to track gtt pages that have been mapped Jordan Justen
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 3/6] aubdump: For gen10+ support addresses up to 4GB Jordan Justen
@ 2018-02-21 23:19 ` Jordan Justen
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 5/6] aubdump: Note pinned BO in verbose output Jordan Justen
` (4 subsequent siblings)
7 siblings, 0 replies; 14+ messages in thread
From: Jordan Justen @ 2018-02-21 23:19 UTC (permalink / raw)
To: IGT GPU Tools
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
---
tools/aubdump.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/aubdump.c b/tools/aubdump.c
index 560aa50f..aea10970 100644
--- a/tools/aubdump.c
+++ b/tools/aubdump.c
@@ -942,6 +942,8 @@ dump_execbuffer2(int fd, struct drm_i915_gem_execbuffer2 *execbuffer2)
if (obj->flags & EXEC_OBJECT_PINNED) {
bo->offset = obj->offset;
} else {
+ if (obj->alignment != 0)
+ offset = align_u32(offset, obj->alignment);
bo->offset = offset;
offset = align_u32(offset + bo->size + 4095, 4096);
}
--
2.16.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t 5/6] aubdump: Note pinned BO in verbose output
2018-02-21 23:19 [igt-dev] [PATCH i-g-t 1/6] aubdump: Add gen8_map_range Jordan Justen
` (2 preceding siblings ...)
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 4/6] aubdump: Support alignment of BO in execbuffer2 Jordan Justen
@ 2018-02-21 23:19 ` Jordan Justen
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 6/6] aubdump: Signal drm sync objects when device override is used Jordan Justen
` (3 subsequent siblings)
7 siblings, 0 replies; 14+ messages in thread
From: Jordan Justen @ 2018-02-21 23:19 UTC (permalink / raw)
To: IGT GPU Tools
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
---
tools/aubdump.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/tools/aubdump.c b/tools/aubdump.c
index aea10970..4ecba01a 100644
--- a/tools/aubdump.c
+++ b/tools/aubdump.c
@@ -936,15 +936,18 @@ dump_execbuffer2(int fd, struct drm_i915_gem_execbuffer2 *execbuffer2)
return;
}
- if (verbose)
- printf("BO #%d (%dB) @ 0x%x\n", obj->handle, bo->size, offset);
-
if (obj->flags & EXEC_OBJECT_PINNED) {
bo->offset = obj->offset;
+ if (verbose)
+ printf("BO #%d (%dB) pinned @ 0x%lx\n",
+ obj->handle, bo->size, bo->offset);
} else {
if (obj->alignment != 0)
offset = align_u32(offset, obj->alignment);
bo->offset = offset;
+ if (verbose)
+ printf("BO #%d (%dB) @ 0x%lx\n", obj->handle,
+ bo->size, bo->offset);
offset = align_u32(offset + bo->size + 4095, 4096);
}
--
2.16.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t 6/6] aubdump: Signal drm sync objects when device override is used
2018-02-21 23:19 [igt-dev] [PATCH i-g-t 1/6] aubdump: Add gen8_map_range Jordan Justen
` (3 preceding siblings ...)
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 5/6] aubdump: Note pinned BO in verbose output Jordan Justen
@ 2018-02-21 23:19 ` Jordan Justen
2018-02-22 1:03 ` Scott D Phillips
2018-02-22 1:06 ` Jason Ekstrand
2018-02-22 0:34 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/6] aubdump: Add gen8_map_range Patchwork
` (2 subsequent siblings)
7 siblings, 2 replies; 14+ messages in thread
From: Jordan Justen @ 2018-02-21 23:19 UTC (permalink / raw)
To: IGT GPU Tools; +Cc: Jason Ekstrand
This prevents an infinite hang with crucible (vulkan) rendering tests
when --device is used.
Cc: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
---
tools/aubdump.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/tools/aubdump.c b/tools/aubdump.c
index 4ecba01a..ed90e91c 100644
--- a/tools/aubdump.c
+++ b/tools/aubdump.c
@@ -996,6 +996,22 @@ dump_execbuffer2(int fd, struct drm_i915_gem_execbuffer2 *execbuffer2)
if (files[i] != NULL)
fflush(files[i]);
}
+
+ if (device_override &&
+ (execbuffer2->flags & I915_EXEC_FENCE_ARRAY) != 0) {
+ struct drm_i915_gem_exec_fence *fences =
+ (void*)(uintptr_t)execbuffer2->cliprects_ptr;
+ for (uint32_t i = 0; i < execbuffer2->num_cliprects; i++) {
+ if ((fences[i].flags & I915_EXEC_FENCE_SIGNAL) != 0) {
+ struct drm_syncobj_array arg = {
+ .handles = (uintptr_t)&fences[i].handle,
+ .count_handles = 1,
+ .pad = 0,
+ };
+ libc_ioctl(fd, DRM_IOCTL_SYNCOBJ_SIGNAL, &arg);
+ }
+ }
+ }
}
static void
--
2.16.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/6] aubdump: Add gen8_map_range
2018-02-21 23:19 [igt-dev] [PATCH i-g-t 1/6] aubdump: Add gen8_map_range Jordan Justen
` (4 preceding siblings ...)
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 6/6] aubdump: Signal drm sync objects when device override is used Jordan Justen
@ 2018-02-22 0:34 ` Patchwork
2018-02-22 0:43 ` [igt-dev] [PATCH i-g-t 1/6] " Scott D Phillips
2018-02-22 5:24 ` [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/6] " Patchwork
7 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2018-02-22 0:34 UTC (permalink / raw)
To: Jordan Justen; +Cc: igt-dev
== Series Details ==
Series: series starting with [i-g-t,1/6] aubdump: Add gen8_map_range
URL : https://patchwork.freedesktop.org/series/38731/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
1ecc978a69a531858ba799425770062ebeb13888 igt/perf_pmu: Use a self-correcting busy pwm
with latest DRM-Tip kernel build CI_DRM_3819
42016703e66b drm-tip: 2018y-02m-21d-21h-26m-53s UTC integration manifest
No testlist changes.
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS (fi-bxt-dsi) fdo#103927
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:417s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:425s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:375s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:484s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:285s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:483s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:481s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:469s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:455s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:566s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:416s
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:282s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:507s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:387s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:413s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:446s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:412s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:450s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:496s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:454s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:498s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:592s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:427s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:500s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:519s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:491s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:490s
fi-skl-guc total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:408s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:432s
fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:537s
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:394s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_980/issues.html
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/6] aubdump: Add gen8_map_range
2018-02-21 23:19 [igt-dev] [PATCH i-g-t 1/6] aubdump: Add gen8_map_range Jordan Justen
` (5 preceding siblings ...)
2018-02-22 0:34 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/6] aubdump: Add gen8_map_range Patchwork
@ 2018-02-22 0:43 ` Scott D Phillips
2018-02-22 5:24 ` [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/6] " Patchwork
7 siblings, 0 replies; 14+ messages in thread
From: Scott D Phillips @ 2018-02-22 0:43 UTC (permalink / raw)
To: Jordan Justen, IGT GPU Tools
Jordan Justen <jordan.l.justen@intel.com> writes:
> This function should allow us to only write the page table entries
> that get used.
>
> Cc: Scott D Phillips <scott.d.phillips@intel.com>
> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
> ---
> tools/aubdump.c | 41 ++++++++++++++++++++++++++++++-----------
> 1 file changed, 30 insertions(+), 11 deletions(-)
>
> diff --git a/tools/aubdump.c b/tools/aubdump.c
> index 700296f4..2e60e547 100644
> --- a/tools/aubdump.c
> +++ b/tools/aubdump.c
> @@ -382,12 +382,40 @@ register_write_out(uint32_t addr, uint32_t value)
> dword_out(value);
> }
>
> +static void
> +gen8_map_range(uint64_t start, uint64_t end)
> +{
> + uint64_t entry_addr;
> + uint64_t page_num;
> + uint64_t end_aligned = (end + 4096 - 1) & ~(4096 - 1);
end_aligned = ALIGN(end, 4096);
> +
> + if (start >= end)
> + return;
Also check (end <= 1ull << 32) (ggtt is at most 4gb)
> + entry_addr = start & ~(4096 - 1);
> + do {
> + page_num = entry_addr >> 21;
> + uint64_t last_page_entry =
> + min((page_num + 1) << 21, end_aligned);
> + uint64_t num_entries = (last_page_entry - entry_addr) >> 12;
> + mem_trace_memory_write_header_out(
> + (page_num << 12) + ((entry_addr >> 9) & 0xff8),
This is a little obfuscated and comes out to equal (entry_addr >> 9) if
I follow.
> + num_entries * GEN8_PTE_SIZE,
> + AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY);
> + while (num_entries-- > 0) {
> + dword_out((entry_addr & ~(4096 - 1)) |
> + 3 /* read/write | present */);
> + dword_out(entry_addr >> 32);
> + entry_addr += 4096;
> + }
> + } while (entry_addr < end);
> +}
> +
> static void
> gen10_write_header(void)
> {
> char app_name[8 * 4];
> int app_name_len, dwords;
> - uint32_t entry = 0x3; /* read/write | present */
>
> app_name_len =
> snprintf(app_name, sizeof(app_name), "PCI-ID=0x%X %s", device,
> @@ -403,16 +431,7 @@ gen10_write_header(void)
> dword_out(0); /* version */
> data_out(app_name, app_name_len);
>
> - /* GGTT PT */
> - for (uint32_t page = 0; page < ALIGN(PT_SIZE, 4096) / 4096; page++) {
> - uint32_t to_write = min(PT_SIZE - page * 4096, 4096);
Might as well delete PT_SIZE as it's not used now.
> - mem_trace_memory_write_header_out(page << 12, to_write,
> - AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY);
> - for (uint32_t i = 0; i < to_write / GEN8_PTE_SIZE; i++) {
> - dword_out(entry + 0x1000 * i + 0x200000 * page);
> - dword_out(0);
> - }
> - }
> + gen8_map_range(0, MEMORY_MAP_SIZE);
>
> /* RENDER_RING */
> mem_trace_memory_write_header_out(RENDER_RING_ADDR, RING_SIZE,
> --
> 2.16.1
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/6] aubdump: Add bitmap to track gtt pages that have been mapped
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 2/6] aubdump: Add bitmap to track gtt pages that have been mapped Jordan Justen
@ 2018-02-22 0:52 ` Scott D Phillips
0 siblings, 0 replies; 14+ messages in thread
From: Scott D Phillips @ 2018-02-22 0:52 UTC (permalink / raw)
To: Jordan Justen, IGT GPU Tools
Jordan Justen <jordan.l.justen@intel.com> writes:
> This will allow us to map ranges as they are used, but prevents
> remapping already mapped regions.
>
> By mapping ranges as they are used, we can support pinned pages
> without having to map all pages of the first 32-bits.
>
> Cc: Scott D Phillips <scott.d.phillips@intel.com>
> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
> ---
> tools/aubdump.c | 75 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 74 insertions(+), 1 deletion(-)
>
> diff --git a/tools/aubdump.c b/tools/aubdump.c
> index 2e60e547..661509e3 100644
> --- a/tools/aubdump.c
> +++ b/tools/aubdump.c
> @@ -383,7 +383,7 @@ register_write_out(uint32_t addr, uint32_t value)
> }
>
> static void
> -gen8_map_range(uint64_t start, uint64_t end)
> +gen8_emit_pte_for_range(uint64_t start, uint64_t end)
> {
> uint64_t entry_addr;
> uint64_t page_num;
> @@ -411,6 +411,79 @@ gen8_map_range(uint64_t start, uint64_t end)
> } while (entry_addr < end);
> }
>
> +static uint32_t*
> +get_mapped_bitmap()
> +{
> + static uint32_t *bitmap = NULL;
> + if (bitmap == NULL)
> + bitmap = calloc(0x100000000 / 0x1000 / 32, sizeof(*bitmap));
> + return bitmap;
> +}
> +
> +static void
> +set_mapped(uint64_t start, uint64_t end)
> +{
> + uint64_t addr;
> + uint32_t *bitmap = get_mapped_bitmap();
> + if (bitmap == NULL)
> + return;
> +
> + addr = start & ~(4096 - 1);
> + while (addr < end) {
> + const uint32_t bit = 1 << ((addr >> 12) & 0x1f);
> + if (bit == 1 && (end - addr) > 32 * 4096) {
> + bitmap[addr >> 17] = 0xffffffff;
> + addr += 32 * 4096;
> + } else {
> + bitmap[addr >> 17] |= bit;
> + addr += 4096;
> + }
> + }
> +}
> +
> +static void
> +gen8_map_range(uint64_t start, uint64_t end)
> +{
> + uint64_t addr1, addr2;
> + uint32_t *bitmap = get_mapped_bitmap();
> + if (bitmap == NULL)
> + return;
> +
> + addr1 = addr2 = start & ~(4096 - 1);
> + while (addr2 < end) {
> + while (addr1 < end) {
> + const uint32_t dw = bitmap[addr1 >> 17];
> + const uint32_t bit = 1 << ((addr1 >> 12) & 0x1f);
> + if ((dw & bit) == 0)
> + break;
> + else if (bit == 1 && dw == 0xffffffff)
> + addr1 += 32 * 4096;
> + else
> + addr1 += 4096;
> + }
> + if (addr1 >= end)
> + break;
> +
> + addr2 = addr1;
> + while (addr2 < end) {
> + const uint32_t dw = bitmap[addr2 >> 17];
> + const uint32_t bit = 1 << ((addr2 >> 12) & 0x1f);
> + if ((dw & bit) != 0)
> + break;
> + else if (bit == 1 && dw == 0)
> + addr2 += 32 * 4096;
> + else
> + addr2 += 4096;
> + }
> + if (addr2 > end)
> + addr2 = (end + 4096 - 1) & ~(4096 - 1);
you could use ALIGN() here too. I wouldn't say no to a macro for the
searches above if you want and it doesn't get too ugly.
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
> + gen8_emit_pte_for_range(addr1, addr2);
> + set_mapped(addr1, addr2);
> + addr1 = addr2;
> + }
> +}
> +
> static void
> gen10_write_header(void)
> {
> --
> 2.16.1
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/6] aubdump: For gen10+ support addresses up to 4GB
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 3/6] aubdump: For gen10+ support addresses up to 4GB Jordan Justen
@ 2018-02-22 0:58 ` Scott D Phillips
2018-02-22 1:49 ` Jordan Justen
0 siblings, 1 reply; 14+ messages in thread
From: Scott D Phillips @ 2018-02-22 0:58 UTC (permalink / raw)
To: Jordan Justen, IGT GPU Tools; +Cc: Kenneth Graunke
Jordan Justen <jordan.l.justen@intel.com> writes:
> For gen10, we now add mappings for buffers as they are needed.
>
> Instead of doing this dynamically, we could always map the entire 4GB.
> With 4KB pages, the tables would take up 8MB in every AUB. AUBs are
> often quite huge compared to 8MB, but they can also be just a few
> hundred KB.
>
> This should allow the AUB to create up to about 4GB of allocated
> buffers, whereas before we were limited to about 64MB.
>
> While it is unlikely that we'll try to capture AUBs that generate
> buffers up to 4GB in size, this change also should allow pinned
> buffers to be used anywhere in the first 4GB. (I tested a pinned
> buffer at 0xf0000000.)
Will we need to do PIPE_CONTROL with TLB Invalidate as entries get added
for the simulator to do the right thing with the generated file?
> Cc: Scott D Phillips <scott.d.phillips@intel.com>
> Cc: Kenneth Graunke <kenneth@whitecape.org>
> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
> ---
> tools/aubdump.c | 20 ++++++++++++++++++--
> 1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/tools/aubdump.c b/tools/aubdump.c
> index 661509e3..560aa50f 100644
> --- a/tools/aubdump.c
> +++ b/tools/aubdump.c
> @@ -484,6 +484,12 @@ gen8_map_range(uint64_t start, uint64_t end)
> }
> }
>
> +static void
> +gen8_map_base_size(uint64_t base, uint64_t size)
> +{
> + gen8_map_range(base, base + size);
> +}
> +
> static void
> gen10_write_header(void)
> {
> @@ -504,15 +510,16 @@ gen10_write_header(void)
> dword_out(0); /* version */
> data_out(app_name, app_name_len);
>
> - gen8_map_range(0, MEMORY_MAP_SIZE);
> -
> /* RENDER_RING */
> + gen8_map_base_size(RENDER_RING_ADDR, RING_SIZE);
> mem_trace_memory_write_header_out(RENDER_RING_ADDR, RING_SIZE,
> AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL);
> for (uint32_t i = 0; i < RING_SIZE; i += sizeof(uint32_t))
> dword_out(0);
>
> /* RENDER_PPHWSP */
> + gen8_map_base_size(RENDER_CONTEXT_ADDR,
> + PPHWSP_SIZE + sizeof(render_context_init));
> mem_trace_memory_write_header_out(RENDER_CONTEXT_ADDR,
> PPHWSP_SIZE +
> sizeof(render_context_init),
> @@ -524,12 +531,15 @@ gen10_write_header(void)
> data_out(render_context_init, sizeof(render_context_init));
>
> /* BLITTER_RING */
> + gen8_map_base_size(BLITTER_RING_ADDR, RING_SIZE);
> mem_trace_memory_write_header_out(BLITTER_RING_ADDR, RING_SIZE,
> AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL);
> for (uint32_t i = 0; i < RING_SIZE; i += sizeof(uint32_t))
> dword_out(0);
>
> /* BLITTER_PPHWSP */
> + gen8_map_base_size(BLITTER_CONTEXT_ADDR,
> + PPHWSP_SIZE + sizeof(blitter_context_init));
> mem_trace_memory_write_header_out(BLITTER_CONTEXT_ADDR,
> PPHWSP_SIZE +
> sizeof(blitter_context_init),
> @@ -541,12 +551,15 @@ gen10_write_header(void)
> data_out(blitter_context_init, sizeof(blitter_context_init));
>
> /* VIDEO_RING */
> + gen8_map_base_size(VIDEO_RING_ADDR, RING_SIZE);
> mem_trace_memory_write_header_out(VIDEO_RING_ADDR, RING_SIZE,
> AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL);
> for (uint32_t i = 0; i < RING_SIZE; i += sizeof(uint32_t))
> dword_out(0);
>
> /* VIDEO_PPHWSP */
> + gen8_map_base_size(VIDEO_CONTEXT_ADDR,
> + PPHWSP_SIZE + sizeof(video_context_init));
> mem_trace_memory_write_header_out(VIDEO_CONTEXT_ADDR,
> PPHWSP_SIZE +
> sizeof(video_context_init),
> @@ -936,6 +949,9 @@ dump_execbuffer2(int fd, struct drm_i915_gem_execbuffer2 *execbuffer2)
> if (bo->map == NULL && bo->size > 0)
> bo->map = gem_mmap(fd, obj->handle, 0, bo->size);
> fail_if(bo->map == MAP_FAILED, "intel_aubdump: bo mmap failed\n");
> +
> + if (gen >= 10)
> + gen8_map_range(bo->offset, bo->offset + bo->size);
> }
>
> batch_index = (execbuffer2->flags & I915_EXEC_BATCH_FIRST) ? 0 :
> --
> 2.16.1
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 6/6] aubdump: Signal drm sync objects when device override is used
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 6/6] aubdump: Signal drm sync objects when device override is used Jordan Justen
@ 2018-02-22 1:03 ` Scott D Phillips
2018-02-22 1:06 ` Jason Ekstrand
1 sibling, 0 replies; 14+ messages in thread
From: Scott D Phillips @ 2018-02-22 1:03 UTC (permalink / raw)
To: Jordan Justen, IGT GPU Tools; +Cc: Jason Ekstrand
Jordan Justen <jordan.l.justen@intel.com> writes:
> This prevents an infinite hang with crucible (vulkan) rendering tests
> when --device is used.
>
> Cc: Jason Ekstrand <jason@jlekstrand.net>
> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Patches 4-6
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
As an idea, maybe make a 2nd pass through the exec objects after the
bo->offsets are set to assert that pinned bos are at address > `offset`,
because it won't relocate other bos around the pinned bos.
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 6/6] aubdump: Signal drm sync objects when device override is used
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 6/6] aubdump: Signal drm sync objects when device override is used Jordan Justen
2018-02-22 1:03 ` Scott D Phillips
@ 2018-02-22 1:06 ` Jason Ekstrand
1 sibling, 0 replies; 14+ messages in thread
From: Jason Ekstrand @ 2018-02-22 1:06 UTC (permalink / raw)
To: Jordan Justen; +Cc: IGT GPU Tools
[-- Attachment #1.1: Type: text/plain, Size: 1620 bytes --]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
On Wed, Feb 21, 2018 at 3:19 PM, Jordan Justen <jordan.l.justen@intel.com>
wrote:
> This prevents an infinite hang with crucible (vulkan) rendering tests
> when --device is used.
>
> Cc: Jason Ekstrand <jason@jlekstrand.net>
> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
> ---
> tools/aubdump.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/tools/aubdump.c b/tools/aubdump.c
> index 4ecba01a..ed90e91c 100644
> --- a/tools/aubdump.c
> +++ b/tools/aubdump.c
> @@ -996,6 +996,22 @@ dump_execbuffer2(int fd, struct
> drm_i915_gem_execbuffer2 *execbuffer2)
> if (files[i] != NULL)
> fflush(files[i]);
> }
> +
> + if (device_override &&
> + (execbuffer2->flags & I915_EXEC_FENCE_ARRAY) != 0) {
> + struct drm_i915_gem_exec_fence *fences =
> + (void*)(uintptr_t)execbuffer2->cliprects_ptr;
> + for (uint32_t i = 0; i < execbuffer2->num_cliprects; i++) {
> + if ((fences[i].flags & I915_EXEC_FENCE_SIGNAL) !=
> 0) {
> + struct drm_syncobj_array arg = {
> + .handles = (uintptr_t)&fences[i].handle,
> + .count_handles = 1,
> + .pad = 0,
> + };
> + libc_ioctl(fd, DRM_IOCTL_SYNCOBJ_SIGNAL,
> &arg);
> + }
> + }
> + }
> }
>
> static void
> --
> 2.16.1
>
>
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/6] aubdump: For gen10+ support addresses up to 4GB
2018-02-22 0:58 ` Scott D Phillips
@ 2018-02-22 1:49 ` Jordan Justen
0 siblings, 0 replies; 14+ messages in thread
From: Jordan Justen @ 2018-02-22 1:49 UTC (permalink / raw)
To: IGT GPU Tools, Scott D Phillips; +Cc: Kenneth Graunke
On 2018-02-21 16:58:16, Scott D Phillips wrote:
> Jordan Justen <jordan.l.justen@intel.com> writes:
>
> > For gen10, we now add mappings for buffers as they are needed.
> >
> > Instead of doing this dynamically, we could always map the entire 4GB.
> > With 4KB pages, the tables would take up 8MB in every AUB. AUBs are
> > often quite huge compared to 8MB, but they can also be just a few
> > hundred KB.
> >
> > This should allow the AUB to create up to about 4GB of allocated
> > buffers, whereas before we were limited to about 64MB.
> >
> > While it is unlikely that we'll try to capture AUBs that generate
> > buffers up to 4GB in size, this change also should allow pinned
> > buffers to be used anywhere in the first 4GB. (I tested a pinned
> > buffer at 0xf0000000.)
>
> Will we need to do PIPE_CONTROL with TLB Invalidate as entries get added
> for the simulator to do the right thing with the generated file?
Maybe? Since we only add mappings (never change or delete), I wouldn't
expect an invalidate would be required.
-Jordan
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^ permalink raw reply [flat|nested] 14+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/6] aubdump: Add gen8_map_range
2018-02-21 23:19 [igt-dev] [PATCH i-g-t 1/6] aubdump: Add gen8_map_range Jordan Justen
` (6 preceding siblings ...)
2018-02-22 0:43 ` [igt-dev] [PATCH i-g-t 1/6] " Scott D Phillips
@ 2018-02-22 5:24 ` Patchwork
7 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2018-02-22 5:24 UTC (permalink / raw)
To: Jordan Justen; +Cc: igt-dev
== Series Details ==
Series: series starting with [i-g-t,1/6] aubdump: Add gen8_map_range
URL : https://patchwork.freedesktop.org/series/38731/
State : failure
== Summary ==
Test kms_chv_cursor_fail:
Subgroup pipe-b-128x128-top-edge:
dmesg-warn -> PASS (shard-snb)
Test gem_eio:
Subgroup in-flight-contexts:
pass -> INCOMPLETE (shard-apl) fdo#104945
Subgroup in-flight:
pass -> INCOMPLETE (shard-apl)
Test kms_rotation_crc:
Subgroup sprite-rotation-180:
fail -> PASS (shard-snb) fdo#103925
Test kms_flip:
Subgroup modeset-vs-vblank-race-interruptible:
fail -> PASS (shard-apl) fdo#103060 +2
Subgroup 2x-plain-flip-fb-recreate:
pass -> FAIL (shard-hsw) fdo#100368
Test kms_vblank:
Subgroup pipe-a-ts-continuation-dpms-suspend:
pass -> INCOMPLETE (shard-hsw) fdo#103540
Test pm_rps:
Subgroup min-max-config-loaded:
pass -> FAIL (shard-apl) fdo#104060
Test perf:
Subgroup oa-exponents:
incomplete -> PASS (shard-apl) fdo#102254
fdo#104945 https://bugs.freedesktop.org/show_bug.cgi?id=104945
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#104060 https://bugs.freedesktop.org/show_bug.cgi?id=104060
fdo#102254 https://bugs.freedesktop.org/show_bug.cgi?id=102254
shard-apl total:3294 pass:1716 dwarn:1 dfail:0 fail:13 skip:1561 time:11226s
shard-hsw total:3443 pass:1755 dwarn:1 dfail:0 fail:4 skip:1681 time:11120s
shard-snb total:3465 pass:1358 dwarn:1 dfail:0 fail:2 skip:2104 time:6706s
Blacklisted hosts:
shard-kbl total:3450 pass:1936 dwarn:9 dfail:3 fail:14 skip:1487 time:9461s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_980/shards.html
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^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2018-02-22 5:24 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-02-21 23:19 [igt-dev] [PATCH i-g-t 1/6] aubdump: Add gen8_map_range Jordan Justen
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 2/6] aubdump: Add bitmap to track gtt pages that have been mapped Jordan Justen
2018-02-22 0:52 ` Scott D Phillips
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 3/6] aubdump: For gen10+ support addresses up to 4GB Jordan Justen
2018-02-22 0:58 ` Scott D Phillips
2018-02-22 1:49 ` Jordan Justen
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 4/6] aubdump: Support alignment of BO in execbuffer2 Jordan Justen
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 5/6] aubdump: Note pinned BO in verbose output Jordan Justen
2018-02-21 23:19 ` [igt-dev] [PATCH i-g-t 6/6] aubdump: Signal drm sync objects when device override is used Jordan Justen
2018-02-22 1:03 ` Scott D Phillips
2018-02-22 1:06 ` Jason Ekstrand
2018-02-22 0:34 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/6] aubdump: Add gen8_map_range Patchwork
2018-02-22 0:43 ` [igt-dev] [PATCH i-g-t 1/6] " Scott D Phillips
2018-02-22 5:24 ` [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/6] " Patchwork
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