* [PATCH v2 0/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck @ 2018-10-17 11:09 Hans de Goede 2018-10-17 11:09 ` [PATCH v2 1/2] drm/i915/intel_dsi: Move initialization of encoder variables up a bit Hans de Goede ` (4 more replies) 0 siblings, 5 replies; 9+ messages in thread From: Hans de Goede @ 2018-10-17 11:09 UTC (permalink / raw) To: Jani Nikula, Joonas Lahtinen, Rodrigo Vivi, Ville Syrjälä, Daniel Vetter Cc: Hans de Goede, intel-gfx, dri-devel Hi All, I've send v1 of this a while ago. Unfortunately I did not have time to respin this until now. This version uses intel_encoder_current_mode() as suggested in the discussion of v1. This allows dropping 2 of the 4 original patches and makes the remaining patches quite small :) Regards, Hans _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 1/2] drm/i915/intel_dsi: Move initialization of encoder variables up a bit 2018-10-17 11:09 [PATCH v2 0/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck Hans de Goede @ 2018-10-17 11:09 ` Hans de Goede 2018-10-17 11:09 ` [PATCH v2 2/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2 Hans de Goede ` (3 subsequent siblings) 4 siblings, 0 replies; 9+ messages in thread From: Hans de Goede @ 2018-10-17 11:09 UTC (permalink / raw) To: Jani Nikula, Joonas Lahtinen, Rodrigo Vivi, Ville Syrjälä, Daniel Vetter Cc: Hans de Goede, intel-gfx, dri-devel Move the initialization of encoder variables a bit higher inside the intel_dsi_init() function. So that can call intel_encoder_current_mode() from intel_dsi_vbt_init(). This is a preparation patch for reading back the GOP configured pclk from intel_dsi_vbt_init(). Signed-off-by: Hans de Goede <hdegoede@redhat.com> --- drivers/gpu/drm/i915/vlv_dsi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c index bafeb2a19b90..55951b4a036c 100644 --- a/drivers/gpu/drm/i915/vlv_dsi.c +++ b/drivers/gpu/drm/i915/vlv_dsi.c @@ -1773,6 +1773,9 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) intel_connector->get_hw_state = intel_connector_get_hw_state; intel_encoder->port = port; + intel_encoder->type = INTEL_OUTPUT_DSI; + intel_encoder->power_domain = POWER_DOMAIN_PORT_DSI; + intel_encoder->cloneable = 0; /* * On BYT/CHV, pipe A maps to MIPI DSI port A, pipe B maps to MIPI DSI @@ -1824,9 +1827,6 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) } } - intel_encoder->type = INTEL_OUTPUT_DSI; - intel_encoder->power_domain = POWER_DOMAIN_PORT_DSI; - intel_encoder->cloneable = 0; drm_connector_init(dev, connector, &intel_dsi_connector_funcs, DRM_MODE_CONNECTOR_DSI); -- 2.19.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v2 2/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2 2018-10-17 11:09 [PATCH v2 0/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck Hans de Goede 2018-10-17 11:09 ` [PATCH v2 1/2] drm/i915/intel_dsi: Move initialization of encoder variables up a bit Hans de Goede @ 2018-10-17 11:09 ` Hans de Goede 2018-10-19 9:20 ` Jani Nikula 2018-10-17 11:17 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck Patchwork ` (2 subsequent siblings) 4 siblings, 1 reply; 9+ messages in thread From: Hans de Goede @ 2018-10-17 11:09 UTC (permalink / raw) To: Jani Nikula, Joonas Lahtinen, Rodrigo Vivi, Ville Syrjälä, Daniel Vetter Cc: Hans de Goede, intel-gfx, dri-devel On BYT and CHT the GOP sometimes initializes the pclk at a (slightly) different frequency then the pclk which we've calculated. This commit makes the DSI code read-back the pclk set by the GOP and if that is within a reasonable margin of the calculated pclk, uses that instead. This fixes the first modeset being a full modeset instead of a fast modeset on systems where the GOP pclk is different. Changes in v2: -Use intel_encoder_current_mode() to get the pclk setup by the GOP Signed-off-by: Hans de Goede <hdegoede@redhat.com> --- drivers/gpu/drm/i915/intel_dsi_vbt.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c b/drivers/gpu/drm/i915/intel_dsi_vbt.c index ac83d6b89ae0..3387b187105c 100644 --- a/drivers/gpu/drm/i915/intel_dsi_vbt.c +++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c @@ -506,6 +506,7 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id) struct mipi_config *mipi_config = dev_priv->vbt.dsi.config; struct mipi_pps_data *pps = dev_priv->vbt.dsi.pps; struct drm_display_mode *mode = dev_priv->vbt.lfp_lvds_vbt_mode; + struct drm_display_mode *curr; u32 bpp; u32 tlpx_ns, extra_byte_count, bitrate, tlpx_ui; u32 ui_num, ui_den; @@ -583,6 +584,23 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id) } else burst_mode_ratio = 100; + /* + * On BYT / CRC the GOP sometimes picks a slightly different pclk, + * read back the GOP configured pclk and prefer it over ours. + */ + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { + curr = intel_encoder_current_mode(&intel_dsi->base); + if (curr) { + DRM_DEBUG_KMS("Calculated pclk %d GOP %d\n", + pclk, curr->clock); + if (curr->clock >= (pclk * 9 / 10) && + curr->clock <= (pclk * 11 / 10)) + pclk = curr->clock; + + kfree(curr); + } + } + intel_dsi->burst_mode_ratio = burst_mode_ratio; intel_dsi->pclk = pclk; -- 2.19.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2 2018-10-17 11:09 ` [PATCH v2 2/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2 Hans de Goede @ 2018-10-19 9:20 ` Jani Nikula 2018-10-19 13:49 ` Hans de Goede 0 siblings, 1 reply; 9+ messages in thread From: Jani Nikula @ 2018-10-19 9:20 UTC (permalink / raw) To: Hans de Goede, Joonas Lahtinen, Rodrigo Vivi, Ville Syrjälä, Daniel Vetter Cc: Hans de Goede, intel-gfx, dri-devel On Wed, 17 Oct 2018, Hans de Goede <j.w.r.degoede@gmail.com> wrote: > On BYT and CHT the GOP sometimes initializes the pclk at a (slightly) > different frequency then the pclk which we've calculated. > > This commit makes the DSI code read-back the pclk set by the GOP and > if that is within a reasonable margin of the calculated pclk, uses > that instead. > > This fixes the first modeset being a full modeset instead of a > fast modeset on systems where the GOP pclk is different. I assume we don't do the fast path because intel_pipe_config_compare() returns false due to crtc_clock and port_clock mismatch. The dmesg should tell you the reason with drm.debugs enabled. Now, the clock checks are already "fuzzy", and should account for slight variations. I think the goal was the same as here, plus IIUC we may lose some accuracy on the hardware roundtrip. Please try adding more tolerance in intel_fuzzy_clock_check() and see if that helps. The code looks like it allows 5% diff, but it's 2.5%. Regardless of whether we end up changing the tolerance or adjusting the state based on the hardware readout or what, I think doing the adjustment in intel_dsi_vbt.c init is the wrong place. We shouldn't have anything that depends on accessing the hardware there. I believe that's what Ville was trying to say in [1]. BR, Jani. [1] http://mid.mail-archive.com/20180706141652.GK5565@intel.com > > Changes in v2: > -Use intel_encoder_current_mode() to get the pclk setup by the GOP > > Signed-off-by: Hans de Goede <hdegoede@redhat.com> > --- > drivers/gpu/drm/i915/intel_dsi_vbt.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c b/drivers/gpu/drm/i915/intel_dsi_vbt.c > index ac83d6b89ae0..3387b187105c 100644 > --- a/drivers/gpu/drm/i915/intel_dsi_vbt.c > +++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c > @@ -506,6 +506,7 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id) > struct mipi_config *mipi_config = dev_priv->vbt.dsi.config; > struct mipi_pps_data *pps = dev_priv->vbt.dsi.pps; > struct drm_display_mode *mode = dev_priv->vbt.lfp_lvds_vbt_mode; > + struct drm_display_mode *curr; > u32 bpp; > u32 tlpx_ns, extra_byte_count, bitrate, tlpx_ui; > u32 ui_num, ui_den; > @@ -583,6 +584,23 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id) > } else > burst_mode_ratio = 100; > > + /* > + * On BYT / CRC the GOP sometimes picks a slightly different pclk, > + * read back the GOP configured pclk and prefer it over ours. > + */ > + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { > + curr = intel_encoder_current_mode(&intel_dsi->base); > + if (curr) { > + DRM_DEBUG_KMS("Calculated pclk %d GOP %d\n", > + pclk, curr->clock); > + if (curr->clock >= (pclk * 9 / 10) && > + curr->clock <= (pclk * 11 / 10)) > + pclk = curr->clock; > + > + kfree(curr); > + } > + } > + > intel_dsi->burst_mode_ratio = burst_mode_ratio; > intel_dsi->pclk = pclk; -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2 2018-10-19 9:20 ` Jani Nikula @ 2018-10-19 13:49 ` Hans de Goede 2018-10-19 14:29 ` Daniel Vetter 0 siblings, 1 reply; 9+ messages in thread From: Hans de Goede @ 2018-10-19 13:49 UTC (permalink / raw) To: Jani Nikula, Hans de Goede, Joonas Lahtinen, Rodrigo Vivi, Ville Syrjälä, Daniel Vetter Cc: intel-gfx, dri-devel Hi, On 19-10-18 11:20, Jani Nikula wrote: > On Wed, 17 Oct 2018, Hans de Goede <j.w.r.degoede@gmail.com> wrote: >> On BYT and CHT the GOP sometimes initializes the pclk at a (slightly) >> different frequency then the pclk which we've calculated. >> >> This commit makes the DSI code read-back the pclk set by the GOP and >> if that is within a reasonable margin of the calculated pclk, uses >> that instead. >> >> This fixes the first modeset being a full modeset instead of a >> fast modeset on systems where the GOP pclk is different. > > I assume we don't do the fast path because intel_pipe_config_compare() > returns false due to crtc_clock and port_clock mismatch. The dmesg > should tell you the reason with drm.debugs enabled. As I think I mentioned already last time (but that was a while ago, so I understand you cannot remember the details), the problem is these checks from intel_pipe_config_compare(): PIPE_CONF_CHECK_X(dsi_pll.ctrl); PIPE_CONF_CHECK_X(dsi_pll.div); > Now, the clock checks are already "fuzzy", and should account for slight > variations. I think the goal was the same as here, plus IIUC we may lose > some accuracy on the hardware roundtrip. The check I quoted above are basically doing a non-fuzzy port_clock check, we already do a fuzzy port_clock check, so maybe we should just drop them? > Please try adding more tolerance in intel_fuzzy_clock_check() and see if > that helps. The code looks like it allows 5% diff, but it's 2.5%. > > Regardless of whether we end up changing the tolerance or adjusting the > state based on the hardware readout or what, I think doing the > adjustment in intel_dsi_vbt.c init is the wrong place. We shouldn't have > anything that depends on accessing the hardware there. I believe that's > what Ville was trying to say in [1]. If you agree with dropping these 2 in essence non-fuzzy port-clock checks: PIPE_CONF_CHECK_X(dsi_pll.ctrl); PIPE_CONF_CHECK_X(dsi_pll.div); Then we won't need this state adjustment. But in case you do want to keep these, then were should the adjustment be done? Keep in mind that the pclk is initially calculated in intel_dsi_vbt.c and then immediately used to calculate a bunch of other settings such as intel_dsi->lp_byte_clk, prepare_cnt, etc. So there really is no other place were we can reasonably do this. Regards, Hans > > BR, > Jani. > > > [1] http://mid.mail-archive.com/20180706141652.GK5565@intel.com > > >> >> Changes in v2: >> -Use intel_encoder_current_mode() to get the pclk setup by the GOP >> >> Signed-off-by: Hans de Goede <hdegoede@redhat.com> >> --- >> drivers/gpu/drm/i915/intel_dsi_vbt.c | 18 ++++++++++++++++++ >> 1 file changed, 18 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c b/drivers/gpu/drm/i915/intel_dsi_vbt.c >> index ac83d6b89ae0..3387b187105c 100644 >> --- a/drivers/gpu/drm/i915/intel_dsi_vbt.c >> +++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c >> @@ -506,6 +506,7 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id) >> struct mipi_config *mipi_config = dev_priv->vbt.dsi.config; >> struct mipi_pps_data *pps = dev_priv->vbt.dsi.pps; >> struct drm_display_mode *mode = dev_priv->vbt.lfp_lvds_vbt_mode; >> + struct drm_display_mode *curr; >> u32 bpp; >> u32 tlpx_ns, extra_byte_count, bitrate, tlpx_ui; >> u32 ui_num, ui_den; >> @@ -583,6 +584,23 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id) >> } else >> burst_mode_ratio = 100; >> >> + /* >> + * On BYT / CRC the GOP sometimes picks a slightly different pclk, >> + * read back the GOP configured pclk and prefer it over ours. >> + */ >> + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { >> + curr = intel_encoder_current_mode(&intel_dsi->base); >> + if (curr) { >> + DRM_DEBUG_KMS("Calculated pclk %d GOP %d\n", >> + pclk, curr->clock); >> + if (curr->clock >= (pclk * 9 / 10) && >> + curr->clock <= (pclk * 11 / 10)) >> + pclk = curr->clock; >> + >> + kfree(curr); >> + } >> + } >> + >> intel_dsi->burst_mode_ratio = burst_mode_ratio; >> intel_dsi->pclk = pclk; > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2 2018-10-19 13:49 ` Hans de Goede @ 2018-10-19 14:29 ` Daniel Vetter 0 siblings, 0 replies; 9+ messages in thread From: Daniel Vetter @ 2018-10-19 14:29 UTC (permalink / raw) To: Hans de Goede; +Cc: Hans de Goede, intel-gfx, dri-devel, Rodrigo Vivi On Fri, Oct 19, 2018 at 03:49:15PM +0200, Hans de Goede wrote: > Hi, > > On 19-10-18 11:20, Jani Nikula wrote: > > On Wed, 17 Oct 2018, Hans de Goede <j.w.r.degoede@gmail.com> wrote: > > > On BYT and CHT the GOP sometimes initializes the pclk at a (slightly) > > > different frequency then the pclk which we've calculated. > > > > > > This commit makes the DSI code read-back the pclk set by the GOP and > > > if that is within a reasonable margin of the calculated pclk, uses > > > that instead. > > > > > > This fixes the first modeset being a full modeset instead of a > > > fast modeset on systems where the GOP pclk is different. > > > > I assume we don't do the fast path because intel_pipe_config_compare() > > returns false due to crtc_clock and port_clock mismatch. The dmesg > > should tell you the reason with drm.debugs enabled. > > As I think I mentioned already last time (but that was a while ago, > so I understand you cannot remember the details), the problem is these > checks from intel_pipe_config_compare(): > > PIPE_CONF_CHECK_X(dsi_pll.ctrl); > PIPE_CONF_CHECK_X(dsi_pll.div); > > > Now, the clock checks are already "fuzzy", and should account for slight > > variations. I think the goal was the same as here, plus IIUC we may lose > > some accuracy on the hardware roundtrip. > > The check I quoted above are basically doing a non-fuzzy port_clock check, > we already do a fuzzy port_clock check, so maybe we should just drop them? > > > Please try adding more tolerance in intel_fuzzy_clock_check() and see if > > that helps. The code looks like it allows 5% diff, but it's 2.5%. > > > > Regardless of whether we end up changing the tolerance or adjusting the > > state based on the hardware readout or what, I think doing the > > adjustment in intel_dsi_vbt.c init is the wrong place. We shouldn't have > > anything that depends on accessing the hardware there. I believe that's > > what Ville was trying to say in [1]. > > If you agree with dropping these 2 in essence non-fuzzy port-clock checks: > > PIPE_CONF_CHECK_X(dsi_pll.ctrl); > PIPE_CONF_CHECK_X(dsi_pll.div); > > Then we won't need this state adjustment. > > But in case you do want to keep these, then were should the adjustment be done? > > Keep in mind that the pclk is initially calculated in intel_dsi_vbt.c > and then immediately used to calculate a bunch of other settings such as > intel_dsi->lp_byte_clk, prepare_cnt, etc. So there really is no other > place were we can reasonably do this. We still want to do these checks when validating a modeset afterwards, but for the fuzzy case we need to cut them out indeed. Similar to what we do for the some of the other fastboot registers already with the if (!adjust) condition. I guess the trick here is making sure we pick the right set of registers ... Maybe we want to make all the pll low-level state like that (so both dsi_pll and dpll_hw_state)? Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck 2018-10-17 11:09 [PATCH v2 0/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck Hans de Goede 2018-10-17 11:09 ` [PATCH v2 1/2] drm/i915/intel_dsi: Move initialization of encoder variables up a bit Hans de Goede 2018-10-17 11:09 ` [PATCH v2 2/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2 Hans de Goede @ 2018-10-17 11:17 ` Patchwork 2018-10-17 11:42 ` ✓ Fi.CI.BAT: success " Patchwork 2018-10-17 15:07 ` ✓ Fi.CI.IGT: " Patchwork 4 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2018-10-17 11:17 UTC (permalink / raw) To: Hans de Goede; +Cc: intel-gfx == Series Details == Series: drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck URL : https://patchwork.freedesktop.org/series/51114/ State : warning == Summary == $ dim checkpatch origin/drm-tip 671e7f756caa drm/i915/intel_dsi: Move initialization of encoder variables up a bit -:39: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Hans de Goede <j.w.r.degoede@gmail.com>' total: 0 errors, 1 warnings, 0 checks, 18 lines checked 536cb6ed0390 drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2 -:57: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Hans de Goede <j.w.r.degoede@gmail.com>' total: 0 errors, 1 warnings, 0 checks, 30 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck 2018-10-17 11:09 [PATCH v2 0/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck Hans de Goede ` (2 preceding siblings ...) 2018-10-17 11:17 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck Patchwork @ 2018-10-17 11:42 ` Patchwork 2018-10-17 15:07 ` ✓ Fi.CI.IGT: " Patchwork 4 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2018-10-17 11:42 UTC (permalink / raw) To: Hans de Goede; +Cc: intel-gfx == Series Details == Series: drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck URL : https://patchwork.freedesktop.org/series/51114/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4996 -> Patchwork_10488 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51114/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10488 that come from known issues: === IGT changes === ==== Issues hit ==== igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#107362) ==== Possible fixes ==== igt@drv_selftest@live_evict: fi-bsw-kefka: DMESG-WARN (fdo#107709) -> PASS igt@gem_exec_suspend@basic-s3: fi-icl-u: INCOMPLETE (fdo#107713) -> PASS fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107709 https://bugs.freedesktop.org/show_bug.cgi?id=107709 fdo#107713 https://bugs.freedesktop.org/show_bug.cgi?id=107713 == Participating hosts (46 -> 41) == Additional (1): fi-pnv-d510 Missing (6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m == Build changes == * Linux: CI_DRM_4996 -> Patchwork_10488 CI_DRM_4996: 3e17cf0ad3733a3d67045393727066bbd011b69d @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10488: 536cb6ed03908392878d5a02923d4702d0bfba81 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 536cb6ed0390 drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2 671e7f756caa drm/i915/intel_dsi: Move initialization of encoder variables up a bit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10488/issues.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck 2018-10-17 11:09 [PATCH v2 0/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck Hans de Goede ` (3 preceding siblings ...) 2018-10-17 11:42 ` ✓ Fi.CI.BAT: success " Patchwork @ 2018-10-17 15:07 ` Patchwork 4 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2018-10-17 15:07 UTC (permalink / raw) To: Hans de Goede; +Cc: intel-gfx == Series Details == Series: drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck URL : https://patchwork.freedesktop.org/series/51114/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4996_full -> Patchwork_10488_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10488_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10488_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10488_full: === IGT changes === ==== Warnings ==== igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10488_full that come from known issues: === IGT changes === ==== Issues hit ==== igt@gem_exec_await@wide-contexts: shard-glk: PASS -> FAIL (fdo#106680) igt@gem_softpin@noreloc-s3: shard-skl: PASS -> INCOMPLETE (fdo#107773, fdo#104108) igt@gem_userptr_blits@readonly-unsync: shard-skl: PASS -> INCOMPLETE (fdo#108074) igt@kms_atomic_transition@1x-modeset-transitions-fencing: shard-skl: PASS -> FAIL (fdo#108470) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_ccs@pipe-b-crc-sprite-planes-basic: shard-glk: PASS -> FAIL (fdo#108145) igt@kms_color@pipe-a-ctm-blue-to-red: shard-skl: PASS -> FAIL (fdo#107201) igt@kms_color@pipe-a-legacy-gamma: shard-apl: PASS -> FAIL (fdo#108145, fdo#104782) igt@kms_cursor_crc@cursor-128x128-suspend: shard-apl: PASS -> FAIL (fdo#103232, fdo#103191) igt@kms_cursor_crc@cursor-128x42-sliding: shard-glk: PASS -> FAIL (fdo#103232) +1 igt@kms_cursor_crc@cursor-256x256-random: shard-apl: PASS -> FAIL (fdo#103232) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: shard-apl: PASS -> FAIL (fdo#103167) +1 igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-gtt: shard-skl: PASS -> FAIL (fdo#103167) igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: shard-skl: PASS -> FAIL (fdo#108145, fdo#107815) igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb: shard-skl: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-glk: PASS -> FAIL (fdo#103166) +1 igt@pm_rpm@pm-caching: shard-skl: PASS -> INCOMPLETE (fdo#107807) ==== Possible fixes ==== igt@drv_suspend@fence-restore-untiled: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@kms_cursor_crc@cursor-256x85-sliding: shard-glk: FAIL (fdo#103232) -> PASS igt@kms_cursor_crc@cursor-64x64-suspend: shard-skl: INCOMPLETE (fdo#104108) -> PASS igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-skl: FAIL (fdo#105363) -> PASS igt@kms_plane@plane-position-covered-pipe-b-planes: shard-glk: FAIL (fdo#103166) -> PASS igt@kms_plane_multiple@atomic-pipe-a-tiling-y: shard-apl: FAIL (fdo#103166) -> PASS igt@kms_setmode@basic: shard-hsw: FAIL (fdo#99912) -> PASS fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680 fdo#107201 https://bugs.freedesktop.org/show_bug.cgi?id=107201 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#107815 https://bugs.freedesktop.org/show_bug.cgi?id=107815 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108074 https://bugs.freedesktop.org/show_bug.cgi?id=108074 fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 fdo#108470 https://bugs.freedesktop.org/show_bug.cgi?id=108470 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (6 -> 6) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4996 -> Patchwork_10488 CI_DRM_4996: 3e17cf0ad3733a3d67045393727066bbd011b69d @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10488: 536cb6ed03908392878d5a02923d4702d0bfba81 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10488/shards.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2018-10-19 14:29 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2018-10-17 11:09 [PATCH v2 0/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck Hans de Goede 2018-10-17 11:09 ` [PATCH v2 1/2] drm/i915/intel_dsi: Move initialization of encoder variables up a bit Hans de Goede 2018-10-17 11:09 ` [PATCH v2 2/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2 Hans de Goede 2018-10-19 9:20 ` Jani Nikula 2018-10-19 13:49 ` Hans de Goede 2018-10-19 14:29 ` Daniel Vetter 2018-10-17 11:17 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck Patchwork 2018-10-17 11:42 ` ✓ Fi.CI.BAT: success " Patchwork 2018-10-17 15:07 ` ✓ Fi.CI.IGT: " Patchwork
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