* [PATCH] drm/i915: Whitelist context-local timestamp in the gen9 cmdparser
@ 2020-06-01 16:19 ` Chris Wilson
0 siblings, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2020-06-01 16:19 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson, Mika Kuoppala, stable
Allow batch buffers to read their own _local_ cumulative HW runtime of
their logical context.
Fixes: 0f2f39758341 ("drm/i915: Add gen9 BCS cmdparsing")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: <stable@vger.kernel.org> # v5.4+
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 189b573d02be..372354d33f55 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -572,6 +572,9 @@ struct drm_i915_reg_descriptor {
#define REG32(_reg, ...) \
{ .addr = (_reg), __VA_ARGS__ }
+#define REG32_IDX(_reg, idx) \
+ { .addr = _reg(idx) }
+
/*
* Convenience macro for adding 64-bit registers.
*
@@ -669,6 +672,7 @@ static const struct drm_i915_reg_descriptor gen9_blt_regs[] = {
REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
REG32(BCS_SWCTRL),
REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
+ REG32_IDX(RING_CTX_TIMESTAMP, BLT_RING_BASE),
REG64_IDX(BCS_GPR, 0),
REG64_IDX(BCS_GPR, 1),
REG64_IDX(BCS_GPR, 2),
--
2.20.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [Intel-gfx] [PATCH] drm/i915: Whitelist context-local timestamp in the gen9 cmdparser
@ 2020-06-01 16:19 ` Chris Wilson
0 siblings, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2020-06-01 16:19 UTC (permalink / raw)
To: intel-gfx; +Cc: stable, Chris Wilson
Allow batch buffers to read their own _local_ cumulative HW runtime of
their logical context.
Fixes: 0f2f39758341 ("drm/i915: Add gen9 BCS cmdparsing")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: <stable@vger.kernel.org> # v5.4+
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 189b573d02be..372354d33f55 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -572,6 +572,9 @@ struct drm_i915_reg_descriptor {
#define REG32(_reg, ...) \
{ .addr = (_reg), __VA_ARGS__ }
+#define REG32_IDX(_reg, idx) \
+ { .addr = _reg(idx) }
+
/*
* Convenience macro for adding 64-bit registers.
*
@@ -669,6 +672,7 @@ static const struct drm_i915_reg_descriptor gen9_blt_regs[] = {
REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
REG32(BCS_SWCTRL),
REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
+ REG32_IDX(RING_CTX_TIMESTAMP, BLT_RING_BASE),
REG64_IDX(BCS_GPR, 0),
REG64_IDX(BCS_GPR, 1),
REG64_IDX(BCS_GPR, 2),
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Whitelist context-local timestamp in the gen9 cmdparser
2020-06-01 16:19 ` [Intel-gfx] " Chris Wilson
(?)
@ 2020-06-01 17:05 ` Patchwork
-1 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2020-06-01 17:05 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Whitelist context-local timestamp in the gen9 cmdparser
URL : https://patchwork.freedesktop.org/series/77877/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8565 -> Patchwork_17833
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17833/index.html
Known issues
------------
Here are the changes found in Patchwork_17833 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][1] -> [FAIL][2] ([i915#227])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8565/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17833/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
#### Warnings ####
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [FAIL][3] ([i915#62]) -> [SKIP][4] ([fdo#109271])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8565/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17833/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#227]: https://gitlab.freedesktop.org/drm/intel/issues/227
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
Participating hosts (50 -> 44)
------------------------------
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_8565 -> Patchwork_17833
CI-20190529: 20190529
CI_DRM_8565: 267bdbf5f8ba7c0931eb6c11a3b9eb893b10fead @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5689: 587cbed206689abbad60689d4a32bf9caf0cc124 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17833: 9d9cdd9da66e9c37b9a91aaecba4b86b10fbeee0 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
9d9cdd9da66e drm/i915: Whitelist context-local timestamp in the gen9 cmdparser
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17833/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: Whitelist context-local timestamp in the gen9 cmdparser
2020-06-01 16:19 ` [Intel-gfx] " Chris Wilson
@ 2020-06-01 18:23 ` Mika Kuoppala
-1 siblings, 0 replies; 5+ messages in thread
From: Mika Kuoppala @ 2020-06-01 18:23 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: Chris Wilson, stable
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Allow batch buffers to read their own _local_ cumulative HW runtime of
> their logical context.
>
> Fixes: 0f2f39758341 ("drm/i915: Add gen9 BCS cmdparsing")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: <stable@vger.kernel.org> # v5.4+
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
> index 189b573d02be..372354d33f55 100644
> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
> @@ -572,6 +572,9 @@ struct drm_i915_reg_descriptor {
> #define REG32(_reg, ...) \
> { .addr = (_reg), __VA_ARGS__ }
>
> +#define REG32_IDX(_reg, idx) \
> + { .addr = _reg(idx) }
> +
> /*
> * Convenience macro for adding 64-bit registers.
> *
> @@ -669,6 +672,7 @@ static const struct drm_i915_reg_descriptor gen9_blt_regs[] = {
> REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
> REG32(BCS_SWCTRL),
> REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
> + REG32_IDX(RING_CTX_TIMESTAMP, BLT_RING_BASE),
> REG64_IDX(BCS_GPR, 0),
> REG64_IDX(BCS_GPR, 1),
> REG64_IDX(BCS_GPR, 2),
> --
> 2.20.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: Whitelist context-local timestamp in the gen9 cmdparser
@ 2020-06-01 18:23 ` Mika Kuoppala
0 siblings, 0 replies; 5+ messages in thread
From: Mika Kuoppala @ 2020-06-01 18:23 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: stable, Chris Wilson
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Allow batch buffers to read their own _local_ cumulative HW runtime of
> their logical context.
>
> Fixes: 0f2f39758341 ("drm/i915: Add gen9 BCS cmdparsing")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: <stable@vger.kernel.org> # v5.4+
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
> index 189b573d02be..372354d33f55 100644
> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
> @@ -572,6 +572,9 @@ struct drm_i915_reg_descriptor {
> #define REG32(_reg, ...) \
> { .addr = (_reg), __VA_ARGS__ }
>
> +#define REG32_IDX(_reg, idx) \
> + { .addr = _reg(idx) }
> +
> /*
> * Convenience macro for adding 64-bit registers.
> *
> @@ -669,6 +672,7 @@ static const struct drm_i915_reg_descriptor gen9_blt_regs[] = {
> REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
> REG32(BCS_SWCTRL),
> REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
> + REG32_IDX(RING_CTX_TIMESTAMP, BLT_RING_BASE),
> REG64_IDX(BCS_GPR, 0),
> REG64_IDX(BCS_GPR, 1),
> REG64_IDX(BCS_GPR, 2),
> --
> 2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-06-01 18:53 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2020-06-01 16:19 [PATCH] drm/i915: Whitelist context-local timestamp in the gen9 cmdparser Chris Wilson
2020-06-01 16:19 ` [Intel-gfx] " Chris Wilson
2020-06-01 17:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-06-01 18:23 ` [PATCH] " Mika Kuoppala
2020-06-01 18:23 ` [Intel-gfx] " Mika Kuoppala
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