From: Marc Zyngier <maz@kernel.org> To: Yanan Wang <wangyanan55@huawei.com> Cc: kvm@vger.kernel.org, Will Deacon <will@kernel.org>, linux-kernel@vger.kernel.org, Catalin Marinas <catalin.marinas@arm.com>, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v6 1/4] KVM: arm64: Introduce cache maintenance callbacks for guest stage-2 Date: Wed, 16 Jun 2021 14:21:23 +0100 [thread overview] Message-ID: <87eed2lzcc.wl-maz@kernel.org> (raw) In-Reply-To: <20210616095200.38008-2-wangyanan55@huawei.com> Hi Yanan, On Wed, 16 Jun 2021 10:51:57 +0100, Yanan Wang <wangyanan55@huawei.com> wrote: > > To prepare for performing guest CMOs in the fault handlers in pgtable.c, > introduce two cache maintenance callbacks in struct kvm_pgtable_mm_ops. > > The new callbacks are specific for guest stage-2, so they will only be > initialized in 'struct kvm_pgtable_mm_ops kvm_s2_mm_ops'. > > Signed-off-by: Yanan Wang <wangyanan55@huawei.com> > --- > arch/arm64/include/asm/kvm_pgtable.h | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h > index c3674c47d48c..302eca32e0af 100644 > --- a/arch/arm64/include/asm/kvm_pgtable.h > +++ b/arch/arm64/include/asm/kvm_pgtable.h > @@ -44,6 +44,11 @@ typedef u64 kvm_pte_t; > * in the current context. > * @virt_to_phys: Convert a virtual address mapped in the current context > * into a physical address. > + * @flush_dcache: Clean data cache for a guest page address range before > + * creating the corresponding stage-2 mapping. Please don't reintroduce the word 'flush'. We are really trying to move away from it as it doesn't describe what we want to do. Here this should be 'clean_invalidate_dcache' which, despite being a mouthful, describe accurately what we expect it to do. The comment is also missing the invalidate part, and we shouldn't assume that this is only used for S2 mapping. > + * @flush_icache: Invalidate instruction cache for a guest page address > + * range before creating or updating the corresponding > + * stage-2 mapping. Same thing here; this should be 'invalidate_icache', and the comment cleaned up. > */ > struct kvm_pgtable_mm_ops { > void* (*zalloc_page)(void *arg); > @@ -54,6 +59,8 @@ struct kvm_pgtable_mm_ops { > int (*page_count)(void *addr); > void* (*phys_to_virt)(phys_addr_t phys); > phys_addr_t (*virt_to_phys)(void *addr); > + void (*flush_dcache)(void *addr, size_t size); > + void (*flush_icache)(void *addr, size_t size); > }; > > /** Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org> To: Yanan Wang <wangyanan55@huawei.com> Cc: Will Deacon <will@kernel.org>, "Quentin\ Perret" <qperret@google.com>, Alexandru Elisei <alexandru.elisei@arm.com>, <kvmarm@lists.cs.columbia.edu>, <linux-arm-kernel@lists.infradead.org>, <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, James Morse <james.morse@arm.com>, Julien Thierry <julien.thierry.kdev@gmail.com>, "Suzuki K Poulose" <suzuki.poulose@arm.com>, Gavin Shan <gshan@redhat.com>, <wanghaibin.wang@huawei.com>, <zhukeqian1@huawei.com>, <yuzenghui@huawei.com> Subject: Re: [PATCH v6 1/4] KVM: arm64: Introduce cache maintenance callbacks for guest stage-2 Date: Wed, 16 Jun 2021 14:21:23 +0100 [thread overview] Message-ID: <87eed2lzcc.wl-maz@kernel.org> (raw) In-Reply-To: <20210616095200.38008-2-wangyanan55@huawei.com> Hi Yanan, On Wed, 16 Jun 2021 10:51:57 +0100, Yanan Wang <wangyanan55@huawei.com> wrote: > > To prepare for performing guest CMOs in the fault handlers in pgtable.c, > introduce two cache maintenance callbacks in struct kvm_pgtable_mm_ops. > > The new callbacks are specific for guest stage-2, so they will only be > initialized in 'struct kvm_pgtable_mm_ops kvm_s2_mm_ops'. > > Signed-off-by: Yanan Wang <wangyanan55@huawei.com> > --- > arch/arm64/include/asm/kvm_pgtable.h | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h > index c3674c47d48c..302eca32e0af 100644 > --- a/arch/arm64/include/asm/kvm_pgtable.h > +++ b/arch/arm64/include/asm/kvm_pgtable.h > @@ -44,6 +44,11 @@ typedef u64 kvm_pte_t; > * in the current context. > * @virt_to_phys: Convert a virtual address mapped in the current context > * into a physical address. > + * @flush_dcache: Clean data cache for a guest page address range before > + * creating the corresponding stage-2 mapping. Please don't reintroduce the word 'flush'. We are really trying to move away from it as it doesn't describe what we want to do. Here this should be 'clean_invalidate_dcache' which, despite being a mouthful, describe accurately what we expect it to do. The comment is also missing the invalidate part, and we shouldn't assume that this is only used for S2 mapping. > + * @flush_icache: Invalidate instruction cache for a guest page address > + * range before creating or updating the corresponding > + * stage-2 mapping. Same thing here; this should be 'invalidate_icache', and the comment cleaned up. > */ > struct kvm_pgtable_mm_ops { > void* (*zalloc_page)(void *arg); > @@ -54,6 +59,8 @@ struct kvm_pgtable_mm_ops { > int (*page_count)(void *addr); > void* (*phys_to_virt)(phys_addr_t phys); > phys_addr_t (*virt_to_phys)(void *addr); > + void (*flush_dcache)(void *addr, size_t size); > + void (*flush_icache)(void *addr, size_t size); > }; > > /** Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-16 13:21 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-16 9:51 [PATCH v6 0/4] KVM: arm64: Improve efficiency of stage2 page table Yanan Wang 2021-06-16 9:51 ` Yanan Wang 2021-06-16 9:51 ` Yanan Wang 2021-06-16 9:51 ` [PATCH v6 1/4] KVM: arm64: Introduce cache maintenance callbacks for guest stage-2 Yanan Wang 2021-06-16 9:51 ` Yanan Wang 2021-06-16 9:51 ` Yanan Wang 2021-06-16 13:21 ` Marc Zyngier [this message] 2021-06-16 13:21 ` Marc Zyngier 2021-06-17 6:48 ` wangyanan (Y) 2021-06-17 6:48 ` wangyanan (Y) 2021-06-17 6:48 ` wangyanan (Y) 2021-06-17 8:03 ` Marc Zyngier 2021-06-17 8:03 ` Marc Zyngier 2021-06-17 8:03 ` Marc Zyngier 2021-06-17 8:22 ` wangyanan (Y) 2021-06-17 8:22 ` wangyanan (Y) 2021-06-17 8:22 ` wangyanan (Y) 2021-06-17 8:44 ` Marc Zyngier 2021-06-17 8:44 ` Marc Zyngier 2021-06-17 8:44 ` Marc Zyngier 2021-06-17 9:43 ` wangyanan (Y) 2021-06-17 9:43 ` wangyanan (Y) 2021-06-17 9:43 ` wangyanan (Y) 2021-06-17 10:43 ` Marc Zyngier 2021-06-17 10:43 ` Marc Zyngier 2021-06-17 10:43 ` Marc Zyngier 2021-06-18 8:50 ` Fuad Tabba 2021-06-18 8:50 ` Fuad Tabba 2021-06-18 8:50 ` Fuad Tabba 2021-06-16 9:51 ` [PATCH v6 2/4] KVM: arm64: Introduce mm_ops member for structure stage2_attr_data Yanan Wang 2021-06-16 9:51 ` Yanan Wang 2021-06-16 9:51 ` Yanan Wang 2021-06-16 9:51 ` [PATCH v6 3/4] KVM: arm64: Tweak parameters of guest cache maintenance functions Yanan Wang 2021-06-16 9:51 ` Yanan Wang 2021-06-16 9:51 ` Yanan Wang 2021-06-16 9:52 ` [PATCH v6 4/4] KVM: arm64: Move guest CMOs to the fault handlers Yanan Wang 2021-06-16 9:52 ` Yanan Wang 2021-06-16 9:52 ` Yanan Wang 2021-06-17 8:00 ` Marc Zyngier 2021-06-17 8:00 ` Marc Zyngier
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