[PATCH v2 1/4] drm/i915/dsc: make parameter arrays const

[PATCH v2 1/4] drm/i915/dsc: make parameter arrays const

[Jani Nikula]

No need for them to be mutable.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 9cb36f855f07..763f1d7208e9 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -33,7 +33,7 @@ enum COLUMN_INDEX_BPC {
 #define DSC_SUPPORTED_VERSION_MIN		1
 
 /* From DSC_v1.11 spec, rc_parameter_Set syntax element typically constant */
-static u16 rc_buf_thresh[] = {
+static const u16 rc_buf_thresh[] = {
 	896, 1792, 2688, 3584, 4480, 5376, 6272, 6720, 7168, 7616,
 	7744, 7872, 8000, 8064
 };
@@ -53,7 +53,7 @@ struct rc_parameters {
  * Selected Rate Control Related Parameter Recommended Values
  * from DSC_v1.11 spec & C Model release: DSC_model_20161212
  */
-static struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
+static const struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
 {
 	/* 6BPP/8BPC */
 	{ 768, 15, 6144, 3, 13, 11, 11, {
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 1/4] drm/i915/dsc: make parameter arrays const

[Jani Nikula]

No need for them to be mutable.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 9cb36f855f07..763f1d7208e9 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -33,7 +33,7 @@ enum COLUMN_INDEX_BPC {
 #define DSC_SUPPORTED_VERSION_MIN		1
 
 /* From DSC_v1.11 spec, rc_parameter_Set syntax element typically constant */
-static u16 rc_buf_thresh[] = {
+static const u16 rc_buf_thresh[] = {
 	896, 1792, 2688, 3584, 4480, 5376, 6272, 6720, 7168, 7616,
 	7744, 7872, 8000, 8064
 };
@@ -53,7 +53,7 @@ struct rc_parameters {
  * Selected Rate Control Related Parameter Recommended Values
  * from DSC_v1.11 spec & C Model release: DSC_model_20161212
  */
-static struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
+static const struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
 {
 	/* 6BPP/8BPC */
 	{ 768, 15, 6144, 3, 13, 11, 11, {
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v2 2/4] drm/i915/dsc: clean up rc parameter table access

[Jani Nikula]

Use a simple pointer to the relevant element instead of duplicating the
array subscription. No functional changes.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 55 ++++++++++++-----------
 1 file changed, 30 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 763f1d7208e9..f1df654369a7 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -53,7 +53,7 @@ struct rc_parameters {
  * Selected Rate Control Related Parameter Recommended Values
  * from DSC_v1.11 spec & C Model release: DSC_model_20161212
  */
-static const struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
+static const struct rc_parameters rc_parameters[][MAX_COLUMN_INDEX] = {
 {
 	/* 6BPP/8BPC */
 	{ 768, 15, 6144, 3, 13, 11, 11, {
@@ -319,14 +319,29 @@ static int get_column_index_for_rc_params(u8 bits_per_component)
 	}
 }
 
+static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
+						 u8 bits_per_component)
+{
+	int row_index, column_index;
+
+	row_index = get_row_index_for_rc_params(compressed_bpp);
+	if (row_index < 0)
+		return NULL;
+
+	column_index = get_column_index_for_rc_params(bits_per_component);
+	if (column_index < 0)
+		return NULL;
+
+	return &rc_parameters[row_index][column_index];
+}
+
 int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
 				struct intel_crtc_state *pipe_config)
 {
 	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
 	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
+	const struct rc_parameters *rc_params;
 	u8 i = 0;
-	int row_index = 0;
-	int column_index = 0;
 	u8 line_buf_depth = 0;
 
 	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
@@ -399,39 +414,29 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
 		vdsc_cfg->rc_buf_thresh[13] = 0x7D;
 	}
 
-	row_index = get_row_index_for_rc_params(compressed_bpp);
-	column_index =
-		get_column_index_for_rc_params(vdsc_cfg->bits_per_component);
-
-	if (row_index < 0 || column_index < 0)
+	rc_params = get_rc_params(compressed_bpp, vdsc_cfg->bits_per_component);
+	if (!rc_params)
 		return -EINVAL;
 
-	vdsc_cfg->first_line_bpg_offset =
-		rc_params[row_index][column_index].first_line_bpg_offset;
-	vdsc_cfg->initial_xmit_delay =
-		rc_params[row_index][column_index].initial_xmit_delay;
-	vdsc_cfg->initial_offset =
-		rc_params[row_index][column_index].initial_offset;
-	vdsc_cfg->flatness_min_qp =
-		rc_params[row_index][column_index].flatness_min_qp;
-	vdsc_cfg->flatness_max_qp =
-		rc_params[row_index][column_index].flatness_max_qp;
-	vdsc_cfg->rc_quant_incr_limit0 =
-		rc_params[row_index][column_index].rc_quant_incr_limit0;
-	vdsc_cfg->rc_quant_incr_limit1 =
-		rc_params[row_index][column_index].rc_quant_incr_limit1;
+	vdsc_cfg->first_line_bpg_offset = rc_params->first_line_bpg_offset;
+	vdsc_cfg->initial_xmit_delay = rc_params->initial_xmit_delay;
+	vdsc_cfg->initial_offset = rc_params->initial_offset;
+	vdsc_cfg->flatness_min_qp = rc_params->flatness_min_qp;
+	vdsc_cfg->flatness_max_qp = rc_params->flatness_max_qp;
+	vdsc_cfg->rc_quant_incr_limit0 = rc_params->rc_quant_incr_limit0;
+	vdsc_cfg->rc_quant_incr_limit1 = rc_params->rc_quant_incr_limit1;
 
 	for (i = 0; i < DSC_NUM_BUF_RANGES; i++) {
 		vdsc_cfg->rc_range_params[i].range_min_qp =
-			rc_params[row_index][column_index].rc_range_params[i].range_min_qp;
+			rc_params->rc_range_params[i].range_min_qp;
 		vdsc_cfg->rc_range_params[i].range_max_qp =
-			rc_params[row_index][column_index].rc_range_params[i].range_max_qp;
+			rc_params->rc_range_params[i].range_max_qp;
 		/*
 		 * Range BPG Offset uses 2's complement and is only a 6 bits. So
 		 * mask it to get only 6 bits.
 		 */
 		vdsc_cfg->rc_range_params[i].range_bpg_offset =
-			rc_params[row_index][column_index].rc_range_params[i].range_bpg_offset &
+			rc_params->rc_range_params[i].range_bpg_offset &
 			DSC_RANGE_BPG_OFFSET_MASK;
 	}
 
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 2/4] drm/i915/dsc: clean up rc parameter table access

[Jani Nikula]

Use a simple pointer to the relevant element instead of duplicating the
array subscription. No functional changes.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 55 ++++++++++++-----------
 1 file changed, 30 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 763f1d7208e9..f1df654369a7 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -53,7 +53,7 @@ struct rc_parameters {
  * Selected Rate Control Related Parameter Recommended Values
  * from DSC_v1.11 spec & C Model release: DSC_model_20161212
  */
-static const struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
+static const struct rc_parameters rc_parameters[][MAX_COLUMN_INDEX] = {
 {
 	/* 6BPP/8BPC */
 	{ 768, 15, 6144, 3, 13, 11, 11, {
@@ -319,14 +319,29 @@ static int get_column_index_for_rc_params(u8 bits_per_component)
 	}
 }
 
+static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
+						 u8 bits_per_component)
+{
+	int row_index, column_index;
+
+	row_index = get_row_index_for_rc_params(compressed_bpp);
+	if (row_index < 0)
+		return NULL;
+
+	column_index = get_column_index_for_rc_params(bits_per_component);
+	if (column_index < 0)
+		return NULL;
+
+	return &rc_parameters[row_index][column_index];
+}
+
 int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
 				struct intel_crtc_state *pipe_config)
 {
 	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
 	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
+	const struct rc_parameters *rc_params;
 	u8 i = 0;
-	int row_index = 0;
-	int column_index = 0;
 	u8 line_buf_depth = 0;
 
 	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
@@ -399,39 +414,29 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
 		vdsc_cfg->rc_buf_thresh[13] = 0x7D;
 	}
 
-	row_index = get_row_index_for_rc_params(compressed_bpp);
-	column_index =
-		get_column_index_for_rc_params(vdsc_cfg->bits_per_component);
-
-	if (row_index < 0 || column_index < 0)
+	rc_params = get_rc_params(compressed_bpp, vdsc_cfg->bits_per_component);
+	if (!rc_params)
 		return -EINVAL;
 
-	vdsc_cfg->first_line_bpg_offset =
-		rc_params[row_index][column_index].first_line_bpg_offset;
-	vdsc_cfg->initial_xmit_delay =
-		rc_params[row_index][column_index].initial_xmit_delay;
-	vdsc_cfg->initial_offset =
-		rc_params[row_index][column_index].initial_offset;
-	vdsc_cfg->flatness_min_qp =
-		rc_params[row_index][column_index].flatness_min_qp;
-	vdsc_cfg->flatness_max_qp =
-		rc_params[row_index][column_index].flatness_max_qp;
-	vdsc_cfg->rc_quant_incr_limit0 =
-		rc_params[row_index][column_index].rc_quant_incr_limit0;
-	vdsc_cfg->rc_quant_incr_limit1 =
-		rc_params[row_index][column_index].rc_quant_incr_limit1;
+	vdsc_cfg->first_line_bpg_offset = rc_params->first_line_bpg_offset;
+	vdsc_cfg->initial_xmit_delay = rc_params->initial_xmit_delay;
+	vdsc_cfg->initial_offset = rc_params->initial_offset;
+	vdsc_cfg->flatness_min_qp = rc_params->flatness_min_qp;
+	vdsc_cfg->flatness_max_qp = rc_params->flatness_max_qp;
+	vdsc_cfg->rc_quant_incr_limit0 = rc_params->rc_quant_incr_limit0;
+	vdsc_cfg->rc_quant_incr_limit1 = rc_params->rc_quant_incr_limit1;
 
 	for (i = 0; i < DSC_NUM_BUF_RANGES; i++) {
 		vdsc_cfg->rc_range_params[i].range_min_qp =
-			rc_params[row_index][column_index].rc_range_params[i].range_min_qp;
+			rc_params->rc_range_params[i].range_min_qp;
 		vdsc_cfg->rc_range_params[i].range_max_qp =
-			rc_params[row_index][column_index].rc_range_params[i].range_max_qp;
+			rc_params->rc_range_params[i].range_max_qp;
 		/*
 		 * Range BPG Offset uses 2's complement and is only a 6 bits. So
 		 * mask it to get only 6 bits.
 		 */
 		vdsc_cfg->rc_range_params[i].range_bpg_offset =
-			rc_params[row_index][column_index].rc_range_params[i].range_bpg_offset &
+			rc_params->rc_range_params[i].range_bpg_offset &
 			DSC_RANGE_BPG_OFFSET_MASK;
 	}
 
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v2 3/4] drm/i915/dsc: split out encoder specific parts from DSC compute params

[Jani Nikula]

Split out the DP specific parts, making it easier to add DSI specific
configuration. Also move the encoder specific parts towards the end, to
allow overriding generic configuration if needed. This also improves
clarity by making it clear the encoder independent configuration does
not depend on the encoder specific parts.

v2: Rebase

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c   |  2 +-
 drivers/gpu/drm/i915/display/intel_vdsc.c | 68 ++++++++++++++---------
 drivers/gpu/drm/i915/display/intel_vdsc.h |  5 +-
 3 files changed, 45 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index fe1d683eab28..9e9593965a9a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2132,7 +2132,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 		}
 	}
 
-	ret = intel_dp_compute_dsc_params(intel_dp, pipe_config);
+	ret = intel_dsc_compute_params(&dig_port->base, pipe_config);
 	if (ret < 0) {
 		DRM_DEBUG_KMS("Cannot compute valid DSC parameters for Input Bpp = %d "
 			      "Compressed BPP = %d\n",
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index f1df654369a7..ac10736a076a 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -335,32 +335,14 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
 	return &rc_parameters[row_index][column_index];
 }
 
-int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
-				struct intel_crtc_state *pipe_config)
+/* Values filled from DSC Sink DPCD */
+static int intel_dsc_dp_compute_params(struct intel_encoder *encoder,
+				       struct intel_crtc_state *pipe_config)
 {
+	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
 	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
-	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
-	const struct rc_parameters *rc_params;
-	u8 i = 0;
-	u8 line_buf_depth = 0;
+	u8 line_buf_depth;
 
-	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
-	vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
-	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
-					     pipe_config->dsc.slice_count);
-	/*
-	 * Slice Height of 8 works for all currently available panels. So start
-	 * with that if pic_height is an integral multiple of 8.
-	 * Eventually add logic to try multiple slice heights.
-	 */
-	if (vdsc_cfg->pic_height % 8 == 0)
-		vdsc_cfg->slice_height = 8;
-	else if (vdsc_cfg->pic_height % 4 == 0)
-		vdsc_cfg->slice_height = 4;
-	else
-		vdsc_cfg->slice_height = 2;
-
-	/* Values filled from DSC Sink DPCD */
 	vdsc_cfg->dsc_version_major =
 		(intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
 		 DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
@@ -377,6 +359,7 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
 		DRM_DEBUG_KMS("DSC Sink Line Buffer Depth invalid\n");
 		return -EINVAL;
 	}
+
 	if (vdsc_cfg->dsc_version_minor == 2)
 		vdsc_cfg->line_buf_depth = (line_buf_depth == DSC_1_2_MAX_LINEBUF_DEPTH_BITS) ?
 			DSC_1_2_MAX_LINEBUF_DEPTH_VAL : line_buf_depth;
@@ -384,13 +367,42 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
 		vdsc_cfg->line_buf_depth = (line_buf_depth > DSC_1_1_MAX_LINEBUF_DEPTH_BITS) ?
 			DSC_1_1_MAX_LINEBUF_DEPTH_BITS : line_buf_depth;
 
+	vdsc_cfg->block_pred_enable =
+			intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
+		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+
+	return 0;
+}
+
+int intel_dsc_compute_params(struct intel_encoder *encoder,
+			     struct intel_crtc_state *pipe_config)
+{
+	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
+	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
+	const struct rc_parameters *rc_params;
+	u8 i = 0;
+	int ret;
+
+	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
+	vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
+	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
+					     pipe_config->dsc.slice_count);
+	/*
+	 * Slice Height of 8 works for all currently available panels. So start
+	 * with that if pic_height is an integral multiple of 8.
+	 * Eventually add logic to try multiple slice heights.
+	 */
+	if (vdsc_cfg->pic_height % 8 == 0)
+		vdsc_cfg->slice_height = 8;
+	else if (vdsc_cfg->pic_height % 4 == 0)
+		vdsc_cfg->slice_height = 4;
+	else
+		vdsc_cfg->slice_height = 2;
+
 	/* Gen 11 does not support YCbCr */
 	vdsc_cfg->simple_422 = false;
 	/* Gen 11 does not support VBR */
 	vdsc_cfg->vbr_enable = false;
-	vdsc_cfg->block_pred_enable =
-			intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
-		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
 
 	/* Gen 11 only supports integral values of bpp */
 	vdsc_cfg->bits_per_pixel = compressed_bpp << 4;
@@ -458,6 +470,10 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
 	vdsc_cfg->initial_scale_value = (vdsc_cfg->rc_model_size << 3) /
 		(vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset);
 
+	ret = intel_dsc_dp_compute_params(encoder, pipe_config);
+	if (ret)
+		return ret;
+
 	return drm_dsc_compute_rc_parameters(vdsc_cfg);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index 90d3f6017fcb..4ed2256750c3 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -8,13 +8,12 @@
 
 struct intel_encoder;
 struct intel_crtc_state;
-struct intel_dp;
 
 void intel_dsc_enable(struct intel_encoder *encoder,
 		      const struct intel_crtc_state *crtc_state);
 void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
-int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
-				struct intel_crtc_state *pipe_config);
+int intel_dsc_compute_params(struct intel_encoder *encoder,
+			     struct intel_crtc_state *pipe_config);
 enum intel_display_power_domain
 intel_dsc_power_domain(const struct intel_crtc_state *crtc_state);
 
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 3/4] drm/i915/dsc: split out encoder specific parts from DSC compute params

[Jani Nikula]

Split out the DP specific parts, making it easier to add DSI specific
configuration. Also move the encoder specific parts towards the end, to
allow overriding generic configuration if needed. This also improves
clarity by making it clear the encoder independent configuration does
not depend on the encoder specific parts.

v2: Rebase

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c   |  2 +-
 drivers/gpu/drm/i915/display/intel_vdsc.c | 68 ++++++++++++++---------
 drivers/gpu/drm/i915/display/intel_vdsc.h |  5 +-
 3 files changed, 45 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index fe1d683eab28..9e9593965a9a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2132,7 +2132,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 		}
 	}
 
-	ret = intel_dp_compute_dsc_params(intel_dp, pipe_config);
+	ret = intel_dsc_compute_params(&dig_port->base, pipe_config);
 	if (ret < 0) {
 		DRM_DEBUG_KMS("Cannot compute valid DSC parameters for Input Bpp = %d "
 			      "Compressed BPP = %d\n",
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index f1df654369a7..ac10736a076a 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -335,32 +335,14 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
 	return &rc_parameters[row_index][column_index];
 }
 
-int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
-				struct intel_crtc_state *pipe_config)
+/* Values filled from DSC Sink DPCD */
+static int intel_dsc_dp_compute_params(struct intel_encoder *encoder,
+				       struct intel_crtc_state *pipe_config)
 {
+	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
 	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
-	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
-	const struct rc_parameters *rc_params;
-	u8 i = 0;
-	u8 line_buf_depth = 0;
+	u8 line_buf_depth;
 
-	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
-	vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
-	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
-					     pipe_config->dsc.slice_count);
-	/*
-	 * Slice Height of 8 works for all currently available panels. So start
-	 * with that if pic_height is an integral multiple of 8.
-	 * Eventually add logic to try multiple slice heights.
-	 */
-	if (vdsc_cfg->pic_height % 8 == 0)
-		vdsc_cfg->slice_height = 8;
-	else if (vdsc_cfg->pic_height % 4 == 0)
-		vdsc_cfg->slice_height = 4;
-	else
-		vdsc_cfg->slice_height = 2;
-
-	/* Values filled from DSC Sink DPCD */
 	vdsc_cfg->dsc_version_major =
 		(intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
 		 DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
@@ -377,6 +359,7 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
 		DRM_DEBUG_KMS("DSC Sink Line Buffer Depth invalid\n");
 		return -EINVAL;
 	}
+
 	if (vdsc_cfg->dsc_version_minor == 2)
 		vdsc_cfg->line_buf_depth = (line_buf_depth == DSC_1_2_MAX_LINEBUF_DEPTH_BITS) ?
 			DSC_1_2_MAX_LINEBUF_DEPTH_VAL : line_buf_depth;
@@ -384,13 +367,42 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
 		vdsc_cfg->line_buf_depth = (line_buf_depth > DSC_1_1_MAX_LINEBUF_DEPTH_BITS) ?
 			DSC_1_1_MAX_LINEBUF_DEPTH_BITS : line_buf_depth;
 
+	vdsc_cfg->block_pred_enable =
+			intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
+		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+
+	return 0;
+}
+
+int intel_dsc_compute_params(struct intel_encoder *encoder,
+			     struct intel_crtc_state *pipe_config)
+{
+	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
+	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
+	const struct rc_parameters *rc_params;
+	u8 i = 0;
+	int ret;
+
+	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
+	vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
+	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
+					     pipe_config->dsc.slice_count);
+	/*
+	 * Slice Height of 8 works for all currently available panels. So start
+	 * with that if pic_height is an integral multiple of 8.
+	 * Eventually add logic to try multiple slice heights.
+	 */
+	if (vdsc_cfg->pic_height % 8 == 0)
+		vdsc_cfg->slice_height = 8;
+	else if (vdsc_cfg->pic_height % 4 == 0)
+		vdsc_cfg->slice_height = 4;
+	else
+		vdsc_cfg->slice_height = 2;
+
 	/* Gen 11 does not support YCbCr */
 	vdsc_cfg->simple_422 = false;
 	/* Gen 11 does not support VBR */
 	vdsc_cfg->vbr_enable = false;
-	vdsc_cfg->block_pred_enable =
-			intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
-		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
 
 	/* Gen 11 only supports integral values of bpp */
 	vdsc_cfg->bits_per_pixel = compressed_bpp << 4;
@@ -458,6 +470,10 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
 	vdsc_cfg->initial_scale_value = (vdsc_cfg->rc_model_size << 3) /
 		(vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset);
 
+	ret = intel_dsc_dp_compute_params(encoder, pipe_config);
+	if (ret)
+		return ret;
+
 	return drm_dsc_compute_rc_parameters(vdsc_cfg);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index 90d3f6017fcb..4ed2256750c3 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -8,13 +8,12 @@
 
 struct intel_encoder;
 struct intel_crtc_state;
-struct intel_dp;
 
 void intel_dsc_enable(struct intel_encoder *encoder,
 		      const struct intel_crtc_state *crtc_state);
 void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
-int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
-				struct intel_crtc_state *pipe_config);
+int intel_dsc_compute_params(struct intel_encoder *encoder,
+			     struct intel_crtc_state *pipe_config);
 enum intel_display_power_domain
 intel_dsc_power_domain(const struct intel_crtc_state *crtc_state);
 
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v2 4/4] drm/i915/dsc: rename functions for consistency

[Jani Nikula]

Use intel_dsc_ prefix. No functional changes.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index ac10736a076a..b23ba8d108db 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -501,8 +501,8 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
 		return POWER_DOMAIN_TRANSCODER(cpu_transcoder);
 }
 
-static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
-						const struct intel_crtc_state *crtc_state)
+static void intel_dsc_pps_configure(struct intel_encoder *encoder,
+				    const struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
@@ -901,8 +901,8 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
 	}
 }
 
-static void intel_dp_write_dsc_pps_sdp(struct intel_encoder *encoder,
-				       const struct intel_crtc_state *crtc_state)
+static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
+				   const struct intel_crtc_state *crtc_state)
 {
 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
@@ -937,9 +937,9 @@ void intel_dsc_enable(struct intel_encoder *encoder,
 	intel_display_power_get(dev_priv,
 				intel_dsc_power_domain(crtc_state));
 
-	intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
+	intel_dsc_pps_configure(encoder, crtc_state);
 
-	intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
+	intel_dsc_dp_pps_write(encoder, crtc_state);
 
 	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
 		dss_ctl1_reg = DSS_CTL1;
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 4/4] drm/i915/dsc: rename functions for consistency

[Jani Nikula]

Use intel_dsc_ prefix. No functional changes.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index ac10736a076a..b23ba8d108db 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -501,8 +501,8 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
 		return POWER_DOMAIN_TRANSCODER(cpu_transcoder);
 }
 
-static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
-						const struct intel_crtc_state *crtc_state)
+static void intel_dsc_pps_configure(struct intel_encoder *encoder,
+				    const struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
@@ -901,8 +901,8 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
 	}
 }
 
-static void intel_dp_write_dsc_pps_sdp(struct intel_encoder *encoder,
-				       const struct intel_crtc_state *crtc_state)
+static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
+				   const struct intel_crtc_state *crtc_state)
 {
 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
@@ -937,9 +937,9 @@ void intel_dsc_enable(struct intel_encoder *encoder,
 	intel_display_power_get(dev_priv,
 				intel_dsc_power_domain(crtc_state));
 
-	intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
+	intel_dsc_pps_configure(encoder, crtc_state);
 
-	intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
+	intel_dsc_dp_pps_write(encoder, crtc_state);
 
 	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
 		dss_ctl1_reg = DSS_CTL1;
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const
URL   : https://patchwork.freedesktop.org/series/68947/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7252 -> Patchwork_15122
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/index.html

Known issues
------------

  Here are the changes found in Patchwork_15122 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_flink_basic@bad-flink:
    - fi-icl-u3:          [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/fi-icl-u3/igt@gem_flink_basic@bad-flink.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/fi-icl-u3/igt@gem_flink_basic@bad-flink.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-icl-u2:          [PASS][3] -> [FAIL][4] ([fdo#109570])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_blt:
    - fi-bsw-nick:        [DMESG-FAIL][5] ([fdo#112176]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/fi-bsw-nick/igt@i915_selftest@live_blt.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/fi-bsw-nick/igt@i915_selftest@live_blt.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][7] ([fdo#111407]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@prime_busy@basic-wait-before-default:
    - fi-icl-u3:          [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/fi-icl-u3/igt@prime_busy@basic-wait-before-default.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/fi-icl-u3/igt@prime_busy@basic-wait-before-default.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
  [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109570]: https://bugs.freedesktop.org/show_bug.cgi?id=109570
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111154]: https://bugs.freedesktop.org/show_bug.cgi?id=111154
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#112176]: https://bugs.freedesktop.org/show_bug.cgi?id=112176


Participating hosts (53 -> 44)
------------------------------

  Additional (1): fi-hsw-4770r 
  Missing    (10): fi-ilk-m540 fi-tgl-u2 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-ctg-p8600 fi-gdg-551 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7252 -> Patchwork_15122

  CI-20190529: 20190529
  CI_DRM_7252: 1971e2dbb8626482b7ed182d6e96a6810020b95e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5259: 6237a45d8699b2ccb4512e222ce6c94a1c77f83b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15122: b16942c497da373471965a7690a85984f40fa6f7 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

b16942c497da drm/i915/dsc: rename functions for consistency
2af3d02f2d66 drm/i915/dsc: split out encoder specific parts from DSC compute params
2a4d66cb0f24 drm/i915/dsc: clean up rc parameter table access
cf1310fbefdc drm/i915/dsc: make parameter arrays const

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const
URL   : https://patchwork.freedesktop.org/series/68947/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7252 -> Patchwork_15122
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/index.html

Known issues
------------

  Here are the changes found in Patchwork_15122 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_flink_basic@bad-flink:
    - fi-icl-u3:          [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/fi-icl-u3/igt@gem_flink_basic@bad-flink.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/fi-icl-u3/igt@gem_flink_basic@bad-flink.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-icl-u2:          [PASS][3] -> [FAIL][4] ([fdo#109570])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_blt:
    - fi-bsw-nick:        [DMESG-FAIL][5] ([fdo#112176]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/fi-bsw-nick/igt@i915_selftest@live_blt.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/fi-bsw-nick/igt@i915_selftest@live_blt.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][7] ([fdo#111407]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@prime_busy@basic-wait-before-default:
    - fi-icl-u3:          [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/fi-icl-u3/igt@prime_busy@basic-wait-before-default.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/fi-icl-u3/igt@prime_busy@basic-wait-before-default.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
  [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109570]: https://bugs.freedesktop.org/show_bug.cgi?id=109570
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111154]: https://bugs.freedesktop.org/show_bug.cgi?id=111154
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#112176]: https://bugs.freedesktop.org/show_bug.cgi?id=112176


Participating hosts (53 -> 44)
------------------------------

  Additional (1): fi-hsw-4770r 
  Missing    (10): fi-ilk-m540 fi-tgl-u2 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-ctg-p8600 fi-gdg-551 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7252 -> Patchwork_15122

  CI-20190529: 20190529
  CI_DRM_7252: 1971e2dbb8626482b7ed182d6e96a6810020b95e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5259: 6237a45d8699b2ccb4512e222ce6c94a1c77f83b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15122: b16942c497da373471965a7690a85984f40fa6f7 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

b16942c497da drm/i915/dsc: rename functions for consistency
2af3d02f2d66 drm/i915/dsc: split out encoder specific parts from DSC compute params
2a4d66cb0f24 drm/i915/dsc: clean up rc parameter table access
cf1310fbefdc drm/i915/dsc: make parameter arrays const

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2 1/4] drm/i915/dsc: make parameter arrays const

[Manasi Navare]

On Mon, Nov 04, 2019 at 04:14:36PM +0200, Jani Nikula wrote:
> No need for them to be mutable.
> 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Agree that these params are constants

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 9cb36f855f07..763f1d7208e9 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -33,7 +33,7 @@ enum COLUMN_INDEX_BPC {
>  #define DSC_SUPPORTED_VERSION_MIN		1
>  
>  /* From DSC_v1.11 spec, rc_parameter_Set syntax element typically constant */
> -static u16 rc_buf_thresh[] = {
> +static const u16 rc_buf_thresh[] = {
>  	896, 1792, 2688, 3584, 4480, 5376, 6272, 6720, 7168, 7616,
>  	7744, 7872, 8000, 8064
>  };
> @@ -53,7 +53,7 @@ struct rc_parameters {
>   * Selected Rate Control Related Parameter Recommended Values
>   * from DSC_v1.11 spec & C Model release: DSC_model_20161212
>   */
> -static struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
> +static const struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
>  {
>  	/* 6BPP/8BPC */
>  	{ 768, 15, 6144, 3, 13, 11, 11, {
> -- 
> 2.20.1
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/dsc: make parameter arrays const

[Manasi Navare]

On Mon, Nov 04, 2019 at 04:14:36PM +0200, Jani Nikula wrote:
> No need for them to be mutable.
> 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Agree that these params are constants

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 9cb36f855f07..763f1d7208e9 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -33,7 +33,7 @@ enum COLUMN_INDEX_BPC {
>  #define DSC_SUPPORTED_VERSION_MIN		1
>  
>  /* From DSC_v1.11 spec, rc_parameter_Set syntax element typically constant */
> -static u16 rc_buf_thresh[] = {
> +static const u16 rc_buf_thresh[] = {
>  	896, 1792, 2688, 3584, 4480, 5376, 6272, 6720, 7168, 7616,
>  	7744, 7872, 8000, 8064
>  };
> @@ -53,7 +53,7 @@ struct rc_parameters {
>   * Selected Rate Control Related Parameter Recommended Values
>   * from DSC_v1.11 spec & C Model release: DSC_model_20161212
>   */
> -static struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
> +static const struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
>  {
>  	/* 6BPP/8BPC */
>  	{ 768, 15, 6144, 3, 13, 11, 11, {
> -- 
> 2.20.1
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2 4/4] drm/i915/dsc: rename functions for consistency

[Manasi Navare]

On Mon, Nov 04, 2019 at 04:14:39PM +0200, Jani Nikula wrote:
> Use intel_dsc_ prefix. No functional changes.
> 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index ac10736a076a..b23ba8d108db 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -501,8 +501,8 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
>  		return POWER_DOMAIN_TRANSCODER(cpu_transcoder);
>  }
>  
> -static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
> -						const struct intel_crtc_state *crtc_state)
> +static void intel_dsc_pps_configure(struct intel_encoder *encoder,
> +				    const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> @@ -901,8 +901,8 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
>  	}
>  }
>  
> -static void intel_dp_write_dsc_pps_sdp(struct intel_encoder *encoder,
> -				       const struct intel_crtc_state *crtc_state)
> +static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
> +				   const struct intel_crtc_state *crtc_state)

This function writes pps header and packs pps payload, if that also applies to dsi dsc
then we can get rid of the _dp in this function.

if it doesnt apply, the rename looks good to me and in that case:

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

>  {
>  	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
>  	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> @@ -937,9 +937,9 @@ void intel_dsc_enable(struct intel_encoder *encoder,
>  	intel_display_power_get(dev_priv,
>  				intel_dsc_power_domain(crtc_state));
>  
> -	intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
> +	intel_dsc_pps_configure(encoder, crtc_state);
>  
> -	intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
> +	intel_dsc_dp_pps_write(encoder, crtc_state);
>  
>  	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
>  		dss_ctl1_reg = DSS_CTL1;
> -- 
> 2.20.1
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH v2 4/4] drm/i915/dsc: rename functions for consistency

[Manasi Navare]

On Mon, Nov 04, 2019 at 04:14:39PM +0200, Jani Nikula wrote:
> Use intel_dsc_ prefix. No functional changes.
> 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index ac10736a076a..b23ba8d108db 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -501,8 +501,8 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
>  		return POWER_DOMAIN_TRANSCODER(cpu_transcoder);
>  }
>  
> -static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
> -						const struct intel_crtc_state *crtc_state)
> +static void intel_dsc_pps_configure(struct intel_encoder *encoder,
> +				    const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> @@ -901,8 +901,8 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
>  	}
>  }
>  
> -static void intel_dp_write_dsc_pps_sdp(struct intel_encoder *encoder,
> -				       const struct intel_crtc_state *crtc_state)
> +static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
> +				   const struct intel_crtc_state *crtc_state)

This function writes pps header and packs pps payload, if that also applies to dsi dsc
then we can get rid of the _dp in this function.

if it doesnt apply, the rename looks good to me and in that case:

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

>  {
>  	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
>  	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> @@ -937,9 +937,9 @@ void intel_dsc_enable(struct intel_encoder *encoder,
>  	intel_display_power_get(dev_priv,
>  				intel_dsc_power_domain(crtc_state));
>  
> -	intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
> +	intel_dsc_pps_configure(encoder, crtc_state);
>  
> -	intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
> +	intel_dsc_dp_pps_write(encoder, crtc_state);
>  
>  	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
>  		dss_ctl1_reg = DSS_CTL1;
> -- 
> 2.20.1
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2 3/4] drm/i915/dsc: split out encoder specific parts from DSC compute params

[Manasi Navare]

On Mon, Nov 04, 2019 at 04:14:38PM +0200, Jani Nikula wrote:
> Split out the DP specific parts, making it easier to add DSI specific
> configuration. Also move the encoder specific parts towards the end, to
> allow overriding generic configuration if needed. This also improves
> clarity by making it clear the encoder independent configuration does
> not depend on the encoder specific parts.
> 
> v2: Rebase
> 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

The splitting looks good and def more organized in terms of DPCD vs pipe config DSC params

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c   |  2 +-
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 68 ++++++++++++++---------
>  drivers/gpu/drm/i915/display/intel_vdsc.h |  5 +-
>  3 files changed, 45 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index fe1d683eab28..9e9593965a9a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2132,7 +2132,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  		}
>  	}
>  
> -	ret = intel_dp_compute_dsc_params(intel_dp, pipe_config);
> +	ret = intel_dsc_compute_params(&dig_port->base, pipe_config);
>  	if (ret < 0) {
>  		DRM_DEBUG_KMS("Cannot compute valid DSC parameters for Input Bpp = %d "
>  			      "Compressed BPP = %d\n",
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index f1df654369a7..ac10736a076a 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -335,32 +335,14 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
>  	return &rc_parameters[row_index][column_index];
>  }
>  
> -int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
> -				struct intel_crtc_state *pipe_config)
> +/* Values filled from DSC Sink DPCD */
> +static int intel_dsc_dp_compute_params(struct intel_encoder *encoder,
> +				       struct intel_crtc_state *pipe_config)
>  {
> +	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
>  	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
> -	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
> -	const struct rc_parameters *rc_params;
> -	u8 i = 0;
> -	u8 line_buf_depth = 0;
> +	u8 line_buf_depth;
>  
> -	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
> -	vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
> -	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
> -					     pipe_config->dsc.slice_count);
> -	/*
> -	 * Slice Height of 8 works for all currently available panels. So start
> -	 * with that if pic_height is an integral multiple of 8.
> -	 * Eventually add logic to try multiple slice heights.
> -	 */
> -	if (vdsc_cfg->pic_height % 8 == 0)
> -		vdsc_cfg->slice_height = 8;
> -	else if (vdsc_cfg->pic_height % 4 == 0)
> -		vdsc_cfg->slice_height = 4;
> -	else
> -		vdsc_cfg->slice_height = 2;
> -
> -	/* Values filled from DSC Sink DPCD */
>  	vdsc_cfg->dsc_version_major =
>  		(intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
>  		 DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
> @@ -377,6 +359,7 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
>  		DRM_DEBUG_KMS("DSC Sink Line Buffer Depth invalid\n");
>  		return -EINVAL;
>  	}
> +
>  	if (vdsc_cfg->dsc_version_minor == 2)
>  		vdsc_cfg->line_buf_depth = (line_buf_depth == DSC_1_2_MAX_LINEBUF_DEPTH_BITS) ?
>  			DSC_1_2_MAX_LINEBUF_DEPTH_VAL : line_buf_depth;
> @@ -384,13 +367,42 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
>  		vdsc_cfg->line_buf_depth = (line_buf_depth > DSC_1_1_MAX_LINEBUF_DEPTH_BITS) ?
>  			DSC_1_1_MAX_LINEBUF_DEPTH_BITS : line_buf_depth;
>  
> +	vdsc_cfg->block_pred_enable =
> +			intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
> +		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
> +
> +	return 0;
> +}
> +
> +int intel_dsc_compute_params(struct intel_encoder *encoder,
> +			     struct intel_crtc_state *pipe_config)
> +{
> +	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
> +	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
> +	const struct rc_parameters *rc_params;
> +	u8 i = 0;
> +	int ret;
> +
> +	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
> +	vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
> +	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
> +					     pipe_config->dsc.slice_count);
> +	/*
> +	 * Slice Height of 8 works for all currently available panels. So start
> +	 * with that if pic_height is an integral multiple of 8.
> +	 * Eventually add logic to try multiple slice heights.
> +	 */
> +	if (vdsc_cfg->pic_height % 8 == 0)
> +		vdsc_cfg->slice_height = 8;
> +	else if (vdsc_cfg->pic_height % 4 == 0)
> +		vdsc_cfg->slice_height = 4;
> +	else
> +		vdsc_cfg->slice_height = 2;
> +
>  	/* Gen 11 does not support YCbCr */
>  	vdsc_cfg->simple_422 = false;
>  	/* Gen 11 does not support VBR */
>  	vdsc_cfg->vbr_enable = false;
> -	vdsc_cfg->block_pred_enable =
> -			intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
> -		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
>  
>  	/* Gen 11 only supports integral values of bpp */
>  	vdsc_cfg->bits_per_pixel = compressed_bpp << 4;
> @@ -458,6 +470,10 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
>  	vdsc_cfg->initial_scale_value = (vdsc_cfg->rc_model_size << 3) /
>  		(vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset);
>  
> +	ret = intel_dsc_dp_compute_params(encoder, pipe_config);
> +	if (ret)
> +		return ret;
> +
>  	return drm_dsc_compute_rc_parameters(vdsc_cfg);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
> index 90d3f6017fcb..4ed2256750c3 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.h
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
> @@ -8,13 +8,12 @@
>  
>  struct intel_encoder;
>  struct intel_crtc_state;
> -struct intel_dp;
>  
>  void intel_dsc_enable(struct intel_encoder *encoder,
>  		      const struct intel_crtc_state *crtc_state);
>  void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
> -int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
> -				struct intel_crtc_state *pipe_config);
> +int intel_dsc_compute_params(struct intel_encoder *encoder,
> +			     struct intel_crtc_state *pipe_config);
>  enum intel_display_power_domain
>  intel_dsc_power_domain(const struct intel_crtc_state *crtc_state);
>  
> -- 
> 2.20.1
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH v2 3/4] drm/i915/dsc: split out encoder specific parts from DSC compute params

[Manasi Navare]

On Mon, Nov 04, 2019 at 04:14:38PM +0200, Jani Nikula wrote:
> Split out the DP specific parts, making it easier to add DSI specific
> configuration. Also move the encoder specific parts towards the end, to
> allow overriding generic configuration if needed. This also improves
> clarity by making it clear the encoder independent configuration does
> not depend on the encoder specific parts.
> 
> v2: Rebase
> 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

The splitting looks good and def more organized in terms of DPCD vs pipe config DSC params

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c   |  2 +-
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 68 ++++++++++++++---------
>  drivers/gpu/drm/i915/display/intel_vdsc.h |  5 +-
>  3 files changed, 45 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index fe1d683eab28..9e9593965a9a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2132,7 +2132,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  		}
>  	}
>  
> -	ret = intel_dp_compute_dsc_params(intel_dp, pipe_config);
> +	ret = intel_dsc_compute_params(&dig_port->base, pipe_config);
>  	if (ret < 0) {
>  		DRM_DEBUG_KMS("Cannot compute valid DSC parameters for Input Bpp = %d "
>  			      "Compressed BPP = %d\n",
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index f1df654369a7..ac10736a076a 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -335,32 +335,14 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
>  	return &rc_parameters[row_index][column_index];
>  }
>  
> -int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
> -				struct intel_crtc_state *pipe_config)
> +/* Values filled from DSC Sink DPCD */
> +static int intel_dsc_dp_compute_params(struct intel_encoder *encoder,
> +				       struct intel_crtc_state *pipe_config)
>  {
> +	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
>  	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
> -	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
> -	const struct rc_parameters *rc_params;
> -	u8 i = 0;
> -	u8 line_buf_depth = 0;
> +	u8 line_buf_depth;
>  
> -	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
> -	vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
> -	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
> -					     pipe_config->dsc.slice_count);
> -	/*
> -	 * Slice Height of 8 works for all currently available panels. So start
> -	 * with that if pic_height is an integral multiple of 8.
> -	 * Eventually add logic to try multiple slice heights.
> -	 */
> -	if (vdsc_cfg->pic_height % 8 == 0)
> -		vdsc_cfg->slice_height = 8;
> -	else if (vdsc_cfg->pic_height % 4 == 0)
> -		vdsc_cfg->slice_height = 4;
> -	else
> -		vdsc_cfg->slice_height = 2;
> -
> -	/* Values filled from DSC Sink DPCD */
>  	vdsc_cfg->dsc_version_major =
>  		(intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
>  		 DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
> @@ -377,6 +359,7 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
>  		DRM_DEBUG_KMS("DSC Sink Line Buffer Depth invalid\n");
>  		return -EINVAL;
>  	}
> +
>  	if (vdsc_cfg->dsc_version_minor == 2)
>  		vdsc_cfg->line_buf_depth = (line_buf_depth == DSC_1_2_MAX_LINEBUF_DEPTH_BITS) ?
>  			DSC_1_2_MAX_LINEBUF_DEPTH_VAL : line_buf_depth;
> @@ -384,13 +367,42 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
>  		vdsc_cfg->line_buf_depth = (line_buf_depth > DSC_1_1_MAX_LINEBUF_DEPTH_BITS) ?
>  			DSC_1_1_MAX_LINEBUF_DEPTH_BITS : line_buf_depth;
>  
> +	vdsc_cfg->block_pred_enable =
> +			intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
> +		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
> +
> +	return 0;
> +}
> +
> +int intel_dsc_compute_params(struct intel_encoder *encoder,
> +			     struct intel_crtc_state *pipe_config)
> +{
> +	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
> +	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
> +	const struct rc_parameters *rc_params;
> +	u8 i = 0;
> +	int ret;
> +
> +	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
> +	vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
> +	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
> +					     pipe_config->dsc.slice_count);
> +	/*
> +	 * Slice Height of 8 works for all currently available panels. So start
> +	 * with that if pic_height is an integral multiple of 8.
> +	 * Eventually add logic to try multiple slice heights.
> +	 */
> +	if (vdsc_cfg->pic_height % 8 == 0)
> +		vdsc_cfg->slice_height = 8;
> +	else if (vdsc_cfg->pic_height % 4 == 0)
> +		vdsc_cfg->slice_height = 4;
> +	else
> +		vdsc_cfg->slice_height = 2;
> +
>  	/* Gen 11 does not support YCbCr */
>  	vdsc_cfg->simple_422 = false;
>  	/* Gen 11 does not support VBR */
>  	vdsc_cfg->vbr_enable = false;
> -	vdsc_cfg->block_pred_enable =
> -			intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
> -		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
>  
>  	/* Gen 11 only supports integral values of bpp */
>  	vdsc_cfg->bits_per_pixel = compressed_bpp << 4;
> @@ -458,6 +470,10 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
>  	vdsc_cfg->initial_scale_value = (vdsc_cfg->rc_model_size << 3) /
>  		(vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset);
>  
> +	ret = intel_dsc_dp_compute_params(encoder, pipe_config);
> +	if (ret)
> +		return ret;
> +
>  	return drm_dsc_compute_rc_parameters(vdsc_cfg);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
> index 90d3f6017fcb..4ed2256750c3 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.h
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
> @@ -8,13 +8,12 @@
>  
>  struct intel_encoder;
>  struct intel_crtc_state;
> -struct intel_dp;
>  
>  void intel_dsc_enable(struct intel_encoder *encoder,
>  		      const struct intel_crtc_state *crtc_state);
>  void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
> -int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
> -				struct intel_crtc_state *pipe_config);
> +int intel_dsc_compute_params(struct intel_encoder *encoder,
> +			     struct intel_crtc_state *pipe_config);
>  enum intel_display_power_domain
>  intel_dsc_power_domain(const struct intel_crtc_state *crtc_state);
>  
> -- 
> 2.20.1
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2 2/4] drm/i915/dsc: clean up rc parameter table access

[Manasi Navare]

On Mon, Nov 04, 2019 at 04:14:37PM +0200, Jani Nikula wrote:
> Use a simple pointer to the relevant element instead of duplicating the
> array subscription. No functional changes.
> 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Thank you for the cleanup and optimizations in this patch,

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 55 ++++++++++++-----------
>  1 file changed, 30 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 763f1d7208e9..f1df654369a7 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -53,7 +53,7 @@ struct rc_parameters {
>   * Selected Rate Control Related Parameter Recommended Values
>   * from DSC_v1.11 spec & C Model release: DSC_model_20161212
>   */
> -static const struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
> +static const struct rc_parameters rc_parameters[][MAX_COLUMN_INDEX] = {
>  {
>  	/* 6BPP/8BPC */
>  	{ 768, 15, 6144, 3, 13, 11, 11, {
> @@ -319,14 +319,29 @@ static int get_column_index_for_rc_params(u8 bits_per_component)
>  	}
>  }
>  
> +static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
> +						 u8 bits_per_component)
> +{
> +	int row_index, column_index;
> +
> +	row_index = get_row_index_for_rc_params(compressed_bpp);
> +	if (row_index < 0)
> +		return NULL;
> +
> +	column_index = get_column_index_for_rc_params(bits_per_component);
> +	if (column_index < 0)
> +		return NULL;
> +
> +	return &rc_parameters[row_index][column_index];
> +}
> +
>  int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
>  				struct intel_crtc_state *pipe_config)
>  {
>  	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
>  	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
> +	const struct rc_parameters *rc_params;
>  	u8 i = 0;
> -	int row_index = 0;
> -	int column_index = 0;
>  	u8 line_buf_depth = 0;
>  
>  	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
> @@ -399,39 +414,29 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
>  		vdsc_cfg->rc_buf_thresh[13] = 0x7D;
>  	}
>  
> -	row_index = get_row_index_for_rc_params(compressed_bpp);
> -	column_index =
> -		get_column_index_for_rc_params(vdsc_cfg->bits_per_component);
> -
> -	if (row_index < 0 || column_index < 0)
> +	rc_params = get_rc_params(compressed_bpp, vdsc_cfg->bits_per_component);
> +	if (!rc_params)
>  		return -EINVAL;
>  
> -	vdsc_cfg->first_line_bpg_offset =
> -		rc_params[row_index][column_index].first_line_bpg_offset;
> -	vdsc_cfg->initial_xmit_delay =
> -		rc_params[row_index][column_index].initial_xmit_delay;
> -	vdsc_cfg->initial_offset =
> -		rc_params[row_index][column_index].initial_offset;
> -	vdsc_cfg->flatness_min_qp =
> -		rc_params[row_index][column_index].flatness_min_qp;
> -	vdsc_cfg->flatness_max_qp =
> -		rc_params[row_index][column_index].flatness_max_qp;
> -	vdsc_cfg->rc_quant_incr_limit0 =
> -		rc_params[row_index][column_index].rc_quant_incr_limit0;
> -	vdsc_cfg->rc_quant_incr_limit1 =
> -		rc_params[row_index][column_index].rc_quant_incr_limit1;
> +	vdsc_cfg->first_line_bpg_offset = rc_params->first_line_bpg_offset;
> +	vdsc_cfg->initial_xmit_delay = rc_params->initial_xmit_delay;
> +	vdsc_cfg->initial_offset = rc_params->initial_offset;
> +	vdsc_cfg->flatness_min_qp = rc_params->flatness_min_qp;
> +	vdsc_cfg->flatness_max_qp = rc_params->flatness_max_qp;
> +	vdsc_cfg->rc_quant_incr_limit0 = rc_params->rc_quant_incr_limit0;
> +	vdsc_cfg->rc_quant_incr_limit1 = rc_params->rc_quant_incr_limit1;
>  
>  	for (i = 0; i < DSC_NUM_BUF_RANGES; i++) {
>  		vdsc_cfg->rc_range_params[i].range_min_qp =
> -			rc_params[row_index][column_index].rc_range_params[i].range_min_qp;
> +			rc_params->rc_range_params[i].range_min_qp;
>  		vdsc_cfg->rc_range_params[i].range_max_qp =
> -			rc_params[row_index][column_index].rc_range_params[i].range_max_qp;
> +			rc_params->rc_range_params[i].range_max_qp;
>  		/*
>  		 * Range BPG Offset uses 2's complement and is only a 6 bits. So
>  		 * mask it to get only 6 bits.
>  		 */
>  		vdsc_cfg->rc_range_params[i].range_bpg_offset =
> -			rc_params[row_index][column_index].rc_range_params[i].range_bpg_offset &
> +			rc_params->rc_range_params[i].range_bpg_offset &
>  			DSC_RANGE_BPG_OFFSET_MASK;
>  	}
>  
> -- 
> 2.20.1
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH v2 2/4] drm/i915/dsc: clean up rc parameter table access

[Manasi Navare]

On Mon, Nov 04, 2019 at 04:14:37PM +0200, Jani Nikula wrote:
> Use a simple pointer to the relevant element instead of duplicating the
> array subscription. No functional changes.
> 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Thank you for the cleanup and optimizations in this patch,

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 55 ++++++++++++-----------
>  1 file changed, 30 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 763f1d7208e9..f1df654369a7 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -53,7 +53,7 @@ struct rc_parameters {
>   * Selected Rate Control Related Parameter Recommended Values
>   * from DSC_v1.11 spec & C Model release: DSC_model_20161212
>   */
> -static const struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
> +static const struct rc_parameters rc_parameters[][MAX_COLUMN_INDEX] = {
>  {
>  	/* 6BPP/8BPC */
>  	{ 768, 15, 6144, 3, 13, 11, 11, {
> @@ -319,14 +319,29 @@ static int get_column_index_for_rc_params(u8 bits_per_component)
>  	}
>  }
>  
> +static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
> +						 u8 bits_per_component)
> +{
> +	int row_index, column_index;
> +
> +	row_index = get_row_index_for_rc_params(compressed_bpp);
> +	if (row_index < 0)
> +		return NULL;
> +
> +	column_index = get_column_index_for_rc_params(bits_per_component);
> +	if (column_index < 0)
> +		return NULL;
> +
> +	return &rc_parameters[row_index][column_index];
> +}
> +
>  int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
>  				struct intel_crtc_state *pipe_config)
>  {
>  	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
>  	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
> +	const struct rc_parameters *rc_params;
>  	u8 i = 0;
> -	int row_index = 0;
> -	int column_index = 0;
>  	u8 line_buf_depth = 0;
>  
>  	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
> @@ -399,39 +414,29 @@ int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
>  		vdsc_cfg->rc_buf_thresh[13] = 0x7D;
>  	}
>  
> -	row_index = get_row_index_for_rc_params(compressed_bpp);
> -	column_index =
> -		get_column_index_for_rc_params(vdsc_cfg->bits_per_component);
> -
> -	if (row_index < 0 || column_index < 0)
> +	rc_params = get_rc_params(compressed_bpp, vdsc_cfg->bits_per_component);
> +	if (!rc_params)
>  		return -EINVAL;
>  
> -	vdsc_cfg->first_line_bpg_offset =
> -		rc_params[row_index][column_index].first_line_bpg_offset;
> -	vdsc_cfg->initial_xmit_delay =
> -		rc_params[row_index][column_index].initial_xmit_delay;
> -	vdsc_cfg->initial_offset =
> -		rc_params[row_index][column_index].initial_offset;
> -	vdsc_cfg->flatness_min_qp =
> -		rc_params[row_index][column_index].flatness_min_qp;
> -	vdsc_cfg->flatness_max_qp =
> -		rc_params[row_index][column_index].flatness_max_qp;
> -	vdsc_cfg->rc_quant_incr_limit0 =
> -		rc_params[row_index][column_index].rc_quant_incr_limit0;
> -	vdsc_cfg->rc_quant_incr_limit1 =
> -		rc_params[row_index][column_index].rc_quant_incr_limit1;
> +	vdsc_cfg->first_line_bpg_offset = rc_params->first_line_bpg_offset;
> +	vdsc_cfg->initial_xmit_delay = rc_params->initial_xmit_delay;
> +	vdsc_cfg->initial_offset = rc_params->initial_offset;
> +	vdsc_cfg->flatness_min_qp = rc_params->flatness_min_qp;
> +	vdsc_cfg->flatness_max_qp = rc_params->flatness_max_qp;
> +	vdsc_cfg->rc_quant_incr_limit0 = rc_params->rc_quant_incr_limit0;
> +	vdsc_cfg->rc_quant_incr_limit1 = rc_params->rc_quant_incr_limit1;
>  
>  	for (i = 0; i < DSC_NUM_BUF_RANGES; i++) {
>  		vdsc_cfg->rc_range_params[i].range_min_qp =
> -			rc_params[row_index][column_index].rc_range_params[i].range_min_qp;
> +			rc_params->rc_range_params[i].range_min_qp;
>  		vdsc_cfg->rc_range_params[i].range_max_qp =
> -			rc_params[row_index][column_index].rc_range_params[i].range_max_qp;
> +			rc_params->rc_range_params[i].range_max_qp;
>  		/*
>  		 * Range BPG Offset uses 2's complement and is only a 6 bits. So
>  		 * mask it to get only 6 bits.
>  		 */
>  		vdsc_cfg->rc_range_params[i].range_bpg_offset =
> -			rc_params[row_index][column_index].rc_range_params[i].range_bpg_offset &
> +			rc_params->rc_range_params[i].range_bpg_offset &
>  			DSC_RANGE_BPG_OFFSET_MASK;
>  	}
>  
> -- 
> 2.20.1
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2 4/4] drm/i915/dsc: rename functions for consistency

[Jani Nikula]

On Mon, 04 Nov 2019, Manasi Navare <manasi.d.navare@intel.com> wrote:
> On Mon, Nov 04, 2019 at 04:14:39PM +0200, Jani Nikula wrote:
>> Use intel_dsc_ prefix. No functional changes.
>> 
>> Cc: Manasi Navare <manasi.d.navare@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_vdsc.c | 12 ++++++------
>>  1 file changed, 6 insertions(+), 6 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> index ac10736a076a..b23ba8d108db 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> @@ -501,8 +501,8 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
>>  		return POWER_DOMAIN_TRANSCODER(cpu_transcoder);
>>  }
>>  
>> -static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
>> -						const struct intel_crtc_state *crtc_state)
>> +static void intel_dsc_pps_configure(struct intel_encoder *encoder,
>> +				    const struct intel_crtc_state *crtc_state)
>>  {
>>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> @@ -901,8 +901,8 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
>>  	}
>>  }
>>  
>> -static void intel_dp_write_dsc_pps_sdp(struct intel_encoder *encoder,
>> -				       const struct intel_crtc_state *crtc_state)
>> +static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
>> +				   const struct intel_crtc_state *crtc_state)
>
> This function writes pps header and packs pps payload, if that also applies to dsi dsc
> then we can get rid of the _dp in this function.
>
> if it doesnt apply, the rename looks good to me and in that case:

It's slightly different for DSI. You'll see. ;)

>
> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Thanks.

BR,
Jani.

>
> Manasi
>
>>  {
>>  	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
>>  	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
>> @@ -937,9 +937,9 @@ void intel_dsc_enable(struct intel_encoder *encoder,
>>  	intel_display_power_get(dev_priv,
>>  				intel_dsc_power_domain(crtc_state));
>>  
>> -	intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
>> +	intel_dsc_pps_configure(encoder, crtc_state);
>>  
>> -	intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
>> +	intel_dsc_dp_pps_write(encoder, crtc_state);
>>  
>>  	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
>>  		dss_ctl1_reg = DSS_CTL1;
>> -- 
>> 2.20.1
>> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH v2 4/4] drm/i915/dsc: rename functions for consistency

[Jani Nikula]

On Mon, 04 Nov 2019, Manasi Navare <manasi.d.navare@intel.com> wrote:
> On Mon, Nov 04, 2019 at 04:14:39PM +0200, Jani Nikula wrote:
>> Use intel_dsc_ prefix. No functional changes.
>> 
>> Cc: Manasi Navare <manasi.d.navare@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_vdsc.c | 12 ++++++------
>>  1 file changed, 6 insertions(+), 6 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> index ac10736a076a..b23ba8d108db 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> @@ -501,8 +501,8 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
>>  		return POWER_DOMAIN_TRANSCODER(cpu_transcoder);
>>  }
>>  
>> -static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
>> -						const struct intel_crtc_state *crtc_state)
>> +static void intel_dsc_pps_configure(struct intel_encoder *encoder,
>> +				    const struct intel_crtc_state *crtc_state)
>>  {
>>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> @@ -901,8 +901,8 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
>>  	}
>>  }
>>  
>> -static void intel_dp_write_dsc_pps_sdp(struct intel_encoder *encoder,
>> -				       const struct intel_crtc_state *crtc_state)
>> +static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
>> +				   const struct intel_crtc_state *crtc_state)
>
> This function writes pps header and packs pps payload, if that also applies to dsi dsc
> then we can get rid of the _dp in this function.
>
> if it doesnt apply, the rename looks good to me and in that case:

It's slightly different for DSI. You'll see. ;)

>
> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Thanks.

BR,
Jani.

>
> Manasi
>
>>  {
>>  	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
>>  	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
>> @@ -937,9 +937,9 @@ void intel_dsc_enable(struct intel_encoder *encoder,
>>  	intel_display_power_get(dev_priv,
>>  				intel_dsc_power_domain(crtc_state));
>>  
>> -	intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
>> +	intel_dsc_pps_configure(encoder, crtc_state);
>>  
>> -	intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
>> +	intel_dsc_dp_pps_write(encoder, crtc_state);
>>  
>>  	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
>>  		dss_ctl1_reg = DSS_CTL1;
>> -- 
>> 2.20.1
>> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const
URL   : https://patchwork.freedesktop.org/series/68947/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7252_full -> Patchwork_15122_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_15122_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_exec@basic-invalid-context-vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +5 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb4/igt@gem_ctx_exec@basic-invalid-context-vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb3/igt@gem_ctx_exec@basic-invalid-context-vcs1.html

  * igt@gem_ctx_isolation@vcs1-none:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb4/igt@gem_ctx_isolation@vcs1-none.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb7/igt@gem_ctx_isolation@vcs1-none.html

  * igt@gem_exec_schedule@preempt-queue-bsd2:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#109276]) +13 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd2.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb8/igt@gem_exec_schedule@preempt-queue-bsd2.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#112146]) +5 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb8/igt@gem_exec_schedule@reorder-wide-bsd.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb2/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-hsw:          [PASS][9] -> [DMESG-WARN][10] ([fdo#111870]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-hsw1/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-snb:          [PASS][11] -> [DMESG-WARN][12] ([fdo#111870])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-snb4/igt@gem_userptr_blits@sync-unmap.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-snb2/igt@gem_userptr_blits@sync-unmap.html

  * igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic:
    - shard-skl:          [PASS][13] -> [DMESG-WARN][14] ([fdo#105541])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl4/igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl4/igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
    - shard-iclb:         [PASS][15] -> [FAIL][16] ([fdo#103167]) +3 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][17] -> [DMESG-WARN][18] ([fdo#108566]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - shard-skl:          [PASS][19] -> [INCOMPLETE][20] ([fdo#104108])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-apl:          [PASS][21] -> [DMESG-WARN][22] ([fdo#108566]) +2 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [PASS][23] -> [FAIL][24] ([fdo#108145])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][25] -> [FAIL][26] ([fdo#108145] / [fdo#110403])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [PASS][27] -> [SKIP][28] ([fdo#109441]) +1 similar issue
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb1/igt@kms_psr@psr2_primary_mmap_cpu.html

  
#### Possible fixes ####

  * igt@gem_cpu_reloc@full:
    - shard-skl:          [INCOMPLETE][29] -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl5/igt@gem_cpu_reloc@full.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl1/igt@gem_cpu_reloc@full.html

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-kbl:          [DMESG-WARN][31] ([fdo#108566]) -> [PASS][32] +12 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-kbl2/igt@gem_ctx_isolation@rcs0-s3.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html

  * {igt@gem_ctx_persistence@vcs1-hostile-preempt}:
    - shard-iclb:         [SKIP][33] ([fdo#109276] / [fdo#112080]) -> [PASS][34] +1 similar issue
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb8/igt@gem_ctx_persistence@vcs1-hostile-preempt.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb2/igt@gem_ctx_persistence@vcs1-hostile-preempt.html

  * igt@gem_ctx_shared@q-smoketest-default:
    - {shard-tglb}:       [INCOMPLETE][35] ([fdo# 111852 ]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-tglb6/igt@gem_ctx_shared@q-smoketest-default.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-tglb6/igt@gem_ctx_shared@q-smoketest-default.html

  * igt@gem_exec_parallel@vcs1-fds:
    - shard-iclb:         [SKIP][37] ([fdo#112080]) -> [PASS][38] +12 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb8/igt@gem_exec_parallel@vcs1-fds.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb1/igt@gem_exec_parallel@vcs1-fds.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][39] ([fdo#112146]) -> [PASS][40] +4 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb3/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd2:
    - {shard-tglb}:       [INCOMPLETE][41] ([fdo#111606] / [fdo#111677]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-tglb6/igt@gem_exec_schedule@preempt-queue-bsd2.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-tglb7/igt@gem_exec_schedule@preempt-queue-bsd2.html

  * igt@gem_exec_suspend@basic-s3:
    - {shard-tglb}:       [INCOMPLETE][43] ([fdo#111736] / [fdo#111850]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-tglb4/igt@gem_exec_suspend@basic-s3.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-tglb2/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          [INCOMPLETE][45] ([fdo#104108]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl8/igt@gem_softpin@noreloc-s3.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl8/igt@gem_softpin@noreloc-s3.html

  * igt@gem_userptr_blits@sync-unmap-after-close:
    - shard-hsw:          [DMESG-WARN][47] ([fdo#111870]) -> [PASS][48] +1 similar issue
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-hsw8/igt@gem_userptr_blits@sync-unmap-after-close.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-hsw2/igt@gem_userptr_blits@sync-unmap-after-close.html

  * igt@gem_workarounds@suspend-resume:
    - {shard-tglb}:       [INCOMPLETE][49] ([fdo#111832] / [fdo#111850]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-tglb7/igt@gem_workarounds@suspend-resume.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-tglb5/igt@gem_workarounds@suspend-resume.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-hsw:          [INCOMPLETE][51] ([fdo#103540]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-hsw2/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-hsw2/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@absolute-wf_vblank-interruptible:
    - shard-hsw:          [DMESG-WARN][53] ([fdo#102614]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-hsw5/igt@kms_flip@absolute-wf_vblank-interruptible.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-hsw1/igt@kms_flip@absolute-wf_vblank-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-apl:          [FAIL][55] ([fdo#105363]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-apl7/igt@kms_flip@flip-vs-expired-vblank.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-apl2/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [FAIL][57] ([fdo#105363]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-apl:          [DMESG-WARN][59] ([fdo#108566]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-apl4/igt@kms_flip@flip-vs-suspend.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-apl4/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-iclb:         [FAIL][61] ([fdo#103167]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
    - {shard-tglb}:       [FAIL][63] ([fdo#103167]) -> [PASS][64] +4 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][65] ([fdo#108145] / [fdo#110403]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-a-tiling-x:
    - shard-iclb:         [FAIL][67] ([fdo#103166]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-x.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb7/igt@kms_plane_lowres@pipe-a-tiling-x.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [SKIP][69] ([fdo#109642] / [fdo#111068]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb5/igt@kms_psr2_su@frontbuffer.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb2/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [SKIP][71] ([fdo#109441]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb8/igt@kms_psr@psr2_cursor_render.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb2/igt@kms_psr@psr2_cursor_render.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [SKIP][73] ([fdo#109276]) -> [PASS][74] +14 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb5/igt@prime_busy@hang-bsd2.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb4/igt@prime_busy@hang-bsd2.html

  * igt@tools_test@tools_test:
    - {shard-tglb}:       [SKIP][75] ([fdo#109352]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-tglb6/igt@tools_test@tools_test.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-tglb3/igt@tools_test@tools_test.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [FAIL][77] ([fdo#111329]) -> [SKIP][78] ([fdo#109276] / [fdo#112080])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_mocs_settings@mocs-rc6-bsd2:
    - shard-iclb:         [FAIL][79] ([fdo#111330]) -> [SKIP][80] ([fdo#109276])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb4/igt@gem_mocs_settings@mocs-rc6-bsd2.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb7/igt@gem_mocs_settings@mocs-rc6-bsd2.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo# 111852 ]: https://bugs.freedesktop.org/show_bug.cgi?id= 111852 
  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105541]: https://bugs.freedesktop.org/show_bug.cgi?id=105541
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109352]: https://bugs.freedesktop.org/show_bug.cgi?id=109352
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
  [fdo#111646]: https://bugs.freedesktop.org/show_bug.cgi?id=111646
  [fdo#111671]: https://bugs.freedesktop.org/show_bug.cgi?id=111671
  [fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
  [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747
  [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
  [fdo#111850]: https://bugs.freedesktop.org/show_bug.cgi?id=111850
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146


Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7252 -> Patchwork_15122

  CI-20190529: 20190529
  CI_DRM_7252: 1971e2dbb8626482b7ed182d6e96a6810020b95e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5259: 6237a45d8699b2ccb4512e222ce6c94a1c77f83b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15122: b16942c497da373471965a7690a85984f40fa6f7 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const
URL   : https://patchwork.freedesktop.org/series/68947/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7252_full -> Patchwork_15122_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_15122_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_exec@basic-invalid-context-vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +5 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb4/igt@gem_ctx_exec@basic-invalid-context-vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb3/igt@gem_ctx_exec@basic-invalid-context-vcs1.html

  * igt@gem_ctx_isolation@vcs1-none:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb4/igt@gem_ctx_isolation@vcs1-none.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb7/igt@gem_ctx_isolation@vcs1-none.html

  * igt@gem_exec_schedule@preempt-queue-bsd2:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#109276]) +13 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd2.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb8/igt@gem_exec_schedule@preempt-queue-bsd2.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#112146]) +5 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb8/igt@gem_exec_schedule@reorder-wide-bsd.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb2/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-hsw:          [PASS][9] -> [DMESG-WARN][10] ([fdo#111870]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-hsw1/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-snb:          [PASS][11] -> [DMESG-WARN][12] ([fdo#111870])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-snb4/igt@gem_userptr_blits@sync-unmap.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-snb2/igt@gem_userptr_blits@sync-unmap.html

  * igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic:
    - shard-skl:          [PASS][13] -> [DMESG-WARN][14] ([fdo#105541])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl4/igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl4/igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
    - shard-iclb:         [PASS][15] -> [FAIL][16] ([fdo#103167]) +3 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][17] -> [DMESG-WARN][18] ([fdo#108566]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - shard-skl:          [PASS][19] -> [INCOMPLETE][20] ([fdo#104108])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-apl:          [PASS][21] -> [DMESG-WARN][22] ([fdo#108566]) +2 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [PASS][23] -> [FAIL][24] ([fdo#108145])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][25] -> [FAIL][26] ([fdo#108145] / [fdo#110403])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [PASS][27] -> [SKIP][28] ([fdo#109441]) +1 similar issue
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb1/igt@kms_psr@psr2_primary_mmap_cpu.html

  
#### Possible fixes ####

  * igt@gem_cpu_reloc@full:
    - shard-skl:          [INCOMPLETE][29] -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl5/igt@gem_cpu_reloc@full.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl1/igt@gem_cpu_reloc@full.html

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-kbl:          [DMESG-WARN][31] ([fdo#108566]) -> [PASS][32] +12 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-kbl2/igt@gem_ctx_isolation@rcs0-s3.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html

  * {igt@gem_ctx_persistence@vcs1-hostile-preempt}:
    - shard-iclb:         [SKIP][33] ([fdo#109276] / [fdo#112080]) -> [PASS][34] +1 similar issue
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb8/igt@gem_ctx_persistence@vcs1-hostile-preempt.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb2/igt@gem_ctx_persistence@vcs1-hostile-preempt.html

  * igt@gem_ctx_shared@q-smoketest-default:
    - {shard-tglb}:       [INCOMPLETE][35] ([fdo# 111852 ]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-tglb6/igt@gem_ctx_shared@q-smoketest-default.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-tglb6/igt@gem_ctx_shared@q-smoketest-default.html

  * igt@gem_exec_parallel@vcs1-fds:
    - shard-iclb:         [SKIP][37] ([fdo#112080]) -> [PASS][38] +12 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb8/igt@gem_exec_parallel@vcs1-fds.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb1/igt@gem_exec_parallel@vcs1-fds.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][39] ([fdo#112146]) -> [PASS][40] +4 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb3/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd2:
    - {shard-tglb}:       [INCOMPLETE][41] ([fdo#111606] / [fdo#111677]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-tglb6/igt@gem_exec_schedule@preempt-queue-bsd2.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-tglb7/igt@gem_exec_schedule@preempt-queue-bsd2.html

  * igt@gem_exec_suspend@basic-s3:
    - {shard-tglb}:       [INCOMPLETE][43] ([fdo#111736] / [fdo#111850]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-tglb4/igt@gem_exec_suspend@basic-s3.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-tglb2/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          [INCOMPLETE][45] ([fdo#104108]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl8/igt@gem_softpin@noreloc-s3.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl8/igt@gem_softpin@noreloc-s3.html

  * igt@gem_userptr_blits@sync-unmap-after-close:
    - shard-hsw:          [DMESG-WARN][47] ([fdo#111870]) -> [PASS][48] +1 similar issue
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-hsw8/igt@gem_userptr_blits@sync-unmap-after-close.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-hsw2/igt@gem_userptr_blits@sync-unmap-after-close.html

  * igt@gem_workarounds@suspend-resume:
    - {shard-tglb}:       [INCOMPLETE][49] ([fdo#111832] / [fdo#111850]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-tglb7/igt@gem_workarounds@suspend-resume.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-tglb5/igt@gem_workarounds@suspend-resume.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-hsw:          [INCOMPLETE][51] ([fdo#103540]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-hsw2/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-hsw2/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@absolute-wf_vblank-interruptible:
    - shard-hsw:          [DMESG-WARN][53] ([fdo#102614]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-hsw5/igt@kms_flip@absolute-wf_vblank-interruptible.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-hsw1/igt@kms_flip@absolute-wf_vblank-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-apl:          [FAIL][55] ([fdo#105363]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-apl7/igt@kms_flip@flip-vs-expired-vblank.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-apl2/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [FAIL][57] ([fdo#105363]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-apl:          [DMESG-WARN][59] ([fdo#108566]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-apl4/igt@kms_flip@flip-vs-suspend.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-apl4/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-iclb:         [FAIL][61] ([fdo#103167]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
    - {shard-tglb}:       [FAIL][63] ([fdo#103167]) -> [PASS][64] +4 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][65] ([fdo#108145] / [fdo#110403]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-a-tiling-x:
    - shard-iclb:         [FAIL][67] ([fdo#103166]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-x.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb7/igt@kms_plane_lowres@pipe-a-tiling-x.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [SKIP][69] ([fdo#109642] / [fdo#111068]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb5/igt@kms_psr2_su@frontbuffer.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb2/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [SKIP][71] ([fdo#109441]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb8/igt@kms_psr@psr2_cursor_render.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb2/igt@kms_psr@psr2_cursor_render.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [SKIP][73] ([fdo#109276]) -> [PASS][74] +14 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb5/igt@prime_busy@hang-bsd2.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb4/igt@prime_busy@hang-bsd2.html

  * igt@tools_test@tools_test:
    - {shard-tglb}:       [SKIP][75] ([fdo#109352]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-tglb6/igt@tools_test@tools_test.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-tglb3/igt@tools_test@tools_test.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [FAIL][77] ([fdo#111329]) -> [SKIP][78] ([fdo#109276] / [fdo#112080])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_mocs_settings@mocs-rc6-bsd2:
    - shard-iclb:         [FAIL][79] ([fdo#111330]) -> [SKIP][80] ([fdo#109276])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7252/shard-iclb4/igt@gem_mocs_settings@mocs-rc6-bsd2.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/shard-iclb7/igt@gem_mocs_settings@mocs-rc6-bsd2.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo# 111852 ]: https://bugs.freedesktop.org/show_bug.cgi?id= 111852 
  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105541]: https://bugs.freedesktop.org/show_bug.cgi?id=105541
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109352]: https://bugs.freedesktop.org/show_bug.cgi?id=109352
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
  [fdo#111646]: https://bugs.freedesktop.org/show_bug.cgi?id=111646
  [fdo#111671]: https://bugs.freedesktop.org/show_bug.cgi?id=111671
  [fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
  [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747
  [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
  [fdo#111850]: https://bugs.freedesktop.org/show_bug.cgi?id=111850
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146


Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7252 -> Patchwork_15122

  CI-20190529: 20190529
  CI_DRM_7252: 1971e2dbb8626482b7ed182d6e96a6810020b95e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5259: 6237a45d8699b2ccb4512e222ce6c94a1c77f83b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15122: b16942c497da373471965a7690a85984f40fa6f7 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15122/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2 1/4] drm/i915/dsc: make parameter arrays const

[Jani Nikula]

On Mon, 04 Nov 2019, Manasi Navare <manasi.d.navare@intel.com> wrote:
> On Mon, Nov 04, 2019 at 04:14:36PM +0200, Jani Nikula wrote:
>> No need for them to be mutable.
>> 
>> Cc: Manasi Navare <manasi.d.navare@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Agree that these params are constants
>
> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Thanks for the review, pushed the series to dinq.

BR,
Jani.

>
> Manasi
>
>> ---
>>  drivers/gpu/drm/i915/display/intel_vdsc.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> index 9cb36f855f07..763f1d7208e9 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> @@ -33,7 +33,7 @@ enum COLUMN_INDEX_BPC {
>>  #define DSC_SUPPORTED_VERSION_MIN		1
>>  
>>  /* From DSC_v1.11 spec, rc_parameter_Set syntax element typically constant */
>> -static u16 rc_buf_thresh[] = {
>> +static const u16 rc_buf_thresh[] = {
>>  	896, 1792, 2688, 3584, 4480, 5376, 6272, 6720, 7168, 7616,
>>  	7744, 7872, 8000, 8064
>>  };
>> @@ -53,7 +53,7 @@ struct rc_parameters {
>>   * Selected Rate Control Related Parameter Recommended Values
>>   * from DSC_v1.11 spec & C Model release: DSC_model_20161212
>>   */
>> -static struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
>> +static const struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
>>  {
>>  	/* 6BPP/8BPC */
>>  	{ 768, 15, 6144, 3, 13, 11, 11, {
>> -- 
>> 2.20.1
>> 

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/dsc: make parameter arrays const

[Jani Nikula]

On Mon, 04 Nov 2019, Manasi Navare <manasi.d.navare@intel.com> wrote:
> On Mon, Nov 04, 2019 at 04:14:36PM +0200, Jani Nikula wrote:
>> No need for them to be mutable.
>> 
>> Cc: Manasi Navare <manasi.d.navare@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Agree that these params are constants
>
> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Thanks for the review, pushed the series to dinq.

BR,
Jani.

>
> Manasi
>
>> ---
>>  drivers/gpu/drm/i915/display/intel_vdsc.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> index 9cb36f855f07..763f1d7208e9 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> @@ -33,7 +33,7 @@ enum COLUMN_INDEX_BPC {
>>  #define DSC_SUPPORTED_VERSION_MIN		1
>>  
>>  /* From DSC_v1.11 spec, rc_parameter_Set syntax element typically constant */
>> -static u16 rc_buf_thresh[] = {
>> +static const u16 rc_buf_thresh[] = {
>>  	896, 1792, 2688, 3584, 4480, 5376, 6272, 6720, 7168, 7616,
>>  	7744, 7872, 8000, 8064
>>  };
>> @@ -53,7 +53,7 @@ struct rc_parameters {
>>   * Selected Rate Control Related Parameter Recommended Values
>>   * from DSC_v1.11 spec & C Model release: DSC_model_20161212
>>   */
>> -static struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
>> +static const struct rc_parameters rc_params[][MAX_COLUMN_INDEX] = {
>>  {
>>  	/* 6BPP/8BPC */
>>  	{ 768, 15, 6144, 3, 13, 11, 11, {
>> -- 
>> 2.20.1
>> 

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const (rev2)
URL   : https://patchwork.freedesktop.org/series/68947/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7261 -> Patchwork_15128
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/index.html

Known issues
------------

  Here are the changes found in Patchwork_15128 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-skl-6700k2:      [PASS][1] -> [FAIL][2] ([fdo#103375])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/fi-skl-6700k2/igt@gem_exec_suspend@basic-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/fi-skl-6700k2/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-skl-6700k2:      [PASS][3] -> [INCOMPLETE][4] ([fdo#104108])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/fi-skl-6700k2/igt@gem_exec_suspend@basic-s4-devices.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/fi-skl-6700k2/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_mmap_gtt@basic-short:
    - fi-icl-u3:          [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/fi-icl-u3/igt@gem_mmap_gtt@basic-short.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/fi-icl-u3/igt@gem_mmap_gtt@basic-short.html

  
#### Possible fixes ####

  * igt@gem_close_race@basic-process:
    - fi-icl-u3:          [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8] +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/fi-icl-u3/igt@gem_close_race@basic-process.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/fi-icl-u3/igt@gem_close_race@basic-process.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724


Participating hosts (51 -> 43)
------------------------------

  Additional (1): fi-tgl-u 
  Missing    (9): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-ctg-p8600 fi-gdg-551 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7261 -> Patchwork_15128

  CI-20190529: 20190529
  CI_DRM_7261: 0df0545b3693fbc84f91af17499f204437e7ac6a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5262: 2d2fd6ce47b2eac83732c5c88cd0d7e5f13013a2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15128: 4ed8e9ab671e0641c0174c1f641c416cf3d18cb4 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

4ed8e9ab671e drm/i915/dsc: rename functions for consistency
bf3b8a43fa5e drm/i915/dsc: split out encoder specific parts from DSC compute params
16549ed270b0 drm/i915/dsc: clean up rc parameter table access
7e10fe4b25ad drm/i915/dsc: make parameter arrays const

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const (rev2)
URL   : https://patchwork.freedesktop.org/series/68947/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7261 -> Patchwork_15128
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/index.html

Known issues
------------

  Here are the changes found in Patchwork_15128 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-skl-6700k2:      [PASS][1] -> [FAIL][2] ([fdo#103375])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/fi-skl-6700k2/igt@gem_exec_suspend@basic-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/fi-skl-6700k2/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-skl-6700k2:      [PASS][3] -> [INCOMPLETE][4] ([fdo#104108])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/fi-skl-6700k2/igt@gem_exec_suspend@basic-s4-devices.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/fi-skl-6700k2/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_mmap_gtt@basic-short:
    - fi-icl-u3:          [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/fi-icl-u3/igt@gem_mmap_gtt@basic-short.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/fi-icl-u3/igt@gem_mmap_gtt@basic-short.html

  
#### Possible fixes ####

  * igt@gem_close_race@basic-process:
    - fi-icl-u3:          [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8] +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/fi-icl-u3/igt@gem_close_race@basic-process.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/fi-icl-u3/igt@gem_close_race@basic-process.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724


Participating hosts (51 -> 43)
------------------------------

  Additional (1): fi-tgl-u 
  Missing    (9): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-ctg-p8600 fi-gdg-551 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7261 -> Patchwork_15128

  CI-20190529: 20190529
  CI_DRM_7261: 0df0545b3693fbc84f91af17499f204437e7ac6a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5262: 2d2fd6ce47b2eac83732c5c88cd0d7e5f13013a2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15128: 4ed8e9ab671e0641c0174c1f641c416cf3d18cb4 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

4ed8e9ab671e drm/i915/dsc: rename functions for consistency
bf3b8a43fa5e drm/i915/dsc: split out encoder specific parts from DSC compute params
16549ed270b0 drm/i915/dsc: clean up rc parameter table access
7e10fe4b25ad drm/i915/dsc: make parameter arrays const

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const (rev2)
URL   : https://patchwork.freedesktop.org/series/68947/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7261_full -> Patchwork_15128_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_15128_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_switch@vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +12 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb2/igt@gem_ctx_switch@vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb6/igt@gem_ctx_switch@vcs1.html

  * igt@gem_eio@in-flight-contexts-1us:
    - shard-snb:          [PASS][3] -> [FAIL][4] ([fdo#111946])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-snb4/igt@gem_eio@in-flight-contexts-1us.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-snb6/igt@gem_eio@in-flight-contexts-1us.html

  * igt@gem_exec_schedule@preempt-bsd:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#112146]) +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb5/igt@gem_exec_schedule@preempt-bsd.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb1/igt@gem_exec_schedule@preempt-bsd.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
    - shard-snb:          [PASS][7] -> [DMESG-WARN][8] ([fdo#111870])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-snb7/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-hsw:          [PASS][9] -> [DMESG-WARN][10] ([fdo#111870])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-hsw2/igt@gem_userptr_blits@sync-unmap.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-hsw5/igt@gem_userptr_blits@sync-unmap.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-kbl:          [PASS][11] -> [SKIP][12] ([fdo#109271])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-kbl3/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-skl:          [PASS][13] -> [INCOMPLETE][14] ([fdo#109507])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-skl7/igt@kms_flip@flip-vs-suspend.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-skl5/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-snb:          [PASS][15] -> [INCOMPLETE][16] ([fdo#105411])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-snb5/igt@kms_flip@flip-vs-suspend-interruptible.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-snb1/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt:
    - shard-iclb:         [PASS][17] -> [FAIL][18] ([fdo#103167]) +7 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-apl:          [PASS][19] -> [DMESG-WARN][20] ([fdo#108566]) +3 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_psr@no_drrs:
    - shard-iclb:         [PASS][21] -> [FAIL][22] ([fdo#108341])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb4/igt@kms_psr@no_drrs.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb1/igt@kms_psr@no_drrs.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [PASS][23] -> [SKIP][24] ([fdo#109441]) +3 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb4/igt@kms_psr@psr2_cursor_render.html

  * igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend:
    - shard-skl:          [PASS][25] -> [INCOMPLETE][26] ([fdo#104108])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-skl9/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-skl1/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-kbl:          [PASS][27] -> [DMESG-WARN][28] ([fdo#108566]) +2 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-kbl2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-kbl2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [PASS][29] -> [SKIP][30] ([fdo#109276]) +12 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb1/igt@prime_busy@hang-bsd2.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb8/igt@prime_busy@hang-bsd2.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@vcs1-none:
    - shard-iclb:         [SKIP][31] ([fdo#109276] / [fdo#112080]) -> [PASS][32] +2 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb5/igt@gem_ctx_isolation@vcs1-none.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb2/igt@gem_ctx_isolation@vcs1-none.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][33] ([fdo#110854]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb6/igt@gem_exec_balancer@smoke.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb1/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [SKIP][35] ([fdo#109276]) -> [PASS][36] +10 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb8/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb2/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_exec_schedule@wide-bsd:
    - shard-iclb:         [SKIP][37] ([fdo#112146]) -> [PASS][38] +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb4/igt@gem_exec_schedule@wide-bsd.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb7/igt@gem_exec_schedule@wide-bsd.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive:
    - {shard-tglb}:       [INCOMPLETE][39] ([fdo#112068 ]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-tglb2/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-tglb3/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-thrashing:
    - shard-snb:          [FAIL][41] ([fdo#112037]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-snb1/igt@gem_persistent_relocs@forked-thrashing.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-snb5/igt@gem_persistent_relocs@forked-thrashing.html

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          [INCOMPLETE][43] ([fdo#104108]) -> [PASS][44] +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-skl6/igt@gem_softpin@noreloc-s3.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-skl6/igt@gem_softpin@noreloc-s3.html

  * igt@gem_sync@basic-each:
    - {shard-tglb}:       [INCOMPLETE][45] ([fdo#111647] / [fdo#111998]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-tglb6/igt@gem_sync@basic-each.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-tglb4/igt@gem_sync@basic-each.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-kbl:          [INCOMPLETE][47] ([fdo#103665]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-kbl4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-kbl3/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-snb:          [DMESG-WARN][49] ([fdo#111870]) -> [PASS][50] +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-snb7/igt@gem_userptr_blits@sync-unmap.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-snb2/igt@gem_userptr_blits@sync-unmap.html

  * igt@gem_workarounds@suspend-resume:
    - shard-apl:          [DMESG-WARN][51] ([fdo#108566]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-apl6/igt@gem_workarounds@suspend-resume.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-apl2/igt@gem_workarounds@suspend-resume.html

  * igt@i915_suspend@debugfs-reader:
    - {shard-tglb}:       [INCOMPLETE][53] ([fdo#111832] / [fdo#111850]) -> [PASS][54] +1 similar issue
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-tglb2/igt@i915_suspend@debugfs-reader.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-tglb8/igt@i915_suspend@debugfs-reader.html

  * igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen:
    - shard-snb:          [SKIP][55] ([fdo#109271]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-snb6/igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-snb4/igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-hsw:          [SKIP][57] ([fdo#109271]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-hsw4/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-hsw4/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-xtiled:
    - shard-kbl:          [TIMEOUT][59] ([fdo#111800]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-kbl4/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-xtiled.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-kbl3/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-xtiled.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          [FAIL][61] ([fdo#105363]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-skl8/igt@kms_flip@flip-vs-expired-vblank.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-skl10/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-hsw:          [INCOMPLETE][63] ([fdo#103540]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-hsw6/igt@kms_flip@flip-vs-suspend-interruptible.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-hsw6/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
    - shard-iclb:         [FAIL][65] ([fdo#103167]) -> [PASS][66] +2 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack:
    - {shard-tglb}:       [FAIL][67] ([fdo#103167]) -> [PASS][68] +2 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [DMESG-WARN][69] ([fdo#108566]) -> [PASS][70] +4 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [FAIL][71] ([fdo#108145]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][73] ([fdo#108145] / [fdo#110403]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-iclb:         [FAIL][75] ([fdo#103166]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb1/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb3/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_psr@psr2_cursor_plane_move:
    - shard-iclb:         [SKIP][77] ([fdo#109441]) -> [PASS][78] +2 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb8/igt@kms_psr@psr2_cursor_plane_move.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][79] ([fdo#99912]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-apl8/igt@kms_setmode@basic.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-apl6/igt@kms_setmode@basic.html

  * igt@perf_pmu@busy-check-all-vcs1:
    - shard-iclb:         [SKIP][81] ([fdo#112080]) -> [PASS][82] +6 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb8/igt@perf_pmu@busy-check-all-vcs1.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb2/igt@perf_pmu@busy-check-all-vcs1.html

  * igt@perf_pmu@cpu-hotplug:
    - shard-kbl:          [TIMEOUT][83] ([fdo#111546] / [fdo#111800]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-kbl4/igt@perf_pmu@cpu-hotplug.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-kbl3/igt@perf_pmu@cpu-hotplug.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [SKIP][85] ([fdo#109276] / [fdo#112080]) -> [FAIL][86] ([fdo#111329])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111546]: https://bugs.freedesktop.org/show_bug.cgi?id=111546
  [fdo#111647]: https://bugs.freedesktop.org/show_bug.cgi?id=111647
  [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747
  [fdo#111766]: https://bugs.freedesktop.org/show_bug.cgi?id=111766
  [fdo#111781]: https://bugs.freedesktop.org/show_bug.cgi?id=111781
  [fdo#111800]: https://bugs.freedesktop.org/show_bug.cgi?id=111800
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 
  [fdo#111828]: https://bugs.freedesktop.org/show_bug.cgi?id=111828
  [fdo#111831]: https://bugs.freedesktop.org/show_bug.cgi?id=111831
  [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
  [fdo#111850]: https://bugs.freedesktop.org/show_bug.cgi?id=111850
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#111884]: https://bugs.freedesktop.org/show_bug.cgi?id=111884
  [fdo#111946]: https://bugs.freedesktop.org/show_bug.cgi?id=111946
  [fdo#111998]: https://bugs.freedesktop.org/show_bug.cgi?id=111998
  [fdo#112016 ]: https://bugs.freedesktop.org/show_bug.cgi?id=112016 
  [fdo#112021 ]: https://bugs.freedesktop.org/show_bug.cgi?id=112021 
  [fdo#112037]: https://bugs.freedesktop.org/show_bug.cgi?id=112037
  [fdo#112041]: https://bugs.freedesktop.org/show_bug.cgi?id=112041
  [fdo#112068 ]: https://bugs.freedesktop.org/show_bug.cgi?id=112068 
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7261 -> Patchwork_15128

  CI-20190529: 20190529
  CI_DRM_7261: 0df0545b3693fbc84f91af17499f204437e7ac6a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5262: 2d2fd6ce47b2eac83732c5c88cd0d7e5f13013a2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15128: 4ed8e9ab671e0641c0174c1f641c416cf3d18cb4 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/4] drm/i915/dsc: make parameter arrays const (rev2)
URL   : https://patchwork.freedesktop.org/series/68947/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7261_full -> Patchwork_15128_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_15128_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_switch@vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +12 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb2/igt@gem_ctx_switch@vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb6/igt@gem_ctx_switch@vcs1.html

  * igt@gem_eio@in-flight-contexts-1us:
    - shard-snb:          [PASS][3] -> [FAIL][4] ([fdo#111946])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-snb4/igt@gem_eio@in-flight-contexts-1us.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-snb6/igt@gem_eio@in-flight-contexts-1us.html

  * igt@gem_exec_schedule@preempt-bsd:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#112146]) +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb5/igt@gem_exec_schedule@preempt-bsd.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb1/igt@gem_exec_schedule@preempt-bsd.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
    - shard-snb:          [PASS][7] -> [DMESG-WARN][8] ([fdo#111870])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-snb7/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-hsw:          [PASS][9] -> [DMESG-WARN][10] ([fdo#111870])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-hsw2/igt@gem_userptr_blits@sync-unmap.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-hsw5/igt@gem_userptr_blits@sync-unmap.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-kbl:          [PASS][11] -> [SKIP][12] ([fdo#109271])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-kbl3/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-skl:          [PASS][13] -> [INCOMPLETE][14] ([fdo#109507])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-skl7/igt@kms_flip@flip-vs-suspend.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-skl5/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-snb:          [PASS][15] -> [INCOMPLETE][16] ([fdo#105411])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-snb5/igt@kms_flip@flip-vs-suspend-interruptible.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-snb1/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt:
    - shard-iclb:         [PASS][17] -> [FAIL][18] ([fdo#103167]) +7 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-apl:          [PASS][19] -> [DMESG-WARN][20] ([fdo#108566]) +3 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_psr@no_drrs:
    - shard-iclb:         [PASS][21] -> [FAIL][22] ([fdo#108341])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb4/igt@kms_psr@no_drrs.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb1/igt@kms_psr@no_drrs.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [PASS][23] -> [SKIP][24] ([fdo#109441]) +3 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb4/igt@kms_psr@psr2_cursor_render.html

  * igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend:
    - shard-skl:          [PASS][25] -> [INCOMPLETE][26] ([fdo#104108])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-skl9/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-skl1/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-kbl:          [PASS][27] -> [DMESG-WARN][28] ([fdo#108566]) +2 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-kbl2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-kbl2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [PASS][29] -> [SKIP][30] ([fdo#109276]) +12 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb1/igt@prime_busy@hang-bsd2.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb8/igt@prime_busy@hang-bsd2.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@vcs1-none:
    - shard-iclb:         [SKIP][31] ([fdo#109276] / [fdo#112080]) -> [PASS][32] +2 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb5/igt@gem_ctx_isolation@vcs1-none.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb2/igt@gem_ctx_isolation@vcs1-none.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][33] ([fdo#110854]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb6/igt@gem_exec_balancer@smoke.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb1/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [SKIP][35] ([fdo#109276]) -> [PASS][36] +10 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb8/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb2/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_exec_schedule@wide-bsd:
    - shard-iclb:         [SKIP][37] ([fdo#112146]) -> [PASS][38] +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb4/igt@gem_exec_schedule@wide-bsd.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb7/igt@gem_exec_schedule@wide-bsd.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive:
    - {shard-tglb}:       [INCOMPLETE][39] ([fdo#112068 ]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-tglb2/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-tglb3/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-thrashing:
    - shard-snb:          [FAIL][41] ([fdo#112037]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-snb1/igt@gem_persistent_relocs@forked-thrashing.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-snb5/igt@gem_persistent_relocs@forked-thrashing.html

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          [INCOMPLETE][43] ([fdo#104108]) -> [PASS][44] +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-skl6/igt@gem_softpin@noreloc-s3.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-skl6/igt@gem_softpin@noreloc-s3.html

  * igt@gem_sync@basic-each:
    - {shard-tglb}:       [INCOMPLETE][45] ([fdo#111647] / [fdo#111998]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-tglb6/igt@gem_sync@basic-each.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-tglb4/igt@gem_sync@basic-each.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-kbl:          [INCOMPLETE][47] ([fdo#103665]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-kbl4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-kbl3/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-snb:          [DMESG-WARN][49] ([fdo#111870]) -> [PASS][50] +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-snb7/igt@gem_userptr_blits@sync-unmap.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-snb2/igt@gem_userptr_blits@sync-unmap.html

  * igt@gem_workarounds@suspend-resume:
    - shard-apl:          [DMESG-WARN][51] ([fdo#108566]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-apl6/igt@gem_workarounds@suspend-resume.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-apl2/igt@gem_workarounds@suspend-resume.html

  * igt@i915_suspend@debugfs-reader:
    - {shard-tglb}:       [INCOMPLETE][53] ([fdo#111832] / [fdo#111850]) -> [PASS][54] +1 similar issue
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-tglb2/igt@i915_suspend@debugfs-reader.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-tglb8/igt@i915_suspend@debugfs-reader.html

  * igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen:
    - shard-snb:          [SKIP][55] ([fdo#109271]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-snb6/igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-snb4/igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-hsw:          [SKIP][57] ([fdo#109271]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-hsw4/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-hsw4/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-xtiled:
    - shard-kbl:          [TIMEOUT][59] ([fdo#111800]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-kbl4/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-xtiled.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-kbl3/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-xtiled.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          [FAIL][61] ([fdo#105363]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-skl8/igt@kms_flip@flip-vs-expired-vblank.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-skl10/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-hsw:          [INCOMPLETE][63] ([fdo#103540]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-hsw6/igt@kms_flip@flip-vs-suspend-interruptible.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-hsw6/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
    - shard-iclb:         [FAIL][65] ([fdo#103167]) -> [PASS][66] +2 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack:
    - {shard-tglb}:       [FAIL][67] ([fdo#103167]) -> [PASS][68] +2 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [DMESG-WARN][69] ([fdo#108566]) -> [PASS][70] +4 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [FAIL][71] ([fdo#108145]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][73] ([fdo#108145] / [fdo#110403]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-iclb:         [FAIL][75] ([fdo#103166]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb1/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb3/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_psr@psr2_cursor_plane_move:
    - shard-iclb:         [SKIP][77] ([fdo#109441]) -> [PASS][78] +2 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb8/igt@kms_psr@psr2_cursor_plane_move.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][79] ([fdo#99912]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-apl8/igt@kms_setmode@basic.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-apl6/igt@kms_setmode@basic.html

  * igt@perf_pmu@busy-check-all-vcs1:
    - shard-iclb:         [SKIP][81] ([fdo#112080]) -> [PASS][82] +6 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb8/igt@perf_pmu@busy-check-all-vcs1.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb2/igt@perf_pmu@busy-check-all-vcs1.html

  * igt@perf_pmu@cpu-hotplug:
    - shard-kbl:          [TIMEOUT][83] ([fdo#111546] / [fdo#111800]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-kbl4/igt@perf_pmu@cpu-hotplug.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-kbl3/igt@perf_pmu@cpu-hotplug.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [SKIP][85] ([fdo#109276] / [fdo#112080]) -> [FAIL][86] ([fdo#111329])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7261/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111546]: https://bugs.freedesktop.org/show_bug.cgi?id=111546
  [fdo#111647]: https://bugs.freedesktop.org/show_bug.cgi?id=111647
  [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747
  [fdo#111766]: https://bugs.freedesktop.org/show_bug.cgi?id=111766
  [fdo#111781]: https://bugs.freedesktop.org/show_bug.cgi?id=111781
  [fdo#111800]: https://bugs.freedesktop.org/show_bug.cgi?id=111800
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 
  [fdo#111828]: https://bugs.freedesktop.org/show_bug.cgi?id=111828
  [fdo#111831]: https://bugs.freedesktop.org/show_bug.cgi?id=111831
  [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
  [fdo#111850]: https://bugs.freedesktop.org/show_bug.cgi?id=111850
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#111884]: https://bugs.freedesktop.org/show_bug.cgi?id=111884
  [fdo#111946]: https://bugs.freedesktop.org/show_bug.cgi?id=111946
  [fdo#111998]: https://bugs.freedesktop.org/show_bug.cgi?id=111998
  [fdo#112016 ]: https://bugs.freedesktop.org/show_bug.cgi?id=112016 
  [fdo#112021 ]: https://bugs.freedesktop.org/show_bug.cgi?id=112021 
  [fdo#112037]: https://bugs.freedesktop.org/show_bug.cgi?id=112037
  [fdo#112041]: https://bugs.freedesktop.org/show_bug.cgi?id=112041
  [fdo#112068 ]: https://bugs.freedesktop.org/show_bug.cgi?id=112068 
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7261 -> Patchwork_15128

  CI-20190529: 20190529
  CI_DRM_7261: 0df0545b3693fbc84f91af17499f204437e7ac6a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5262: 2d2fd6ce47b2eac83732c5c88cd0d7e5f13013a2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15128: 4ed8e9ab671e0641c0174c1f641c416cf3d18cb4 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15128/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx