* [PATCH] powernv: Properly mask POWER9 DD1 PVR for different chip types
@ 2017-06-07 4:11 Michael Neuling
2017-06-07 7:24 ` Michael Ellerman
0 siblings, 1 reply; 4+ messages in thread
From: Michael Neuling @ 2017-06-07 4:11 UTC (permalink / raw)
To: mpe, linuxppc-dev; +Cc: benh, paulus, sam.bobroff
Bits 48:51 in the PVR for POWER9 represent different chip types (scale
up vs out and 12 vs 24 core). Current chips have 0 here, but could be
non-zero in the future.
This changes the POWER9 DD1 mask to correctly ignore these bits 48:51.
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/kernel/cputable.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 9b3e88b1a9..89dcd94237 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -526,8 +526,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check_early = __machine_check_early_realmode_p8,
.platform = "power8",
},
- { /* Power9 DD1*/
- .pvr_mask = 0xffffff00,
+ { /* Power9 DD1. Bits 48:51 represent chip type so mask these */
+ .pvr_mask = 0xffff0f00,
.pvr_value = 0x004e0100,
.cpu_name = "POWER9 (raw)",
.cpu_features = CPU_FTRS_POWER9_DD1,
--
2.11.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] powernv: Properly mask POWER9 DD1 PVR for different chip types
2017-06-07 4:11 [PATCH] powernv: Properly mask POWER9 DD1 PVR for different chip types Michael Neuling
@ 2017-06-07 7:24 ` Michael Ellerman
2017-06-08 0:44 ` Michael Neuling
0 siblings, 1 reply; 4+ messages in thread
From: Michael Ellerman @ 2017-06-07 7:24 UTC (permalink / raw)
To: Michael Neuling, linuxppc-dev; +Cc: benh, paulus, sam.bobroff
Michael Neuling <mikey@neuling.org> writes:
> Bits 48:51 in the PVR for POWER9 represent different chip types (scale
> up vs out and 12 vs 24 core). Current chips have 0 here, but could be
> non-zero in the future.
>
> This changes the POWER9 DD1 mask to correctly ignore these bits 48:51.
>
> Signed-off-by: Michael Neuling <mikey@neuling.org>
> ---
> arch/powerpc/kernel/cputable.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Presumably we should backport this?
cheers
> diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
> index 9b3e88b1a9..89dcd94237 100644
> --- a/arch/powerpc/kernel/cputable.c
> +++ b/arch/powerpc/kernel/cputable.c
> @@ -526,8 +526,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
> .machine_check_early = __machine_check_early_realmode_p8,
> .platform = "power8",
> },
> - { /* Power9 DD1*/
> - .pvr_mask = 0xffffff00,
> + { /* Power9 DD1. Bits 48:51 represent chip type so mask these */
> + .pvr_mask = 0xffff0f00,
> .pvr_value = 0x004e0100,
> .cpu_name = "POWER9 (raw)",
> .cpu_features = CPU_FTRS_POWER9_DD1,
> --
> 2.11.0
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] powernv: Properly mask POWER9 DD1 PVR for different chip types
2017-06-07 7:24 ` Michael Ellerman
@ 2017-06-08 0:44 ` Michael Neuling
2017-06-08 3:44 ` Michael Ellerman
0 siblings, 1 reply; 4+ messages in thread
From: Michael Neuling @ 2017-06-08 0:44 UTC (permalink / raw)
To: Michael Ellerman, linuxppc-dev; +Cc: benh, paulus, sam.bobroff
On Wed, 2017-06-07 at 17:24 +1000, Michael Ellerman wrote:
> Michael Neuling <mikey@neuling.org> writes:
>=20
> > Bits 48:51 in the PVR for POWER9 represent different chip types (scale
> > up vs out and 12 vs 24 core). Current chips have 0 here, but could be
> > non-zero in the future.
> >=20
> > This changes the POWER9 DD1 mask to correctly ignore these bits 48:51.
> >=20
> > Signed-off-by: Michael Neuling <mikey@neuling.org>
> > ---
> > =C2=A0arch/powerpc/kernel/cputable.c | 4 ++--
> > =C2=A01 file changed, 2 insertions(+), 2 deletions(-)
>=20
> Presumably we should backport this?
Actually, we need to scrap this patch.
Looks like the scale up version will be marked as DD1, but it won't need th=
ese
workarounds. So we need it to match on the other POWER9 entry.
Mikey
>=20
> cheers
>=20
> > diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputa=
ble.c
> > index 9b3e88b1a9..89dcd94237 100644
> > --- a/arch/powerpc/kernel/cputable.c
> > +++ b/arch/powerpc/kernel/cputable.c
> > @@ -526,8 +526,8 @@ static struct cpu_spec __initdata cpu_specs[] =3D {
> > =C2=A0 .machine_check_early =3D
> > __machine_check_early_realmode_p8,
> > =C2=A0 .platform =3D "power8",
> > =C2=A0 },
> > - { /* Power9 DD1*/
> > - .pvr_mask =3D 0xffffff00,
> > + { /* Power9 DD1. Bits 48:51 represent chip type so mask
> > these */
> > + .pvr_mask =3D 0xffff0f00,
> > =C2=A0 .pvr_value =3D 0x004e0100,
> > =C2=A0 .cpu_name =3D "POWER9 (raw)",
> > =C2=A0 .cpu_features =3D CPU_FTRS_POWER9_DD1,
> > --=C2=A0
> > 2.11.0
>=20
>=20
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] powernv: Properly mask POWER9 DD1 PVR for different chip types
2017-06-08 0:44 ` Michael Neuling
@ 2017-06-08 3:44 ` Michael Ellerman
0 siblings, 0 replies; 4+ messages in thread
From: Michael Ellerman @ 2017-06-08 3:44 UTC (permalink / raw)
To: Michael Neuling, linuxppc-dev; +Cc: benh, paulus, sam.bobroff
Michael Neuling <mikey@neuling.org> writes:
> On Wed, 2017-06-07 at 17:24 +1000, Michael Ellerman wrote:
>> Michael Neuling <mikey@neuling.org> writes:
>>=20
>> > Bits 48:51 in the PVR for POWER9 represent different chip types (scale
>> > up vs out and 12 vs 24 core). Current chips have 0 here, but could be
>> > non-zero in the future.
>> >=20
>> > This changes the POWER9 DD1 mask to correctly ignore these bits 48:51.
>> >=20
>> > Signed-off-by: Michael Neuling <mikey@neuling.org>
>> > ---
>> > =C2=A0arch/powerpc/kernel/cputable.c | 4 ++--
>> > =C2=A01 file changed, 2 insertions(+), 2 deletions(-)
>>=20
>> Presumably we should backport this?
>
> Actually, we need to scrap this patch.
>
> Looks like the scale up version will be marked as DD1, but it won't need =
these
> workarounds. So we need it to match on the other POWER9 entry.
OK.
/giphy "dumpster fire"
cheers
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-06-08 3:45 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2017-06-07 4:11 [PATCH] powernv: Properly mask POWER9 DD1 PVR for different chip types Michael Neuling
2017-06-07 7:24 ` Michael Ellerman
2017-06-08 0:44 ` Michael Neuling
2017-06-08 3:44 ` Michael Ellerman
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