* [PATCH 1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard
@ 2017-10-04 12:41 Chris Wilson
2017-10-04 12:41 ` [PATCH 2/2] drm/i915: Remove WA_(SET|CLR)_BIT Chris Wilson
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Chris Wilson @ 2017-10-04 12:41 UTC (permalink / raw)
To: intel-gfx
Looking at gem_workarounds shows us that MMCD_MISC_CTRL is not restored
following a suspend-resume cycle. This implies that MMCD_MISC_CTRL is
not stored in the context, but is an ordinary register w/a that we need to
restore during init_hw.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Oscar Mateo <oscar.mateo@intel.com>
---
drivers/gpu/drm/i915/intel_engine_cs.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index a28e2a864cf1..06044f1f48c8 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -980,7 +980,11 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
GEN9_PBE_COMPRESSED_HASH_SELECTION);
WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
GEN9_SAMPLER_HASH_COMPRESSED_READ_ADDR);
- WA_SET_BIT(MMCD_MISC_CTRL, MMCD_PCLA | MMCD_HOTSPOT_EN);
+
+ I915_WRITE(MMCD_MISC_CTRL,
+ I915_READ(MMCD_MISC_CTRL) |
+ MMCD_PCLA |
+ MMCD_HOTSPOT_EN);
}
/* WaClearFlowControlGpgpuContextSave:skl,bxt,kbl,glk,cfl */
--
2.14.2
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] drm/i915: Remove WA_(SET|CLR)_BIT
2017-10-04 12:41 [PATCH 1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard Chris Wilson
@ 2017-10-04 12:41 ` Chris Wilson
2017-10-04 12:57 ` Mika Kuoppala
2017-10-04 12:55 ` [PATCH 1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard Mika Kuoppala
` (2 subsequent siblings)
3 siblings, 1 reply; 7+ messages in thread
From: Chris Wilson @ 2017-10-04 12:41 UTC (permalink / raw)
To: intel-gfx
These macros are of dubious merit when coupled with the per-context w/a
set. Instead of tweaking the value in the context, they tweak the value
based on the mmio at the time of recording; they are almost by
definition not per-context! Having removed the last users, remove the
macros to avoid temptation in the future.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Oscar Mateo <oscar.mateo@intel.com>
---
drivers/gpu/drm/i915/intel_engine_cs.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 06044f1f48c8..60d500e27af0 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -830,9 +830,6 @@ static int wa_add(struct drm_i915_private *dev_priv,
#define WA_SET_FIELD_MASKED(addr, mask, value) \
WA_REG(addr, mask, _MASKED_FIELD(mask, value))
-#define WA_SET_BIT(addr, mask) WA_REG(addr, mask, I915_READ(addr) | (mask))
-#define WA_CLR_BIT(addr, mask) WA_REG(addr, mask, I915_READ(addr) & ~(mask))
-
#define WA_WRITE(addr, val) WA_REG(addr, 0xffffffff, val)
static int wa_ring_whitelist_reg(struct intel_engine_cs *engine,
--
2.14.2
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard
2017-10-04 12:41 [PATCH 1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard Chris Wilson
2017-10-04 12:41 ` [PATCH 2/2] drm/i915: Remove WA_(SET|CLR)_BIT Chris Wilson
@ 2017-10-04 12:55 ` Mika Kuoppala
2017-10-04 15:33 ` Oscar Mateo
2017-10-04 13:06 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2017-10-04 14:16 ` ✓ Fi.CI.IGT: " Patchwork
3 siblings, 1 reply; 7+ messages in thread
From: Mika Kuoppala @ 2017-10-04 12:55 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Looking at gem_workarounds shows us that MMCD_MISC_CTRL is not restored
> following a suspend-resume cycle. This implies that MMCD_MISC_CTRL is
> not stored in the context, but is an ordinary register w/a that we need to
> restore during init_hw.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_engine_cs.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index a28e2a864cf1..06044f1f48c8 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -980,7 +980,11 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
> GEN9_PBE_COMPRESSED_HASH_SELECTION);
> WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
> GEN9_SAMPLER_HASH_COMPRESSED_READ_ADDR);
> - WA_SET_BIT(MMCD_MISC_CTRL, MMCD_PCLA | MMCD_HOTSPOT_EN);
> +
> + I915_WRITE(MMCD_MISC_CTRL,
> + I915_READ(MMCD_MISC_CTRL) |
> + MMCD_PCLA |
> + MMCD_HOTSPOT_EN);
> }
>
> /* WaClearFlowControlGpgpuContextSave:skl,bxt,kbl,glk,cfl */
> --
> 2.14.2
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] drm/i915: Remove WA_(SET|CLR)_BIT
2017-10-04 12:41 ` [PATCH 2/2] drm/i915: Remove WA_(SET|CLR)_BIT Chris Wilson
@ 2017-10-04 12:57 ` Mika Kuoppala
0 siblings, 0 replies; 7+ messages in thread
From: Mika Kuoppala @ 2017-10-04 12:57 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> These macros are of dubious merit when coupled with the per-context w/a
> set. Instead of tweaking the value in the context, they tweak the value
> based on the mmio at the time of recording; they are almost by
> definition not per-context! Having removed the last users, remove the
> macros to avoid temptation in the future.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Oscar Mateo <oscar.mateo@intel.com>
> ---
> drivers/gpu/drm/i915/intel_engine_cs.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 06044f1f48c8..60d500e27af0 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -830,9 +830,6 @@ static int wa_add(struct drm_i915_private *dev_priv,
> #define WA_SET_FIELD_MASKED(addr, mask, value) \
> WA_REG(addr, mask, _MASKED_FIELD(mask, value))
>
> -#define WA_SET_BIT(addr, mask) WA_REG(addr, mask, I915_READ(addr) | (mask))
> -#define WA_CLR_BIT(addr, mask) WA_REG(addr, mask, I915_READ(addr) & ~(mask))
> -
> #define WA_WRITE(addr, val) WA_REG(addr, 0xffffffff, val)
>
WA_WRITE can be removed too if NON_PRIV slips in first.
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> static int wa_ring_whitelist_reg(struct intel_engine_cs *engine,
> --
> 2.14.2
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^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard
2017-10-04 12:41 [PATCH 1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard Chris Wilson
2017-10-04 12:41 ` [PATCH 2/2] drm/i915: Remove WA_(SET|CLR)_BIT Chris Wilson
2017-10-04 12:55 ` [PATCH 1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard Mika Kuoppala
@ 2017-10-04 13:06 ` Patchwork
2017-10-04 14:16 ` ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2017-10-04 13:06 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard
URL : https://patchwork.freedesktop.org/series/31383/
State : success
== Summary ==
Series 31383v1 series starting with [1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard
https://patchwork.freedesktop.org/api/1.0/series/31383/revisions/1/mbox/
Test chamelium:
Subgroup dp-crc-fast:
pass -> FAIL (fi-kbl-7500u) fdo#102514
Test kms_busy:
Subgroup basic-flip-b:
dmesg-warn -> PASS (fi-skl-6700hq) fdo#101518
Subgroup basic-flip-c:
dmesg-warn -> PASS (fi-skl-6700k) fdo#103097
Test drv_module_reload:
Subgroup basic-no-display:
dmesg-warn -> PASS (fi-cfl-s) k.org#196765 +1
fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#101518 https://bugs.freedesktop.org/show_bug.cgi?id=101518
fdo#103097 https://bugs.freedesktop.org/show_bug.cgi?id=103097
k.org#196765 https://bugzilla.kernel.org/show_bug.cgi?id=196765
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:455s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:477s
fi-blb-e6850 total:289 pass:224 dwarn:1 dfail:0 fail:0 skip:64 time:393s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:586s
fi-bwr-2160 total:289 pass:184 dwarn:0 dfail:0 fail:0 skip:105 time:289s
fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:531s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:535s
fi-byt-j1900 total:289 pass:254 dwarn:1 dfail:0 fail:0 skip:34 time:546s
fi-byt-n2820 total:289 pass:250 dwarn:1 dfail:0 fail:0 skip:38 time:537s
fi-cfl-s total:289 pass:256 dwarn:1 dfail:0 fail:0 skip:32 time:559s
fi-elk-e7500 total:289 pass:230 dwarn:0 dfail:0 fail:0 skip:59 time:439s
fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:596s
fi-hsw-4770 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:446s
fi-hsw-4770r total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:415s
fi-ilk-650 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:466s
fi-ivb-3520m total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:513s
fi-ivb-3770 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:479s
fi-kbl-7500u total:289 pass:263 dwarn:1 dfail:0 fail:1 skip:24 time:503s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:575s
fi-kbl-7567u total:289 pass:265 dwarn:4 dfail:0 fail:0 skip:20 time:494s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:591s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:479s
fi-skl-6700hq total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:615s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:538s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:522s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:482s
fi-snb-2520m total:289 pass:251 dwarn:0 dfail:0 fail:0 skip:38 time:592s
fi-snb-2600 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:442s
fi-cnl-y failed to connect after reboot
fi-pnv-d510 failed to connect after reboot
d8f7188551f39358e833794a9e651422dbe9a1e2 drm-tip: 2017y-10m-04d-08h-46m-00s UTC integration manifest
6e5d7b5aafdd drm/i915: Remove WA_(SET|CLR)_BIT
aff096ce8639 drm/i915: Move MMCD_MISC_CTRL from context w/a to standard
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5895/
_______________________________________________
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^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard
2017-10-04 12:41 [PATCH 1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard Chris Wilson
` (2 preceding siblings ...)
2017-10-04 13:06 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
@ 2017-10-04 14:16 ` Patchwork
3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2017-10-04 14:16 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard
URL : https://patchwork.freedesktop.org/series/31383/
State : success
== Summary ==
Test kms_cursor_legacy:
Subgroup pipe-F-forked-move:
incomplete -> SKIP (shard-hsw) fdo#102332 +1
Subgroup cursorA-vs-flipA-atomic:
skip -> PASS (shard-hsw)
Test kms_draw_crc:
Subgroup draw-method-xrgb8888-mmap-cpu-untiled:
skip -> PASS (shard-hsw)
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-primscrn-spr-indfb-draw-blt:
skip -> PASS (shard-hsw)
Test perf:
Subgroup polling:
pass -> FAIL (shard-hsw) fdo#102252
Test gem_flink_race:
Subgroup flink_close:
pass -> FAIL (shard-hsw) fdo#102655
fdo#102332 https://bugs.freedesktop.org/show_bug.cgi?id=102332
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#102655 https://bugs.freedesktop.org/show_bug.cgi?id=102655
shard-hsw total:2429 pass:1329 dwarn:6 dfail:0 fail:11 skip:1083 time:10124s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5895/shards.html
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard
2017-10-04 12:55 ` [PATCH 1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard Mika Kuoppala
@ 2017-10-04 15:33 ` Oscar Mateo
0 siblings, 0 replies; 7+ messages in thread
From: Oscar Mateo @ 2017-10-04 15:33 UTC (permalink / raw)
To: Mika Kuoppala, Chris Wilson, intel-gfx
On 10/04/2017 05:55 AM, Mika Kuoppala wrote:
> Chris Wilson <chris@chris-wilson.co.uk> writes:
>
>> Looking at gem_workarounds shows us that MMCD_MISC_CTRL is not restored
>> following a suspend-resume cycle. This implies that MMCD_MISC_CTRL is
>> not stored in the context, but is an ordinary register w/a that we need to
>> restore during init_hw.
>>
>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>> Cc: Oscar Mateo <oscar.mateo@intel.com>
> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Oscar Mateo <oscar.mateo@intel.com>
I missed this one!
>> ---
>> drivers/gpu/drm/i915/intel_engine_cs.c | 6 +++++-
>> 1 file changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
>> index a28e2a864cf1..06044f1f48c8 100644
>> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
>> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
>> @@ -980,7 +980,11 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
>> GEN9_PBE_COMPRESSED_HASH_SELECTION);
>> WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
>> GEN9_SAMPLER_HASH_COMPRESSED_READ_ADDR);
>> - WA_SET_BIT(MMCD_MISC_CTRL, MMCD_PCLA | MMCD_HOTSPOT_EN);
>> +
>> + I915_WRITE(MMCD_MISC_CTRL,
>> + I915_READ(MMCD_MISC_CTRL) |
>> + MMCD_PCLA |
>> + MMCD_HOTSPOT_EN);
>> }
>>
>> /* WaClearFlowControlGpgpuContextSave:skl,bxt,kbl,glk,cfl */
>> --
>> 2.14.2
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^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-10-04 15:33 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-10-04 12:41 [PATCH 1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard Chris Wilson
2017-10-04 12:41 ` [PATCH 2/2] drm/i915: Remove WA_(SET|CLR)_BIT Chris Wilson
2017-10-04 12:57 ` Mika Kuoppala
2017-10-04 12:55 ` [PATCH 1/2] drm/i915: Move MMCD_MISC_CTRL from context w/a to standard Mika Kuoppala
2017-10-04 15:33 ` Oscar Mateo
2017-10-04 13:06 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2017-10-04 14:16 ` ✓ Fi.CI.IGT: " Patchwork
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