* [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem
@ 2023-06-06 8:21 Sujaritha Sundaresan
2023-06-06 9:25 ` [Intel-xe] ✓ CI.Patch_applied: success for drm/xe: " Patchwork
` (5 more replies)
0 siblings, 6 replies; 9+ messages in thread
From: Sujaritha Sundaresan @ 2023-06-06 8:21 UTC (permalink / raw)
To: intel-xe; +Cc: Sujaritha Sundaresan
Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
---
drivers/gpu/drm/xe/regs/xe_regs.h | 7 +++++
drivers/gpu/drm/xe/xe_guc_pc.c | 44 +++++++++++++++++++++++++++++++
2 files changed, 51 insertions(+)
diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h
index 8be616a1bd51..bd7b26296402 100644
--- a/drivers/gpu/drm/xe/regs/xe_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_regs.h
@@ -101,4 +101,11 @@
#define DSMBASE XE_REG(0x1080C0)
#define BDSM_MASK REG_GENMASK64(63, 20)
+#define XEHP_PCODE_FREQUENCY_CONFIG 0x6e
+/* XEHP_PCODE_FREQUENCY_CONFIG sub-commands (param1) */
+#define PCODE_MBOX_FC_SC_READ_FUSED_P0 0x0
+#define PCODE_MBOX_FC_SC_READ_FUSED_PN 0x1
+/* PCODE_MBOX_DOMAIN_* - mailbox domain IDs */
+#define PCODE_MBOX_DOMAIN_HBM 0x2
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
index 67faa9ee0006..1b349ce74c3d 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.c
+++ b/drivers/gpu/drm/xe/xe_guc_pc.c
@@ -453,6 +453,48 @@ static ssize_t freq_rpn_show(struct device *dev,
}
static DEVICE_ATTR_RO(freq_rpn);
+static ssize_t freq_mem_rp0_show(struct device *dev,
+ struct device_attribute *attr, char *buff)
+{
+ struct kobject *kobj = &dev->kobj;
+ struct xe_gt *gt = kobj_to_gt(kobj);
+ u32 val;
+ int err;
+
+ err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
+ PCODE_MBOX_FC_SC_READ_FUSED_P0,
+ PCODE_MBOX_DOMAIN_HBM, &val);
+ if (err)
+ return err;
+
+ /* data_out - Fused P0 for domain ID in units of 50 MHz */
+ val *= GT_FREQUENCY_MULTIPLIER;
+
+ return sysfs_emit(buff, "%u\n", val);
+}
+static DEVICE_ATTR_RO(freq_mem_rp0);
+
+static ssize_t freq_mem_rpn_show(struct device *dev,
+ struct device_attribute *attr, char *buff)
+{
+ struct kobject *kobj = &dev->kobj;
+ struct xe_gt *gt = kobj_to_gt(kobj);
+ u32 val;
+ int err;
+
+ err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
+ PCODE_MBOX_FC_SC_READ_FUSED_PN,
+ PCODE_MBOX_DOMAIN_HBM, &val);
+ if (err)
+ return err;
+
+ /* data_out - Fused P0 for domain ID in units of 50 MHz */
+ val *= GT_FREQUENCY_MULTIPLIER;
+
+ return sysfs_emit(buff, "%u\n", val);
+}
+static DEVICE_ATTR_RO(freq_mem_rpn);
+
static ssize_t freq_min_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -631,6 +673,8 @@ static const struct attribute *pc_attrs[] = {
&dev_attr_freq_rp0.attr,
&dev_attr_freq_rpe.attr,
&dev_attr_freq_rpn.attr,
+ &dev_attr_freq_mem_rp0.attr,
+ &dev_attr_freq_mem_rpn.attr,
&dev_attr_freq_min.attr,
&dev_attr_freq_max.attr,
&dev_attr_rc_status.attr,
--
2.39.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-xe] ✓ CI.Patch_applied: success for drm/xe: Sysfs entries to query fused min, max frequency of lmem
2023-06-06 8:21 [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem Sujaritha Sundaresan
@ 2023-06-06 9:25 ` Patchwork
2023-06-06 9:25 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
` (4 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2023-06-06 9:25 UTC (permalink / raw)
To: Sujaritha Sundaresan; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Sysfs entries to query fused min, max frequency of lmem
URL : https://patchwork.freedesktop.org/series/118916/
State : success
== Summary ==
=== Applying kernel patches on branch 'drm-xe-next' with base: ===
Base commit: ee454cf40 drm/xe: Don't hardcode GuC's MOCS index in register header
=== git am output follows ===
Applying: drm/xe: Sysfs entries to query fused min, max frequency of lmem
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-xe] ✗ CI.checkpatch: warning for drm/xe: Sysfs entries to query fused min, max frequency of lmem
2023-06-06 8:21 [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem Sujaritha Sundaresan
2023-06-06 9:25 ` [Intel-xe] ✓ CI.Patch_applied: success for drm/xe: " Patchwork
@ 2023-06-06 9:25 ` Patchwork
2023-06-06 9:26 ` [Intel-xe] ✗ CI.KUnit: failure " Patchwork
` (3 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2023-06-06 9:25 UTC (permalink / raw)
To: Sujaritha Sundaresan; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Sysfs entries to query fused min, max frequency of lmem
URL : https://patchwork.freedesktop.org/series/118916/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c7d32770e3cd31d9fc134ce41f329b10aa33ee15
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit b0e21b886ed241dc48fad2b851a8699d54526ee1
Author: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
Date: Tue Jun 6 01:21:42 2023 -0700
drm/xe: Sysfs entries to query fused min, max frequency of lmem
Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
+ /mt/dim checkpatch ee454cf4046170833f005c9591fb80a67df81f07 drm-intel
b0e21b886 drm/xe: Sysfs entries to query fused min, max frequency of lmem
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
total: 0 errors, 1 warnings, 0 checks, 67 lines checked
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-xe] ✗ CI.KUnit: failure for drm/xe: Sysfs entries to query fused min, max frequency of lmem
2023-06-06 8:21 [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem Sujaritha Sundaresan
2023-06-06 9:25 ` [Intel-xe] ✓ CI.Patch_applied: success for drm/xe: " Patchwork
2023-06-06 9:25 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
@ 2023-06-06 9:26 ` Patchwork
2023-06-06 15:56 ` [Intel-xe] [PATCH] [RFC]drm/xe: " Dixit, Ashutosh
` (2 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2023-06-06 9:26 UTC (permalink / raw)
To: Sujaritha Sundaresan; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Sysfs entries to query fused min, max frequency of lmem
URL : https://patchwork.freedesktop.org/series/118916/
State : failure
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
ERROR:root:../drivers/gpu/drm/xe/xe_guc_pc.c: In function ‘freq_mem_rp0_show’:
../drivers/gpu/drm/xe/xe_guc_pc.c:464:27: error: ‘XEHPSDV_PCODE_FREQUENCY_CONFIG’ undeclared (first use in this function); did you mean ‘XEHP_PCODE_FREQUENCY_CONFIG’?
464 | err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| XEHP_PCODE_FREQUENCY_CONFIG
../drivers/gpu/drm/xe/xe_guc_pc.c:464:27: note: each undeclared identifier is reported only once for each function it appears in
../drivers/gpu/drm/xe/xe_guc_pc.c:464:22: error: passing argument 1 of ‘xe_pcode_read’ from incompatible pointer type [-Werror=incompatible-pointer-types]
464 | err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
| ^~~
| |
| struct device *
In file included from ../drivers/gpu/drm/xe/xe_guc_pc.c:22:
../drivers/gpu/drm/xe/xe_pcode.h:16:33: note: expected ‘struct xe_gt *’ but argument is of type ‘struct device *’
16 | int xe_pcode_read(struct xe_gt *gt, u32 mbox, u32 *val, u32 *val1);
| ~~~~~~~~~~~~~~^~
In file included from ../drivers/gpu/drm/xe/xe_guc_pc.c:13:
../drivers/gpu/drm/xe/regs/xe_regs.h:109:49: warning: passing argument 4 of ‘xe_pcode_read’ makes pointer from integer without a cast [-Wint-conversion]
109 | #define PCODE_MBOX_DOMAIN_HBM 0x2
| ^~~
| |
| int
../drivers/gpu/drm/xe/xe_guc_pc.c:466:8: note: in expansion of macro ‘PCODE_MBOX_DOMAIN_HBM’
466 | PCODE_MBOX_DOMAIN_HBM, &val);
| ^~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_guc_pc.c:22:
../drivers/gpu/drm/xe/xe_pcode.h:16:62: note: expected ‘u32 *’ {aka ‘unsigned int *’} but argument is of type ‘int’
16 | int xe_pcode_read(struct xe_gt *gt, u32 mbox, u32 *val, u32 *val1);
| ~~~~~^~~~
../drivers/gpu/drm/xe/xe_guc_pc.c:464:8: error: too many arguments to function ‘xe_pcode_read’
464 | err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
| ^~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_guc_pc.c:22:
../drivers/gpu/drm/xe/xe_pcode.h:16:5: note: declared here
16 | int xe_pcode_read(struct xe_gt *gt, u32 mbox, u32 *val, u32 *val1);
| ^~~~~~~~~~~~~
../drivers/gpu/drm/xe/xe_guc_pc.c:460:16: warning: unused variable ‘gt’ [-Wunused-variable]
460 | struct xe_gt *gt = kobj_to_gt(kobj);
| ^~
../drivers/gpu/drm/xe/xe_guc_pc.c: In function ‘freq_mem_rpn_show’:
../drivers/gpu/drm/xe/xe_guc_pc.c:485:27: error: ‘XEHPSDV_PCODE_FREQUENCY_CONFIG’ undeclared (first use in this function); did you mean ‘XEHP_PCODE_FREQUENCY_CONFIG’?
485 | err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| XEHP_PCODE_FREQUENCY_CONFIG
../drivers/gpu/drm/xe/xe_guc_pc.c:485:22: error: passing argument 1 of ‘xe_pcode_read’ from incompatible pointer type [-Werror=incompatible-pointer-types]
485 | err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
| ^~~
| |
| struct device *
In file included from ../drivers/gpu/drm/xe/xe_guc_pc.c:22:
../drivers/gpu/drm/xe/xe_pcode.h:16:33: note: expected ‘struct xe_gt *’ but argument is of type ‘struct device *’
16 | int xe_pcode_read(struct xe_gt *gt, u32 mbox, u32 *val, u32 *val1);
| ~~~~~~~~~~~~~~^~
In file included from ../drivers/gpu/drm/xe/xe_guc_pc.c:13:
../drivers/gpu/drm/xe/regs/xe_regs.h:107:49: warning: passing argument 3 of ‘xe_pcode_read’ makes pointer from integer without a cast [-Wint-conversion]
107 | #define PCODE_MBOX_FC_SC_READ_FUSED_PN 0x1
| ^~~
| |
| int
../drivers/gpu/drm/xe/xe_guc_pc.c:486:8: note: in expansion of macro ‘PCODE_MBOX_FC_SC_READ_FUSED_PN’
486 | PCODE_MBOX_FC_SC_READ_FUSED_PN,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_guc_pc.c:22:
../drivers/gpu/drm/xe/xe_pcode.h:16:52: note: expected ‘u32 *’ {aka ‘unsigned int *’} but argument is of type ‘int’
16 | int xe_pcode_read(struct xe_gt *gt, u32 mbox, u32 *val, u32 *val1);
| ~~~~~^~~
In file included from ../drivers/gpu/drm/xe/xe_guc_pc.c:13:
../drivers/gpu/drm/xe/regs/xe_regs.h:109:49: warning: passing argument 4 of ‘xe_pcode_read’ makes pointer from integer without a cast [-Wint-conversion]
109 | #define PCODE_MBOX_DOMAIN_HBM 0x2
| ^~~
| |
| int
../drivers/gpu/drm/xe/xe_guc_pc.c:487:8: note: in expansion of macro ‘PCODE_MBOX_DOMAIN_HBM’
487 | PCODE_MBOX_DOMAIN_HBM, &val);
| ^~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_guc_pc.c:22:
../drivers/gpu/drm/xe/xe_pcode.h:16:62: note: expected ‘u32 *’ {aka ‘unsigned int *’} but argument is of type ‘int’
16 | int xe_pcode_read(struct xe_gt *gt, u32 mbox, u32 *val, u32 *val1);
| ~~~~~^~~~
../drivers/gpu/drm/xe/xe_guc_pc.c:485:8: error: too many arguments to function ‘xe_pcode_read’
485 | err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
| ^~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_guc_pc.c:22:
../drivers/gpu/drm/xe/xe_pcode.h:16:5: note: declared here
16 | int xe_pcode_read(struct xe_gt *gt, u32 mbox, u32 *val, u32 *val1);
| ^~~~~~~~~~~~~
../drivers/gpu/drm/xe/xe_guc_pc.c:481:16: warning: unused variable ‘gt’ [-Wunused-variable]
481 | struct xe_gt *gt = kobj_to_gt(kobj);
| ^~
cc1: some warnings being treated as errors
make[6]: *** [../scripts/Makefile.build:252: drivers/gpu/drm/xe/xe_guc_pc.o] Error 1
make[6]: *** Waiting for unfinished jobs....
make[5]: *** [../scripts/Makefile.build:494: drivers/gpu/drm/xe] Error 2
make[5]: *** Waiting for unfinished jobs....
make[4]: *** [../scripts/Makefile.build:494: drivers/gpu/drm] Error 2
make[3]: *** [../scripts/Makefile.build:494: drivers/gpu] Error 2
make[2]: *** [../scripts/Makefile.build:494: drivers] Error 2
make[1]: *** [/kernel/Makefile:2025: .] Error 2
make: *** [Makefile:226: __sub-make] Error 2
[09:25:59] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:26:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem
2023-06-06 8:21 [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem Sujaritha Sundaresan
` (2 preceding siblings ...)
2023-06-06 9:26 ` [Intel-xe] ✗ CI.KUnit: failure " Patchwork
@ 2023-06-06 15:56 ` Dixit, Ashutosh
2023-06-07 3:38 ` Sundaresan, Sujaritha
2023-06-07 4:37 ` Nilawar, Badal
2023-06-07 18:21 ` Matt Roper
5 siblings, 1 reply; 9+ messages in thread
From: Dixit, Ashutosh @ 2023-06-06 15:56 UTC (permalink / raw)
To: Sujaritha Sundaresan; +Cc: intel-xe
On Tue, 06 Jun 2023 01:21:42 -0700, Sujaritha Sundaresan wrote:
>
Hi Suja,
Once again sysfs_create_files is missing from the patch.
Also xe calls lmem vram, so sysfs file names should something like
vram_rp0/rpn_freq_mhz, "mem" is too general.
Ashutosh
> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_regs.h | 7 +++++
> drivers/gpu/drm/xe/xe_guc_pc.c | 44 +++++++++++++++++++++++++++++++
> 2 files changed, 51 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h
> index 8be616a1bd51..bd7b26296402 100644
> --- a/drivers/gpu/drm/xe/regs/xe_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_regs.h
> @@ -101,4 +101,11 @@
> #define DSMBASE XE_REG(0x1080C0)
> #define BDSM_MASK REG_GENMASK64(63, 20)
>
> +#define XEHP_PCODE_FREQUENCY_CONFIG 0x6e
> +/* XEHP_PCODE_FREQUENCY_CONFIG sub-commands (param1) */
> +#define PCODE_MBOX_FC_SC_READ_FUSED_P0 0x0
> +#define PCODE_MBOX_FC_SC_READ_FUSED_PN 0x1
> +/* PCODE_MBOX_DOMAIN_* - mailbox domain IDs */
> +#define PCODE_MBOX_DOMAIN_HBM 0x2
> +
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> index 67faa9ee0006..1b349ce74c3d 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> @@ -453,6 +453,48 @@ static ssize_t freq_rpn_show(struct device *dev,
> }
> static DEVICE_ATTR_RO(freq_rpn);
>
> +static ssize_t freq_mem_rp0_show(struct device *dev,
> + struct device_attribute *attr, char *buff)
> +{
> + struct kobject *kobj = &dev->kobj;
> + struct xe_gt *gt = kobj_to_gt(kobj);
> + u32 val;
> + int err;
> +
> + err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
> + PCODE_MBOX_FC_SC_READ_FUSED_P0,
> + PCODE_MBOX_DOMAIN_HBM, &val);
> + if (err)
> + return err;
> +
> + /* data_out - Fused P0 for domain ID in units of 50 MHz */
> + val *= GT_FREQUENCY_MULTIPLIER;
> +
> + return sysfs_emit(buff, "%u\n", val);
> +}
> +static DEVICE_ATTR_RO(freq_mem_rp0);
> +
> +static ssize_t freq_mem_rpn_show(struct device *dev,
> + struct device_attribute *attr, char *buff)
> +{
> + struct kobject *kobj = &dev->kobj;
> + struct xe_gt *gt = kobj_to_gt(kobj);
> + u32 val;
> + int err;
> +
> + err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
> + PCODE_MBOX_FC_SC_READ_FUSED_PN,
> + PCODE_MBOX_DOMAIN_HBM, &val);
> + if (err)
> + return err;
> +
> + /* data_out - Fused P0 for domain ID in units of 50 MHz */
> + val *= GT_FREQUENCY_MULTIPLIER;
> +
> + return sysfs_emit(buff, "%u\n", val);
> +}
> +static DEVICE_ATTR_RO(freq_mem_rpn);
> +
> static ssize_t freq_min_show(struct device *dev,
> struct device_attribute *attr, char *buf)
> {
> @@ -631,6 +673,8 @@ static const struct attribute *pc_attrs[] = {
> &dev_attr_freq_rp0.attr,
> &dev_attr_freq_rpe.attr,
> &dev_attr_freq_rpn.attr,
> + &dev_attr_freq_mem_rp0.attr,
> + &dev_attr_freq_mem_rpn.attr,
> &dev_attr_freq_min.attr,
> &dev_attr_freq_max.attr,
> &dev_attr_rc_status.attr,
> --
> 2.39.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem
2023-06-06 15:56 ` [Intel-xe] [PATCH] [RFC]drm/xe: " Dixit, Ashutosh
@ 2023-06-07 3:38 ` Sundaresan, Sujaritha
2023-06-07 20:26 ` Dixit, Ashutosh
0 siblings, 1 reply; 9+ messages in thread
From: Sundaresan, Sujaritha @ 2023-06-07 3:38 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe
> On Jun 6, 2023, at 9:27 PM, Dixit, Ashutosh <ashutosh.dixit@intel.com> wrote:
>
> On Tue, 06 Jun 2023 01:21:42 -0700, Sujaritha Sundaresan wrote:
>>
>
> Hi Suja,
>
> Once again sysfs_create_files is missing from the patch.
>
> Also xe calls lmem vram, so sysfs file names should something like
> vram_rp0/rpn_freq_mhz, "mem" is too general.
>
> Ashutosh
Hi Ashutosh,
Yeah this is not the complete patch. I was hoping to get some feedback on the naming and placing of the code.
Thanks for the review. I will rename the attributes to reflect the vram.
Is it okay to leave the code in the current file ? Should the PCODE definitions be here or another regs file ?
Regards,
Suja
>
>
>> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
>> ---
>> drivers/gpu/drm/xe/regs/xe_regs.h | 7 +++++
>> drivers/gpu/drm/xe/xe_guc_pc.c | 44 +++++++++++++++++++++++++++++++
>> 2 files changed, 51 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h
>> index 8be616a1bd51..bd7b26296402 100644
>> --- a/drivers/gpu/drm/xe/regs/xe_regs.h
>> +++ b/drivers/gpu/drm/xe/regs/xe_regs.h
>> @@ -101,4 +101,11 @@
>> #define DSMBASE XE_REG(0x1080C0)
>> #define BDSM_MASK REG_GENMASK64(63, 20)
>>
>> +#define XEHP_PCODE_FREQUENCY_CONFIG 0x6e
>> +/* XEHP_PCODE_FREQUENCY_CONFIG sub-commands (param1) */
>> +#define PCODE_MBOX_FC_SC_READ_FUSED_P0 0x0
>> +#define PCODE_MBOX_FC_SC_READ_FUSED_PN 0x1
>> +/* PCODE_MBOX_DOMAIN_* - mailbox domain IDs */
>> +#define PCODE_MBOX_DOMAIN_HBM 0x2
>> +
>> #endif
>> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
>> index 67faa9ee0006..1b349ce74c3d 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
>> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
>> @@ -453,6 +453,48 @@ static ssize_t freq_rpn_show(struct device *dev,
>> }
>> static DEVICE_ATTR_RO(freq_rpn);
>>
>> +static ssize_t freq_mem_rp0_show(struct device *dev,
>> + struct device_attribute *attr, char *buff)
>> +{
>> + struct kobject *kobj = &dev->kobj;
>> + struct xe_gt *gt = kobj_to_gt(kobj);
>> + u32 val;
>> + int err;
>> +
>> + err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
>> + PCODE_MBOX_FC_SC_READ_FUSED_P0,
>> + PCODE_MBOX_DOMAIN_HBM, &val);
>> + if (err)
>> + return err;
>> +
>> + /* data_out - Fused P0 for domain ID in units of 50 MHz */
>> + val *= GT_FREQUENCY_MULTIPLIER;
>> +
>> + return sysfs_emit(buff, "%u\n", val);
>> +}
>> +static DEVICE_ATTR_RO(freq_mem_rp0);
>> +
>> +static ssize_t freq_mem_rpn_show(struct device *dev,
>> + struct device_attribute *attr, char *buff)
>> +{
>> + struct kobject *kobj = &dev->kobj;
>> + struct xe_gt *gt = kobj_to_gt(kobj);
>> + u32 val;
>> + int err;
>> +
>> + err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
>> + PCODE_MBOX_FC_SC_READ_FUSED_PN,
>> + PCODE_MBOX_DOMAIN_HBM, &val);
>> + if (err)
>> + return err;
>> +
>> + /* data_out - Fused P0 for domain ID in units of 50 MHz */
>> + val *= GT_FREQUENCY_MULTIPLIER;
>> +
>> + return sysfs_emit(buff, "%u\n", val);
>> +}
>> +static DEVICE_ATTR_RO(freq_mem_rpn);
>> +
>> static ssize_t freq_min_show(struct device *dev,
>> struct device_attribute *attr, char *buf)
>> {
>> @@ -631,6 +673,8 @@ static const struct attribute *pc_attrs[] = {
>> &dev_attr_freq_rp0.attr,
>> &dev_attr_freq_rpe.attr,
>> &dev_attr_freq_rpn.attr,
>> + &dev_attr_freq_mem_rp0.attr,
>> + &dev_attr_freq_mem_rpn.attr,
>> &dev_attr_freq_min.attr,
>> &dev_attr_freq_max.attr,
>> &dev_attr_rc_status.attr,
>> --
>> 2.39.1
>>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem
2023-06-06 8:21 [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem Sujaritha Sundaresan
` (3 preceding siblings ...)
2023-06-06 15:56 ` [Intel-xe] [PATCH] [RFC]drm/xe: " Dixit, Ashutosh
@ 2023-06-07 4:37 ` Nilawar, Badal
2023-06-07 18:21 ` Matt Roper
5 siblings, 0 replies; 9+ messages in thread
From: Nilawar, Badal @ 2023-06-07 4:37 UTC (permalink / raw)
To: Sujaritha Sundaresan, intel-xe
Hi Sujaritha,
In the title lets use vram instead of lmem.On 06-06-2023 13:51,
Sujaritha Sundaresan wrote:
> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_regs.h | 7 +++++
> drivers/gpu/drm/xe/xe_guc_pc.c | 44 +++++++++++++++++++++++++++++++
> 2 files changed, 51 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h
> index 8be616a1bd51..bd7b26296402 100644
> --- a/drivers/gpu/drm/xe/regs/xe_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_regs.h
> @@ -101,4 +101,11 @@
> #define DSMBASE XE_REG(0x1080C0)
> #define BDSM_MASK REG_GENMASK64(63, 20)
>
> +#define XEHP_PCODE_FREQUENCY_CONFIG 0x6e
> +/* XEHP_PCODE_FREQUENCY_CONFIG sub-commands (param1) */
> +#define PCODE_MBOX_FC_SC_READ_FUSED_P0 0x0
> +#define PCODE_MBOX_FC_SC_READ_FUSED_PN 0x1
> +/* PCODE_MBOX_DOMAIN_* - mailbox domain IDs */
> +#define PCODE_MBOX_DOMAIN_HBM 0x2
> +
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> index 67faa9ee0006..1b349ce74c3d 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> @@ -453,6 +453,48 @@ static ssize_t freq_rpn_show(struct device *dev,
> }
> static DEVICE_ATTR_RO(freq_rpn);
>
> +static ssize_t freq_mem_rp0_show(struct device *dev,
> + struct device_attribute *attr, char *buff)
> +{
> + struct kobject *kobj = &dev->kobj;
> + struct xe_gt *gt = kobj_to_gt(kobj);
> + u32 val;
> + int err;
> +
> + err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
> + PCODE_MBOX_FC_SC_READ_FUSED_P0,
> + PCODE_MBOX_DOMAIN_HBM, &val);
Pass the args as per prototype where ever xe_pcode_read is used in this
patch.
> + if (err)
> + return err;
> +
> + /* data_out - Fused P0 for domain ID in units of 50 MHz */
> + val *= GT_FREQUENCY_MULTIPLIER;
> +
> + return sysfs_emit(buff, "%u\n", val);
> +}
> +static DEVICE_ATTR_RO(freq_mem_rp0);
> +
> +static ssize_t freq_mem_rpn_show(struct device *dev,
> + struct device_attribute *attr, char *buff)
> +{
> + struct kobject *kobj = &dev->kobj;
> + struct xe_gt *gt = kobj_to_gt(kobj);
> + u32 val;
> + int err;
> +
> + err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
> + PCODE_MBOX_FC_SC_READ_FUSED_PN,
> + PCODE_MBOX_DOMAIN_HBM, &val);
> + if (err)
> + return err;
> +
> + /* data_out - Fused P0 for domain ID in units of 50 MHz */
> + val *= GT_FREQUENCY_MULTIPLIER;
> +
> + return sysfs_emit(buff, "%u\n", val);
> +}
> +static DEVICE_ATTR_RO(freq_mem_rpn);
> +
> static ssize_t freq_min_show(struct device *dev,
> struct device_attribute *attr, char *buf)
> {
> @@ -631,6 +673,8 @@ static const struct attribute *pc_attrs[] = {
> &dev_attr_freq_rp0.attr,
> &dev_attr_freq_rpe.attr,
> &dev_attr_freq_rpn.attr,
> + &dev_attr_freq_mem_rp0.attr,
> + &dev_attr_freq_mem_rpn.attr,
Expose these attributes only for (DGFX && !DG2). May be create new attr
array pc_dgfx_attr[] or pc_mem_attrs[] and expose under it.
Regards,
Badal
> &dev_attr_freq_min.attr,
> &dev_attr_freq_max.attr,
> &dev_attr_rc_status.attr,
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem
2023-06-06 8:21 [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem Sujaritha Sundaresan
` (4 preceding siblings ...)
2023-06-07 4:37 ` Nilawar, Badal
@ 2023-06-07 18:21 ` Matt Roper
5 siblings, 0 replies; 9+ messages in thread
From: Matt Roper @ 2023-06-07 18:21 UTC (permalink / raw)
To: Sujaritha Sundaresan; +Cc: intel-xe
On Tue, Jun 06, 2023 at 01:21:42AM -0700, Sujaritha Sundaresan wrote:
> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_regs.h | 7 +++++
> drivers/gpu/drm/xe/xe_guc_pc.c | 44 +++++++++++++++++++++++++++++++
> 2 files changed, 51 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h
> index 8be616a1bd51..bd7b26296402 100644
> --- a/drivers/gpu/drm/xe/regs/xe_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_regs.h
> @@ -101,4 +101,11 @@
> #define DSMBASE XE_REG(0x1080C0)
> #define BDSM_MASK REG_GENMASK64(63, 20)
>
> +#define XEHP_PCODE_FREQUENCY_CONFIG 0x6e
> +/* XEHP_PCODE_FREQUENCY_CONFIG sub-commands (param1) */
> +#define PCODE_MBOX_FC_SC_READ_FUSED_P0 0x0
> +#define PCODE_MBOX_FC_SC_READ_FUSED_PN 0x1
> +/* PCODE_MBOX_DOMAIN_* - mailbox domain IDs */
> +#define PCODE_MBOX_DOMAIN_HBM 0x2
> +
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> index 67faa9ee0006..1b349ce74c3d 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> @@ -453,6 +453,48 @@ static ssize_t freq_rpn_show(struct device *dev,
> }
> static DEVICE_ATTR_RO(freq_rpn);
>
> +static ssize_t freq_mem_rp0_show(struct device *dev,
> + struct device_attribute *attr, char *buff)
> +{
> + struct kobject *kobj = &dev->kobj;
> + struct xe_gt *gt = kobj_to_gt(kobj);
> + u32 val;
> + int err;
> +
> + err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
This doesn't match the #define above (XEHPSDV vs XEHP).
> + PCODE_MBOX_FC_SC_READ_FUSED_P0,
> + PCODE_MBOX_DOMAIN_HBM, &val);
> + if (err)
> + return err;
> +
> + /* data_out - Fused P0 for domain ID in units of 50 MHz */
> + val *= GT_FREQUENCY_MULTIPLIER;
> +
> + return sysfs_emit(buff, "%u\n", val);
> +}
> +static DEVICE_ATTR_RO(freq_mem_rp0);
> +
> +static ssize_t freq_mem_rpn_show(struct device *dev,
> + struct device_attribute *attr, char *buff)
> +{
> + struct kobject *kobj = &dev->kobj;
> + struct xe_gt *gt = kobj_to_gt(kobj);
> + u32 val;
> + int err;
> +
> + err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
> + PCODE_MBOX_FC_SC_READ_FUSED_PN,
> + PCODE_MBOX_DOMAIN_HBM, &val);
> + if (err)
> + return err;
> +
> + /* data_out - Fused P0 for domain ID in units of 50 MHz */
> + val *= GT_FREQUENCY_MULTIPLIER;
> +
> + return sysfs_emit(buff, "%u\n", val);
> +}
> +static DEVICE_ATTR_RO(freq_mem_rpn);
> +
> static ssize_t freq_min_show(struct device *dev,
> struct device_attribute *attr, char *buf)
> {
> @@ -631,6 +673,8 @@ static const struct attribute *pc_attrs[] = {
> &dev_attr_freq_rp0.attr,
> &dev_attr_freq_rpe.attr,
> &dev_attr_freq_rpn.attr,
> + &dev_attr_freq_mem_rp0.attr,
> + &dev_attr_freq_mem_rpn.attr,
If these are related to LMEM frequency should they be in some other list
that only gets created if we're running on a platform that has LMEM?
For that matter, does it make sense to have LMEM items (which are a
tile-based concept) under a per-GT sysfs? Or would it make more sense
to have these under a separate per-tile sysfs?
Matt
> &dev_attr_freq_min.attr,
> &dev_attr_freq_max.attr,
> &dev_attr_rc_status.attr,
> --
> 2.39.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem
2023-06-07 3:38 ` Sundaresan, Sujaritha
@ 2023-06-07 20:26 ` Dixit, Ashutosh
0 siblings, 0 replies; 9+ messages in thread
From: Dixit, Ashutosh @ 2023-06-07 20:26 UTC (permalink / raw)
To: Sundaresan, Sujaritha; +Cc: intel-xe
On Tue, 06 Jun 2023 20:38:34 -0700, Sundaresan, Sujaritha wrote:
>
> > On Jun 6, 2023, at 9:27 PM, Dixit, Ashutosh <ashutosh.dixit@intel.com> wrote:
> >
> > On Tue, 06 Jun 2023 01:21:42 -0700, Sujaritha Sundaresan wrote:
> >>
> >
> > Hi Suja,
> >
> > Once again sysfs_create_files is missing from the patch.
> >
> > Also xe calls lmem vram, so sysfs file names should something like
> > vram_rp0/rpn_freq_mhz, "mem" is too general.
> >
> > Ashutosh
>
> Hi Ashutosh,
>
> Yeah this is not the complete patch. I was hoping to get some feedback on
> the naming and placing of the code.
>
> Thanks for the review. I will rename the attributes to reflect the vram.
>
> Is it okay to leave the code in the current file ? Should the PCODE
> definitions be here or another regs file ?
Not sure whether the vram sysfs functions belong in xe_guc_pc.c, but the
pcode definitions should be in xe_pcode_api.h.
>
> Regards,
> Suja
> >
> >
> >> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
> >> ---
> >> drivers/gpu/drm/xe/regs/xe_regs.h | 7 +++++
> >> drivers/gpu/drm/xe/xe_guc_pc.c | 44 +++++++++++++++++++++++++++++++
> >> 2 files changed, 51 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h
> >> index 8be616a1bd51..bd7b26296402 100644
> >> --- a/drivers/gpu/drm/xe/regs/xe_regs.h
> >> +++ b/drivers/gpu/drm/xe/regs/xe_regs.h
> >> @@ -101,4 +101,11 @@
> >> #define DSMBASE XE_REG(0x1080C0)
> >> #define BDSM_MASK REG_GENMASK64(63, 20)
> >>
> >> +#define XEHP_PCODE_FREQUENCY_CONFIG 0x6e
> >> +/* XEHP_PCODE_FREQUENCY_CONFIG sub-commands (param1) */
> >> +#define PCODE_MBOX_FC_SC_READ_FUSED_P0 0x0
> >> +#define PCODE_MBOX_FC_SC_READ_FUSED_PN 0x1
> >> +/* PCODE_MBOX_DOMAIN_* - mailbox domain IDs */
> >> +#define PCODE_MBOX_DOMAIN_HBM 0x2
> >> +
> >> #endif
> >> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> >> index 67faa9ee0006..1b349ce74c3d 100644
> >> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> >> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> >> @@ -453,6 +453,48 @@ static ssize_t freq_rpn_show(struct device *dev,
> >> }
> >> static DEVICE_ATTR_RO(freq_rpn);
> >>
> >> +static ssize_t freq_mem_rp0_show(struct device *dev,
> >> + struct device_attribute *attr, char *buff)
> >> +{
> >> + struct kobject *kobj = &dev->kobj;
> >> + struct xe_gt *gt = kobj_to_gt(kobj);
> >> + u32 val;
> >> + int err;
> >> +
> >> + err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
> >> + PCODE_MBOX_FC_SC_READ_FUSED_P0,
> >> + PCODE_MBOX_DOMAIN_HBM, &val);
> >> + if (err)
> >> + return err;
> >> +
> >> + /* data_out - Fused P0 for domain ID in units of 50 MHz */
> >> + val *= GT_FREQUENCY_MULTIPLIER;
> >> +
> >> + return sysfs_emit(buff, "%u\n", val);
> >> +}
> >> +static DEVICE_ATTR_RO(freq_mem_rp0);
> >> +
> >> +static ssize_t freq_mem_rpn_show(struct device *dev,
> >> + struct device_attribute *attr, char *buff)
> >> +{
> >> + struct kobject *kobj = &dev->kobj;
> >> + struct xe_gt *gt = kobj_to_gt(kobj);
> >> + u32 val;
> >> + int err;
> >> +
> >> + err = xe_pcode_read(dev, XEHPSDV_PCODE_FREQUENCY_CONFIG,
> >> + PCODE_MBOX_FC_SC_READ_FUSED_PN,
> >> + PCODE_MBOX_DOMAIN_HBM, &val);
> >> + if (err)
> >> + return err;
> >> +
> >> + /* data_out - Fused P0 for domain ID in units of 50 MHz */
> >> + val *= GT_FREQUENCY_MULTIPLIER;
> >> +
> >> + return sysfs_emit(buff, "%u\n", val);
> >> +}
> >> +static DEVICE_ATTR_RO(freq_mem_rpn);
> >> +
> >> static ssize_t freq_min_show(struct device *dev,
> >> struct device_attribute *attr, char *buf)
> >> {
> >> @@ -631,6 +673,8 @@ static const struct attribute *pc_attrs[] = {
> >> &dev_attr_freq_rp0.attr,
> >> &dev_attr_freq_rpe.attr,
> >> &dev_attr_freq_rpn.attr,
> >> + &dev_attr_freq_mem_rp0.attr,
> >> + &dev_attr_freq_mem_rpn.attr,
> >> &dev_attr_freq_min.attr,
> >> &dev_attr_freq_max.attr,
> >> &dev_attr_rc_status.attr,
> >> --
> >> 2.39.1
> >>
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2023-06-07 20:26 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-06 8:21 [Intel-xe] [PATCH] [RFC]drm/xe: Sysfs entries to query fused min, max frequency of lmem Sujaritha Sundaresan
2023-06-06 9:25 ` [Intel-xe] ✓ CI.Patch_applied: success for drm/xe: " Patchwork
2023-06-06 9:25 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-06-06 9:26 ` [Intel-xe] ✗ CI.KUnit: failure " Patchwork
2023-06-06 15:56 ` [Intel-xe] [PATCH] [RFC]drm/xe: " Dixit, Ashutosh
2023-06-07 3:38 ` Sundaresan, Sujaritha
2023-06-07 20:26 ` Dixit, Ashutosh
2023-06-07 4:37 ` Nilawar, Badal
2023-06-07 18:21 ` Matt Roper
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