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From: Michael Ellerman <mpe@ellerman.id.au>
To: Paul Mackerras <paulus@ozlabs.org>, linuxppc-dev@ozlabs.org
Subject: Re: [PATCH v2 01/10] powerpc: Handle most loads and stores in instruction emulation code
Date: Mon, 28 Aug 2017 15:48:09 +1000	[thread overview]
Message-ID: <87h8wss0o6.fsf@concordia.ellerman.id.au> (raw)
In-Reply-To: <1503639722-19121-2-git-send-email-paulus@ozlabs.org>

Paul Mackerras <paulus@ozlabs.org> writes:

> diff --git a/arch/powerpc/lib/quad.S b/arch/powerpc/lib/quad.S
> new file mode 100644
> index 0000000..2cc77dc
> --- /dev/null
> +++ b/arch/powerpc/lib/quad.S
> @@ -0,0 +1,62 @@
> +/*
> + * Quadword loads and stores
> + * for use in instruction emulation.
> + *
> + * Copyright 2017 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
> + *
> + *  This program is free software; you can redistribute it and/or
> + *  modify it under the terms of the GNU General Public License
> + *  as published by the Free Software Foundation; either version
> + *  2 of the License, or (at your option) any later version.
> + */
> +
> +#include <asm/processor.h>
> +#include <asm/ppc_asm.h>
> +#include <asm/ppc-opcode.h>
> +#include <asm/reg.h>
> +#include <asm/asm-offsets.h>
> +#include <linux/errno.h>
> +
> +/* do_lq(unsigned long ea, unsigned long *regs) */
> +_GLOBAL(do_lq)
> +1:	lq	r6, 0(r3)
> +	std	r6, 0(r4)
> +	std	r7, 8(r4)
> +	li	r3, 0
> +	blr
> +2:	li	r3, -EFAULT
> +	blr
> +	EX_TABLE(1b, 2b)
> +
> +/* do_stq(unsigned long ea, unsigned long val0, unsigned long val1) */
> +_GLOBAL(do_stq)
> +1:	stq	r4, 0(r3)
> +	li	r3, 0
> +	blr
> +2:	li	r3, -EFAULT
> +	blr
> +	EX_TABLE(1b, 2b)
> +
> +/* do_lqarx(unsigned long ea, unsigned long *regs) */
> +_GLOBAL(do_lqarx)
> +1:	lqarx	r6, 0, r3

Older binutils barf on this, so we'll need to use a macro to generate it.

> +	std	r6, 0(r4)
> +	std	r7, 8(r4)
> +	li	r3, 0
> +	blr
> +2:	li	r3, -EFAULT
> +	blr
> +	EX_TABLE(1b, 2b)
> +
> +/* do_stqcx(unsigned long ea, unsigned long val0, unsigned long val1,
> +	    unsigned int *crp) */
> +
> +_GLOBAL(do_stqcx)
> +1:	stqcx.	r4, 0, r3

This too.

eg:
  arch/powerpc/lib/quad.S:42: Error: Unrecognized opcode: `lqarx'
  arch/powerpc/lib/quad.S:55: Error: Unrecognized opcode: `stqcx.'

cheers

  parent reply	other threads:[~2017-08-28  5:48 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-25  5:41 [PATCH v2 0/10] powerpc: Beef up single-stepping/instruction emulation infrastructure Paul Mackerras
2017-08-25  5:41 ` [PATCH v2 01/10] powerpc: Handle most loads and stores in instruction emulation code Paul Mackerras
2017-08-26 14:56   ` Segher Boessenkool
2017-08-28  5:48   ` Michael Ellerman [this message]
2017-08-25  5:41 ` [PATCH v2 02/10] powerpc: Change analyse_instr so it doesn't modify *regs Paul Mackerras
2017-08-25  5:41 ` [PATCH v2 03/10] powerpc: Fix emulation of the isel instruction Paul Mackerras
2017-08-25  5:41 ` [PATCH v2 04/10] powerpc: Add emulation for the addpcis instruction Paul Mackerras
2017-08-25  5:41 ` [PATCH v2 05/10] powerpc: Make load/store emulation use larger memory accesses Paul Mackerras
2017-08-25  5:41 ` [PATCH v2 06/10] powerpc: Emulate FP/vector/VSX loads/stores correctly when regs not live Paul Mackerras
2017-08-25  5:41 ` [PATCH v2 07/10] powerpc: Handle vector element load/stores in emulation code Paul Mackerras
2017-08-25  5:42 ` [PATCH v2 08/10] powerpc: Emulate load/store floating double pair instructions Paul Mackerras
2017-08-25  5:42 ` [PATCH v2 09/10] powerpc: Handle opposite-endian processes in emulation code Paul Mackerras
2017-08-25  5:42 ` [PATCH v2 10/10] powerpc/64: Fix update forms of loads and stores to write 64-bit EA Paul Mackerras

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