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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org, "Emilio G. Cota" <cota@braap.org>
Subject: Re: [Qemu-devel] [PATCH v3 31/34] linux-user: remove handling of aarch64's EXCP_STREX
Date: Thu, 15 Sep 2016 10:36:57 +0100	[thread overview]
Message-ID: <87h99hijwm.fsf@linaro.org> (raw)
In-Reply-To: <1472935202-3342-32-git-send-email-rth@twiddle.net>


Richard Henderson <rth@twiddle.net> writes:

> From: "Emilio G. Cota" <cota@braap.org>
>
> The exception is not emitted anymore.
>
> Signed-off-by: Emilio G. Cota <cota@braap.org>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> Message-Id: <1467054136-10430-30-git-send-email-cota@braap.org>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

> ---
>  linux-user/main.c | 125 ------------------------------------------------------
>  1 file changed, 125 deletions(-)
>
> diff --git a/linux-user/main.c b/linux-user/main.c
> index 256382a..64838bf 100644
> --- a/linux-user/main.c
> +++ b/linux-user/main.c
> @@ -868,124 +868,6 @@ void cpu_loop(CPUARMState *env)
>
>  #else
>
> -/*
> - * Handle AArch64 store-release exclusive
> - *
> - * rs = gets the status result of store exclusive
> - * rt = is the register that is stored
> - * rt2 = is the second register store (in STP)
> - *
> - */
> -static int do_strex_a64(CPUARMState *env)
> -{
> -    uint64_t val;
> -    int size;
> -    bool is_pair;
> -    int rc = 1;
> -    int segv = 0;
> -    uint64_t addr;
> -    int rs, rt, rt2;
> -
> -    start_exclusive();
> -    /* size | is_pair << 2 | (rs << 4) | (rt << 9) | (rt2 << 14)); */
> -    size = extract32(env->exclusive_info, 0, 2);
> -    is_pair = extract32(env->exclusive_info, 2, 1);
> -    rs = extract32(env->exclusive_info, 4, 5);
> -    rt = extract32(env->exclusive_info, 9, 5);
> -    rt2 = extract32(env->exclusive_info, 14, 5);
> -
> -    addr = env->exclusive_addr;
> -
> -    if (addr != env->exclusive_test) {
> -        goto finish;
> -    }
> -
> -    switch (size) {
> -    case 0:
> -        segv = get_user_u8(val, addr);
> -        break;
> -    case 1:
> -        segv = get_user_u16(val, addr);
> -        break;
> -    case 2:
> -        segv = get_user_u32(val, addr);
> -        break;
> -    case 3:
> -        segv = get_user_u64(val, addr);
> -        break;
> -    default:
> -        abort();
> -    }
> -    if (segv) {
> -        env->exception.vaddress = addr;
> -        goto error;
> -    }
> -    if (val != env->exclusive_val) {
> -        goto finish;
> -    }
> -    if (is_pair) {
> -        if (size == 2) {
> -            segv = get_user_u32(val, addr + 4);
> -        } else {
> -            segv = get_user_u64(val, addr + 8);
> -        }
> -        if (segv) {
> -            env->exception.vaddress = addr + (size == 2 ? 4 : 8);
> -            goto error;
> -        }
> -        if (val != env->exclusive_high) {
> -            goto finish;
> -        }
> -    }
> -    /* handle the zero register */
> -    val = rt == 31 ? 0 : env->xregs[rt];
> -    switch (size) {
> -    case 0:
> -        segv = put_user_u8(val, addr);
> -        break;
> -    case 1:
> -        segv = put_user_u16(val, addr);
> -        break;
> -    case 2:
> -        segv = put_user_u32(val, addr);
> -        break;
> -    case 3:
> -        segv = put_user_u64(val, addr);
> -        break;
> -    }
> -    if (segv) {
> -        goto error;
> -    }
> -    if (is_pair) {
> -        /* handle the zero register */
> -        val = rt2 == 31 ? 0 : env->xregs[rt2];
> -        if (size == 2) {
> -            segv = put_user_u32(val, addr + 4);
> -        } else {
> -            segv = put_user_u64(val, addr + 8);
> -        }
> -        if (segv) {
> -            env->exception.vaddress = addr + (size == 2 ? 4 : 8);
> -            goto error;
> -        }
> -    }
> -    rc = 0;
> -finish:
> -    env->pc += 4;
> -    /* rs == 31 encodes a write to the ZR, thus throwing away
> -     * the status return. This is rather silly but valid.
> -     */
> -    if (rs < 31) {
> -        env->xregs[rs] = rc;
> -    }
> -error:
> -    /* instruction faulted, PC does not advance */
> -    /* either way a strex releases any exclusive lock we have */
> -    env->exclusive_addr = -1;
> -    end_exclusive();
> -    return segv;
> -}
> -
>  /* AArch64 main loop */
>  void cpu_loop(CPUARMState *env)
>  {
> @@ -1026,11 +908,6 @@ void cpu_loop(CPUARMState *env)
>              info._sifields._sigfault._addr = env->pc;
>              queue_signal(env, info.si_signo, &info);
>              break;
> -        case EXCP_STREX:
> -            if (!do_strex_a64(env)) {
> -                break;
> -            }
> -            /* fall through for segv */
>          case EXCP_PREFETCH_ABORT:
>          case EXCP_DATA_ABORT:
>              info.si_signo = TARGET_SIGSEGV;
> @@ -1066,8 +943,6 @@ void cpu_loop(CPUARMState *env)
>          process_pending_signals(env);
>          /* Exception return on AArch64 always clears the exclusive monitor,
>           * so any return to running guest code implies this.
> -         * A strex (successful or otherwise) also clears the monitor, so
> -         * we don't need to specialcase EXCP_STREX.
>           */
>          env->exclusive_addr = -1;
>      }


--
Alex Bennée

  reply	other threads:[~2016-09-15  9:38 UTC|newest]

Thread overview: 97+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-03 20:39 [Qemu-devel] [PATCH v3 00/34] cmpxchg-based emulation of atomics Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 01/34] atomics: add atomic_xor Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 02/34] atomics: add atomic_op_fetch variants Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 03/34] exec: Avoid direct references to Int128 parts Richard Henderson
2016-09-09 17:14   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 04/34] int128: Use __int128 if available Richard Henderson
2016-09-09 17:19   ` Alex Bennée
2016-09-09 17:38     ` Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 05/34] int128: Add int128_make128 Richard Henderson
2016-09-09 13:01   ` Leon Alrae
2016-09-09 20:16     ` Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 06/34] tcg: Add EXCP_ATOMIC Richard Henderson
2016-09-12 14:16   ` Alex Bennée
2016-09-12 20:19     ` Richard Henderson
2016-09-13  6:42       ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 07/34] HACK: Always enable parallel_cpus Richard Henderson
2016-09-12 14:20   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 08/34] cputlb: Replace SHIFT with DATA_SIZE Richard Henderson
2016-09-12 14:22   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 09/34] cputlb: Move probe_write out of softmmu_template.h Richard Henderson
2016-09-12 14:35   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 10/34] cputlb: Remove includes from softmmu_template.h Richard Henderson
2016-09-12 14:38   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 11/34] cputlb: Move most of iotlb code out of line Richard Henderson
2016-09-12 15:26   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 12/34] cputlb: Tidy some macros Richard Henderson
2016-09-12 15:28   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 13/34] tcg: Add atomic helpers Richard Henderson
2016-09-09 13:11   ` Leon Alrae
2016-09-09 14:46   ` Leon Alrae
2016-09-09 16:26     ` Richard Henderson
2016-09-12  7:59       ` Leon Alrae
2016-09-12 16:13         ` Richard Henderson
2016-09-13 12:32           ` Leon Alrae
2016-09-12 13:47   ` Alex Bennée
2016-09-13 18:00     ` Richard Henderson
2017-03-24 10:14       ` Nikunj A Dadhania
2017-03-24 10:58         ` Alex Bennée
2017-03-24 17:27           ` Nikunj A Dadhania
2017-03-27 11:56           ` Nikunj A Dadhania
2016-09-13 17:06   ` Alex Bennée
2016-09-13 17:26     ` Richard Henderson
2016-09-13 18:45       ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 14/34] tcg: Add atomic128 helpers Richard Henderson
2016-09-13 11:18   ` Alex Bennée
2016-09-13 14:18     ` Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 15/34] tcg: Add CONFIG_ATOMIC64 Richard Henderson
2016-09-14 10:12   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 16/34] target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 17/34] target-i386: emulate LOCK'ed OP instructions using atomic helpers Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 18/34] target-i386: emulate LOCK'ed INC using atomic helper Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 19/34] target-i386: emulate LOCK'ed NOT " Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 20/34] target-i386: emulate LOCK'ed NEG using cmpxchg helper Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 21/34] target-i386: emulate LOCK'ed XADD using atomic helper Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 22/34] target-i386: emulate LOCK'ed BTX ops using atomic helpers Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 23/34] target-i386: emulate XCHG using atomic helper Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 24/34] target-i386: remove helper_lock() Richard Henderson
2016-09-14 11:14   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 25/34] tests: add atomic_add-bench Richard Henderson
2016-09-14 13:53   ` Alex Bennée
2016-09-15  2:23     ` Emilio G. Cota
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 26/34] target-arm: Rearrange aa32 load and store functions Richard Henderson
2016-09-14 15:58   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 27/34] target-arm: emulate LL/SC using cmpxchg helpers Richard Henderson
2016-09-14 16:03   ` Alex Bennée
2016-09-14 16:38     ` Richard Henderson
2016-10-20 17:51       ` Pranith Kumar
2016-10-20 18:00         ` Richard Henderson
2016-10-20 18:58           ` Pranith Kumar
2016-10-20 19:02             ` Richard Henderson
2016-10-20 19:07               ` Pranith Kumar
2016-10-21  4:34                 ` Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 28/34] target-arm: emulate SWP with atomic_xchg helper Richard Henderson
2016-09-14 16:05   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 29/34] target-arm: emulate aarch64's LL/SC using cmpxchg helpers Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 30/34] linux-user: remove handling of ARM's EXCP_STREX Richard Henderson
2016-09-15  9:36   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 31/34] linux-user: remove handling of aarch64's EXCP_STREX Richard Henderson
2016-09-15  9:36   ` Alex Bennée [this message]
2016-09-03 20:40 ` [Qemu-devel] [PATCH v3 32/34] target-arm: remove EXCP_STREX + cpu_exclusive_{test, info} Richard Henderson
2016-09-15  9:39   ` Alex Bennée
2016-09-03 20:40 ` [Qemu-devel] [PATCH v3 33/34] target-alpha: Introduce MMU_PHYS_IDX Richard Henderson
2016-09-15 10:10   ` Alex Bennée
2016-09-15 16:38     ` Richard Henderson
2016-09-03 20:40 ` [Qemu-devel] [PATCH v3 34/34] target-alpha: Emulate LL/SC using cmpxchg helpers Richard Henderson
2016-09-15 14:38   ` Alex Bennée
2016-09-15 16:48     ` Richard Henderson
2016-09-15 17:48       ` Alex Bennée
2016-09-15 18:28         ` Richard Henderson
2016-09-03 21:25 ` [Qemu-devel] [PATCH v3 00/34] cmpxchg-based emulation of atomics no-reply
2016-09-03 21:26 ` no-reply
2016-09-09 18:33 ` Alex Bennée
2016-09-09 19:07   ` Richard Henderson
2016-09-09 19:29     ` Alex Bennée
2016-09-09 20:03       ` Richard Henderson
2016-09-09 20:11       ` Richard Henderson
2016-09-15 14:39 ` Alex Bennée

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