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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v3 06/34] tcg: Add EXCP_ATOMIC
Date: Tue, 13 Sep 2016 07:42:54 +0100	[thread overview]
Message-ID: <87k2egwb9t.fsf@linaro.org> (raw)
In-Reply-To: <0bcd5093-52f2-d642-4a1c-e3557084053a@twiddle.net>


Richard Henderson <rth@twiddle.net> writes:

> On 09/12/2016 07:16 AM, Alex Bennée wrote:
>>> +void cpu_exec_step(CPUState *cpu)
>>> +{
>>> +    CPUArchState *env = (CPUArchState *)cpu->env_ptr;
>>> +    TranslationBlock *tb;
>>> +    target_ulong cs_base, pc;
>>> +    uint32_t flags;
>>> +    bool old_tb_flushed;
>>> +
>>> +    old_tb_flushed = cpu->tb_flushed;
>>> +    cpu->tb_flushed = false;
>>
>> Advanced warning, these disappear soon when the async safe work (plus
>> safe tb flush) patches get merged.
>
> Fair enough.
>
> Having thought about this more, I think it may be better to handle this without
> flushing the tb.  To have parallel_cpus included in the TB flags or somesuch
> and keep that TB around.
>
> My thinking is that there are certain things, like alignment, that could result
> in repeated single-stepping.  So better to keep the TB around than keep having
> to regenerate it.
>
>>> +                /* ??? When we begin running cpus in parallel, we should
>>> +                   stop all cpus, clear parallel_cpus, and interpret a
>>> +                   single insn with cpu_exec_step.  In the meantime,
>>> +                   we should never get here.  */
>>> +                abort();
>>
>> Possibly more correct would be:
>>
>>          g_assert(parallel_cpus == false);
>>          abort();
>
> No, since it is here that we would *set* parallel_cpus to false.  Or did you
> mean assert parallel_cpus true?  Not that that helps for the moment...

For SoftMMU this particular loop should never hit because paralell_cpus
should be false, hence we never generate any code that might
EXCP_ATOMIC. It only fails at the moment because of the "hack" for
testing which makes parallel_cpus true.

The MTTCG adds a new thread function for MTTCG mode which
will have to handle EXCP_ATOMIC as discussed.

>
>>> +static void step_atomic(CPUState *cpu)
>>> +{
>>> +    start_exclusive();
>>> +
>>> +    /* Since we got here, we know that parallel_cpus must be true.  */
>>> +    parallel_cpus = false;
>>> +    cpu_exec_step(cpu);
>>> +    parallel_cpus = true;
>>> +
>>> +    end_exclusive();
>>> +}
>>> +
>>
>> Paolo's safe work patches bring the start/end_exclusive functions into
>> cpu-exec-common so I think after that has been merged this function
>> can also be moved and called directly from the MTTCG loop on an
>> EXCP_ATOMIC exit.
>
> Excellent.  Perhaps I should rebase this upon that right away.  Have you got a
> pointer to a tree handy?

Paolo posted a new version recently but I haven't built a tree with it
yet. I was hoping some of the hot-path and maybe barrier stuff would get
merged while I finish reviewing this ;-)

See:

    Subject: [PATCH v7 00/16] cpu-exec: Safe work in quiescent state
    Date: Mon, 12 Sep 2016 13:12:25 +0200
    Message-Id: <1473678761-8885-1-git-send-email-pbonzini@redhat.com>

>
>>> +bool parallel_cpus;
>>
>> So lets add some words to this to distinguish between this and the mttcg
>> enabled flags and its relation to -smp. Something like:
>>
>>   parallel_cpus indicates to the front-ends if code needs to be
>>   generated taking into account multiple threads of execution. It will
>>   be true for linux-user after the first thread clone and if system mode
>>   if MTTCG is enabled. On the transition from false->true any code
>>   generated while false needs to be invalidated. It may be temporally
>>   set to false when generating non-cached code in an exclusive context.
>
> Sure.
>
>
> r~


--
Alex Bennée

  reply	other threads:[~2016-09-13  6:44 UTC|newest]

Thread overview: 97+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-03 20:39 [Qemu-devel] [PATCH v3 00/34] cmpxchg-based emulation of atomics Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 01/34] atomics: add atomic_xor Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 02/34] atomics: add atomic_op_fetch variants Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 03/34] exec: Avoid direct references to Int128 parts Richard Henderson
2016-09-09 17:14   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 04/34] int128: Use __int128 if available Richard Henderson
2016-09-09 17:19   ` Alex Bennée
2016-09-09 17:38     ` Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 05/34] int128: Add int128_make128 Richard Henderson
2016-09-09 13:01   ` Leon Alrae
2016-09-09 20:16     ` Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 06/34] tcg: Add EXCP_ATOMIC Richard Henderson
2016-09-12 14:16   ` Alex Bennée
2016-09-12 20:19     ` Richard Henderson
2016-09-13  6:42       ` Alex Bennée [this message]
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 07/34] HACK: Always enable parallel_cpus Richard Henderson
2016-09-12 14:20   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 08/34] cputlb: Replace SHIFT with DATA_SIZE Richard Henderson
2016-09-12 14:22   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 09/34] cputlb: Move probe_write out of softmmu_template.h Richard Henderson
2016-09-12 14:35   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 10/34] cputlb: Remove includes from softmmu_template.h Richard Henderson
2016-09-12 14:38   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 11/34] cputlb: Move most of iotlb code out of line Richard Henderson
2016-09-12 15:26   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 12/34] cputlb: Tidy some macros Richard Henderson
2016-09-12 15:28   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 13/34] tcg: Add atomic helpers Richard Henderson
2016-09-09 13:11   ` Leon Alrae
2016-09-09 14:46   ` Leon Alrae
2016-09-09 16:26     ` Richard Henderson
2016-09-12  7:59       ` Leon Alrae
2016-09-12 16:13         ` Richard Henderson
2016-09-13 12:32           ` Leon Alrae
2016-09-12 13:47   ` Alex Bennée
2016-09-13 18:00     ` Richard Henderson
2017-03-24 10:14       ` Nikunj A Dadhania
2017-03-24 10:58         ` Alex Bennée
2017-03-24 17:27           ` Nikunj A Dadhania
2017-03-27 11:56           ` Nikunj A Dadhania
2016-09-13 17:06   ` Alex Bennée
2016-09-13 17:26     ` Richard Henderson
2016-09-13 18:45       ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 14/34] tcg: Add atomic128 helpers Richard Henderson
2016-09-13 11:18   ` Alex Bennée
2016-09-13 14:18     ` Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 15/34] tcg: Add CONFIG_ATOMIC64 Richard Henderson
2016-09-14 10:12   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 16/34] target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 17/34] target-i386: emulate LOCK'ed OP instructions using atomic helpers Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 18/34] target-i386: emulate LOCK'ed INC using atomic helper Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 19/34] target-i386: emulate LOCK'ed NOT " Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 20/34] target-i386: emulate LOCK'ed NEG using cmpxchg helper Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 21/34] target-i386: emulate LOCK'ed XADD using atomic helper Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 22/34] target-i386: emulate LOCK'ed BTX ops using atomic helpers Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 23/34] target-i386: emulate XCHG using atomic helper Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 24/34] target-i386: remove helper_lock() Richard Henderson
2016-09-14 11:14   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 25/34] tests: add atomic_add-bench Richard Henderson
2016-09-14 13:53   ` Alex Bennée
2016-09-15  2:23     ` Emilio G. Cota
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 26/34] target-arm: Rearrange aa32 load and store functions Richard Henderson
2016-09-14 15:58   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 27/34] target-arm: emulate LL/SC using cmpxchg helpers Richard Henderson
2016-09-14 16:03   ` Alex Bennée
2016-09-14 16:38     ` Richard Henderson
2016-10-20 17:51       ` Pranith Kumar
2016-10-20 18:00         ` Richard Henderson
2016-10-20 18:58           ` Pranith Kumar
2016-10-20 19:02             ` Richard Henderson
2016-10-20 19:07               ` Pranith Kumar
2016-10-21  4:34                 ` Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 28/34] target-arm: emulate SWP with atomic_xchg helper Richard Henderson
2016-09-14 16:05   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 29/34] target-arm: emulate aarch64's LL/SC using cmpxchg helpers Richard Henderson
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 30/34] linux-user: remove handling of ARM's EXCP_STREX Richard Henderson
2016-09-15  9:36   ` Alex Bennée
2016-09-03 20:39 ` [Qemu-devel] [PATCH v3 31/34] linux-user: remove handling of aarch64's EXCP_STREX Richard Henderson
2016-09-15  9:36   ` Alex Bennée
2016-09-03 20:40 ` [Qemu-devel] [PATCH v3 32/34] target-arm: remove EXCP_STREX + cpu_exclusive_{test, info} Richard Henderson
2016-09-15  9:39   ` Alex Bennée
2016-09-03 20:40 ` [Qemu-devel] [PATCH v3 33/34] target-alpha: Introduce MMU_PHYS_IDX Richard Henderson
2016-09-15 10:10   ` Alex Bennée
2016-09-15 16:38     ` Richard Henderson
2016-09-03 20:40 ` [Qemu-devel] [PATCH v3 34/34] target-alpha: Emulate LL/SC using cmpxchg helpers Richard Henderson
2016-09-15 14:38   ` Alex Bennée
2016-09-15 16:48     ` Richard Henderson
2016-09-15 17:48       ` Alex Bennée
2016-09-15 18:28         ` Richard Henderson
2016-09-03 21:25 ` [Qemu-devel] [PATCH v3 00/34] cmpxchg-based emulation of atomics no-reply
2016-09-03 21:26 ` no-reply
2016-09-09 18:33 ` Alex Bennée
2016-09-09 19:07   ` Richard Henderson
2016-09-09 19:29     ` Alex Bennée
2016-09-09 20:03       ` Richard Henderson
2016-09-09 20:11       ` Richard Henderson
2016-09-15 14:39 ` Alex Bennée

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