[Intel-wired-lan] [PATCH] igc: fix the validation logic for taprio's gate list

[Intel-wired-lan] [PATCH] igc: fix the validation logic for taprio's gate list

[AKASHI Takahiro]

The check introduced in the commit a5fd39464a40 ("igc: Lift TAPRIO schedule
restriction") can detect a false positive error in some corner case.
For instance,
    tc qdisc replace ... taprio num_tc 4
	...
	sched-entry S 0x01 100000	# slot#1
	sched-entry S 0x03 100000	# slot#2
	sched-entry S 0x04 100000	# slot#3
	sched-entry S 0x08 200000	# slot#4
	flags 0x02			# hardware offload

Here the queue#0 (the first queue) is on at the slot#1 and #2,
and off at the slot#3 and #4. Under the current logic, when the slot#4
is examined, validate_schedule() returns *false* since the enablement
count for the queue#0 is two and it is already off at the previous slot
(i.e. #3). But this definition is truely correct.

Let's fix the logic to enforce a strict validation for consecutively-opened
slots.

Fixes: a5fd39464a40 ("igc: Lift TAPRIO schedule restriction")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
---
 drivers/net/ethernet/intel/igc/igc_main.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c
index 2928a6c73692..25fc6c65209b 100644
--- a/drivers/net/ethernet/intel/igc/igc_main.c
+++ b/drivers/net/ethernet/intel/igc/igc_main.c
@@ -6010,18 +6010,18 @@ static bool validate_schedule(struct igc_adapter *adapter,
 		if (e->command != TC_TAPRIO_CMD_SET_GATES)
 			return false;
 
-		for (i = 0; i < adapter->num_tx_queues; i++) {
-			if (e->gate_mask & BIT(i))
+		for (i = 0; i < adapter->num_tx_queues; i++)
+			if (e->gate_mask & BIT(i)) {
 				queue_uses[i]++;
 
-			/* There are limitations: A single queue cannot be
-			 * opened and closed multiple times per cycle unless the
-			 * gate stays open. Check for it.
-			 */
-			if (queue_uses[i] > 1 &&
-			    !(prev->gate_mask & BIT(i)))
-				return false;
-		}
+				/* There are limitations: A single queue cannot
+				 * be opened and closed multiple times per cycle
+				 * unless the gate stays open. Check for it.
+				 */
+				if (queue_uses[i] > 1 &&
+				    !(prev->gate_mask & BIT(i)))
+					return false;
+			}
 	}
 
 	return true;
-- 
2.37.3

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Re: [Intel-wired-lan] [PATCH] igc: fix the validation logic for taprio's gate list

[Kurt Kanzenbach]

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On Tue Mar 07 2023, AKASHI Takahiro wrote:
> The check introduced in the commit a5fd39464a40 ("igc: Lift TAPRIO schedule
> restriction") can detect a false positive error in some corner case.
> For instance,
>     tc qdisc replace ... taprio num_tc 4
> 	...
> 	sched-entry S 0x01 100000	# slot#1
> 	sched-entry S 0x03 100000	# slot#2
> 	sched-entry S 0x04 100000	# slot#3
> 	sched-entry S 0x08 200000	# slot#4
> 	flags 0x02			# hardware offload
>
> Here the queue#0 (the first queue) is on at the slot#1 and #2,
> and off at the slot#3 and #4. Under the current logic, when the slot#4
> is examined, validate_schedule() returns *false* since the enablement
> count for the queue#0 is two and it is already off at the previous slot
> (i.e. #3). But this definition is truely correct.
>
> Let's fix the logic to enforce a strict validation for consecutively-opened
> slots.
>
> Fixes: a5fd39464a40 ("igc: Lift TAPRIO schedule restriction")
> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>

Grml. Thanks!

Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de>

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Re: [Intel-wired-lan] [PATCH] igc: fix the validation logic for taprio's gate list

[Vinicius Costa Gomes]

Kurt Kanzenbach <kurt@linutronix.de> writes:

> On Tue Mar 07 2023, AKASHI Takahiro wrote:
>> The check introduced in the commit a5fd39464a40 ("igc: Lift TAPRIO schedule
>> restriction") can detect a false positive error in some corner case.
>> For instance,
>>     tc qdisc replace ... taprio num_tc 4
>> 	...
>> 	sched-entry S 0x01 100000	# slot#1
>> 	sched-entry S 0x03 100000	# slot#2
>> 	sched-entry S 0x04 100000	# slot#3
>> 	sched-entry S 0x08 200000	# slot#4
>> 	flags 0x02			# hardware offload
>>
>> Here the queue#0 (the first queue) is on at the slot#1 and #2,
>> and off at the slot#3 and #4. Under the current logic, when the slot#4
>> is examined, validate_schedule() returns *false* since the enablement
>> count for the queue#0 is two and it is already off at the previous slot
>> (i.e. #3). But this definition is truely correct.
>>
>> Let's fix the logic to enforce a strict validation for consecutively-opened
>> slots.
>>
>> Fixes: a5fd39464a40 ("igc: Lift TAPRIO schedule restriction")
>> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
>
> Grml. Thanks!
>
> Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de>

Acked-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>


Cheers,
-- 
Vinicius
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Re: [Intel-wired-lan] [PATCH] igc: fix the validation logic for taprio's gate list

[naamax.meir]

On 3/7/2023 08:45, AKASHI Takahiro wrote:
> The check introduced in the commit a5fd39464a40 ("igc: Lift TAPRIO schedule
> restriction") can detect a false positive error in some corner case.
> For instance,
>      tc qdisc replace ... taprio num_tc 4
> 	...
> 	sched-entry S 0x01 100000	# slot#1
> 	sched-entry S 0x03 100000	# slot#2
> 	sched-entry S 0x04 100000	# slot#3
> 	sched-entry S 0x08 200000	# slot#4
> 	flags 0x02			# hardware offload
> 
> Here the queue#0 (the first queue) is on at the slot#1 and #2,
> and off at the slot#3 and #4. Under the current logic, when the slot#4
> is examined, validate_schedule() returns *false* since the enablement
> count for the queue#0 is two and it is already off at the previous slot
> (i.e. #3). But this definition is truely correct.
> 
> Let's fix the logic to enforce a strict validation for consecutively-opened
> slots.
> 
> Fixes: a5fd39464a40 ("igc: Lift TAPRIO schedule restriction")
> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
> ---
>   drivers/net/ethernet/intel/igc/igc_main.c | 20 ++++++++++----------
>   1 file changed, 10 insertions(+), 10 deletions(-)
Tested-by: Naama Meir <naamax.meir@linux.intel.com>
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