Re: [PATCH] drm/i915: Set MI_INVALIDATE_BSD for all video-decode engines

From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Set MI_INVALIDATE_BSD for all video-decode engines
Date: Thu, 08 Nov 2018 17:11:45 +0200	[thread overview]
Message-ID: <87in17hadq.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20181108140039.12254-1-chris@chris-wilson.co.uk>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> We have multiple instances of VCS but only remember to invalidate the
> BSD caches on the first, ignoring the stale caches of any other engine.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Missing this prolly would have caused much hair pulling in future, so
nice catch.

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

Lets flush also the LLC for gen9+ on followup patch?
-Mika

> ---
>  drivers/gpu/drm/i915/intel_lrc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index f7892ddb3f13..08fd9b12e4d7 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1956,7 +1956,7 @@ static int gen8_emit_flush(struct i915_request *request, u32 mode)
>  
>  	if (mode & EMIT_INVALIDATE) {
>  		cmd |= MI_INVALIDATE_TLB;
> -		if (request->engine->id == VCS)
> +		if (request->engine->class == VIDEO_DECODE_CLASS)
>  			cmd |= MI_INVALIDATE_BSD;
>  	}
>  
> -- 
> 2.19.1
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