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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH] drm/i915: Set MI_INVALIDATE_BSD for all video-decode engines
Date: Thu,  8 Nov 2018 14:00:39 +0000	[thread overview]
Message-ID: <20181108140039.12254-1-chris@chris-wilson.co.uk> (raw)

We have multiple instances of VCS but only remember to invalidate the
BSD caches on the first, ignoring the stale caches of any other engine.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f7892ddb3f13..08fd9b12e4d7 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1956,7 +1956,7 @@ static int gen8_emit_flush(struct i915_request *request, u32 mode)
 
 	if (mode & EMIT_INVALIDATE) {
 		cmd |= MI_INVALIDATE_TLB;
-		if (request->engine->id == VCS)
+		if (request->engine->class == VIDEO_DECODE_CLASS)
 			cmd |= MI_INVALIDATE_BSD;
 	}
 
-- 
2.19.1

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             reply	other threads:[~2018-11-08 14:00 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-08 14:00 Chris Wilson [this message]
2018-11-08 14:22 ` ✓ Fi.CI.BAT: success for drm/i915: Set MI_INVALIDATE_BSD for all video-decode engines Patchwork
2018-11-08 15:11 ` [PATCH] " Mika Kuoppala
2018-11-08 22:32 ` ✓ Fi.CI.IGT: success for " Patchwork

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