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* [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2
@ 2020-09-28 20:03 José Roberto de Souza
  2020-09-28 20:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display/ehl: Limit eDP to HBR2 (rev2) Patchwork
                   ` (4 more replies)
  0 siblings, 5 replies; 8+ messages in thread
From: José Roberto de Souza @ 2020-09-28 20:03 UTC (permalink / raw)
  To: intel-gfx

Recent update in documentation defeatured eDP HBR3 for EHL and JSL.

v2:
- Remove dead code in ehl_get_combo_buf_trans()

BSpec: 32247
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c |  9 ++-------
 drivers/gpu/drm/i915/display/intel_dp.c  | 11 ++++++++++-
 2 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 4d06178cd76c..ef06b7b82be9 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1082,13 +1082,8 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder, int type, int rate,
 		return icl_combo_phy_ddi_translations_hdmi;
 	case INTEL_OUTPUT_EDP:
 		if (dev_priv->vbt.edp.low_vswing) {
-			if (rate > 540000) {
-				*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr3);
-				return icl_combo_phy_ddi_translations_edp_hbr3;
-			} else {
-				*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
-				return icl_combo_phy_ddi_translations_edp_hbr2;
-			}
+			*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
+			return icl_combo_phy_ddi_translations_edp_hbr2;
 		}
 		/* fall through */
 	default:
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 54a4b81ea3ff..96d2c76772d6 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -277,13 +277,20 @@ static int icl_max_source_rate(struct intel_dp *intel_dp)
 	enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port);
 
 	if (intel_phy_is_combo(dev_priv, phy) &&
-	    !IS_ELKHARTLAKE(dev_priv) &&
 	    !intel_dp_is_edp(intel_dp))
 		return 540000;
 
 	return 810000;
 }
 
+static int ehl_max_source_rate(struct intel_dp *intel_dp)
+{
+	if (intel_dp_is_edp(intel_dp))
+		return 540000;
+
+	return 810000;
+}
+
 static void
 intel_dp_set_source_rates(struct intel_dp *intel_dp)
 {
@@ -318,6 +325,8 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
 		size = ARRAY_SIZE(cnl_rates);
 		if (IS_GEN(dev_priv, 10))
 			max_rate = cnl_max_source_rate(intel_dp);
+		else if (IS_ELKHARTLAKE(dev_priv))
+			max_rate = ehl_max_source_rate(intel_dp);
 		else
 			max_rate = icl_max_source_rate(intel_dp);
 	} else if (IS_GEN9_LP(dev_priv)) {
-- 
2.28.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display/ehl: Limit eDP to HBR2 (rev2)
  2020-09-28 20:03 [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 José Roberto de Souza
@ 2020-09-28 20:33 ` Patchwork
  2020-09-29  1:31 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2020-09-28 20:33 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx


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== Series Details ==

Series: drm/i915/display/ehl: Limit eDP to HBR2 (rev2)
URL   : https://patchwork.freedesktop.org/series/82162/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9066 -> Patchwork_18583
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/index.html

Known issues
------------

  Here are the changes found in Patchwork_18583 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - fi-icl-u2:          [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  
#### Possible fixes ####

  * igt@kms_busy@basic@flip:
    - {fi-tgl-dsi}:       [DMESG-WARN][3] ([i915#1982]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/fi-tgl-dsi/igt@kms_busy@basic@flip.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/fi-tgl-dsi/igt@kms_busy@basic@flip.html
    - fi-kbl-x1275:       [DMESG-WARN][5] ([i915#62] / [i915#92] / [i915#95]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/fi-kbl-x1275/igt@kms_busy@basic@flip.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/fi-kbl-x1275/igt@kms_busy@basic@flip.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
    - fi-icl-u2:          [DMESG-WARN][7] ([i915#1982]) -> [PASS][8] +3 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html

  
#### Warnings ####

  * igt@gem_exec_suspend@basic-s0:
    - fi-kbl-x1275:       [DMESG-WARN][9] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][10] ([i915#62] / [i915#92]) +3 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-x1275:       [DMESG-FAIL][11] ([i915#62] / [i915#95]) -> [DMESG-FAIL][12] ([i915#62])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html

  * igt@kms_force_connector_basic@force-connector-state:
    - fi-kbl-x1275:       [DMESG-WARN][13] ([i915#62] / [i915#92]) -> [DMESG-WARN][14] ([i915#62] / [i915#92] / [i915#95]) +4 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/fi-kbl-x1275/igt@kms_force_connector_basic@force-connector-state.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/fi-kbl-x1275/igt@kms_force_connector_basic@force-connector-state.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (45 -> 39)
------------------------------

  Additional (1): fi-skl-guc 
  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_9066 -> Patchwork_18583

  CI-20190529: 20190529
  CI_DRM_9066: 75ebae939b2b94dfdc5636959b6f63deaaa51b42 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5790: 722a3eb9734f04030508d244df9dff55c5ab686c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18583: 6dc3ac898693a1a1e9cea5932f361e4a8cc89834 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

6dc3ac898693 drm/i915/display/ehl: Limit eDP to HBR2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/index.html

[-- Attachment #1.2: Type: text/html, Size: 6220 bytes --]

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display/ehl: Limit eDP to HBR2 (rev2)
  2020-09-28 20:03 [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 José Roberto de Souza
  2020-09-28 20:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display/ehl: Limit eDP to HBR2 (rev2) Patchwork
@ 2020-09-29  1:31 ` Patchwork
  2020-09-30 15:56 ` [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 Surendrakumar Upadhyay, TejaskumarX
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2020-09-29  1:31 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 17949 bytes --]

== Series Details ==

Series: drm/i915/display/ehl: Limit eDP to HBR2 (rev2)
URL   : https://patchwork.freedesktop.org/series/82162/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9066_full -> Patchwork_18583_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_18583_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@gem_ctx_persistence@heartbeat-close}:
    - shard-skl:          NOTRUN -> [FAIL][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl7/igt@gem_ctx_persistence@heartbeat-close.html

  * {igt@gem_ctx_persistence@heartbeat-hang}:
    - shard-tglb:         [PASS][2] -> [FAIL][3]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-tglb8/igt@gem_ctx_persistence@heartbeat-hang.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-tglb3/igt@gem_ctx_persistence@heartbeat-hang.html

  
Known issues
------------

  Here are the changes found in Patchwork_18583_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@preservation-s3@vecs0:
    - shard-kbl:          [PASS][4] -> [DMESG-WARN][5] ([i915#180]) +4 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-kbl4/igt@gem_ctx_isolation@preservation-s3@vecs0.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-kbl2/igt@gem_ctx_isolation@preservation-s3@vecs0.html

  * igt@gem_exec_reloc@basic-many-active@vecs0:
    - shard-glk:          [PASS][6] -> [FAIL][7] ([i915#2389]) +2 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-glk6/igt@gem_exec_reloc@basic-many-active@vecs0.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-glk2/igt@gem_exec_reloc@basic-many-active@vecs0.html

  * igt@gem_userptr_blits@unsync-unmap-cycles:
    - shard-skl:          [PASS][8] -> [TIMEOUT][9] ([i915#1958])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl8/igt@gem_userptr_blits@unsync-unmap-cycles.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl6/igt@gem_userptr_blits@unsync-unmap-cycles.html

  * igt@gem_workarounds@basic-read-fd:
    - shard-snb:          [PASS][10] -> [TIMEOUT][11] ([i915#1958])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-snb1/igt@gem_workarounds@basic-read-fd.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-snb7/igt@gem_workarounds@basic-read-fd.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-180:
    - shard-kbl:          [PASS][12] -> [DMESG-FAIL][13] ([i915#95])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-kbl1/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-kbl2/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html

  * igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][14] -> [FAIL][15] ([i915#79])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1:
    - shard-glk:          [PASS][16] -> [FAIL][17] ([i915#2122])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-glk8/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-glk5/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-wc:
    - shard-kbl:          [PASS][18] -> [DMESG-WARN][19] ([i915#1982])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-wc.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-tglb:         [PASS][20] -> [DMESG-WARN][21] ([i915#1982]) +1 similar issue
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-tglb7/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-pwrite.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-tglb1/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [PASS][22] -> [FAIL][23] ([fdo#108145] / [i915#265])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][24] -> [DMESG-WARN][25] ([i915#1982]) +9 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-glk:          [PASS][26] -> [DMESG-FAIL][27] ([i915#118] / [i915#95])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-glk7/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-glk5/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [PASS][28] -> [SKIP][29] ([fdo#109441]) +1 similar issue
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-iclb4/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@sysfs_heartbeat_interval@mixed@rcs0:
    - shard-skl:          [PASS][30] -> [FAIL][31] ([i915#1731]) +1 similar issue
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl8/igt@sysfs_heartbeat_interval@mixed@rcs0.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl6/igt@sysfs_heartbeat_interval@mixed@rcs0.html

  
#### Possible fixes ####

  * igt@gem_exec_whisper@basic-queues-forked:
    - shard-glk:          [DMESG-WARN][32] ([i915#118] / [i915#95]) -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-glk6/igt@gem_exec_whisper@basic-queues-forked.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-glk2/igt@gem_exec_whisper@basic-queues-forked.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-glk:          [DMESG-WARN][34] ([i915#1436] / [i915#716]) -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-glk2/igt@gen9_exec_parse@allowed-all.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-glk4/igt@gen9_exec_parse@allowed-all.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [DMESG-WARN][36] ([i915#1436] / [i915#716]) -> [PASS][37]
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl1/igt@gen9_exec_parse@allowed-single.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl8/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_selftest@mock@requests:
    - shard-skl:          [INCOMPLETE][38] ([i915#198] / [i915#2278]) -> [PASS][39]
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl10/igt@i915_selftest@mock@requests.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl7/igt@i915_selftest@mock@requests.html

  * {igt@kms_async_flips@async-flip-with-page-flip-events}:
    - shard-glk:          [FAIL][40] -> [PASS][41]
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-glk3/igt@kms_async_flips@async-flip-with-page-flip-events.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-glk3/igt@kms_async_flips@async-flip-with-page-flip-events.html
    - shard-tglb:         [FAIL][42] -> [PASS][43]
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-tglb2/igt@kms_async_flips@async-flip-with-page-flip-events.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-tglb3/igt@kms_async_flips@async-flip-with-page-flip-events.html

  * igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen:
    - shard-skl:          [FAIL][44] ([i915#54]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl6/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl1/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1:
    - shard-kbl:          [DMESG-WARN][46] ([i915#1982]) -> [PASS][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-kbl4/igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-kbl4/igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1:
    - shard-kbl:          [FAIL][48] ([i915#79]) -> [PASS][49]
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-kbl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-kbl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1:
    - shard-glk:          [FAIL][50] ([i915#79]) -> [PASS][51]
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-glk4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-glk9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
    - shard-tglb:         [DMESG-WARN][52] ([i915#1982]) -> [PASS][53] +3 similar issues
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [DMESG-WARN][54] ([i915#180]) -> [PASS][55] +8 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_plane@plane-position-covered-pipe-b-planes:
    - shard-skl:          [DMESG-WARN][56] ([i915#1982]) -> [PASS][57] +5 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl8/igt@kms_plane@plane-position-covered-pipe-b-planes.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl10/igt@kms_plane@plane-position-covered-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [FAIL][58] ([fdo#108145] / [i915#265]) -> [PASS][59]
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr@psr2_cursor_plane_move:
    - shard-iclb:         [SKIP][60] ([fdo#109441]) -> [PASS][61] +1 similar issue
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-iclb4/igt@kms_psr@psr2_cursor_plane_move.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][62] ([i915#1635] / [i915#31]) -> [PASS][63]
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-apl3/igt@kms_setmode@basic.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-apl6/igt@kms_setmode@basic.html
    - shard-glk:          [FAIL][64] ([i915#31]) -> [PASS][65]
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-glk8/igt@kms_setmode@basic.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-glk7/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-c-wait-idle-hang:
    - shard-apl:          [DMESG-WARN][66] ([i915#1635] / [i915#1982]) -> [PASS][67] +1 similar issue
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-apl3/igt@kms_vblank@pipe-c-wait-idle-hang.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-apl8/igt@kms_vblank@pipe-c-wait-idle-hang.html

  * igt@perf@polling-small-buf:
    - shard-skl:          [FAIL][68] ([i915#1722]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl6/igt@perf@polling-small-buf.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl4/igt@perf@polling-small-buf.html

  * igt@sysfs_heartbeat_interval@mixed@vecs0:
    - shard-skl:          [FAIL][70] ([i915#1731]) -> [PASS][71]
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl8/igt@sysfs_heartbeat_interval@mixed@vecs0.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl6/igt@sysfs_heartbeat_interval@mixed@vecs0.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@preservation-s3@rcs0:
    - shard-kbl:          [DMESG-WARN][72] ([i915#165]) -> [DMESG-WARN][73] ([i915#180])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-kbl4/igt@gem_ctx_isolation@preservation-s3@rcs0.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-kbl2/igt@gem_ctx_isolation@preservation-s3@rcs0.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-skl:          [TIMEOUT][74] ([i915#1958] / [i915#2424]) -> [TIMEOUT][75] ([i915#2424])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl5/igt@gem_userptr_blits@sync-unmap-cycles.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl9/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@kms_content_protection@srm:
    - shard-apl:          [TIMEOUT][76] ([i915#1319] / [i915#1635] / [i915#1958]) -> [TIMEOUT][77] ([i915#1319] / [i915#1635])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-apl6/igt@kms_content_protection@srm.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-apl7/igt@kms_content_protection@srm.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [FAIL][78] ([fdo#108145] / [i915#265]) -> [DMESG-WARN][79] ([i915#1982])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9066/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165
  [i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
  [i915#1731]: https://gitlab.freedesktop.org/drm/intel/issues/1731
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1958]: https://gitlab.freedesktop.org/drm/intel/issues/1958
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2278]: https://gitlab.freedesktop.org/drm/intel/issues/2278
  [i915#2389]: https://gitlab.freedesktop.org/drm/intel/issues/2389
  [i915#2424]: https://gitlab.freedesktop.org/drm/intel/issues/2424
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * Linux: CI_DRM_9066 -> Patchwork_18583

  CI-20190529: 20190529
  CI_DRM_9066: 75ebae939b2b94dfdc5636959b6f63deaaa51b42 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5790: 722a3eb9734f04030508d244df9dff55c5ab686c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18583: 6dc3ac898693a1a1e9cea5932f361e4a8cc89834 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18583/index.html

[-- Attachment #1.2: Type: text/html, Size: 21604 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2
  2020-09-28 20:03 [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 José Roberto de Souza
  2020-09-28 20:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display/ehl: Limit eDP to HBR2 (rev2) Patchwork
  2020-09-29  1:31 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2020-09-30 15:56 ` Surendrakumar Upadhyay, TejaskumarX
  2020-09-30 20:21   ` Souza, Jose
  2020-10-01 11:56   ` Jani Nikula
  2020-09-30 16:14 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display/ehl: Limit eDP to HBR2 (rev3) Patchwork
  2020-10-03  4:23 ` [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 Matt Roper
  4 siblings, 2 replies; 8+ messages in thread
From: Surendrakumar Upadhyay, TejaskumarX @ 2020-09-30 15:56 UTC (permalink / raw)
  To: Souza, Jose, intel-gfx



-----Original Message-----
From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of José Roberto de Souza
Sent: 29 September 2020 01:33
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2

Recent update in documentation defeatured eDP HBR3 for EHL and JSL.

v2:
- Remove dead code in ehl_get_combo_buf_trans()

BSpec: 32247
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c |  9 ++-------  drivers/gpu/drm/i915/display/intel_dp.c  | 11 ++++++++++-
 2 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 4d06178cd76c..ef06b7b82be9 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1082,13 +1082,8 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder, int type, int rate,
 		return icl_combo_phy_ddi_translations_hdmi;
 	case INTEL_OUTPUT_EDP:
 		if (dev_priv->vbt.edp.low_vswing) {
-			if (rate > 540000) {
-				*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr3);
-				return icl_combo_phy_ddi_translations_edp_hbr3;
-			} else {
-				*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
-				return icl_combo_phy_ddi_translations_edp_hbr2;
-			}
+			*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
+			return icl_combo_phy_ddi_translations_edp_hbr2;

As pe Bspec, ehl_edp_hbr2 does not match with icl_edp_hbr2 values. Rather I see (icl_edp_hbr2 == ehl_edp_hbr) true. 

Thanks,
Tejas
 		}
 		/* fall through */
 	default:
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 54a4b81ea3ff..96d2c76772d6 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -277,13 +277,20 @@ static int icl_max_source_rate(struct intel_dp *intel_dp)
 	enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port);
 
 	if (intel_phy_is_combo(dev_priv, phy) &&
-	    !IS_ELKHARTLAKE(dev_priv) &&
 	    !intel_dp_is_edp(intel_dp))
 		return 540000;
 
 	return 810000;
 }
 
+static int ehl_max_source_rate(struct intel_dp *intel_dp) {
+	if (intel_dp_is_edp(intel_dp))
+		return 540000;
+
+	return 810000;
+}
+
 static void
 intel_dp_set_source_rates(struct intel_dp *intel_dp)  { @@ -318,6 +325,8 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
 		size = ARRAY_SIZE(cnl_rates);
 		if (IS_GEN(dev_priv, 10))
 			max_rate = cnl_max_source_rate(intel_dp);
+		else if (IS_ELKHARTLAKE(dev_priv))
+			max_rate = ehl_max_source_rate(intel_dp);
 		else
 			max_rate = icl_max_source_rate(intel_dp);
 	} else if (IS_GEN9_LP(dev_priv)) {
--
2.28.0

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display/ehl: Limit eDP to HBR2 (rev3)
  2020-09-28 20:03 [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 José Roberto de Souza
                   ` (2 preceding siblings ...)
  2020-09-30 15:56 ` [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 Surendrakumar Upadhyay, TejaskumarX
@ 2020-09-30 16:14 ` Patchwork
  2020-10-03  4:23 ` [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 Matt Roper
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2020-09-30 16:14 UTC (permalink / raw)
  To: Surendrakumar Upadhyay, TejaskumarX; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/display/ehl: Limit eDP to HBR2 (rev3)
URL   : https://patchwork.freedesktop.org/series/82162/
State : failure

== Summary ==

Applying: drm/i915/display/ehl: Limit eDP to HBR2
error: corrupt patch at line 37
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0001 drm/i915/display/ehl: Limit eDP to HBR2
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".


_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2
  2020-09-30 15:56 ` [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 Surendrakumar Upadhyay, TejaskumarX
@ 2020-09-30 20:21   ` Souza, Jose
  2020-10-01 11:56   ` Jani Nikula
  1 sibling, 0 replies; 8+ messages in thread
From: Souza, Jose @ 2020-09-30 20:21 UTC (permalink / raw)
  To: Surendrakumar Upadhyay, TejaskumarX, intel-gfx

On Wed, 2020-09-30 at 15:56 +0000, Surendrakumar Upadhyay, TejaskumarX wrote:
> 
> -----Original Message-----
> From: Intel-gfx <
> intel-gfx-bounces@lists.freedesktop.org
> > On Behalf Of José Roberto de Souza
> Sent: 29 September 2020 01:33
> To: 
> intel-gfx@lists.freedesktop.org
> 
> Subject: [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2
> 
> Recent update in documentation defeatured eDP HBR3 for EHL and JSL.
> 
> v2:
> - Remove dead code in ehl_get_combo_buf_trans()
> 
> BSpec: 32247
> Cc: Matt Roper <
> matthew.d.roper@intel.com
> >
> Cc: Vidya Srinivas <
> vidya.srinivas@intel.com
> >
> Signed-off-by: José Roberto de Souza <
> jose.souza@intel.com
> >
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c |  9 ++-------  drivers/gpu/drm/i915/display/intel_dp.c  | 11 ++++++++++-
>  2 files changed, 12 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 4d06178cd76c..ef06b7b82be9 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1082,13 +1082,8 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder, int type, int rate,
>  return icl_combo_phy_ddi_translations_hdmi;
>  case INTEL_OUTPUT_EDP:
>  if (dev_priv->vbt.edp.low_vswing) {
> -if (rate > 540000) {
> -*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr3);
> -return icl_combo_phy_ddi_translations_edp_hbr3;
> -} else {
> -*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
> -return icl_combo_phy_ddi_translations_edp_hbr2;
> -}
> +*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
> +return icl_combo_phy_ddi_translations_edp_hbr2;
> 
> As pe Bspec, ehl_edp_hbr2 does not match with icl_edp_hbr2 values. Rather I see (icl_edp_hbr2 == ehl_edp_hbr) true.

This change is not related to voltage swing tables, it is only removing a dead code as the hbr3 voltage swing table will never be used in EHL/JSL.

Yeah the voltage swing tables for EHL are not matching too, could you update it in your series updating the JSL tables?

> 
> Thanks,
> Tejas
>  }
>  /* fall through */
>  default:
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 54a4b81ea3ff..96d2c76772d6 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -277,13 +277,20 @@ static int icl_max_source_rate(struct intel_dp *intel_dp)
>  enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port);
> 
>  if (intel_phy_is_combo(dev_priv, phy) &&
> -    !IS_ELKHARTLAKE(dev_priv) &&
>      !intel_dp_is_edp(intel_dp))
>  return 540000;
> 
>  return 810000;
>  }
> 
> +static int ehl_max_source_rate(struct intel_dp *intel_dp) {
> +if (intel_dp_is_edp(intel_dp))
> +return 540000;
> +
> +return 810000;
> +}
> +
>  static void
>  intel_dp_set_source_rates(struct intel_dp *intel_dp)  { @@ -318,6 +325,8 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
>  size = ARRAY_SIZE(cnl_rates);
>  if (IS_GEN(dev_priv, 10))
>  max_rate = cnl_max_source_rate(intel_dp);
> +else if (IS_ELKHARTLAKE(dev_priv))
> +max_rate = ehl_max_source_rate(intel_dp);
>  else
>  max_rate = icl_max_source_rate(intel_dp);
>  } else if (IS_GEN9_LP(dev_priv)) {
> --
> 2.28.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> 
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2
  2020-09-30 15:56 ` [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 Surendrakumar Upadhyay, TejaskumarX
  2020-09-30 20:21   ` Souza, Jose
@ 2020-10-01 11:56   ` Jani Nikula
  1 sibling, 0 replies; 8+ messages in thread
From: Jani Nikula @ 2020-10-01 11:56 UTC (permalink / raw)
  To: Surendrakumar Upadhyay, TejaskumarX, Souza, Jose, intel-gfx

On Wed, 30 Sep 2020, "Surendrakumar Upadhyay, TejaskumarX" <tejaskumarx.surendrakumar.upadhyay@intel.com> wrote:
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of José Roberto de Souza
> Sent: 29 September 2020 01:33
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2
>
> Recent update in documentation defeatured eDP HBR3 for EHL and JSL.
>
> v2:
> - Remove dead code in ehl_get_combo_buf_trans()
>
> BSpec: 32247
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Vidya Srinivas <vidya.srinivas@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c |  9 ++-------  drivers/gpu/drm/i915/display/intel_dp.c  | 11 ++++++++++-
>  2 files changed, 12 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 4d06178cd76c..ef06b7b82be9 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1082,13 +1082,8 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder, int type, int rate,
>  		return icl_combo_phy_ddi_translations_hdmi;
>  	case INTEL_OUTPUT_EDP:
>  		if (dev_priv->vbt.edp.low_vswing) {
> -			if (rate > 540000) {
> -				*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr3);
> -				return icl_combo_phy_ddi_translations_edp_hbr3;
> -			} else {
> -				*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
> -				return icl_combo_phy_ddi_translations_edp_hbr2;
> -			}
> +			*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
> +			return icl_combo_phy_ddi_translations_edp_hbr2;
>
> As pe Bspec, ehl_edp_hbr2 does not match with icl_edp_hbr2 values. Rather I see (icl_edp_hbr2 == ehl_edp_hbr) true. 
>
> Thanks,
> Tejas

Tejas, please fix your email quoting when interacting on the public
lists. Using Outlook defaults is not acceptable. Please use settings to
prepend "> " to all lines of the email being quoted. Better yet, use a
mail client that gets this right out of the box.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2
  2020-09-28 20:03 [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 José Roberto de Souza
                   ` (3 preceding siblings ...)
  2020-09-30 16:14 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display/ehl: Limit eDP to HBR2 (rev3) Patchwork
@ 2020-10-03  4:23 ` Matt Roper
  4 siblings, 0 replies; 8+ messages in thread
From: Matt Roper @ 2020-10-03  4:23 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

On Mon, Sep 28, 2020 at 01:03:09PM -0700, José Roberto de Souza wrote:
> Recent update in documentation defeatured eDP HBR3 for EHL and JSL.
> 
> v2:
> - Remove dead code in ehl_get_combo_buf_trans()
> 
> BSpec: 32247
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Vidya Srinivas <vidya.srinivas@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Surprising that DP vs eDP have the exact opposite restrictions that
ICL/TGL do, but this matches the spec.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c |  9 ++-------
>  drivers/gpu/drm/i915/display/intel_dp.c  | 11 ++++++++++-
>  2 files changed, 12 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 4d06178cd76c..ef06b7b82be9 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1082,13 +1082,8 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder, int type, int rate,
>  		return icl_combo_phy_ddi_translations_hdmi;
>  	case INTEL_OUTPUT_EDP:
>  		if (dev_priv->vbt.edp.low_vswing) {
> -			if (rate > 540000) {
> -				*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr3);
> -				return icl_combo_phy_ddi_translations_edp_hbr3;
> -			} else {
> -				*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
> -				return icl_combo_phy_ddi_translations_edp_hbr2;
> -			}
> +			*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
> +			return icl_combo_phy_ddi_translations_edp_hbr2;
>  		}
>  		/* fall through */
>  	default:
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 54a4b81ea3ff..96d2c76772d6 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -277,13 +277,20 @@ static int icl_max_source_rate(struct intel_dp *intel_dp)
>  	enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port);
>  
>  	if (intel_phy_is_combo(dev_priv, phy) &&
> -	    !IS_ELKHARTLAKE(dev_priv) &&
>  	    !intel_dp_is_edp(intel_dp))
>  		return 540000;
>  
>  	return 810000;
>  }
>  
> +static int ehl_max_source_rate(struct intel_dp *intel_dp)
> +{
> +	if (intel_dp_is_edp(intel_dp))
> +		return 540000;
> +
> +	return 810000;
> +}
> +
>  static void
>  intel_dp_set_source_rates(struct intel_dp *intel_dp)
>  {
> @@ -318,6 +325,8 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
>  		size = ARRAY_SIZE(cnl_rates);
>  		if (IS_GEN(dev_priv, 10))
>  			max_rate = cnl_max_source_rate(intel_dp);
> +		else if (IS_ELKHARTLAKE(dev_priv))
> +			max_rate = ehl_max_source_rate(intel_dp);
>  		else
>  			max_rate = icl_max_source_rate(intel_dp);
>  	} else if (IS_GEN9_LP(dev_priv)) {
> -- 
> 2.28.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2020-10-03  4:23 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-28 20:03 [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 José Roberto de Souza
2020-09-28 20:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display/ehl: Limit eDP to HBR2 (rev2) Patchwork
2020-09-29  1:31 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-09-30 15:56 ` [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 Surendrakumar Upadhyay, TejaskumarX
2020-09-30 20:21   ` Souza, Jose
2020-10-01 11:56   ` Jani Nikula
2020-09-30 16:14 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display/ehl: Limit eDP to HBR2 (rev3) Patchwork
2020-10-03  4:23 ` [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2 Matt Roper

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