* [PATCH] drm/i915/skl: Update eDRAM calculation
@ 2016-04-13 15:52 Ben Widawsky
2016-04-14 8:13 ` Jani Nikula
0 siblings, 1 reply; 6+ messages in thread
From: Ben Widawsky @ 2016-04-13 15:52 UTC (permalink / raw)
To: Intel GFX; +Cc: Ben Widawsky, Eero Tamminen
The two behavioral changes here are the correct detection of the eDRAM size on
gen9 (SKL + KBL), and unconditional printing of the eLLC size.
Cc: Eero Tamminen <eero.t.tamminen@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
drivers/gpu/drm/i915/intel_uncore.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index fbc1d21..efef724 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -314,8 +314,17 @@ static void intel_uncore_ellc_detect(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
- if ((IS_HASWELL(dev) || IS_BROADWELL(dev) ||
- INTEL_INFO(dev)->gen >= 9) &&
+ if (INTEL_INFO(dev)->gen >= 9 && HAS_LLC(dev)) {
+ u32 edramcap = __raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT);
+ if (edramcap & EDRAM_ENABLED) {
+ int sets = (edramcap >> 8) & 0x3;
+ int ways = (edramcap >> 5) & 0x7;
+ int banks = (edramcap >> 1) & 0xf;
+
+ ways = (ways + 1) * 4;
+ dev_priv->ellc_size = sets * ways * banks;
+ }
+ } else if ((IS_HASWELL(dev) || IS_BROADWELL(dev)) &&
(__raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT) & EDRAM_ENABLED)) {
/* The docs do not explain exactly how the calculation can be
* made. It is somewhat guessable, but for now, it's always
@@ -323,8 +332,9 @@ static void intel_uncore_ellc_detect(struct drm_device *dev)
* NB: We can't write IDICR yet because we do not have gt funcs
* set up */
dev_priv->ellc_size = 128;
- DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
}
+
+ DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
}
static bool
--
2.8.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/skl: Update eDRAM calculation
2016-04-13 15:52 [PATCH] drm/i915/skl: Update eDRAM calculation Ben Widawsky
@ 2016-04-14 8:13 ` Jani Nikula
2016-04-14 8:14 ` Jani Nikula
0 siblings, 1 reply; 6+ messages in thread
From: Jani Nikula @ 2016-04-14 8:13 UTC (permalink / raw)
To: Intel GFX; +Cc: Ben Widawsky, Eero Tamminen
On Wed, 13 Apr 2016, Ben Widawsky <ben@bwidawsk.net> wrote:
> The two behavioral changes here are the correct detection of the eDRAM size on
> gen9 (SKL + KBL), and unconditional printing of the eLLC size.
>
> Cc: Eero Tamminen <eero.t.tamminen@intel.com>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Please see [1].
BR,
Jani.
[1] http://patchwork.freedesktop.org/patch/msgid/1460557604-7126-3-git-send-email-mika.kuoppala@intel.com
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index fbc1d21..efef724 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -314,8 +314,17 @@ static void intel_uncore_ellc_detect(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
>
> - if ((IS_HASWELL(dev) || IS_BROADWELL(dev) ||
> - INTEL_INFO(dev)->gen >= 9) &&
> + if (INTEL_INFO(dev)->gen >= 9 && HAS_LLC(dev)) {
> + u32 edramcap = __raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT);
> + if (edramcap & EDRAM_ENABLED) {
> + int sets = (edramcap >> 8) & 0x3;
> + int ways = (edramcap >> 5) & 0x7;
> + int banks = (edramcap >> 1) & 0xf;
> +
> + ways = (ways + 1) * 4;
> + dev_priv->ellc_size = sets * ways * banks;
> + }
> + } else if ((IS_HASWELL(dev) || IS_BROADWELL(dev)) &&
> (__raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT) & EDRAM_ENABLED)) {
> /* The docs do not explain exactly how the calculation can be
> * made. It is somewhat guessable, but for now, it's always
> @@ -323,8 +332,9 @@ static void intel_uncore_ellc_detect(struct drm_device *dev)
> * NB: We can't write IDICR yet because we do not have gt funcs
> * set up */
> dev_priv->ellc_size = 128;
> - DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
> }
> +
> + DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
> }
>
> static bool
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/skl: Update eDRAM calculation
2016-04-14 8:13 ` Jani Nikula
@ 2016-04-14 8:14 ` Jani Nikula
2016-04-14 14:48 ` Ben Widawsky
0 siblings, 1 reply; 6+ messages in thread
From: Jani Nikula @ 2016-04-14 8:14 UTC (permalink / raw)
To: Intel GFX; +Cc: Ben Widawsky, Eero Tamminen
On Thu, 14 Apr 2016, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Wed, 13 Apr 2016, Ben Widawsky <ben@bwidawsk.net> wrote:
>> The two behavioral changes here are the correct detection of the eDRAM size on
>> gen9 (SKL + KBL), and unconditional printing of the eLLC size.
>>
>> Cc: Eero Tamminen <eero.t.tamminen@intel.com>
>> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
>
> Please see [1].
>
> BR,
> Jani.
>
>
> [1] http://patchwork.freedesktop.org/patch/msgid/1460557604-7126-3-git-send-email-mika.kuoppala@intel.com
I did mean to refer to the entire series
https://patchwork.freedesktop.org/series/5663/
>
>
>> ---
>> drivers/gpu/drm/i915/intel_uncore.c | 16 +++++++++++++---
>> 1 file changed, 13 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
>> index fbc1d21..efef724 100644
>> --- a/drivers/gpu/drm/i915/intel_uncore.c
>> +++ b/drivers/gpu/drm/i915/intel_uncore.c
>> @@ -314,8 +314,17 @@ static void intel_uncore_ellc_detect(struct drm_device *dev)
>> {
>> struct drm_i915_private *dev_priv = dev->dev_private;
>>
>> - if ((IS_HASWELL(dev) || IS_BROADWELL(dev) ||
>> - INTEL_INFO(dev)->gen >= 9) &&
>> + if (INTEL_INFO(dev)->gen >= 9 && HAS_LLC(dev)) {
>> + u32 edramcap = __raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT);
>> + if (edramcap & EDRAM_ENABLED) {
>> + int sets = (edramcap >> 8) & 0x3;
>> + int ways = (edramcap >> 5) & 0x7;
>> + int banks = (edramcap >> 1) & 0xf;
>> +
>> + ways = (ways + 1) * 4;
>> + dev_priv->ellc_size = sets * ways * banks;
>> + }
>> + } else if ((IS_HASWELL(dev) || IS_BROADWELL(dev)) &&
>> (__raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT) & EDRAM_ENABLED)) {
>> /* The docs do not explain exactly how the calculation can be
>> * made. It is somewhat guessable, but for now, it's always
>> @@ -323,8 +332,9 @@ static void intel_uncore_ellc_detect(struct drm_device *dev)
>> * NB: We can't write IDICR yet because we do not have gt funcs
>> * set up */
>> dev_priv->ellc_size = 128;
>> - DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
>> }
>> +
>> + DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
>> }
>>
>> static bool
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/skl: Update eDRAM calculation
2016-04-14 8:14 ` Jani Nikula
@ 2016-04-14 14:48 ` Ben Widawsky
2016-04-14 14:50 ` Ben Widawsky
0 siblings, 1 reply; 6+ messages in thread
From: Ben Widawsky @ 2016-04-14 14:48 UTC (permalink / raw)
To: Jani Nikula, Mika Kuoppala; +Cc: Intel GFX, Eero Tamminen
On Thu, Apr 14, 2016 at 11:14:48AM +0300, Jani Nikula wrote:
> On Thu, 14 Apr 2016, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> > On Wed, 13 Apr 2016, Ben Widawsky <ben@bwidawsk.net> wrote:
> >> The two behavioral changes here are the correct detection of the eDRAM size on
> >> gen9 (SKL + KBL), and unconditional printing of the eLLC size.
> >>
> >> Cc: Eero Tamminen <eero.t.tamminen@intel.com>
> >> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> >
> > Please see [1].
> >
> > BR,
> > Jani.
> >
> >
> > [1] http://patchwork.freedesktop.org/patch/msgid/1460557604-7126-3-git-send-email-mika.kuoppala@intel.com
>
> I did mean to refer to the entire series
>
> https://patchwork.freedesktop.org/series/5663/
>
>
My patch is more correct as it does the proper calculation.
> >
> >
> >> ---
> >> drivers/gpu/drm/i915/intel_uncore.c | 16 +++++++++++++---
> >> 1 file changed, 13 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> >> index fbc1d21..efef724 100644
> >> --- a/drivers/gpu/drm/i915/intel_uncore.c
> >> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> >> @@ -314,8 +314,17 @@ static void intel_uncore_ellc_detect(struct drm_device *dev)
> >> {
> >> struct drm_i915_private *dev_priv = dev->dev_private;
> >>
> >> - if ((IS_HASWELL(dev) || IS_BROADWELL(dev) ||
> >> - INTEL_INFO(dev)->gen >= 9) &&
> >> + if (INTEL_INFO(dev)->gen >= 9 && HAS_LLC(dev)) {
> >> + u32 edramcap = __raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT);
> >> + if (edramcap & EDRAM_ENABLED) {
> >> + int sets = (edramcap >> 8) & 0x3;
> >> + int ways = (edramcap >> 5) & 0x7;
> >> + int banks = (edramcap >> 1) & 0xf;
> >> +
> >> + ways = (ways + 1) * 4;
> >> + dev_priv->ellc_size = sets * ways * banks;
> >> + }
> >> + } else if ((IS_HASWELL(dev) || IS_BROADWELL(dev)) &&
> >> (__raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT) & EDRAM_ENABLED)) {
> >> /* The docs do not explain exactly how the calculation can be
> >> * made. It is somewhat guessable, but for now, it's always
> >> @@ -323,8 +332,9 @@ static void intel_uncore_ellc_detect(struct drm_device *dev)
> >> * NB: We can't write IDICR yet because we do not have gt funcs
> >> * set up */
> >> dev_priv->ellc_size = 128;
> >> - DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
> >> }
> >> +
> >> + DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
> >> }
> >>
> >> static bool
>
> --
> Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/skl: Update eDRAM calculation
2016-04-14 14:48 ` Ben Widawsky
@ 2016-04-14 14:50 ` Ben Widawsky
2016-04-15 7:23 ` Mika Kuoppala
0 siblings, 1 reply; 6+ messages in thread
From: Ben Widawsky @ 2016-04-14 14:50 UTC (permalink / raw)
To: Jani Nikula, Mika Kuoppala; +Cc: Intel GFX, Eero Tamminen
On Thu, Apr 14, 2016 at 07:48:13AM -0700, Ben Widawsky wrote:
> On Thu, Apr 14, 2016 at 11:14:48AM +0300, Jani Nikula wrote:
> > On Thu, 14 Apr 2016, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> > > On Wed, 13 Apr 2016, Ben Widawsky <ben@bwidawsk.net> wrote:
> > >> The two behavioral changes here are the correct detection of the eDRAM size on
> > >> gen9 (SKL + KBL), and unconditional printing of the eLLC size.
> > >>
> > >> Cc: Eero Tamminen <eero.t.tamminen@intel.com>
> > >> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> > >
> > > Please see [1].
> > >
> > > BR,
> > > Jani.
> > >
> > >
> > > [1] http://patchwork.freedesktop.org/patch/msgid/1460557604-7126-3-git-send-email-mika.kuoppala@intel.com
> >
> > I did mean to refer to the entire series
> >
> > https://patchwork.freedesktop.org/series/5663/
> >
> >
>
> My patch is more correct as it does the proper calculation.
>
Oh. He did it as two patches with the first claiming we can't make the
calculation... that was odd.
Anyway, assuming it does the right thing patches 2, and 3 are:
Acked-by: Ben Widawsky <ben@bwidawsk.net>
> > >
> > >
> > >> ---
> > >> drivers/gpu/drm/i915/intel_uncore.c | 16 +++++++++++++---
> > >> 1 file changed, 13 insertions(+), 3 deletions(-)
> > >>
> > >> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> > >> index fbc1d21..efef724 100644
> > >> --- a/drivers/gpu/drm/i915/intel_uncore.c
> > >> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> > >> @@ -314,8 +314,17 @@ static void intel_uncore_ellc_detect(struct drm_device *dev)
> > >> {
> > >> struct drm_i915_private *dev_priv = dev->dev_private;
> > >>
> > >> - if ((IS_HASWELL(dev) || IS_BROADWELL(dev) ||
> > >> - INTEL_INFO(dev)->gen >= 9) &&
> > >> + if (INTEL_INFO(dev)->gen >= 9 && HAS_LLC(dev)) {
> > >> + u32 edramcap = __raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT);
> > >> + if (edramcap & EDRAM_ENABLED) {
> > >> + int sets = (edramcap >> 8) & 0x3;
> > >> + int ways = (edramcap >> 5) & 0x7;
> > >> + int banks = (edramcap >> 1) & 0xf;
> > >> +
> > >> + ways = (ways + 1) * 4;
> > >> + dev_priv->ellc_size = sets * ways * banks;
> > >> + }
> > >> + } else if ((IS_HASWELL(dev) || IS_BROADWELL(dev)) &&
> > >> (__raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT) & EDRAM_ENABLED)) {
> > >> /* The docs do not explain exactly how the calculation can be
> > >> * made. It is somewhat guessable, but for now, it's always
> > >> @@ -323,8 +332,9 @@ static void intel_uncore_ellc_detect(struct drm_device *dev)
> > >> * NB: We can't write IDICR yet because we do not have gt funcs
> > >> * set up */
> > >> dev_priv->ellc_size = 128;
> > >> - DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
> > >> }
> > >> +
> > >> + DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
> > >> }
> > >>
> > >> static bool
> >
> > --
> > Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/skl: Update eDRAM calculation
2016-04-14 14:50 ` Ben Widawsky
@ 2016-04-15 7:23 ` Mika Kuoppala
0 siblings, 0 replies; 6+ messages in thread
From: Mika Kuoppala @ 2016-04-15 7:23 UTC (permalink / raw)
To: Ben Widawsky, Jani Nikula; +Cc: Intel GFX, Eero Tamminen
Ben Widawsky <ben@bwidawsk.net> writes:
> [ text/plain ]
> On Thu, Apr 14, 2016 at 07:48:13AM -0700, Ben Widawsky wrote:
>> On Thu, Apr 14, 2016 at 11:14:48AM +0300, Jani Nikula wrote:
>> > On Thu, 14 Apr 2016, Jani Nikula <jani.nikula@linux.intel.com> wrote:
>> > > On Wed, 13 Apr 2016, Ben Widawsky <ben@bwidawsk.net> wrote:
>> > >> The two behavioral changes here are the correct detection of the eDRAM size on
>> > >> gen9 (SKL + KBL), and unconditional printing of the eLLC size.
>> > >>
>> > >> Cc: Eero Tamminen <eero.t.tamminen@intel.com>
>> > >> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
>> > >
>> > > Please see [1].
>> > >
>> > > BR,
>> > > Jani.
>> > >
>> > >
>> > > [1] http://patchwork.freedesktop.org/patch/msgid/1460557604-7126-3-git-send-email-mika.kuoppala@intel.com
>> >
>> > I did mean to refer to the entire series
>> >
>> > https://patchwork.freedesktop.org/series/5663/
>> >
>> >
>>
>> My patch is more correct as it does the proper calculation.
>>
>
> Oh. He did it as two patches with the first claiming we can't make the
> calculation... that was odd.
>
Yeah that is a mistake. We can't calculate with gen < 9 and thus
the comment should have been modified to reflect that.
-Mika
> Anyway, assuming it does the right thing patches 2, and 3 are:
> Acked-by: Ben Widawsky <ben@bwidawsk.net>
>
>> > >
>> > >
>> > >> ---
>> > >> drivers/gpu/drm/i915/intel_uncore.c | 16 +++++++++++++---
>> > >> 1 file changed, 13 insertions(+), 3 deletions(-)
>> > >>
>> > >> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
>> > >> index fbc1d21..efef724 100644
>> > >> --- a/drivers/gpu/drm/i915/intel_uncore.c
>> > >> +++ b/drivers/gpu/drm/i915/intel_uncore.c
>> > >> @@ -314,8 +314,17 @@ static void intel_uncore_ellc_detect(struct drm_device *dev)
>> > >> {
>> > >> struct drm_i915_private *dev_priv = dev->dev_private;
>> > >>
>> > >> - if ((IS_HASWELL(dev) || IS_BROADWELL(dev) ||
>> > >> - INTEL_INFO(dev)->gen >= 9) &&
>> > >> + if (INTEL_INFO(dev)->gen >= 9 && HAS_LLC(dev)) {
>> > >> + u32 edramcap = __raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT);
>> > >> + if (edramcap & EDRAM_ENABLED) {
>> > >> + int sets = (edramcap >> 8) & 0x3;
>> > >> + int ways = (edramcap >> 5) & 0x7;
>> > >> + int banks = (edramcap >> 1) & 0xf;
>> > >> +
>> > >> + ways = (ways + 1) * 4;
>> > >> + dev_priv->ellc_size = sets * ways * banks;
>> > >> + }
>> > >> + } else if ((IS_HASWELL(dev) || IS_BROADWELL(dev)) &&
>> > >> (__raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT) & EDRAM_ENABLED)) {
>> > >> /* The docs do not explain exactly how the calculation can be
>> > >> * made. It is somewhat guessable, but for now, it's always
>> > >> @@ -323,8 +332,9 @@ static void intel_uncore_ellc_detect(struct drm_device *dev)
>> > >> * NB: We can't write IDICR yet because we do not have gt funcs
>> > >> * set up */
>> > >> dev_priv->ellc_size = 128;
>> > >> - DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
>> > >> }
>> > >> +
>> > >> + DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
>> > >> }
>> > >>
>> > >> static bool
>> >
>> > --
>> > Jani Nikula, Intel Open Source Technology Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-04-15 7:26 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2016-04-13 15:52 [PATCH] drm/i915/skl: Update eDRAM calculation Ben Widawsky
2016-04-14 8:13 ` Jani Nikula
2016-04-14 8:14 ` Jani Nikula
2016-04-14 14:48 ` Ben Widawsky
2016-04-14 14:50 ` Ben Widawsky
2016-04-15 7:23 ` Mika Kuoppala
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