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From: Jani Nikula <jani.nikula@linux.intel.com>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Cc: Deepak M <m.deepak@intel.com>
Subject: Re: [PATCH 09/16] drm/i915: Change lfsr_converts[] to u16
Date: Wed, 16 Mar 2016 10:42:56 +0200	[thread overview]
Message-ID: <87lh5ix17z.fsf@intel.com> (raw)
In-Reply-To: <1458052809-23426-10-git-send-email-ville.syrjala@linux.intel.com>

On Tue, 15 Mar 2016, ville.syrjala@linux.intel.com wrote:
> [ text/plain ]
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> All the values in the DSI PLL LFSR seed table fit into 9bits, so change
> the type to u16 from u32 to save a bit of space.
>
>  drivers/gpu/drm/i915/i915.ko:
> -.rodata                        90824
> +.rodata                        90760
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/intel_dsi_pll.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index 2451c84949bd..916cc92c1400 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -56,7 +56,7 @@ struct dsi_mnp {
>  	u32 dsi_pll_div;
>  };
>  
> -static const u32 lfsr_converts[] = {
> +static const u16 lfsr_converts[] = {
>  	426, 469, 234, 373, 442, 221, 110, 311, 411,		/* 62 - 70 */
>  	461, 486, 243, 377, 188, 350, 175, 343, 427, 213,	/* 71 - 80 */
>  	106, 53, 282, 397, 454, 227, 113, 56, 284, 142,		/* 81 - 90 */

-- 
Jani Nikula, Intel Open Source Technology Center
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Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-03-16  8:42 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-15 14:39 [PATCH 00/16] drm/i915: DSI and DPLL stuff for VLV/CHV mostly ville.syrjala
2016-03-15 14:39 ` [PATCH 01/16] drm/i915: Throw out BUGs from DPLL/PCH functions ville.syrjala
2016-03-16  9:02   ` Jani Nikula
2016-03-15 14:39 ` [PATCH 02/16] drm/i915: Make {vlv, chv}_{disable, update}_pll() more similar ville.syrjala
2016-03-30 13:31   ` Jani Nikula
2016-04-01 19:59     ` Ville Syrjälä
2016-03-15 14:39 ` [PATCH 03/16] drm/i915: Implement WaPixelRepeatModeFixForC0:chv ville.syrjala
2016-03-16  9:27   ` Jani Nikula
2016-03-16 13:07     ` Ville Syrjälä
2016-03-15 14:39 ` [PATCH 04/16] drm/i915: Add a local pipe variable to vlv_enable_pll() ville.syrjala
2016-03-16  9:03   ` Jani Nikula
2016-03-15 14:39 ` [PATCH 05/16] drm/i915: assert_panel_unlocked() in chv_enable_pll() ville.syrjala
2016-03-16  9:04   ` Jani Nikula
2016-03-15 14:39 ` [PATCH 06/16] drm/i915: Remove the "three times for luck" trick from vlv_enable_pll() ville.syrjala
2016-03-16  9:05   ` Jani Nikula
2016-04-01 19:58     ` Ville Syrjälä
2016-03-15 14:40 ` [PATCH 07/16] drm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV ville.syrjala
2016-03-15 14:40 ` [PATCH 08/16] drm/i915: Don't read out port_clock on CHV when DPLL is disabled ville.syrjala
2016-03-16  9:06   ` Jani Nikula
2016-03-15 14:40 ` [PATCH 09/16] drm/i915: Change lfsr_converts[] to u16 ville.syrjala
2016-03-16  8:42   ` Jani Nikula [this message]
2016-03-15 14:40 ` [PATCH 10/16] drm/i915: Power down the DSI PLL before reconfiguring it ville.syrjala
2016-03-16  8:45   ` Jani Nikula
2016-03-15 14:40 ` [PATCH 11/16] drm/i915: Compute DSI PLL parameters during .compute_config() ville.syrjala
2016-03-16  8:56   ` Jani Nikula
2016-03-16 12:59     ` Ville Syrjälä
2016-03-15 14:40 ` [PATCH 12/16] drm/i915: Fix CHV DSI PLL refclk during state readout ville.syrjala
2016-03-16  8:58   ` Jani Nikula
2016-03-15 14:40 ` [PATCH 13/16] drm/i915: Eliminate {vlv, bxt}_configure_dsi_pll() ville.syrjala
2016-03-16  8:59   ` Jani Nikula
2016-03-15 14:40 ` [PATCH 14/16] drm/i915: Dump pfit PGM_RATIOS as hex ville.syrjala
2016-03-16  9:00   ` Jani Nikula
2016-03-15 14:40 ` [PATCH 15/16] drm/i915: Hook up pfit for DSI ville.syrjala
2016-03-30 13:35   ` Jani Nikula
2016-03-15 14:40 ` [PATCH 16/16] drm/i915: Reject 'Center' scaling mode for eDP/DSI on GMCH platforms ville.syrjala
2016-03-30 13:36   ` Jani Nikula
2016-03-15 15:27 ` ✗ Fi.CI.BAT: failure for drm/i915: DSI and DPLL stuff for VLV/CHV mostly Patchwork
2016-04-01 19:12   ` Ville Syrjälä
2016-04-01 19:39     ` Chris Wilson
2016-04-01 19:47       ` Ville Syrjälä
2016-04-01 19:53         ` Chris Wilson
2016-04-12 18:39 ` [PATCH 00/16] " Ville Syrjälä

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