* [PATCH] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array
@ 2018-02-27 22:24 Manasi Navare
2018-02-27 23:11 ` ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Manasi Navare @ 2018-02-27 22:24 UTC (permalink / raw)
To: intel-gfx
default_rates[] array is a superset of all the link rates supported
by sink devices. DP 1.3 specification adds HBR3 (8.1Gbps) link rate
to the set of link rates supported by sink. This patch adds this rate
to default_rates[] array that gets used to populate the sink_rates[]
array limited by max rate obtained from DP_MAX_LINK_RATE DPCD register.
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2a3b3ae..f0766fb 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -103,7 +103,7 @@ static const int skl_rates[] = { 162000, 216000, 270000,
static const int cnl_rates[] = { 162000, 216000, 270000,
324000, 432000, 540000,
648000, 810000 };
-static const int default_rates[] = { 162000, 270000, 540000 };
+static const int default_rates[] = { 162000, 270000, 540000, 810000 };
/**
* intel_dp_is_edp - is the given port attached to an eDP panel (either CPU or PCH)
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array
2018-02-27 22:24 [PATCH] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array Manasi Navare
@ 2018-02-27 23:11 ` Patchwork
2018-02-28 0:27 ` ✓ Fi.CI.IGT: " Patchwork
2018-02-28 9:05 ` [PATCH] " Jani Nikula
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-02-27 23:11 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array
URL : https://patchwork.freedesktop.org/series/39071/
State : success
== Summary ==
Series 39071v1 drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array
https://patchwork.freedesktop.org/api/1.0/series/39071/revisions/1/mbox/
---- Known issues:
Test gem_ringfill:
Subgroup basic-default-hang:
dmesg-warn -> INCOMPLETE (fi-pnv-d510) fdo#101600
fdo#101600 https://bugs.freedesktop.org/show_bug.cgi?id=101600
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:415s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:423s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:373s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:485s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:285s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:477s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:485s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:462s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:454s
fi-cfl-8700k total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:394s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:559s
fi-cnl-y3 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:564s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:406s
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:283s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:507s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:385s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:407s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:445s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:409s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:454s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:489s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:446s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:495s
fi-pnv-d510 total:146 pass:113 dwarn:0 dfail:0 fail:0 skip:32
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:422s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:503s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:518s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:488s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:464s
fi-skl-guc total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:407s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:425s
fi-snb-2520m total:3 pass:2 dwarn:0 dfail:0 fail:0 skip:0
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:387s
af8578c6d4389dd9a51ddccc43b8ce4986e27131 drm-tip: 2018y-02m-27d-20h-28m-22s UTC integration manifest
5955d6f612b4 drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8181/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array
2018-02-27 22:24 [PATCH] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array Manasi Navare
2018-02-27 23:11 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-02-28 0:27 ` Patchwork
2018-02-28 9:05 ` [PATCH] " Jani Nikula
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-02-28 0:27 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array
URL : https://patchwork.freedesktop.org/series/39071/
State : success
== Summary ==
---- Known issues:
Test gem_eio:
Subgroup in-flight:
pass -> INCOMPLETE (shard-apl) fdo#104945
Subgroup in-flight-suspend:
pass -> SKIP (shard-snb) fdo#103375
Test kms_cursor_legacy:
Subgroup 2x-long-flip-vs-cursor-atomic:
pass -> FAIL (shard-hsw) fdo#104873
Test kms_flip:
Subgroup 2x-dpms-vs-vblank-race-interruptible:
fail -> PASS (shard-hsw) fdo#103060
Subgroup 2x-flip-vs-expired-vblank:
fail -> PASS (shard-hsw) fdo#102887
Subgroup plain-flip-fb-recreate:
fail -> PASS (shard-hsw) fdo#100368
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-indfb-fliptrack:
pass -> FAIL (shard-apl) fdo#103167
Subgroup fbc-1p-offscren-pri-indfb-draw-mmap-gtt:
skip -> PASS (shard-snb) fdo#101623
Test kms_rotation_crc:
Subgroup sprite-rotation-180:
fail -> PASS (shard-hsw) fdo#103925
Test kms_sysfs_edid_timing:
pass -> WARN (shard-apl) fdo#100047
fdo#104945 https://bugs.freedesktop.org/show_bug.cgi?id=104945
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#104873 https://bugs.freedesktop.org/show_bug.cgi?id=104873
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
shard-apl total:3426 pass:1803 dwarn:1 dfail:0 fail:8 skip:1612 time:11706s
shard-hsw total:3460 pass:1766 dwarn:1 dfail:0 fail:2 skip:1690 time:11840s
shard-snb total:3460 pass:1358 dwarn:1 dfail:0 fail:1 skip:2100 time:6562s
Blacklisted hosts:
shard-kbl total:3388 pass:1901 dwarn:1 dfail:0 fail:7 skip:1478 time:9168s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8181/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array
2018-02-27 22:24 [PATCH] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array Manasi Navare
2018-02-27 23:11 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-02-28 0:27 ` ✓ Fi.CI.IGT: " Patchwork
@ 2018-02-28 9:05 ` Jani Nikula
2018-02-28 17:16 ` Manasi Navare
2 siblings, 1 reply; 6+ messages in thread
From: Jani Nikula @ 2018-02-28 9:05 UTC (permalink / raw)
To: Manasi Navare, intel-gfx
On Tue, 27 Feb 2018, Manasi Navare <manasi.d.navare@intel.com> wrote:
> default_rates[] array is a superset of all the link rates supported
> by sink devices. DP 1.3 specification adds HBR3 (8.1Gbps) link rate
> to the set of link rates supported by sink. This patch adds this rate
> to default_rates[] array that gets used to populate the sink_rates[]
> array limited by max rate obtained from DP_MAX_LINK_RATE DPCD register.
>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 2a3b3ae..f0766fb 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -103,7 +103,7 @@ static const int skl_rates[] = { 162000, 216000, 270000,
> static const int cnl_rates[] = { 162000, 216000, 270000,
> 324000, 432000, 540000,
> 648000, 810000 };
> -static const int default_rates[] = { 162000, 270000, 540000 };
> +static const int default_rates[] = { 162000, 270000, 540000, 810000 };
Now this is part of the reason I wanted to do [1], especially the part
that switches to using hsw_rates and g4x_rates, instead of doing
ARRAY_SIZE(default_rates) - 1. This innocent looking patch now "enables"
HBR2 on g4x and HBR3 on hsw and bdw.
BR,
Jani.
[1] http://patchwork.freedesktop.org/patch/msgid/20180227105911.4485-1-jani.nikula@intel.com
>
> /**
> * intel_dp_is_edp - is the given port attached to an eDP panel (either CPU or PCH)
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array
2018-02-28 9:05 ` [PATCH] " Jani Nikula
@ 2018-02-28 17:16 ` Manasi Navare
2018-02-28 18:29 ` Jani Nikula
0 siblings, 1 reply; 6+ messages in thread
From: Manasi Navare @ 2018-02-28 17:16 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Wed, Feb 28, 2018 at 11:05:24AM +0200, Jani Nikula wrote:
> On Tue, 27 Feb 2018, Manasi Navare <manasi.d.navare@intel.com> wrote:
> > default_rates[] array is a superset of all the link rates supported
> > by sink devices. DP 1.3 specification adds HBR3 (8.1Gbps) link rate
> > to the set of link rates supported by sink. This patch adds this rate
> > to default_rates[] array that gets used to populate the sink_rates[]
> > array limited by max rate obtained from DP_MAX_LINK_RATE DPCD register.
> >
> > Cc: Jani Nikula <jani.nikula@linux.intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_dp.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 2a3b3ae..f0766fb 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -103,7 +103,7 @@ static const int skl_rates[] = { 162000, 216000, 270000,
> > static const int cnl_rates[] = { 162000, 216000, 270000,
> > 324000, 432000, 540000,
> > 648000, 810000 };
> > -static const int default_rates[] = { 162000, 270000, 540000 };
> > +static const int default_rates[] = { 162000, 270000, 540000, 810000 };
>
> Now this is part of the reason I wanted to do [1], especially the part
> that switches to using hsw_rates and g4x_rates, instead of doing
> ARRAY_SIZE(default_rates) - 1. This innocent looking patch now "enables"
> HBR2 on g4x and HBR3 on hsw and bdw.
>
> BR,
> Jani.
>
Oh yes I didnt realize that default rates are also getting used to populate
the source rates for HSW and g4x. Yes so localized or not, we definetly need to separate
out the hsw and g4x rates. and then we can add 810000 in the array and call it dp_rates
like your patch does.
I will try to combine your patch with this and resubmit.
Manasi
>
> [1] http://patchwork.freedesktop.org/patch/msgid/20180227105911.4485-1-jani.nikula@intel.com
>
>
> >
> > /**
> > * intel_dp_is_edp - is the given port attached to an eDP panel (either CPU or PCH)
>
> --
> Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array
2018-02-28 17:16 ` Manasi Navare
@ 2018-02-28 18:29 ` Jani Nikula
0 siblings, 0 replies; 6+ messages in thread
From: Jani Nikula @ 2018-02-28 18:29 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
On Wed, 28 Feb 2018, Manasi Navare <manasi.d.navare@intel.com> wrote:
> On Wed, Feb 28, 2018 at 11:05:24AM +0200, Jani Nikula wrote:
>> On Tue, 27 Feb 2018, Manasi Navare <manasi.d.navare@intel.com> wrote:
>> > default_rates[] array is a superset of all the link rates supported
>> > by sink devices. DP 1.3 specification adds HBR3 (8.1Gbps) link rate
>> > to the set of link rates supported by sink. This patch adds this rate
>> > to default_rates[] array that gets used to populate the sink_rates[]
>> > array limited by max rate obtained from DP_MAX_LINK_RATE DPCD register.
>> >
>> > Cc: Jani Nikula <jani.nikula@linux.intel.com>
>> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
>> > ---
>> > drivers/gpu/drm/i915/intel_dp.c | 2 +-
>> > 1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> > index 2a3b3ae..f0766fb 100644
>> > --- a/drivers/gpu/drm/i915/intel_dp.c
>> > +++ b/drivers/gpu/drm/i915/intel_dp.c
>> > @@ -103,7 +103,7 @@ static const int skl_rates[] = { 162000, 216000, 270000,
>> > static const int cnl_rates[] = { 162000, 216000, 270000,
>> > 324000, 432000, 540000,
>> > 648000, 810000 };
>> > -static const int default_rates[] = { 162000, 270000, 540000 };
>> > +static const int default_rates[] = { 162000, 270000, 540000, 810000 };
>>
>> Now this is part of the reason I wanted to do [1], especially the part
>> that switches to using hsw_rates and g4x_rates, instead of doing
>> ARRAY_SIZE(default_rates) - 1. This innocent looking patch now "enables"
>> HBR2 on g4x and HBR3 on hsw and bdw.
>>
>> BR,
>> Jani.
>>
>
> Oh yes I didnt realize that default rates are also getting used to populate
> the source rates for HSW and g4x. Yes so localized or not, we definetly need to separate
> out the hsw and g4x rates. and then we can add 810000 in the array and call it dp_rates
> like your patch does.
>
> I will try to combine your patch with this and resubmit.
Combine what part? Please don't conflate the two into one.
BR,
Jani.
>
> Manasi
>
>>
>> [1] http://patchwork.freedesktop.org/patch/msgid/20180227105911.4485-1-jani.nikula@intel.com
>>
>>
>> >
>> > /**
>> > * intel_dp_is_edp - is the given port attached to an eDP panel (either CPU or PCH)
>>
>> --
>> Jani Nikula, Intel Open Source Technology Center
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-02-28 18:29 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-02-27 22:24 [PATCH] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array Manasi Navare
2018-02-27 23:11 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-02-28 0:27 ` ✓ Fi.CI.IGT: " Patchwork
2018-02-28 9:05 ` [PATCH] " Jani Nikula
2018-02-28 17:16 ` Manasi Navare
2018-02-28 18:29 ` Jani Nikula
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