* [PATCH 00/16] Move chipset specific stuff to struct intel_chipset
@ 2011-06-07 19:34 Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 01/16] intel: Use gen number instead of PCI ID in decoder Kristian Høgsberg
` (16 more replies)
0 siblings, 17 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
Hi,
Here's a handful of patches that try to replace most of our chipset
feature checking with data in a new struct intel_chipset. It uses the
new PCI ID list infrastructure and eliminates all IS_FOO macros in
favor of a per-family chipset info struct. Actually, I was surprised
how much in the driver is really just a gen check, but there are a few
cases where we have to check a certain feature, as well as all the
gen4+ urb and thread limits (includes the recent fix for swapped VS
entry counts).
The series compiles and passes casual testing for me, but I've not run
piglit on it yet.
Kristian
Kristian Høgsberg (16):
intel: Use gen number instead of PCI ID in decoder
intel: Use the PCI ID map for determining chipset gen
intel: IS_9XX is just gen >= 3
intel: Remove unused IS_915 macro
intel: Replace intel_screen::gen with the chipset struct
intel: Add a is_945 bit to chipinfo and use that instead of IS_945
intel: Remove unused IS_MOBILE and IS_IGD* macros
intel: Replace single use of IS_965 with gen check
intel: Drop unused IS_GEN4 macro
intel: Drop unused IS_GEN5-7 macros
intel: Put urb and thread limits into the chipset struct
intel: Drop unused IS_SNB/IVB_GT1/2 macros
intel: Replace IS_G4X macro with an is_g4x bit in the chipset struct
intel: Add is_855ish for handling 855 and 865 specific lod clamping
intel: Get chipset name from PCI ID list
intel: Remove intel_chipsets.h
include/pci_ids/i915_pci_ids.h | 30 ++--
include/pci_ids/i965_pci_ids.h | 54 ++++----
include/pci_ids/pci_id_driver_map.h | 4 +-
src/mesa/drivers/dri/i915/Makefile | 2 +-
src/mesa/drivers/dri/i915/i830_texstate.c | 4 +-
src/mesa/drivers/dri/i965/Makefile | 2 +-
src/mesa/drivers/dri/i965/brw_context.c | 53 +-------
src/mesa/drivers/dri/intel/intel_batchbuffer.c | 2 +-
src/mesa/drivers/dri/intel/intel_chipset.h | 164 ------------------------
src/mesa/drivers/dri/intel/intel_context.c | 138 ++------------------
src/mesa/drivers/dri/intel/intel_decode.c | 43 +++---
src/mesa/drivers/dri/intel/intel_decode.h | 2 +-
src/mesa/drivers/dri/intel/intel_extensions.c | 1 -
src/mesa/drivers/dri/intel/intel_screen.c | 142 +++++++++++++++++----
src/mesa/drivers/dri/intel/intel_screen.h | 14 ++-
15 files changed, 221 insertions(+), 434 deletions(-)
delete mode 100644 src/mesa/drivers/dri/intel/intel_chipset.h
--
1.7.4.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 01/16] intel: Use gen number instead of PCI ID in decoder
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-08 0:52 ` Eric Anholt
2011-06-07 19:34 ` [PATCH 02/16] intel: Use the PCI ID map for determining chipset gen Kristian Høgsberg
` (15 subsequent siblings)
16 siblings, 1 reply; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/intel/intel_batchbuffer.c | 2 +-
src/mesa/drivers/dri/intel/intel_chipset.h | 3 --
src/mesa/drivers/dri/intel/intel_decode.c | 42 ++++++++++++------------
src/mesa/drivers/dri/intel/intel_decode.h | 2 +-
4 files changed, 23 insertions(+), 26 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
index 377989b..9e7198f 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -109,7 +109,7 @@ do_flush_locked(struct intel_context *intel)
if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) {
intel_decode(batch->map, batch->used,
batch->bo->offset,
- intel->intelScreen->deviceID, GL_TRUE);
+ intel->gen, GL_TRUE);
if (intel->vtbl.debug_batch != NULL)
intel->vtbl.debug_batch(intel);
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index ca5c295..2e4b11e 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -128,9 +128,6 @@
devid == PCI_CHIP_I946_GZ || \
IS_G4X(devid))
-/* Compat macro for intel_decode.c */
-#define IS_IRONLAKE(devid) IS_GEN5(devid)
-
#define IS_SNB_GT1(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \
devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \
devid == PCI_CHIP_SANDYBRIDGE_S)
diff --git a/src/mesa/drivers/dri/intel/intel_decode.c b/src/mesa/drivers/dri/intel/intel_decode.c
index 688b8fe..5400823 100644
--- a/src/mesa/drivers/dri/intel/intel_decode.c
+++ b/src/mesa/drivers/dri/intel/intel_decode.c
@@ -789,7 +789,7 @@ i915_decode_instruction(uint32_t *data, uint32_t hw_offset,
static int
decode_3d_1d(uint32_t *data, int count,
uint32_t hw_offset,
- uint32_t devid,
+ uint32_t gen,
int *failures)
{
unsigned int len, i, c, idx, word, map, sampler, instr;
@@ -889,7 +889,7 @@ decode_3d_1d(uint32_t *data, int count,
BUFFER_FAIL(count, len, "3DSTATE_LOAD_STATE_IMMEDIATE_1");
/* save vertex state for decode */
- if (IS_9XX(devid)) {
+ if (gen >= 3) {
if (word == 2) {
saved_s2_set = 1;
saved_s2 = data[i];
@@ -1021,7 +1021,7 @@ decode_3d_1d(uint32_t *data, int count,
}
return len;
case 0x01:
- if (!IS_9XX(devid))
+ if (gen < 3)
break;
instr_out(data, hw_offset, 0, "3DSTATE_SAMPLER_STATE\n");
instr_out(data, hw_offset, 1, "mask\n");
@@ -1107,7 +1107,7 @@ decode_3d_1d(uint32_t *data, int count,
for (idx = 0; idx < ARRAY_SIZE(opcodes_3d_1d); idx++)
{
opcode_3d_1d = &opcodes_3d_1d[idx];
- if (opcode_3d_1d->i830_only && IS_9XX(devid))
+ if (opcode_3d_1d->i830_only && gen >= 3)
continue;
if (((data[0] & 0x00ff0000) >> 16) == opcode_3d_1d->opcode) {
@@ -1340,7 +1340,7 @@ out:
}
static int
-decode_3d(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid, int *failures)
+decode_3d(uint32_t *data, int count, uint32_t hw_offset, uint32_t gen, int *failures)
{
uint32_t opcode;
unsigned int idx;
@@ -1368,7 +1368,7 @@ decode_3d(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid, int *fa
case 0x1f:
return decode_3d_primitive(data, count, hw_offset, failures);
case 0x1d:
- return decode_3d_1d(data, count, hw_offset, devid, failures);
+ return decode_3d_1d(data, count, hw_offset, gen, failures);
case 0x1c:
return decode_3d_1c(data, count, hw_offset, failures);
}
@@ -1563,7 +1563,7 @@ state_max_out(uint32_t *data, uint32_t hw_offset, unsigned int index,
}
static int
-decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid, int *failures)
+decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, uint32_t gen, int *failures)
{
uint32_t opcode;
unsigned int idx, len;
@@ -1641,9 +1641,9 @@ decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid, int
data[1] & ~0x3f, ((data[1] & 0x3f) + 1) * 64);
return len;
case 0x6101:
- if (IS_GEN6(devid))
+ if (gen == 6)
sba_len = 10;
- else if (IS_IRONLAKE(devid))
+ else if (gen == 5)
sba_len = 8;
else
sba_len = 6;
@@ -1659,17 +1659,17 @@ decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid, int
state_base_out(data, hw_offset, i++, "general");
state_base_out(data, hw_offset, i++, "surface");
- if (IS_GEN6(devid))
+ if (gen == 6)
state_base_out(data, hw_offset, i++, "dynamic");
state_base_out(data, hw_offset, i++, "indirect");
- if (IS_IRONLAKE(devid) || IS_GEN6(devid))
+ if (gen == 5 || gen == 6)
state_base_out(data, hw_offset, i++, "instruction");
state_max_out(data, hw_offset, i++, "general");
- if (IS_GEN6(devid))
+ if (gen == 6)
state_max_out(data, hw_offset, i++, "dynamic");
state_max_out(data, hw_offset, i++, "indirect");
- if (IS_IRONLAKE(devid) || IS_GEN6(devid))
+ if (gen == 5 || gen == 6)
state_max_out(data, hw_offset, i++, "instruction");
return len;
@@ -1909,7 +1909,7 @@ decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid, int
}
static int
-decode_3d_i830(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid, int *failures)
+decode_3d_i830(uint32_t *data, int count, uint32_t hw_offset, uint32_t gen, int *failures)
{
unsigned int idx;
uint32_t opcode;
@@ -1944,7 +1944,7 @@ decode_3d_i830(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid, in
case 0x1f:
return decode_3d_primitive(data, count, hw_offset, failures);
case 0x1d:
- return decode_3d_1d(data, count, hw_offset, devid, failures);
+ return decode_3d_1d(data, count, hw_offset, gen, failures);
case 0x1c:
return decode_3d_1c(data, count, hw_offset, failures);
}
@@ -1988,7 +1988,7 @@ decode_3d_i830(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid, in
int
intel_decode(uint32_t *data, int count,
uint32_t hw_offset,
- uint32_t devid,
+ uint32_t gen,
uint32_t ignore_end_of_batchbuffer)
{
int ret;
@@ -2023,18 +2023,18 @@ intel_decode(uint32_t *data, int count,
hw_offset + index * 4, &failures);
break;
case 0x3:
- if (IS_965(devid)) {
+ if (gen >= 4) {
index += decode_3d_965(data + index, count - index,
hw_offset + index * 4,
- devid, &failures);
- } else if (IS_9XX(devid)) {
+ gen, &failures);
+ } else if (gen >= 3) {
index += decode_3d(data + index, count - index,
hw_offset + index * 4,
- devid, &failures);
+ gen, &failures);
} else {
index += decode_3d_i830(data + index, count - index,
hw_offset + index * 4,
- devid, &failures);
+ gen, &failures);
}
break;
default:
diff --git a/src/mesa/drivers/dri/intel/intel_decode.h b/src/mesa/drivers/dri/intel/intel_decode.h
index a13b075..a11bcff 100644
--- a/src/mesa/drivers/dri/intel/intel_decode.h
+++ b/src/mesa/drivers/dri/intel/intel_decode.h
@@ -25,7 +25,7 @@
*
*/
-int intel_decode(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid,
+int intel_decode(uint32_t *data, int count, uint32_t hw_offset, uint32_t gen,
uint32_t ignore_end_of_batchbuffer);
void intel_decode_context_set_head_tail(uint32_t head, uint32_t tail);
void intel_decode_context_reset(void);
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 02/16] intel: Use the PCI ID map for determining chipset gen
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 01/16] intel: Use gen number instead of PCI ID in decoder Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 03/16] intel: IS_9XX is just gen >= 3 Kristian Høgsberg
` (14 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/i915/Makefile | 2 +-
src/mesa/drivers/dri/i965/Makefile | 2 +-
src/mesa/drivers/dri/intel/intel_screen.c | 96 +++++++++++++++++++++++------
3 files changed, 80 insertions(+), 20 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/Makefile b/src/mesa/drivers/dri/i915/Makefile
index 79e03f2..16f4316 100644
--- a/src/mesa/drivers/dri/i915/Makefile
+++ b/src/mesa/drivers/dri/i915/Makefile
@@ -58,7 +58,7 @@ C_SOURCES = \
ASM_SOURCES =
-DRIVER_DEFINES = -I../intel -DI915 \
+DRIVER_DEFINES = -I../intel -I$(TOP)/include -DI915 \
$(shell pkg-config libdrm --atleast-version=2.3.1 \
&& echo "-DDRM_VBLANK_FLIP=DRM_VBLANK_FLIP")
diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile
index 44f28cd..ed1497b 100644
--- a/src/mesa/drivers/dri/i965/Makefile
+++ b/src/mesa/drivers/dri/i965/Makefile
@@ -128,7 +128,7 @@ CXX_SOURCES = \
ASM_SOURCES =
-DRIVER_DEFINES = -I../intel
+DRIVER_DEFINES = -I../intel -I$(TOP)/include
INCLUDES += $(INTEL_CFLAGS)
DRI_LIB_DEPS += $(INTEL_LIBS)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index deca11d..9939b4d 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -432,6 +432,37 @@ intelDestroyBuffer(__DRIdrawable * driDrawPriv)
* init-designated function to register chipids and createcontext
* functions.
*/
+
+struct intel_chipset {
+ int gen;
+};
+
+#define CHIPSET(id, name, info) { id, &intel_chipset_##info },
+
+
+struct intel_chipset_map {
+ int device_id;
+ const struct intel_chipset *chipset;
+};
+
+#ifdef I915
+
+static const struct intel_chipset intel_chipset_i8xx = {
+ .gen = 2
+};
+
+static const struct intel_chipset intel_chipset_i915 = {
+ .gen = 3
+};
+
+static const struct intel_chipset intel_chipset_i945 = {
+ .gen = 3
+};
+
+static const struct intel_chipset_map chipset_map[] = {
+#include "pci_ids/i915_pci_ids.h"
+};
+
extern GLboolean i830CreateContext(const struct gl_config * mesaVis,
__DRIcontext * driContextPriv,
void *sharedContextPrivate);
@@ -440,21 +471,58 @@ extern GLboolean i915CreateContext(int api,
const struct gl_config * mesaVis,
__DRIcontext * driContextPriv,
void *sharedContextPrivate);
+
+#else
+
+static const struct intel_chipset intel_chipset_i965 = {
+ .gen = 4
+};
+
+static const struct intel_chipset intel_chipset_g4x = {
+ .gen = 4
+};
+
+static const struct intel_chipset intel_chipset_ilk = {
+ .gen = 5
+};
+
+static const struct intel_chipset intel_chipset_snb_gt1 = {
+ .gen = 6
+};
+
+static const struct intel_chipset intel_chipset_snb_gt2 = {
+ .gen = 6
+};
+
+static const struct intel_chipset intel_chipset_ivb_gt1 = {
+ .gen = 7
+};
+
+static const struct intel_chipset intel_chipset_ivb_gt2 = {
+ .gen = 7
+};
+
+static const struct intel_chipset_map chipset_map[] = {
+#include "pci_ids/i965_pci_ids.h"
+};
+
extern GLboolean brwCreateContext(int api,
const struct gl_config * mesaVis,
__DRIcontext * driContextPriv,
void *sharedContextPrivate);
+#endif
+
static GLboolean
intelCreateContext(gl_api api,
const struct gl_config * mesaVis,
__DRIcontext * driContextPriv,
void *sharedContextPrivate)
{
+#ifdef I915
__DRIscreen *sPriv = driContextPriv->driScreenPriv;
struct intel_screen *intelScreen = sPriv->private;
-#ifdef I915
if (IS_9XX(intelScreen->deviceID)) {
if (!IS_965(intelScreen->deviceID)) {
return i915CreateContext(api, mesaVis, driContextPriv,
@@ -465,12 +533,8 @@ intelCreateContext(gl_api api,
return i830CreateContext(mesaVis, driContextPriv, sharedContextPrivate);
}
#else
- if (IS_965(intelScreen->deviceID))
- return brwCreateContext(api, mesaVis,
- driContextPriv, sharedContextPrivate);
+ return brwCreateContext(api, mesaVis, driContextPriv, sharedContextPrivate);
#endif
- fprintf(stderr, "Unrecognized deviceID 0x%x\n", intelScreen->deviceID);
- return GL_FALSE;
}
static GLboolean
@@ -520,6 +584,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
GLenum fb_type[3];
unsigned int api_mask;
char *devid_override;
+ int i;
static const GLenum back_buffer_modes[] = {
GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
@@ -556,18 +621,13 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
intelScreen->deviceID = strtod(devid_override, NULL);
}
- if (IS_GEN7(intelScreen->deviceID)) {
- intelScreen->gen = 7;
- } else if (IS_GEN6(intelScreen->deviceID)) {
- intelScreen->gen = 6;
- } else if (IS_GEN5(intelScreen->deviceID)) {
- intelScreen->gen = 5;
- } else if (IS_965(intelScreen->deviceID)) {
- intelScreen->gen = 4;
- } else if (IS_9XX(intelScreen->deviceID)) {
- intelScreen->gen = 3;
- } else {
- intelScreen->gen = 2;
+ for (i = 0; i < Elements(chipset_map); i++)
+ if (chipset_map[i].device_id == intelScreen->deviceID)
+ intelScreen->gen = chipset_map[i].chipset->gen;
+ if (intelScreen->gen == 0) {
+ fprintf(stderr, "\nERROR! Unrecognized chipset:: 0x%04x\n",
+ intelScreen->deviceID);
+ return GL_FALSE;
}
api_mask = (1 << __DRI_API_OPENGL);
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 03/16] intel: IS_9XX is just gen >= 3
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 01/16] intel: Use gen number instead of PCI ID in decoder Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 02/16] intel: Use the PCI ID map for determining chipset gen Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 04/16] intel: Remove unused IS_915 macro Kristian Høgsberg
` (13 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/intel/intel_chipset.h | 4 ----
src/mesa/drivers/dri/intel/intel_context.c | 2 +-
src/mesa/drivers/dri/intel/intel_screen.c | 10 ++++------
3 files changed, 5 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index 2e4b11e..6c82e4d 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -155,7 +155,3 @@
IS_GEN5(devid) || \
IS_GEN6(devid) || \
IS_GEN7(devid))
-
-#define IS_9XX(devid) (IS_915(devid) || \
- IS_945(devid) || \
- IS_965(devid))
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 2ea52c2..01231ee 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -730,7 +730,7 @@ intelInitContext(struct intel_context *intel,
intel->has_luminance_srgb = GL_TRUE;
intel->is_g4x = GL_TRUE;
}
- } else if (IS_9XX(intel->intelScreen->deviceID)) {
+ } else if (intel->gen >= 3) {
if (IS_945(intel->intelScreen->deviceID)) {
intel->is_945 = GL_TRUE;
}
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 9939b4d..ee842a5 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -523,11 +523,9 @@ intelCreateContext(gl_api api,
__DRIscreen *sPriv = driContextPriv->driScreenPriv;
struct intel_screen *intelScreen = sPriv->private;
- if (IS_9XX(intelScreen->deviceID)) {
- if (!IS_965(intelScreen->deviceID)) {
- return i915CreateContext(api, mesaVis, driContextPriv,
- sharedContextPrivate);
- }
+ if (intelScreen->gen == 3) {
+ return i915CreateContext(api, mesaVis, driContextPriv,
+ sharedContextPrivate);
} else {
intelScreen->no_vbo = GL_TRUE;
return i830CreateContext(mesaVis, driContextPriv, sharedContextPrivate);
@@ -638,7 +636,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
api_mask |= (1 << __DRI_API_GLES2);
#endif
- if (IS_9XX(intelScreen->deviceID) || IS_965(intelScreen->deviceID))
+ if (intelScreen->gen >= 3)
psp->api_mask = api_mask;
if (!intel_init_bufmgr(intelScreen))
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 04/16] intel: Remove unused IS_915 macro
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (2 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 03/16] intel: IS_9XX is just gen >= 3 Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 05/16] intel: Replace intel_screen::gen with the chipset struct Kristian Høgsberg
` (12 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/intel/intel_chipset.h | 4 ----
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index 6c82e4d..5d4aaab 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -109,10 +109,6 @@
#define IS_ILM(devid) (devid == PCI_CHIP_ILM_G)
#define IS_GEN5(devid) (IS_ILD(devid) || IS_ILM(devid))
-#define IS_915(devid) (devid == PCI_CHIP_I915_G || \
- devid == PCI_CHIP_E7221_G || \
- devid == PCI_CHIP_I915_GM)
-
#define IS_945(devid) (devid == PCI_CHIP_I945_G || \
devid == PCI_CHIP_I945_GM || \
devid == PCI_CHIP_I945_GME || \
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 05/16] intel: Replace intel_screen::gen with the chipset struct
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (3 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 04/16] intel: Remove unused IS_915 macro Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 06/16] intel: Add a is_945 bit to chipinfo and use that instead of IS_945 Kristian Høgsberg
` (11 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/intel/intel_context.c | 2 +-
src/mesa/drivers/dri/intel/intel_screen.c | 14 +++++---------
src/mesa/drivers/dri/intel/intel_screen.h | 6 +++++-
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 01231ee..9765086 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -710,7 +710,7 @@ intelInitContext(struct intel_context *intel,
intel->driFd = sPriv->fd;
intel->has_xrgb_textures = GL_TRUE;
- intel->gen = intelScreen->gen;
+ intel->gen = intelScreen->chipset.gen;
if (IS_GEN7(intel->intelScreen->deviceID)) {
intel->needs_ff_sync = GL_TRUE;
intel->has_luminance_srgb = GL_TRUE;
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index ee842a5..bce5a17 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -433,10 +433,6 @@ intelDestroyBuffer(__DRIdrawable * driDrawPriv)
* functions.
*/
-struct intel_chipset {
- int gen;
-};
-
#define CHIPSET(id, name, info) { id, &intel_chipset_##info },
@@ -523,7 +519,7 @@ intelCreateContext(gl_api api,
__DRIscreen *sPriv = driContextPriv->driScreenPriv;
struct intel_screen *intelScreen = sPriv->private;
- if (intelScreen->gen == 3) {
+ if (intelScreen->chipset.gen == 3) {
return i915CreateContext(api, mesaVis, driContextPriv,
sharedContextPrivate);
} else {
@@ -621,8 +617,8 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
for (i = 0; i < Elements(chipset_map); i++)
if (chipset_map[i].device_id == intelScreen->deviceID)
- intelScreen->gen = chipset_map[i].chipset->gen;
- if (intelScreen->gen == 0) {
+ intelScreen->chipset = *chipset_map[i].chipset;
+ if (intelScreen->chipset.gen == 0) {
fprintf(stderr, "\nERROR! Unrecognized chipset:: 0x%04x\n",
intelScreen->deviceID);
return GL_FALSE;
@@ -636,7 +632,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
api_mask |= (1 << __DRI_API_GLES2);
#endif
- if (intelScreen->gen >= 3)
+ if (intelScreen->chipset.gen >= 3)
psp->api_mask = api_mask;
if (!intel_init_bufmgr(intelScreen))
@@ -749,7 +745,7 @@ intelAllocateBuffer(__DRIscreen *screen,
if ((attachment == __DRI_BUFFER_DEPTH ||
attachment == __DRI_BUFFER_STENCIL ||
attachment == __DRI_BUFFER_DEPTH_STENCIL) &&
- intelScreen->gen >= 4)
+ intelScreen->chipset.gen >= 4)
tiling = I915_TILING_Y;
else
tiling = I915_TILING_X;
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index 4613c98..3d001aa 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -34,10 +34,14 @@
#include "i915_drm.h"
#include "xmlconfig.h"
+struct intel_chipset {
+ int gen;
+};
+
struct intel_screen
{
int deviceID;
- int gen;
+ struct intel_chipset chipset;
int logTextureGranularity;
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 06/16] intel: Add a is_945 bit to chipinfo and use that instead of IS_945
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (4 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 05/16] intel: Replace intel_screen::gen with the chipset struct Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 07/16] intel: Remove unused IS_MOBILE and IS_IGD* macros Kristian Høgsberg
` (10 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/intel/intel_chipset.h | 7 -------
src/mesa/drivers/dri/intel/intel_context.c | 8 +++-----
src/mesa/drivers/dri/intel/intel_screen.c | 2 +-
src/mesa/drivers/dri/intel/intel_screen.h | 1 +
4 files changed, 5 insertions(+), 13 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index 5d4aaab..66f14fd 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -109,13 +109,6 @@
#define IS_ILM(devid) (devid == PCI_CHIP_ILM_G)
#define IS_GEN5(devid) (IS_ILD(devid) || IS_ILM(devid))
-#define IS_945(devid) (devid == PCI_CHIP_I945_G || \
- devid == PCI_CHIP_I945_GM || \
- devid == PCI_CHIP_I945_GME || \
- devid == PCI_CHIP_G33_G || \
- devid == PCI_CHIP_Q33_G || \
- devid == PCI_CHIP_Q35_G || IS_IGD(devid))
-
#define IS_GEN4(devid) (devid == PCI_CHIP_I965_G || \
devid == PCI_CHIP_I965_Q || \
devid == PCI_CHIP_I965_G_1 || \
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 9765086..453292c 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -730,17 +730,15 @@ intelInitContext(struct intel_context *intel,
intel->has_luminance_srgb = GL_TRUE;
intel->is_g4x = GL_TRUE;
}
- } else if (intel->gen >= 3) {
- if (IS_945(intel->intelScreen->deviceID)) {
- intel->is_945 = GL_TRUE;
- }
- } else {
+ } else if (intel->gen == 2) {
if (intel->intelScreen->deviceID == PCI_CHIP_I830_M ||
intel->intelScreen->deviceID == PCI_CHIP_845_G) {
intel->has_xrgb_textures = GL_FALSE;
}
}
+ intel->is_945 = intelScreen->chipset.is_945;
+
intel_override_hiz(intel);
intel_override_separate_stencil(intel);
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index bce5a17..86b4000 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -452,7 +452,7 @@ static const struct intel_chipset intel_chipset_i915 = {
};
static const struct intel_chipset intel_chipset_i945 = {
- .gen = 3
+ .gen = 3, .is_945 = 1
};
static const struct intel_chipset_map chipset_map[] = {
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index 3d001aa..bfcc20d 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -36,6 +36,7 @@
struct intel_chipset {
int gen;
+ GLboolean is_945;
};
struct intel_screen
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 07/16] intel: Remove unused IS_MOBILE and IS_IGD* macros
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (5 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 06/16] intel: Add a is_945 bit to chipinfo and use that instead of IS_945 Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 08/16] intel: Replace single use of IS_965 with gen check Kristian Høgsberg
` (9 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/intel/intel_chipset.h | 14 --------------
1 files changed, 0 insertions(+), 14 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index 66f14fd..37239fc 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -49,10 +49,6 @@
#define PCI_CHIP_IGD_GM 0xA011
#define PCI_CHIP_IGD_G 0xA001
-#define IS_IGDGM(devid) (devid == PCI_CHIP_IGD_GM)
-#define IS_IGDG(devid) (devid == PCI_CHIP_IGD_G)
-#define IS_IGD(devid) (IS_IGDG(devid) || IS_IGDGM(devid))
-
#define PCI_CHIP_I965_G 0x29A2
#define PCI_CHIP_I965_Q 0x2992
#define PCI_CHIP_I965_G_1 0x2982
@@ -86,16 +82,6 @@
#define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166
#define PCI_CHIP_IVYBRIDGE_S_GT1 0x015a /* Server */
-#define IS_MOBILE(devid) (devid == PCI_CHIP_I855_GM || \
- devid == PCI_CHIP_I915_GM || \
- devid == PCI_CHIP_I945_GM || \
- devid == PCI_CHIP_I945_GME || \
- devid == PCI_CHIP_I965_GM || \
- devid == PCI_CHIP_I965_GME || \
- devid == PCI_CHIP_GM45_GM || \
- IS_IGD(devid) || \
- devid == PCI_CHIP_ILM_G)
-
#define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \
devid == PCI_CHIP_Q45_G || \
devid == PCI_CHIP_G45_G || \
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 08/16] intel: Replace single use of IS_965 with gen check
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (6 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 07/16] intel: Remove unused IS_MOBILE and IS_IGD* macros Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 09/16] intel: Drop unused IS_GEN4 macro Kristian Høgsberg
` (8 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/intel/intel_chipset.h | 6 ------
src/mesa/drivers/dri/intel/intel_context.c | 2 +-
2 files changed, 1 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index 37239fc..ca386b5 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -124,9 +124,3 @@
#define IS_IVYBRIDGE(devid) (IS_IVB_GT1(devid) || IS_IVB_GT2(devid))
#define IS_GEN7(devid) IS_IVYBRIDGE(devid)
-
-#define IS_965(devid) (IS_GEN4(devid) || \
- IS_G4X(devid) || \
- IS_GEN5(devid) || \
- IS_GEN6(devid) || \
- IS_GEN7(devid))
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 453292c..acf7182 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -725,7 +725,7 @@ intelInitContext(struct intel_context *intel,
} else if (IS_GEN5(intel->intelScreen->deviceID)) {
intel->needs_ff_sync = GL_TRUE;
intel->has_luminance_srgb = GL_TRUE;
- } else if (IS_965(intel->intelScreen->deviceID)) {
+ } else if (intel->intelScreen->chipset.gen == 4) {
if (IS_G4X(intel->intelScreen->deviceID)) {
intel->has_luminance_srgb = GL_TRUE;
intel->is_g4x = GL_TRUE;
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 09/16] intel: Drop unused IS_GEN4 macro
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (7 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 08/16] intel: Replace single use of IS_965 with gen check Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 10/16] intel: Drop unused IS_GEN5-7 macros Kristian Høgsberg
` (7 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/intel/intel_chipset.h | 8 --------
1 files changed, 0 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index ca386b5..3e11f64 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -95,14 +95,6 @@
#define IS_ILM(devid) (devid == PCI_CHIP_ILM_G)
#define IS_GEN5(devid) (IS_ILD(devid) || IS_ILM(devid))
-#define IS_GEN4(devid) (devid == PCI_CHIP_I965_G || \
- devid == PCI_CHIP_I965_Q || \
- devid == PCI_CHIP_I965_G_1 || \
- devid == PCI_CHIP_I965_GM || \
- devid == PCI_CHIP_I965_GME || \
- devid == PCI_CHIP_I946_GZ || \
- IS_G4X(devid))
-
#define IS_SNB_GT1(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \
devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \
devid == PCI_CHIP_SANDYBRIDGE_S)
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 10/16] intel: Drop unused IS_GEN5-7 macros
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (8 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 09/16] intel: Drop unused IS_GEN4 macro Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 11/16] intel: Put urb and thread limits into the chipset struct Kristian Høgsberg
` (6 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/intel/intel_chipset.h | 10 ----------
src/mesa/drivers/dri/intel/intel_context.c | 6 +++---
2 files changed, 3 insertions(+), 13 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index 3e11f64..979cd0b 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -91,10 +91,6 @@
#define IS_GM45(devid) (devid == PCI_CHIP_GM45_GM)
#define IS_G4X(devid) (IS_G45(devid) || IS_GM45(devid))
-#define IS_ILD(devid) (devid == PCI_CHIP_ILD_G)
-#define IS_ILM(devid) (devid == PCI_CHIP_ILM_G)
-#define IS_GEN5(devid) (IS_ILD(devid) || IS_ILM(devid))
-
#define IS_SNB_GT1(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \
devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \
devid == PCI_CHIP_SANDYBRIDGE_S)
@@ -104,15 +100,9 @@
devid == PCI_CHIP_SANDYBRIDGE_M_GT2 || \
devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS)
-#define IS_GEN6(devid) (IS_SNB_GT1(devid) || IS_SNB_GT2(devid))
-
#define IS_IVB_GT1(devid) (devid == PCI_CHIP_IVYBRIDGE_GT1 || \
devid == PCI_CHIP_IVYBRIDGE_M_GT1 || \
devid == PCI_CHIP_IVYBRIDGE_S_GT1)
#define IS_IVB_GT2(devid) (devid == PCI_CHIP_IVYBRIDGE_GT2 || \
devid == PCI_CHIP_IVYBRIDGE_M_GT2)
-
-#define IS_IVYBRIDGE(devid) (IS_IVB_GT1(devid) || IS_IVB_GT2(devid))
-
-#define IS_GEN7(devid) IS_IVYBRIDGE(devid)
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index acf7182..f696c3f 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -711,18 +711,18 @@ intelInitContext(struct intel_context *intel,
intel->has_xrgb_textures = GL_TRUE;
intel->gen = intelScreen->chipset.gen;
- if (IS_GEN7(intel->intelScreen->deviceID)) {
+ if (intel->intelScreen->chipset.gen == 7) {
intel->needs_ff_sync = GL_TRUE;
intel->has_luminance_srgb = GL_TRUE;
/* FINISHME: Enable intel->has_separate_stencil on Gen7. */
/* FINISHME: Enable intel->must_use_separate_stencil on Gen7. */
/* FINISHME: Enable intel->has_hiz on Gen7. */
- } else if (IS_GEN6(intel->intelScreen->deviceID)) {
+ } else if (intel->intelScreen->chipset.gen == 6) {
intel->needs_ff_sync = GL_TRUE;
intel->has_luminance_srgb = GL_TRUE;
/* FINISHME: Enable intel->has_separate_stencil on Gen6. */
/* FINISHME: Enable intel->has_hiz on Gen6. */
- } else if (IS_GEN5(intel->intelScreen->deviceID)) {
+ } else if (intel->intelScreen->chipset.gen == 5) {
intel->needs_ff_sync = GL_TRUE;
intel->has_luminance_srgb = GL_TRUE;
} else if (intel->intelScreen->chipset.gen == 4) {
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 11/16] intel: Put urb and thread limits into the chipset struct
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (9 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 10/16] intel: Drop unused IS_GEN5-7 macros Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 12/16] intel: Drop unused IS_SNB/IVB_GT1/2 macros Kristian Høgsberg
` (5 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/i965/brw_context.c | 53 ++++-------------------------
src/mesa/drivers/dri/intel/intel_screen.c | 46 +++++++++++++++++++++----
src/mesa/drivers/dri/intel/intel_screen.h | 7 ++++
3 files changed, 53 insertions(+), 53 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index d6a99ab..e2263d5 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -177,53 +177,14 @@ GLboolean brwCreateContext( int api,
brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
}
- /* WM maximum threads is number of EUs times number of threads per EU. */
- if (intel->gen >= 7) {
- if (IS_IVB_GT1(intel->intelScreen->deviceID)) {
- brw->wm_max_threads = 86;
- brw->vs_max_threads = 36;
- brw->urb.size = 128;
- brw->urb.max_vs_entries = 512;
- brw->urb.max_gs_entries = 192;
- } else if (IS_IVB_GT2(intel->intelScreen->deviceID)) {
- brw->wm_max_threads = 86;
- brw->vs_max_threads = 128;
- brw->urb.size = 256;
- brw->urb.max_vs_entries = 704;
- brw->urb.max_gs_entries = 320;
- } else {
- assert(!"Unknown gen7 device.");
- }
- } else if (intel->gen == 6) {
- if (IS_SNB_GT2(intel->intelScreen->deviceID)) {
- /* This could possibly be 80, but is supposed to require
- * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
- * GPU reset to change.
- */
- brw->wm_max_threads = 40;
- brw->vs_max_threads = 60;
- brw->urb.size = 64; /* volume 5c.5 section 5.1 */
- brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
- } else {
- brw->wm_max_threads = 40;
- brw->vs_max_threads = 24;
- brw->urb.size = 32; /* volume 5c.5 section 5.1 */
- brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
- }
- } else if (intel->gen == 5) {
- brw->urb.size = 1024;
- brw->vs_max_threads = 72;
- brw->wm_max_threads = 12 * 6;
- } else if (intel->is_g4x) {
- brw->urb.size = 384;
- brw->vs_max_threads = 32;
- brw->wm_max_threads = 10 * 5;
- } else if (intel->gen < 6) {
- brw->urb.size = 256;
- brw->vs_max_threads = 16;
- brw->wm_max_threads = 8 * 4;
+ brw->wm_max_threads = intel->intelScreen->chipset.wm_max_threads;
+ brw->vs_max_threads = intel->intelScreen->chipset.vs_max_threads;
+ brw->urb.size = intel->intelScreen->chipset.urb_size;
+ brw->urb.max_vs_entries = intel->intelScreen->chipset.urb_max_vs_entries;
+ brw->urb.max_gs_entries = intel->intelScreen->chipset.urb_max_gs_entries;
+
+ if (intel->gen == 4)
brw->has_negative_rhw_bug = GL_TRUE;
- }
if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) {
brw->vs_max_threads = 1;
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 86b4000..bb178e3 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -471,31 +471,63 @@ extern GLboolean i915CreateContext(int api,
#else
static const struct intel_chipset intel_chipset_i965 = {
- .gen = 4
+ .gen = 4,
+ .urb_size = 256,
+ .vs_max_threads = 16,
+ .wm_max_threads = 8 * 4,
};
static const struct intel_chipset intel_chipset_g4x = {
- .gen = 4
+ .gen = 4,
+ .urb_size = 384,
+ .vs_max_threads = 32,
+ .wm_max_threads = 10 * 5
};
static const struct intel_chipset intel_chipset_ilk = {
- .gen = 5
+ .gen = 5,
+ .urb_size = 1024,
+ .vs_max_threads = 72,
+ .wm_max_threads = 12 * 6
};
static const struct intel_chipset intel_chipset_snb_gt1 = {
- .gen = 6
+ .gen = 6,
+ .wm_max_threads = 40,
+ .vs_max_threads = 24,
+ .urb_size = 32, /* volume 5c.5 section 5.1 */
+ .urb_max_vs_entries = 128 /* volume 2a (see 3DSTATE_URB) */
+
};
static const struct intel_chipset intel_chipset_snb_gt2 = {
- .gen = 6
+ .gen = 6,
+ /* This could possibly be 80, but is supposed to require
+ * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
+ * GPU reset to change.
+ */
+ .wm_max_threads = 40,
+ .vs_max_threads = 60,
+ .urb_size = 64, /* volume 5c.5 section 5.1 */
+ .urb_max_vs_entries = 256 /* volume 2a (see 3DSTATE_URB) */
};
static const struct intel_chipset intel_chipset_ivb_gt1 = {
- .gen = 7
+ .gen = 7,
+ .wm_max_threads = 86,
+ .vs_max_threads = 36,
+ .urb_size = 128,
+ .urb_max_vs_entries = 512,
+ .urb_max_gs_entries = 192
};
static const struct intel_chipset intel_chipset_ivb_gt2 = {
- .gen = 7
+ .gen = 7,
+ .wm_max_threads = 86,
+ .vs_max_threads = 128,
+ .urb_size = 256,
+ .urb_max_vs_entries = 704,
+ .urb_max_gs_entries = 320
};
static const struct intel_chipset_map chipset_map[] = {
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index bfcc20d..fba62e0 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -37,6 +37,13 @@
struct intel_chipset {
int gen;
GLboolean is_945;
+
+ /* WM maximum threads is number of EUs times number of threads per EU. */
+ int wm_max_threads;
+ int vs_max_threads;
+ int urb_size;
+ int urb_max_vs_entries;
+ int urb_max_gs_entries;
};
struct intel_screen
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 12/16] intel: Drop unused IS_SNB/IVB_GT1/2 macros
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (10 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 11/16] intel: Put urb and thread limits into the chipset struct Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 13/16] intel: Replace IS_G4X macro with an is_g4x bit in the chipset struct Kristian Høgsberg
` (4 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/intel/intel_chipset.h | 16 ----------------
1 files changed, 0 insertions(+), 16 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index 979cd0b..e8bb3fe 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -90,19 +90,3 @@
devid == PCI_CHIP_B43_G1)
#define IS_GM45(devid) (devid == PCI_CHIP_GM45_GM)
#define IS_G4X(devid) (IS_G45(devid) || IS_GM45(devid))
-
-#define IS_SNB_GT1(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \
- devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \
- devid == PCI_CHIP_SANDYBRIDGE_S)
-
-#define IS_SNB_GT2(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT2 || \
- devid == PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \
- devid == PCI_CHIP_SANDYBRIDGE_M_GT2 || \
- devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS)
-
-#define IS_IVB_GT1(devid) (devid == PCI_CHIP_IVYBRIDGE_GT1 || \
- devid == PCI_CHIP_IVYBRIDGE_M_GT1 || \
- devid == PCI_CHIP_IVYBRIDGE_S_GT1)
-
-#define IS_IVB_GT2(devid) (devid == PCI_CHIP_IVYBRIDGE_GT2 || \
- devid == PCI_CHIP_IVYBRIDGE_M_GT2)
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 13/16] intel: Replace IS_G4X macro with an is_g4x bit in the chipset struct
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (11 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 12/16] intel: Drop unused IS_SNB/IVB_GT1/2 macros Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 14/16] intel: Add is_855ish for handling 855 and 865 specific lod clamping Kristian Høgsberg
` (3 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/intel/intel_chipset.h | 9 ---------
src/mesa/drivers/dri/intel/intel_context.c | 2 +-
src/mesa/drivers/dri/intel/intel_screen.c | 1 +
src/mesa/drivers/dri/intel/intel_screen.h | 2 +-
4 files changed, 3 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index e8bb3fe..19dd664 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -81,12 +81,3 @@
#define PCI_CHIP_IVYBRIDGE_M_GT1 0x0156 /* Mobile */
#define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166
#define PCI_CHIP_IVYBRIDGE_S_GT1 0x015a /* Server */
-
-#define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \
- devid == PCI_CHIP_Q45_G || \
- devid == PCI_CHIP_G45_G || \
- devid == PCI_CHIP_G41_G || \
- devid == PCI_CHIP_B43_G || \
- devid == PCI_CHIP_B43_G1)
-#define IS_GM45(devid) (devid == PCI_CHIP_GM45_GM)
-#define IS_G4X(devid) (IS_G45(devid) || IS_GM45(devid))
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index f696c3f..76c1da5 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -726,7 +726,7 @@ intelInitContext(struct intel_context *intel,
intel->needs_ff_sync = GL_TRUE;
intel->has_luminance_srgb = GL_TRUE;
} else if (intel->intelScreen->chipset.gen == 4) {
- if (IS_G4X(intel->intelScreen->deviceID)) {
+ if (intel->intelScreen->chipset.is_g4x) {
intel->has_luminance_srgb = GL_TRUE;
intel->is_g4x = GL_TRUE;
}
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index bb178e3..a8732a8 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -479,6 +479,7 @@ static const struct intel_chipset intel_chipset_i965 = {
static const struct intel_chipset intel_chipset_g4x = {
.gen = 4,
+ .is_g4x = GL_TRUE,
.urb_size = 384,
.vs_max_threads = 32,
.wm_max_threads = 10 * 5
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index fba62e0..3a3ef40 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -36,7 +36,7 @@
struct intel_chipset {
int gen;
- GLboolean is_945;
+ GLboolean is_945, is_g4x;
/* WM maximum threads is number of EUs times number of threads per EU. */
int wm_max_threads;
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 14/16] intel: Add is_855ish for handling 855 and 865 specific lod clamping
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (12 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 13/16] intel: Replace IS_G4X macro with an is_g4x bit in the chipset struct Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 20:22 ` Chris Wilson
2011-06-07 19:34 ` [PATCH 15/16] intel: Get chipset name from PCI ID list Kristian Høgsberg
` (2 subsequent siblings)
16 siblings, 1 reply; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
include/pci_ids/i915_pci_ids.h | 4 ++--
src/mesa/drivers/dri/i915/i830_texstate.c | 3 +--
src/mesa/drivers/dri/intel/intel_screen.c | 4 ++++
src/mesa/drivers/dri/intel/intel_screen.h | 2 +-
4 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/include/pci_ids/i915_pci_ids.h b/include/pci_ids/i915_pci_ids.h
index 551c010..5b5d1f8 100644
--- a/include/pci_ids/i915_pci_ids.h
+++ b/include/pci_ids/i915_pci_ids.h
@@ -1,7 +1,7 @@
CHIPSET(0x3577, I830_M, i8xx)
CHIPSET(0x2562, 845_G, i8xx)
-CHIPSET(0x3582, I855_GM, i8xx)
-CHIPSET(0x2572, I865_G, i8xx)
+CHIPSET(0x3582, I855_GM, i855)
+CHIPSET(0x2572, I865_G, i855)
CHIPSET(0x2582, I915_G, i915)
CHIPSET(0x258A, E7221_G, i915)
CHIPSET(0x2592, I915_GM, i915)
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index 3298dbb..9100e32 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -263,8 +263,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
*/
minlod_fixed = U_FIXED(CLAMP(sampler->MinLod, 0.0, 11), 4);
maxlod = MIN2(sampler->MaxLod, tObj->_MaxLevel - tObj->BaseLevel);
- if (intel->intelScreen->deviceID == PCI_CHIP_I855_GM ||
- intel->intelScreen->deviceID == PCI_CHIP_I865_G) {
+ if (intel->intelScreen->chipset.is_855ish) {
maxlod_fixed = U_FIXED(CLAMP(maxlod, 0.0, 11.75), 2);
maxlod_fixed = MAX2(maxlod_fixed, (minlod_fixed + 3) >> 2);
state[I830_TEXREG_TM0S3] |= maxlod_fixed << TM0S3_MIN_MIP_SHIFT;
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index a8732a8..94c39fb 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -447,6 +447,10 @@ static const struct intel_chipset intel_chipset_i8xx = {
.gen = 2
};
+static const struct intel_chipset intel_chipset_i855 = {
+ .gen = 2, .is_855ish = GL_TRUE
+};
+
static const struct intel_chipset intel_chipset_i915 = {
.gen = 3
};
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index 3a3ef40..177f619 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -36,7 +36,7 @@
struct intel_chipset {
int gen;
- GLboolean is_945, is_g4x;
+ GLboolean is_855ish, is_945, is_g4x;
/* WM maximum threads is number of EUs times number of threads per EU. */
int wm_max_threads;
--
1.7.4.4
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 15/16] intel: Get chipset name from PCI ID list
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (13 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 14/16] intel: Add is_855ish for handling 855 and 865 specific lod clamping Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 16/16] intel: Remove intel_chipsets.h Kristian Høgsberg
2011-06-08 11:51 ` [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kenneth Graunke
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
include/pci_ids/i915_pci_ids.h | 30 ++++----
include/pci_ids/i965_pci_ids.h | 54 +++++++-------
include/pci_ids/pci_id_driver_map.h | 4 +-
src/mesa/drivers/dri/intel/intel_context.c | 117 ++--------------------------
src/mesa/drivers/dri/intel/intel_screen.c | 2 +-
5 files changed, 51 insertions(+), 156 deletions(-)
diff --git a/include/pci_ids/i915_pci_ids.h b/include/pci_ids/i915_pci_ids.h
index 5b5d1f8..4b742d7 100644
--- a/include/pci_ids/i915_pci_ids.h
+++ b/include/pci_ids/i915_pci_ids.h
@@ -1,15 +1,15 @@
-CHIPSET(0x3577, I830_M, i8xx)
-CHIPSET(0x2562, 845_G, i8xx)
-CHIPSET(0x3582, I855_GM, i855)
-CHIPSET(0x2572, I865_G, i855)
-CHIPSET(0x2582, I915_G, i915)
-CHIPSET(0x258A, E7221_G, i915)
-CHIPSET(0x2592, I915_GM, i915)
-CHIPSET(0x2772, I945_G, i945)
-CHIPSET(0x27A2, I945_GM, i945)
-CHIPSET(0x27AE, I945_GME, i945)
-CHIPSET(0x29B2, Q35_G, i945)
-CHIPSET(0x29C2, G33_G, i945)
-CHIPSET(0x29D2, Q33_G, i945)
-CHIPSET(0xA011, IGD_GM, i945)
-CHIPSET(0xA001, IGD_G, i945)
+CHIPSET(0x3577, I830_M, i8xx, "Intel(R) 845G")
+CHIPSET(0x2562, 845_G, i8xx, "Intel(R) 830M")
+CHIPSET(0x3582, I855_GM, i855, "Intel(R) 852GM/855GM")
+CHIPSET(0x2572, I865_G, i855, "Intel(R) 865G")
+CHIPSET(0x2582, I915_G, i915, "Intel(R) 915G")
+CHIPSET(0x258A, E7221_G, i915, "Intel (R) E7221G (i915)")
+CHIPSET(0x2592, I915_GM, i915, "Intel(R) 915GM")
+CHIPSET(0x2772, I945_G, i945, "Intel(R) 945G")
+CHIPSET(0x27A2, I945_GM, i945, "Intel(R) 945GM")
+CHIPSET(0x27AE, I945_GME, i945, "Intel(R) 945GME")
+CHIPSET(0x29B2, Q35_G, i945, "Intel(R) Q35")
+CHIPSET(0x29C2, G33_G, i945, "Intel(R) G33")
+CHIPSET(0x29D2, Q33_G, i945, "Intel(R) Q33")
+CHIPSET(0xA011, IGD_GM, i945, "Intel(R) IGD")
+CHIPSET(0xA001, IGD_G, i945, "Intel(R) IGD")
diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index d37a2ee..0d9d42f 100644
--- a/include/pci_ids/i965_pci_ids.h
+++ b/include/pci_ids/i965_pci_ids.h
@@ -1,27 +1,27 @@
-CHIPSET(0x29A2, I965_G, i965)
-CHIPSET(0x2992, I965_Q, i965)
-CHIPSET(0x2982, I965_G_1, i965)
-CHIPSET(0x2972, I946_GZ, i965)
-CHIPSET(0x2A02, I965_GM, i965)
-CHIPSET(0x2A12, I965_GME, i965)
-CHIPSET(0x2A42, GM45_GM, g4x)
-CHIPSET(0x2E02, IGD_E_G, g4x)
-CHIPSET(0x2E12, Q45_G, g4x)
-CHIPSET(0x2E22, G45_G, g4x)
-CHIPSET(0x2E32, G41_G, g4x)
-CHIPSET(0x2E42, B43_G, g4x)
-CHIPSET(0x2E92, B43_G1, g4x)
-CHIPSET(0x0042, ILD_G, ilk)
-CHIPSET(0x0046, ILM_G, ilk)
-CHIPSET(0x0102, SANDYBRIDGE_GT1, snb_gt1)
-CHIPSET(0x0112, SANDYBRIDGE_GT2, snb_gt2)
-CHIPSET(0x0122, SANDYBRIDGE_GT2_PLUS, snb_gt2)
-CHIPSET(0x0106, SANDYBRIDGE_M_GT1, snb_gt1)
-CHIPSET(0x0116, SANDYBRIDGE_M_GT2, snb_gt2)
-CHIPSET(0x0126, SANDYBRIDGE_M_GT2_PLUS, snb_gt2)
-CHIPSET(0x010A, SANDYBRIDGE_S, snb_gt1)
-CHIPSET(0x0152, IVYBRIDGE_GT1, ivb_gt1)
-CHIPSET(0x0162, IVYBRIDGE_GT2, ivb_gt2)
-CHIPSET(0x0156, IVYBRIDGE_M_GT1, ivb_gt1)
-CHIPSET(0x0166, IVYBRIDGE_M_GT2, ivb_gt2)
-CHIPSET(0x015a, IVYBRIDGE_S_GT1, ivb_gt1)
+CHIPSET(0x29A2, I965_G, i965, "Intel(R) 965G")
+CHIPSET(0x2992, I965_Q, i965, "Intel(R) 965Q")
+CHIPSET(0x2982, I965_G_1, i965, "Intel(R) 965G")
+CHIPSET(0x2972, I946_GZ, i965, "Intel(R) 946GZ")
+CHIPSET(0x2A02, I965_GM, i965, "Intel(R) 965GM")
+CHIPSET(0x2A12, I965_GME, i965, "Intel(R) 965GME/GLE")
+CHIPSET(0x2A42, GM45_GM, g4x, "Mobile Intel® GM45 Express Chipset")
+CHIPSET(0x2E02, IGD_E_G, g4x, "Intel(R) Integrated Graphics Device")
+CHIPSET(0x2E12, Q45_G, g4x, "Intel(R) Q45/Q43")
+CHIPSET(0x2E22, G45_G, g4x, "Intel(R) G45/G43")
+CHIPSET(0x2E32, G41_G, g4x, "Intel(R) G41")
+CHIPSET(0x2E42, B43_G, g4x, "Intel(R) B43")
+CHIPSET(0x2E92, B43_G1, g4x, "Intel(R) B43")
+CHIPSET(0x0042, ILD_G, ilk, "Intel(R) Ironlake Desktop")
+CHIPSET(0x0046, ILM_G, ilk, "Intel(R) Ironlake Mobile")
+CHIPSET(0x0102, SANDYBRIDGE_GT1, snb_gt1, "Intel(R) Sandybridge Desktop")
+CHIPSET(0x0112, SANDYBRIDGE_GT2, snb_gt2, "Intel(R) Sandybridge Desktop")
+CHIPSET(0x0122, SANDYBRIDGE_GT2_PLUS, snb_gt2, "Intel(R) Sandybridge Desktop")
+CHIPSET(0x0106, SANDYBRIDGE_M_GT1, snb_gt1, "Intel(R) Sandybridge Mobile")
+CHIPSET(0x0116, SANDYBRIDGE_M_GT2, snb_gt2, "Intel(R) Sandybridge Mobile")
+CHIPSET(0x0126, SANDYBRIDGE_M_GT2_PLUS, snb_gt2, "Intel(R) Sandybridge Mobile")
+CHIPSET(0x010A, SANDYBRIDGE_S, snb_gt1, "Intel(R) Sandybridge Server")
+CHIPSET(0x0152, IVYBRIDGE_GT1, ivb_gt1, "Intel(R) Ivybridge Desktop")
+CHIPSET(0x0162, IVYBRIDGE_GT2, ivb_gt2, "Intel(R) Ivybridge Desktop")
+CHIPSET(0x0156, IVYBRIDGE_M_GT1, ivb_gt1, "Intel(R) Ivybridge Mobile")
+CHIPSET(0x0166, IVYBRIDGE_M_GT2, ivb_gt2, "Intel(R) Ivybridge Mobile")
+CHIPSET(0x015a, IVYBRIDGE_S_GT1, ivb_gt1, "Intel(R) Ivybridge Server")
diff --git a/include/pci_ids/pci_id_driver_map.h b/include/pci_ids/pci_id_driver_map.h
index 9112efd..4518b56 100644
--- a/include/pci_ids/pci_id_driver_map.h
+++ b/include/pci_ids/pci_id_driver_map.h
@@ -16,13 +16,13 @@ static const int i810_chip_ids[] = {
#endif
static const int i915_chip_ids[] = {
-#define CHIPSET(chip, desc, misc) chip,
+#define CHIPSET(chip, desc, misc, str) chip,
#include "pci_ids/i915_pci_ids.h"
#undef CHIPSET
};
static const int i965_chip_ids[] = {
-#define CHIPSET(chip, desc, misc) chip,
+#define CHIPSET(chip, desc, misc, str) chip,
#include "pci_ids/i965_pci_ids.h"
#undef CHIPSET
};
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 76c1da5..af0d28d 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -76,117 +76,12 @@ intelGetString(struct gl_context * ctx, GLenum name)
case GL_RENDERER:
switch (intel->intelScreen->deviceID) {
- case PCI_CHIP_845_G:
- chipset = "Intel(R) 845G";
- break;
- case PCI_CHIP_I830_M:
- chipset = "Intel(R) 830M";
- break;
- case PCI_CHIP_I855_GM:
- chipset = "Intel(R) 852GM/855GM";
- break;
- case PCI_CHIP_I865_G:
- chipset = "Intel(R) 865G";
- break;
- case PCI_CHIP_I915_G:
- chipset = "Intel(R) 915G";
- break;
- case PCI_CHIP_E7221_G:
- chipset = "Intel (R) E7221G (i915)";
- break;
- case PCI_CHIP_I915_GM:
- chipset = "Intel(R) 915GM";
- break;
- case PCI_CHIP_I945_G:
- chipset = "Intel(R) 945G";
- break;
- case PCI_CHIP_I945_GM:
- chipset = "Intel(R) 945GM";
- break;
- case PCI_CHIP_I945_GME:
- chipset = "Intel(R) 945GME";
- break;
- case PCI_CHIP_G33_G:
- chipset = "Intel(R) G33";
- break;
- case PCI_CHIP_Q35_G:
- chipset = "Intel(R) Q35";
- break;
- case PCI_CHIP_Q33_G:
- chipset = "Intel(R) Q33";
- break;
- case PCI_CHIP_IGD_GM:
- case PCI_CHIP_IGD_G:
- chipset = "Intel(R) IGD";
- break;
- case PCI_CHIP_I965_Q:
- chipset = "Intel(R) 965Q";
- break;
- case PCI_CHIP_I965_G:
- case PCI_CHIP_I965_G_1:
- chipset = "Intel(R) 965G";
- break;
- case PCI_CHIP_I946_GZ:
- chipset = "Intel(R) 946GZ";
- break;
- case PCI_CHIP_I965_GM:
- chipset = "Intel(R) 965GM";
- break;
- case PCI_CHIP_I965_GME:
- chipset = "Intel(R) 965GME/GLE";
- break;
- case PCI_CHIP_GM45_GM:
- chipset = "Mobile Intel® GM45 Express Chipset";
- break;
- case PCI_CHIP_IGD_E_G:
- chipset = "Intel(R) Integrated Graphics Device";
- break;
- case PCI_CHIP_G45_G:
- chipset = "Intel(R) G45/G43";
- break;
- case PCI_CHIP_Q45_G:
- chipset = "Intel(R) Q45/Q43";
- break;
- case PCI_CHIP_G41_G:
- chipset = "Intel(R) G41";
- break;
- case PCI_CHIP_B43_G:
- case PCI_CHIP_B43_G1:
- chipset = "Intel(R) B43";
- break;
- case PCI_CHIP_ILD_G:
- chipset = "Intel(R) Ironlake Desktop";
- break;
- case PCI_CHIP_ILM_G:
- chipset = "Intel(R) Ironlake Mobile";
- break;
- case PCI_CHIP_SANDYBRIDGE_GT1:
- case PCI_CHIP_SANDYBRIDGE_GT2:
- case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
- chipset = "Intel(R) Sandybridge Desktop";
- break;
- case PCI_CHIP_SANDYBRIDGE_M_GT1:
- case PCI_CHIP_SANDYBRIDGE_M_GT2:
- case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
- chipset = "Intel(R) Sandybridge Mobile";
- break;
- case PCI_CHIP_SANDYBRIDGE_S:
- chipset = "Intel(R) Sandybridge Server";
- break;
- case PCI_CHIP_IVYBRIDGE_GT1:
- case PCI_CHIP_IVYBRIDGE_GT2:
- chipset = "Intel(R) Ivybridge Desktop";
- break;
- case PCI_CHIP_IVYBRIDGE_M_GT1:
- case PCI_CHIP_IVYBRIDGE_M_GT2:
- chipset = "Intel(R) Ivybridge Mobile";
- break;
- case PCI_CHIP_IVYBRIDGE_S_GT1:
- chipset = "Intel(R) Ivybridge Server";
- break;
- default:
- chipset = "Unknown Intel Chipset";
- break;
+
+#define CHIPSET(id, name, info, str) \
+ case id: chipset = str; break;
+#include "pci_ids/i915_pci_ids.h"
+#include "pci_ids/i965_pci_ids.h"
+
}
(void) driGetRendererString(buffer, chipset, 0);
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 94c39fb..6a9395f 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -433,7 +433,7 @@ intelDestroyBuffer(__DRIdrawable * driDrawPriv)
* functions.
*/
-#define CHIPSET(id, name, info) { id, &intel_chipset_##info },
+#define CHIPSET(id, name, info, str) { id, &intel_chipset_##info },
struct intel_chipset_map {
--
1.7.4.4
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^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 16/16] intel: Remove intel_chipsets.h
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (14 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 15/16] intel: Get chipset name from PCI ID list Kristian Høgsberg
@ 2011-06-07 19:34 ` Kristian Høgsberg
2011-06-08 11:51 ` [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kenneth Graunke
16 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-07 19:34 UTC (permalink / raw)
To: intel-gfx
---
src/mesa/drivers/dri/i915/i830_texstate.c | 1 -
src/mesa/drivers/dri/i965/brw_defines.h | 2 -
src/mesa/drivers/dri/intel/intel_chipset.h | 83 -------------------------
src/mesa/drivers/dri/intel/intel_context.c | 1 -
src/mesa/drivers/dri/intel/intel_decode.c | 1 -
src/mesa/drivers/dri/intel/intel_extensions.c | 1 -
src/mesa/drivers/dri/intel/intel_screen.c | 1 -
7 files changed, 0 insertions(+), 90 deletions(-)
delete mode 100644 src/mesa/drivers/dri/intel/intel_chipset.h
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index 9100e32..a371ed5 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -36,7 +36,6 @@
#include "i830_context.h"
#include "i830_reg.h"
-#include "intel_chipset.h"
static GLuint
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 6d41b1e..08aa153 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1335,6 +1335,4 @@
#define R02_PRIM_END 0x1
#define R02_PRIM_START 0x2
-#include "intel_chipset.h"
-
#endif
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
deleted file mode 100644
index 19dd664..0000000
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ /dev/null
@@ -1,83 +0,0 @@
- /*
- * Copyright © 2007 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- * Eric Anholt <eric@anholt.net>
- *
- */
-
-#define PCI_CHIP_I810 0x7121
-#define PCI_CHIP_I810_DC100 0x7123
-#define PCI_CHIP_I810_E 0x7125
-#define PCI_CHIP_I815 0x1132
-
-#define PCI_CHIP_I830_M 0x3577
-#define PCI_CHIP_845_G 0x2562
-#define PCI_CHIP_I855_GM 0x3582
-#define PCI_CHIP_I865_G 0x2572
-
-#define PCI_CHIP_I915_G 0x2582
-#define PCI_CHIP_E7221_G 0x258A
-#define PCI_CHIP_I915_GM 0x2592
-#define PCI_CHIP_I945_G 0x2772
-#define PCI_CHIP_I945_GM 0x27A2
-#define PCI_CHIP_I945_GME 0x27AE
-
-#define PCI_CHIP_Q35_G 0x29B2
-#define PCI_CHIP_G33_G 0x29C2
-#define PCI_CHIP_Q33_G 0x29D2
-
-#define PCI_CHIP_IGD_GM 0xA011
-#define PCI_CHIP_IGD_G 0xA001
-
-#define PCI_CHIP_I965_G 0x29A2
-#define PCI_CHIP_I965_Q 0x2992
-#define PCI_CHIP_I965_G_1 0x2982
-#define PCI_CHIP_I946_GZ 0x2972
-#define PCI_CHIP_I965_GM 0x2A02
-#define PCI_CHIP_I965_GME 0x2A12
-
-#define PCI_CHIP_GM45_GM 0x2A42
-
-#define PCI_CHIP_IGD_E_G 0x2E02
-#define PCI_CHIP_Q45_G 0x2E12
-#define PCI_CHIP_G45_G 0x2E22
-#define PCI_CHIP_G41_G 0x2E32
-#define PCI_CHIP_B43_G 0x2E42
-#define PCI_CHIP_B43_G1 0x2E92
-
-#define PCI_CHIP_ILD_G 0x0042
-#define PCI_CHIP_ILM_G 0x0046
-
-#define PCI_CHIP_SANDYBRIDGE_GT1 0x0102 /* Desktop */
-#define PCI_CHIP_SANDYBRIDGE_GT2 0x0112
-#define PCI_CHIP_SANDYBRIDGE_GT2_PLUS 0x0122
-#define PCI_CHIP_SANDYBRIDGE_M_GT1 0x0106 /* Mobile */
-#define PCI_CHIP_SANDYBRIDGE_M_GT2 0x0116
-#define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126
-#define PCI_CHIP_SANDYBRIDGE_S 0x010A /* Server */
-
-#define PCI_CHIP_IVYBRIDGE_GT1 0x0152 /* Desktop */
-#define PCI_CHIP_IVYBRIDGE_GT2 0x0162
-#define PCI_CHIP_IVYBRIDGE_M_GT1 0x0156 /* Mobile */
-#define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166
-#define PCI_CHIP_IVYBRIDGE_S_GT1 0x015a /* Server */
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index af0d28d..b1c5a00 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -40,7 +40,6 @@
#include "drivers/common/driverfuncs.h"
#include "drivers/common/meta.h"
-#include "intel_chipset.h"
#include "intel_buffers.h"
#include "intel_tex.h"
#include "intel_batchbuffer.h"
diff --git a/src/mesa/drivers/dri/intel/intel_decode.c b/src/mesa/drivers/dri/intel/intel_decode.c
index 5400823..4c5b988 100644
--- a/src/mesa/drivers/dri/intel/intel_decode.c
+++ b/src/mesa/drivers/dri/intel/intel_decode.c
@@ -4,7 +4,6 @@
#include <string.h>
#include "intel_decode.h"
-#include "intel_chipset.h"
static FILE *out;
static uint32_t saved_s2 = 0, saved_s4 = 0;
diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c
index 3fd987a..6de1bee 100644
--- a/src/mesa/drivers/dri/intel/intel_extensions.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions.c
@@ -27,7 +27,6 @@
#include "main/mfeatures.h"
-#include "intel_chipset.h"
#include "intel_context.h"
#include "intel_extensions.h"
#include "utils.h"
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 6a9395f..f369816 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -84,7 +84,6 @@ const GLuint __driNConfigOptions = 11;
#include "intel_batchbuffer.h"
#include "intel_buffers.h"
#include "intel_bufmgr.h"
-#include "intel_chipset.h"
#include "intel_fbo.h"
#include "intel_screen.h"
#include "intel_tex.h"
--
1.7.4.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 14/16] intel: Add is_855ish for handling 855 and 865 specific lod clamping
2011-06-07 19:34 ` [PATCH 14/16] intel: Add is_855ish for handling 855 and 865 specific lod clamping Kristian Høgsberg
@ 2011-06-07 20:22 ` Chris Wilson
2011-06-08 1:13 ` Eric Anholt
0 siblings, 1 reply; 22+ messages in thread
From: Chris Wilson @ 2011-06-07 20:22 UTC (permalink / raw)
To: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 709 bytes --]
On Tue, 7 Jun 2011 15:34:19 -0400, Kristian Høgsberg <krh@bitplanet.net> wrote:
> struct intel_chipset {
> int gen;
> - GLboolean is_945, is_g4x;
> + GLboolean is_855ish, is_945, is_g4x;
>
> /* WM maximum threads is number of EUs times number of threads per EU. */
> int wm_max_threads;
This can be handled by adding a few more bits per-gen. I found using
20 830/845
21 855/865
30 915
31 945
33 g33 + pnv
40 965
45 g4x
50 ilk
60 snb
...to infinity and beyond...
works quite well for specifying render capabilities for gen2/3/4.
Can these structs and pci-id tables be reused by projects external to
mesa?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
[-- Attachment #2: Type: text/plain, Size: 159 bytes --]
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^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 01/16] intel: Use gen number instead of PCI ID in decoder
2011-06-07 19:34 ` [PATCH 01/16] intel: Use gen number instead of PCI ID in decoder Kristian Høgsberg
@ 2011-06-08 0:52 ` Eric Anholt
0 siblings, 0 replies; 22+ messages in thread
From: Eric Anholt @ 2011-06-08 0:52 UTC (permalink / raw)
To: Kristian Høgsberg, intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 528 bytes --]
On Tue, 7 Jun 2011 15:34:06 -0400, Kristian Høgsberg <krh@bitplanet.net> wrote:
> ---
> src/mesa/drivers/dri/intel/intel_batchbuffer.c | 2 +-
> src/mesa/drivers/dri/intel/intel_chipset.h | 3 --
> src/mesa/drivers/dri/intel/intel_decode.c | 42 ++++++++++++------------
> src/mesa/drivers/dri/intel/intel_decode.h | 2 +-
> 4 files changed, 23 insertions(+), 26 deletions(-)
intel_decode.c is just copied from intel_gpu_tools. Please make the
change there first (but I like the change).
[-- Attachment #1.2: Type: application/pgp-signature, Size: 197 bytes --]
[-- Attachment #2: Type: text/plain, Size: 159 bytes --]
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^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 14/16] intel: Add is_855ish for handling 855 and 865 specific lod clamping
2011-06-07 20:22 ` Chris Wilson
@ 2011-06-08 1:13 ` Eric Anholt
0 siblings, 0 replies; 22+ messages in thread
From: Eric Anholt @ 2011-06-08 1:13 UTC (permalink / raw)
To: Chris Wilson, Kristian Høgsberg, intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 871 bytes --]
On Tue, 07 Jun 2011 21:22:28 +0100, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Tue, 7 Jun 2011 15:34:19 -0400, Kristian Høgsberg <krh@bitplanet.net> wrote:
> > struct intel_chipset {
> > int gen;
> > - GLboolean is_945, is_g4x;
> > + GLboolean is_855ish, is_945, is_g4x;
> >
> > /* WM maximum threads is number of EUs times number of threads per EU. */
> > int wm_max_threads;
>
> This can be handled by adding a few more bits per-gen. I found using
> 20 830/845
> 21 855/865
> 30 915
> 31 945
> 33 g33 + pnv
> 40 965
> 45 g4x
> 50 ilk
> 60 snb
> ...to infinity and beyond...
> works quite well for specifying render capabilities for gen2/3/4.
I never liked this. I much prefer the extra knobs for the few weird
cases (there's *so* little that's g33 as opposed to 945-specific, for
example).
[-- Attachment #1.2: Type: application/pgp-signature, Size: 197 bytes --]
[-- Attachment #2: Type: text/plain, Size: 159 bytes --]
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 00/16] Move chipset specific stuff to struct intel_chipset
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
` (15 preceding siblings ...)
2011-06-07 19:34 ` [PATCH 16/16] intel: Remove intel_chipsets.h Kristian Høgsberg
@ 2011-06-08 11:51 ` Kenneth Graunke
2011-06-08 18:36 ` Kristian Høgsberg
16 siblings, 1 reply; 22+ messages in thread
From: Kenneth Graunke @ 2011-06-08 11:51 UTC (permalink / raw)
To: Kristian Høgsberg; +Cc: intel-gfx
On 06/07/2011 12:34 PM, Kristian Høgsberg wrote:
> Hi,
>
> Here's a handful of patches that try to replace most of our chipset
> feature checking with data in a new struct intel_chipset. It uses the
> new PCI ID list infrastructure and eliminates all IS_FOO macros in
> favor of a per-family chipset info struct. Actually, I was surprised
> how much in the driver is really just a gen check, but there are a few
> cases where we have to check a certain feature, as well as all the
> gen4+ urb and thread limits (includes the recent fix for swapped VS
> entry counts).
>
> The series compiles and passes casual testing for me, but I've not run
> piglit on it yet.
>
> Kristian
This patchset is fantastic. Way better than what I'd been doing. I'm
tidying it up a bit and working on a bunch of follow-on cleanups...I'll
send out a proposed replacement series tomorrow.
The only concern I have is with the intel_decode changes to use gen. I
like the idea, but I'm afraid it may get us into trouble: What if we
need G45 specific decoding? We'll -certainly- need Gen 7.5 specific
dumping (over and above Gen7), eventually.
ickle's idea to use gen 70 and 75 would solve that...though, in general
I agree with Eric in preferring chipset->gen >= 7 and chipset->is_name.
--Kenneth
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^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 00/16] Move chipset specific stuff to struct intel_chipset
2011-06-08 11:51 ` [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kenneth Graunke
@ 2011-06-08 18:36 ` Kristian Høgsberg
0 siblings, 0 replies; 22+ messages in thread
From: Kristian Høgsberg @ 2011-06-08 18:36 UTC (permalink / raw)
To: Kenneth Graunke; +Cc: intel-gfx
2011/6/8 Kenneth Graunke <kenneth@whitecape.org>:
> On 06/07/2011 12:34 PM, Kristian Høgsberg wrote:
>>
>> Hi,
>>
>> Here's a handful of patches that try to replace most of our chipset
>> feature checking with data in a new struct intel_chipset. It uses the
>> new PCI ID list infrastructure and eliminates all IS_FOO macros in
>> favor of a per-family chipset info struct. Actually, I was surprised
>> how much in the driver is really just a gen check, but there are a few
>> cases where we have to check a certain feature, as well as all the
>> gen4+ urb and thread limits (includes the recent fix for swapped VS
>> entry counts).
>>
>> The series compiles and passes casual testing for me, but I've not run
>> piglit on it yet.
>>
>> Kristian
>
> This patchset is fantastic. Way better than what I'd been doing. I'm
> tidying it up a bit and working on a bunch of follow-on cleanups...I'll send
> out a proposed replacement series tomorrow.
It was a Tuesday morning distraction for me, and now I'm in Denmark
for a few days vacation. If you want to take over the patch set, I'd
be very happy :) One thing I was thinking about changing was to just
pull the chipset inteo the chipset_map array and set that in
intelScreen in intel_screen.c, instead including the chipsets again in
the big pci id switch.
> The only concern I have is with the intel_decode changes to use gen. I like
> the idea, but I'm afraid it may get us into trouble: What if we need G45
> specific decoding? We'll -certainly- need Gen 7.5 specific dumping (over
> and above Gen7), eventually.
>
> ickle's idea to use gen 70 and 75 would solve that...though, in general I
> agree with Eric in preferring chipset->gen >= 7 and chipset->is_name.
Chris also suggested sharing the chipset structs so maybe we could
just move it all to intel-gpu-tools (and make decode use the chipset
struct perhaps) as the canonical location for these chipset
definitions. We also have a similar setup in the kernel, but I'm not
sure it's practical to consolidate all that. I'd rather get this
first step done and then maybe think about further improvements.
Kristian
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^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2011-06-08 18:36 UTC | newest]
Thread overview: 22+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-06-07 19:34 [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 01/16] intel: Use gen number instead of PCI ID in decoder Kristian Høgsberg
2011-06-08 0:52 ` Eric Anholt
2011-06-07 19:34 ` [PATCH 02/16] intel: Use the PCI ID map for determining chipset gen Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 03/16] intel: IS_9XX is just gen >= 3 Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 04/16] intel: Remove unused IS_915 macro Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 05/16] intel: Replace intel_screen::gen with the chipset struct Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 06/16] intel: Add a is_945 bit to chipinfo and use that instead of IS_945 Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 07/16] intel: Remove unused IS_MOBILE and IS_IGD* macros Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 08/16] intel: Replace single use of IS_965 with gen check Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 09/16] intel: Drop unused IS_GEN4 macro Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 10/16] intel: Drop unused IS_GEN5-7 macros Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 11/16] intel: Put urb and thread limits into the chipset struct Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 12/16] intel: Drop unused IS_SNB/IVB_GT1/2 macros Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 13/16] intel: Replace IS_G4X macro with an is_g4x bit in the chipset struct Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 14/16] intel: Add is_855ish for handling 855 and 865 specific lod clamping Kristian Høgsberg
2011-06-07 20:22 ` Chris Wilson
2011-06-08 1:13 ` Eric Anholt
2011-06-07 19:34 ` [PATCH 15/16] intel: Get chipset name from PCI ID list Kristian Høgsberg
2011-06-07 19:34 ` [PATCH 16/16] intel: Remove intel_chipsets.h Kristian Høgsberg
2011-06-08 11:51 ` [PATCH 00/16] Move chipset specific stuff to struct intel_chipset Kenneth Graunke
2011-06-08 18:36 ` Kristian Høgsberg
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