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From: Shea Levy <shea@shealevy.com>
To: Palmer Dabbelt <palmer@sifive.com>
Cc: linux-alpha@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-snps-arc@lists.infradead.org, linux-c6x-dev@linux-c6x.org,
	uclinux-h8-devel@lists.sourceforge.jp,
	linux-m68k@lists.linux-m68k.org,
	nios2-dev@lists.rocketboards.org, openrisc@lists.librecores.org,
	linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	linux-riscv@lists.infradead.org, linux-sh@vger.kernel.org,
	user-mode-linux-devel@lists.sourceforge.net
Subject: Re: [PATCH v2 02/16] riscv: Use INITRAMFS_GENERIC_UNLOAD.
Date: Mon, 26 Mar 2018 00:55:48 +0000	[thread overview]
Message-ID: <87o9jbu02z.fsf@xps13.shealevy.com> (raw)
In-Reply-To: <mhng-5691a509-dedf-4092-bd6d-020a81512c15@palmer-si-x1c4>

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Hi Palmer,

Palmer Dabbelt <palmer@sifive.com> writes:

> On Sun, 25 Mar 2018 15:18:39 PDT (-0700), shea@shealevy.com wrote:
>> Signed-off-by: Shea Levy <shea@shealevy.com>
>> ---
>>  arch/riscv/Kconfig   | 1 +
>>  arch/riscv/mm/init.c | 6 ------
>>  2 files changed, 1 insertion(+), 6 deletions(-)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index c22ebe08e902..ab1b4cee84fc 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -37,6 +37,7 @@ config RISCV
>>  	select THREAD_INFO_IN_TASK
>>  	select RISCV_TIMER
>>  	select GENERIC_IRQ_MULTI_HANDLER
>> +	select INITRAMFS_GENERIC_UNLOAD
>>
>>  config MMU
>>  	def_bool y
>> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
>> index c77df8142be2..36f83fe8a726 100644
>> --- a/arch/riscv/mm/init.c
>> +++ b/arch/riscv/mm/init.c
>> @@ -62,9 +62,3 @@ void free_initmem(void)
>>  {
>>  	free_initmem_default(0);
>>  }
>> -
>> -#ifdef CONFIG_BLK_DEV_INITRD
>> -void free_initrd_mem(unsigned long start, unsigned long end)
>> -{
>> -}
>> -#endif /* CONFIG_BLK_DEV_INITRD */
>
> I haven't looked through the rest of the patch set, but this is a pretty 
> trivial change so feel free to add a 
>
> Reviewed-By: Palmer Dabbelt <palmer@sifive.com>
>
> if you'd like.  If you'd like it merged through my tree then just say 
> something!

I'm not sure how these cross-cutting changes go, if you can take the
series through your tree that'd be great!

Thanks,
Shea

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WARNING: multiple messages have this Message-ID (diff)
From: Shea Levy <shea@shealevy.com>
To: Palmer Dabbelt <palmer@sifive.com>
Cc: linux-alpha@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-snps-arc@lists.infradead.org, linux-c6x-dev@linux-c6x.org,
	uclinux-h8-devel@lists.sourceforge.jp,
	linux-m68k@lists.linux-m68k.org,
	nios2-dev@lists.rocketboards.org, openrisc@lists.librecores.org,
	linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	linux-riscv@lists.infradead.org, linux-sh@vger.kernel.org,
	user-mode-linux-devel@lists.sourceforge.net
Subject: Re: [PATCH v2 02/16] riscv: Use INITRAMFS_GENERIC_UNLOAD.
Date: Sun, 25 Mar 2018 20:55:48 -0400	[thread overview]
Message-ID: <87o9jbu02z.fsf@xps13.shealevy.com> (raw)
In-Reply-To: <mhng-5691a509-dedf-4092-bd6d-020a81512c15@palmer-si-x1c4>

[-- Attachment #1: Type: text/plain, Size: 1495 bytes --]

Hi Palmer,

Palmer Dabbelt <palmer@sifive.com> writes:

> On Sun, 25 Mar 2018 15:18:39 PDT (-0700), shea@shealevy.com wrote:
>> Signed-off-by: Shea Levy <shea@shealevy.com>
>> ---
>>  arch/riscv/Kconfig   | 1 +
>>  arch/riscv/mm/init.c | 6 ------
>>  2 files changed, 1 insertion(+), 6 deletions(-)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index c22ebe08e902..ab1b4cee84fc 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -37,6 +37,7 @@ config RISCV
>>  	select THREAD_INFO_IN_TASK
>>  	select RISCV_TIMER
>>  	select GENERIC_IRQ_MULTI_HANDLER
>> +	select INITRAMFS_GENERIC_UNLOAD
>>
>>  config MMU
>>  	def_bool y
>> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
>> index c77df8142be2..36f83fe8a726 100644
>> --- a/arch/riscv/mm/init.c
>> +++ b/arch/riscv/mm/init.c
>> @@ -62,9 +62,3 @@ void free_initmem(void)
>>  {
>>  	free_initmem_default(0);
>>  }
>> -
>> -#ifdef CONFIG_BLK_DEV_INITRD
>> -void free_initrd_mem(unsigned long start, unsigned long end)
>> -{
>> -}
>> -#endif /* CONFIG_BLK_DEV_INITRD */
>
> I haven't looked through the rest of the patch set, but this is a pretty 
> trivial change so feel free to add a 
>
> Reviewed-By: Palmer Dabbelt <palmer@sifive.com>
>
> if you'd like.  If you'd like it merged through my tree then just say 
> something!

I'm not sure how these cross-cutting changes go, if you can take the
series through your tree that'd be great!

Thanks,
Shea

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WARNING: multiple messages have this Message-ID (diff)
From: Shea Levy <shea@shealevy.com>
To: Palmer Dabbelt <palmer@sifive.com>
Cc: linux-alpha@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-snps-arc@lists.infradead.org, linux-c6x-dev@linux-c6x.org,
	uclinux-h8-devel@lists.sourceforge.jp,
	linux-m68k@vger.kernel.org, nios2-dev@lists.rocketboards.org,
	openrisc@lists.librecores.org, linux-parisc@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org,
	linux-sh@vger.kernel.org,
	user-mode-linux-devel@lists.sourceforge.net
Subject: Re: [PATCH v2 02/16] riscv: Use INITRAMFS_GENERIC_UNLOAD.
Date: Sun, 25 Mar 2018 20:55:48 -0400	[thread overview]
Message-ID: <87o9jbu02z.fsf@xps13.shealevy.com> (raw)
In-Reply-To: <mhng-5691a509-dedf-4092-bd6d-020a81512c15@palmer-si-x1c4>

[-- Attachment #1: Type: text/plain, Size: 1495 bytes --]

Hi Palmer,

Palmer Dabbelt <palmer@sifive.com> writes:

> On Sun, 25 Mar 2018 15:18:39 PDT (-0700), shea@shealevy.com wrote:
>> Signed-off-by: Shea Levy <shea@shealevy.com>
>> ---
>>  arch/riscv/Kconfig   | 1 +
>>  arch/riscv/mm/init.c | 6 ------
>>  2 files changed, 1 insertion(+), 6 deletions(-)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index c22ebe08e902..ab1b4cee84fc 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -37,6 +37,7 @@ config RISCV
>>  	select THREAD_INFO_IN_TASK
>>  	select RISCV_TIMER
>>  	select GENERIC_IRQ_MULTI_HANDLER
>> +	select INITRAMFS_GENERIC_UNLOAD
>>
>>  config MMU
>>  	def_bool y
>> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
>> index c77df8142be2..36f83fe8a726 100644
>> --- a/arch/riscv/mm/init.c
>> +++ b/arch/riscv/mm/init.c
>> @@ -62,9 +62,3 @@ void free_initmem(void)
>>  {
>>  	free_initmem_default(0);
>>  }
>> -
>> -#ifdef CONFIG_BLK_DEV_INITRD
>> -void free_initrd_mem(unsigned long start, unsigned long end)
>> -{
>> -}
>> -#endif /* CONFIG_BLK_DEV_INITRD */
>
> I haven't looked through the rest of the patch set, but this is a pretty 
> trivial change so feel free to add a 
>
> Reviewed-By: Palmer Dabbelt <palmer@sifive.com>
>
> if you'd like.  If you'd like it merged through my tree then just say 
> something!

I'm not sure how these cross-cutting changes go, if you can take the
series through your tree that'd be great!

Thanks,
Shea

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WARNING: multiple messages have this Message-ID (diff)
From: shea@shealevy.com (Shea Levy)
To: linux-riscv@lists.infradead.org
Subject: [PATCH v2 02/16] riscv: Use INITRAMFS_GENERIC_UNLOAD.
Date: Sun, 25 Mar 2018 20:55:48 -0400	[thread overview]
Message-ID: <87o9jbu02z.fsf@xps13.shealevy.com> (raw)
In-Reply-To: <mhng-5691a509-dedf-4092-bd6d-020a81512c15@palmer-si-x1c4>

Hi Palmer,

Palmer Dabbelt <palmer@sifive.com> writes:

> On Sun, 25 Mar 2018 15:18:39 PDT (-0700), shea at shealevy.com wrote:
>> Signed-off-by: Shea Levy <shea@shealevy.com>
>> ---
>>  arch/riscv/Kconfig   | 1 +
>>  arch/riscv/mm/init.c | 6 ------
>>  2 files changed, 1 insertion(+), 6 deletions(-)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index c22ebe08e902..ab1b4cee84fc 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -37,6 +37,7 @@ config RISCV
>>  	select THREAD_INFO_IN_TASK
>>  	select RISCV_TIMER
>>  	select GENERIC_IRQ_MULTI_HANDLER
>> +	select INITRAMFS_GENERIC_UNLOAD
>>
>>  config MMU
>>  	def_bool y
>> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
>> index c77df8142be2..36f83fe8a726 100644
>> --- a/arch/riscv/mm/init.c
>> +++ b/arch/riscv/mm/init.c
>> @@ -62,9 +62,3 @@ void free_initmem(void)
>>  {
>>  	free_initmem_default(0);
>>  }
>> -
>> -#ifdef CONFIG_BLK_DEV_INITRD
>> -void free_initrd_mem(unsigned long start, unsigned long end)
>> -{
>> -}
>> -#endif /* CONFIG_BLK_DEV_INITRD */
>
> I haven't looked through the rest of the patch set, but this is a pretty 
> trivial change so feel free to add a 
>
> Reviewed-By: Palmer Dabbelt <palmer@sifive.com>
>
> if you'd like.  If you'd like it merged through my tree then just say 
> something!

I'm not sure how these cross-cutting changes go, if you can take the
series through your tree that'd be great!

Thanks,
Shea
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WARNING: multiple messages have this Message-ID (diff)
From: shea@shealevy.com (Shea Levy)
To: linux-snps-arc@lists.infradead.org
Subject: [PATCH v2 02/16] riscv: Use INITRAMFS_GENERIC_UNLOAD.
Date: Sun, 25 Mar 2018 20:55:48 -0400	[thread overview]
Message-ID: <87o9jbu02z.fsf@xps13.shealevy.com> (raw)
In-Reply-To: <mhng-5691a509-dedf-4092-bd6d-020a81512c15@palmer-si-x1c4>

Hi Palmer,

Palmer Dabbelt <palmer at sifive.com> writes:

> On Sun, 25 Mar 2018 15:18:39 PDT (-0700), shea@shealevy.com wrote:
>> Signed-off-by: Shea Levy <shea at shealevy.com>
>> ---
>>  arch/riscv/Kconfig   | 1 +
>>  arch/riscv/mm/init.c | 6 ------
>>  2 files changed, 1 insertion(+), 6 deletions(-)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index c22ebe08e902..ab1b4cee84fc 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -37,6 +37,7 @@ config RISCV
>>  	select THREAD_INFO_IN_TASK
>>  	select RISCV_TIMER
>>  	select GENERIC_IRQ_MULTI_HANDLER
>> +	select INITRAMFS_GENERIC_UNLOAD
>>
>>  config MMU
>>  	def_bool y
>> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
>> index c77df8142be2..36f83fe8a726 100644
>> --- a/arch/riscv/mm/init.c
>> +++ b/arch/riscv/mm/init.c
>> @@ -62,9 +62,3 @@ void free_initmem(void)
>>  {
>>  	free_initmem_default(0);
>>  }
>> -
>> -#ifdef CONFIG_BLK_DEV_INITRD
>> -void free_initrd_mem(unsigned long start, unsigned long end)
>> -{
>> -}
>> -#endif /* CONFIG_BLK_DEV_INITRD */
>
> I haven't looked through the rest of the patch set, but this is a pretty 
> trivial change so feel free to add a 
>
> Reviewed-By: Palmer Dabbelt <palmer at sifive.com>
>
> if you'd like.  If you'd like it merged through my tree then just say 
> something!

I'm not sure how these cross-cutting changes go, if you can take the
series through your tree that'd be great!

Thanks,
Shea
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WARNING: multiple messages have this Message-ID (diff)
From: Shea Levy <shea@shealevy.com>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH v2 02/16] riscv: Use INITRAMFS_GENERIC_UNLOAD.
Date: Sun, 25 Mar 2018 20:55:48 -0400	[thread overview]
Message-ID: <87o9jbu02z.fsf@xps13.shealevy.com> (raw)
In-Reply-To: <mhng-5691a509-dedf-4092-bd6d-020a81512c15@palmer-si-x1c4>

Hi Palmer,

Palmer Dabbelt <palmer@sifive.com> writes:

> On Sun, 25 Mar 2018 15:18:39 PDT (-0700), shea at shealevy.com wrote:
>> Signed-off-by: Shea Levy <shea@shealevy.com>
>> ---
>>  arch/riscv/Kconfig   | 1 +
>>  arch/riscv/mm/init.c | 6 ------
>>  2 files changed, 1 insertion(+), 6 deletions(-)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index c22ebe08e902..ab1b4cee84fc 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -37,6 +37,7 @@ config RISCV
>>  	select THREAD_INFO_IN_TASK
>>  	select RISCV_TIMER
>>  	select GENERIC_IRQ_MULTI_HANDLER
>> +	select INITRAMFS_GENERIC_UNLOAD
>>
>>  config MMU
>>  	def_bool y
>> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
>> index c77df8142be2..36f83fe8a726 100644
>> --- a/arch/riscv/mm/init.c
>> +++ b/arch/riscv/mm/init.c
>> @@ -62,9 +62,3 @@ void free_initmem(void)
>>  {
>>  	free_initmem_default(0);
>>  }
>> -
>> -#ifdef CONFIG_BLK_DEV_INITRD
>> -void free_initrd_mem(unsigned long start, unsigned long end)
>> -{
>> -}
>> -#endif /* CONFIG_BLK_DEV_INITRD */
>
> I haven't looked through the rest of the patch set, but this is a pretty 
> trivial change so feel free to add a 
>
> Reviewed-By: Palmer Dabbelt <palmer@sifive.com>
>
> if you'd like.  If you'd like it merged through my tree then just say 
> something!

I'm not sure how these cross-cutting changes go, if you can take the
series through your tree that'd be great!

Thanks,
Shea
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  reply	other threads:[~2018-03-26  0:55 UTC|newest]

Thread overview: 525+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-24 17:44 [PATCH 00/16] Generic infrastructure for unloading initramfs Shea Levy
2018-03-24 17:44 ` [OpenRISC] " Shea Levy
2018-03-24 17:44 ` Shea Levy
2018-03-24 17:44 ` Shea Levy
2018-03-24 17:44 ` Shea Levy
2018-03-24 17:44 ` Shea Levy
2018-03-24 17:44 ` [PATCH 01/16] initrd: Add generic code path for common initrd unloading logic Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-25 17:17   ` LEROY Christophe
2018-03-25 17:17     ` [OpenRISC] " LEROY Christophe
2018-03-25 17:17     ` LEROY Christophe
2018-03-25 17:17     ` LEROY Christophe
2018-03-25 17:17     ` LEROY Christophe
2018-03-25 17:17     ` LEROY Christophe
2018-03-25 17:17     ` LEROY Christophe
2018-03-25 22:20     ` Shea Levy
2018-03-25 22:20       ` [OpenRISC] " Shea Levy
2018-03-25 22:20       ` Shea Levy
2018-03-25 22:20       ` Shea Levy
2018-03-25 22:20       ` Shea Levy
2018-03-25 22:20       ` Shea Levy
2018-03-28 12:04   ` Christoph Hellwig
2018-03-28 12:04     ` [OpenRISC] " Christoph Hellwig
2018-03-28 12:04     ` Christoph Hellwig
2018-03-28 12:04     ` Christoph Hellwig
2018-03-28 12:04     ` Christoph Hellwig
2018-03-28 12:04     ` Christoph Hellwig
2018-03-28 12:04     ` Christoph Hellwig
2018-03-28 12:23     ` Geert Uytterhoeven
2018-03-28 12:23       ` [OpenRISC] " Geert Uytterhoeven
2018-03-28 12:23       ` Geert Uytterhoeven
2018-03-28 12:23       ` Geert Uytterhoeven
2018-03-28 12:23       ` Geert Uytterhoeven
2018-03-28 12:23       ` Geert Uytterhoeven
2018-03-24 17:44 ` [PATCH 02/16] riscv: Use INITRAMFS_GENERIC_UNLOAD Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 03/16] alpha: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 04/16] arc: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 05/16] c6x: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 06/16] frv: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 07/16] h8300: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 08/16] m32r: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 09/16] m68k: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 10/16] microblaze: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 11/16] nios2: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 12/16] openrisc: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 13/16] parisc: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 14/16] powerpc: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 15/16] sh: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44 ` [PATCH 16/16] um: " Shea Levy
2018-03-24 17:44   ` [OpenRISC] " Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-24 17:44   ` Shea Levy
2018-03-25 22:18 ` [PATCH v2 00/16] Generic infrastructure for unloading initramfs Shea Levy
2018-03-25 22:18   ` [OpenRISC] " Shea Levy
2018-03-25 22:18   ` Shea Levy
2018-03-25 22:18   ` Shea Levy
2018-03-25 22:18   ` Shea Levy
2018-03-25 22:18   ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 01/16] initrd: Add generic code path for common initrd unloading logic Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 02/16] riscv: Use INITRAMFS_GENERIC_UNLOAD Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-26  0:41     ` Palmer Dabbelt
2018-03-26  0:41       ` Palmer Dabbelt
2018-03-26  0:41       ` [OpenRISC] " Palmer Dabbelt
2018-03-26  0:41       ` Palmer Dabbelt
2018-03-26  0:41       ` Palmer Dabbelt
2018-03-26  0:41       ` Palmer Dabbelt
2018-03-26  0:41       ` Palmer Dabbelt
2018-03-26  0:55       ` Shea Levy [this message]
2018-03-26  0:55         ` [OpenRISC] " Shea Levy
2018-03-26  0:55         ` Shea Levy
2018-03-26  0:55         ` Shea Levy
2018-03-26  0:55         ` Shea Levy
2018-03-26  0:55         ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 03/16] alpha: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 04/16] arc: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 05/16] c6x: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 06/16] frv: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 07/16] h8300: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 08/16] m32r: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 09/16] m68k: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 10/16] microblaze: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 11/16] nios2: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 12/16] openrisc: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 13/16] parisc: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 14/16] powerpc: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 15/16] sh: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18   ` [PATCH v2 16/16] um: " Shea Levy
2018-03-25 22:18     ` [OpenRISC] " Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-25 22:18     ` Shea Levy
2018-03-28 15:26   ` [PATCH] Extract initrd free logic from arch-specific code Shea Levy
2018-03-28 15:26     ` Shea Levy
2018-03-28 15:26     ` [OpenRISC] " Shea Levy
2018-03-28 15:26     ` Shea Levy
2018-03-28 15:26     ` Shea Levy
2018-03-28 15:26     ` Shea Levy
2018-03-28 15:58     ` Rob Landley
2018-03-28 15:58       ` Rob Landley
2018-03-28 15:58       ` [OpenRISC] " Rob Landley
2018-03-28 15:58       ` Rob Landley
2018-03-28 15:58       ` Rob Landley
2018-03-28 15:58       ` Rob Landley
2018-03-28 16:04       ` Shea Levy
2018-03-28 16:04         ` Shea Levy
2018-03-28 16:04         ` [OpenRISC] " Shea Levy
2018-03-28 16:04         ` Shea Levy
2018-03-28 16:04         ` Shea Levy
2018-03-28 16:04         ` Shea Levy
2018-03-28 16:48       ` Russell King - ARM Linux
2018-03-28 16:48         ` [OpenRISC] " Russell King - ARM Linux
2018-03-28 16:48         ` Russell King - ARM Linux
2018-03-28 16:48         ` Russell King - ARM Linux
2018-03-28 16:48         ` Russell King - ARM Linux
2018-03-28 19:04         ` Rob Landley
2018-03-28 19:04           ` [OpenRISC] " Rob Landley
2018-03-28 19:04           ` Rob Landley
2018-03-28 19:04           ` Rob Landley
2018-03-28 19:04           ` Rob Landley
2018-03-28 22:14           ` Russell King - ARM Linux
2018-03-28 22:14             ` [OpenRISC] " Russell King - ARM Linux
2018-03-28 22:14             ` Russell King - ARM Linux
2018-03-28 22:14             ` Russell King - ARM Linux
2018-03-28 22:14             ` Russell King - ARM Linux
2018-03-28 22:37             ` Oliver
2018-03-28 22:37               ` Oliver
2018-03-28 22:37               ` [OpenRISC] " Oliver
2018-03-28 22:37               ` Oliver
2018-03-28 22:37               ` Oliver
2018-03-28 22:37               ` Oliver
2018-03-29  0:23               ` Nicholas Piggin
2018-03-29  0:23                 ` [OpenRISC] " Nicholas Piggin
2018-03-29  0:23                 ` Nicholas Piggin
2018-03-29  0:23                 ` Nicholas Piggin
2018-03-29  0:23                 ` Nicholas Piggin
2018-03-29 15:27               ` Russell King - ARM Linux
2018-03-29 15:27                 ` Russell King - ARM Linux
2018-03-29 15:27                 ` [OpenRISC] " Russell King - ARM Linux
2018-03-29 15:27                 ` Russell King - ARM Linux
2018-03-29 15:27                 ` Russell King - ARM Linux
2018-03-29 15:27                 ` Russell King - ARM Linux
2018-03-29 15:43                 ` Geert Uytterhoeven
2018-03-29 15:43                   ` Geert Uytterhoeven
2018-03-29 15:43                   ` [OpenRISC] " Geert Uytterhoeven
2018-03-29 15:43                   ` Geert Uytterhoeven
2018-03-29 15:43                   ` Geert Uytterhoeven
2018-03-29 15:43                   ` Geert Uytterhoeven
2018-03-29 15:58                   ` Russell King - ARM Linux
2018-03-29 15:58                     ` Russell King - ARM Linux
2018-03-29 15:58                     ` [OpenRISC] " Russell King - ARM Linux
2018-03-29 15:58                     ` Russell King - ARM Linux
2018-03-29 15:58                     ` Russell King - ARM Linux
2018-03-29 15:58                     ` Russell King - ARM Linux
2018-03-29 16:53                     ` Marc Zyngier
2018-03-29 16:53                       ` Marc Zyngier
2018-03-29 16:53                       ` [OpenRISC] " Marc Zyngier
2018-03-29 16:53                       ` Marc Zyngier
2018-03-29 16:53                       ` Marc Zyngier
2018-03-29 16:53                       ` Marc Zyngier
2018-03-29 17:32                       ` Russell King - ARM Linux
2018-03-29 17:32                         ` Russell King - ARM Linux
2018-03-29 17:32                         ` [OpenRISC] " Russell King - ARM Linux
2018-03-29 17:32                         ` Russell King - ARM Linux
2018-03-29 17:32                         ` Russell King - ARM Linux
2018-03-29 17:32                         ` Russell King - ARM Linux
2018-03-29 17:53                         ` Marc Zyngier
2018-03-29 17:53                           ` Marc Zyngier
2018-03-29 17:53                           ` [OpenRISC] " Marc Zyngier
2018-03-29 17:53                           ` Marc Zyngier
2018-03-29 17:53                           ` Marc Zyngier
2018-03-29 17:53                           ` Marc Zyngier
2018-03-29 17:43                 ` Rob Landley
2018-03-29 17:43                   ` Rob Landley
2018-03-29 17:43                   ` [OpenRISC] " Rob Landley
2018-03-29 17:43                   ` Rob Landley
2018-03-29 17:43                   ` Rob Landley
2018-03-29 17:43                   ` Rob Landley
2018-03-29 16:39             ` Rob Landley
2018-03-29 16:39               ` [OpenRISC] " Rob Landley
2018-03-29 16:39               ` Rob Landley
2018-03-29 16:39               ` Rob Landley
2018-03-29 16:39               ` Rob Landley
2018-03-29 17:31               ` Russell King - ARM Linux
2018-03-29 17:31                 ` [OpenRISC] " Russell King - ARM Linux
2018-03-29 17:31                 ` Russell King - ARM Linux
2018-03-29 17:31                 ` Russell King - ARM Linux
2018-03-29 17:31                 ` Russell King - ARM Linux
2018-03-28 16:55     ` Kees Cook
2018-03-28 16:55       ` Kees Cook
2018-03-28 16:55       ` [OpenRISC] " Kees Cook
2018-03-28 16:55       ` Kees Cook
2018-03-28 16:55       ` Kees Cook
2018-03-28 16:55       ` Kees Cook
2018-03-29  1:12       ` Wei Yang
2018-03-29  1:12         ` Wei Yang
2018-03-29  1:12         ` [OpenRISC] " Wei Yang
2018-03-29  1:12         ` Wei Yang
2018-03-29  1:12         ` Wei Yang
2018-03-29  1:12         ` Wei Yang
2018-03-28 20:36     ` [PATCH v4 0/16] Generic initrd_free_mem Shea Levy
2018-03-28 20:36       ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 01/16] initrd: Add weakly-linked generic free_initrd_mem Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 02/16] riscv: Use " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-29  9:52         ` Daniel Thompson
2018-03-29  9:52           ` Daniel Thompson
2018-03-29 11:12           ` Shea Levy
2018-03-29 11:12             ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 03/16] alpha: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 04/16] arc: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 05/16] c6x: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 06/16] frv: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 07/16] h8300: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 08/16] m32r: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 09/16] m68k: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-29  6:55         ` Geert Uytterhoeven
2018-03-29  6:55           ` Geert Uytterhoeven
2018-03-28 20:36       ` [PATCH v4 10/16] microblaze: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 11/16] nios2: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 12/16] openrisc: " Shea Levy
2018-03-28 20:36         ` [OpenRISC] " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 13/16] parisc: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 14/16] powerpc: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:44         ` Joe Perches
2018-03-28 20:44           ` Joe Perches
2018-03-28 20:53           ` Shea Levy
2018-03-28 20:53             ` Shea Levy
2018-03-29 13:19             ` Michael Ellerman
2018-03-29 13:19               ` Michael Ellerman
2018-04-01 15:01               ` Shea Levy
2018-04-01 15:01                 ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 15/16] sh: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-28 20:36       ` [PATCH v4 16/16] um: " Shea Levy
2018-03-28 20:36         ` Shea Levy
2018-03-29 11:31       ` [PATCH v5 01/16] initrd: Add weakly-linked " Shea Levy
2018-03-29 11:31         ` Shea Levy
2018-03-29 11:31         ` [PATCH v5 02/16] riscv: Free initrds with " Shea Levy
2018-03-29 11:31           ` Shea Levy
2018-03-29 11:31         ` [PATCH v5 03/16] alpha: Switch to " Shea Levy
2018-03-29 11:31           ` Shea Levy
2018-03-29 11:31         ` [PATCH v5 04/16] arc: " Shea Levy
2018-03-29 11:31           ` Shea Levy
2018-03-29 11:31           ` Shea Levy
2018-03-29 11:31         ` [PATCH v5 05/16] c6x: " Shea Levy
2018-03-29 11:31           ` Shea Levy
2018-03-29 11:31         ` [PATCH v5 06/16] frv: " Shea Levy
2018-03-29 11:31           ` Shea Levy
2018-03-29 11:31         ` [PATCH v5 07/16] h8300: " Shea Levy
2018-03-29 11:31           ` Shea Levy
2018-03-29 11:31         ` [PATCH v5 08/16] m32r: " Shea Levy
2018-03-29 11:31           ` Shea Levy
2018-03-29 11:32         ` [PATCH v5 09/16] m68k: " Shea Levy
2018-03-29 11:32           ` Shea Levy
2018-03-29 11:32         ` [PATCH v5 10/16] microblaze: " Shea Levy
2018-03-29 11:32           ` Shea Levy
2018-03-29 11:32         ` [PATCH v5 11/16] nios2: " Shea Levy
2018-03-29 11:32           ` Shea Levy
2018-03-29 11:32         ` [PATCH v5 12/16] openrisc: " Shea Levy
2018-03-29 11:32           ` [OpenRISC] " Shea Levy
2018-03-29 11:32           ` Shea Levy
2018-03-29 11:50           ` Stafford Horne
2018-03-29 11:50             ` [OpenRISC] " Stafford Horne
2018-03-29 11:50             ` Stafford Horne
2018-03-29 11:32         ` [PATCH v5 13/16] parisc: " Shea Levy
2018-03-29 11:32           ` Shea Levy
2018-03-29 11:32         ` [PATCH v5 14/16] powerpc: " Shea Levy
2018-03-29 11:32           ` Shea Levy
2018-03-29 11:32         ` [PATCH v5 15/16] sh: " Shea Levy
2018-03-29 11:32           ` Shea Levy
2018-03-29 11:32           ` Shea Levy
2018-03-29 16:26           ` Rich Felker
2018-03-29 16:26             ` Rich Felker
2018-03-29 16:26             ` Rich Felker
2018-03-29 11:32         ` [PATCH v5 16/16] um: " Shea Levy
2018-03-29 11:32           ` Shea Levy
2018-04-01 14:59         ` [PATCH v6 01/16] initrd: Add weakly-linked " Shea Levy
2018-04-01 14:59           ` Shea Levy
2018-04-01 14:59           ` [PATCH v6 02/16] riscv: Free initrds with " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-01 14:59           ` [PATCH v6 03/16] alpha: Switch to " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-01 14:59           ` [PATCH v6 04/16] arc: " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-04 15:21             ` Alexey Brodkin
2018-04-04 15:21               ` Alexey Brodkin
2018-04-04 15:21               ` Alexey Brodkin
2018-04-09 16:40             ` Vineet Gupta
2018-04-09 16:40               ` Vineet Gupta
2018-04-09 16:40               ` Vineet Gupta
2018-04-01 14:59           ` [PATCH v6 05/16] c6x: " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-19 16:37             ` Mark Salter
2018-04-19 16:37               ` Mark Salter
2018-04-01 14:59           ` [PATCH v6 06/16] frv: " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-01 14:59           ` [PATCH v6 07/16] h8300: " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-01 14:59           ` [PATCH v6 08/16] m32r: " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-01 14:59           ` [PATCH v6 09/16] m68k: " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-01 14:59           ` [PATCH v6 10/16] microblaze: " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-01 14:59           ` [PATCH v6 11/16] nios2: " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-02 16:04             ` Ley Foon Tan
2018-04-02 16:04               ` Ley Foon Tan
2018-04-01 14:59           ` [PATCH v6 12/16] openrisc: " Shea Levy
2018-04-01 14:59             ` [OpenRISC] " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-01 14:59           ` [PATCH v6 13/16] parisc: " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-02 20:07             ` Helge Deller
2018-04-02 20:07               ` Helge Deller
2018-04-01 14:59           ` [PATCH v6 14/16] powerpc: " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-01 14:59           ` [PATCH v6 15/16] sh: " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-01 14:59           ` [PATCH v6 16/16] um: " Shea Levy
2018-04-01 14:59             ` Shea Levy
2018-04-18 11:10           ` [PATCH v6 01/16] initrd: Add weakly-linked " Shea Levy
2018-04-18 11:10             ` Shea Levy
2018-04-20 20:22             ` Palmer Dabbelt
2018-04-20 20:22               ` Palmer Dabbelt
2018-04-20 22:50               ` Shea Levy
2018-04-20 22:50                 ` Shea Levy
2018-05-09 11:15                 ` Shea Levy
2018-05-09 11:15                   ` Shea Levy
2018-03-30  1:43     ` [PATCH] Extract initrd free logic from arch-specific code kbuild test robot
2018-03-30  1:43       ` [OpenRISC] " kbuild test robot
2018-03-30  1:43       ` kbuild test robot
2018-03-30  1:43       ` kbuild test robot
2018-03-30  1:43       ` kbuild test robot
2018-03-30  1:43       ` kbuild test robot
2018-03-30  3:16     ` kbuild test robot
2018-03-30  3:16       ` [OpenRISC] " kbuild test robot
2018-03-30  3:16       ` kbuild test robot
2018-03-30  3:16       ` kbuild test robot
2018-03-30  3:16       ` kbuild test robot
2018-03-30  3:16       ` kbuild test robot
2018-03-30 11:15     ` Ingo Molnar
2018-03-30 11:15       ` [OpenRISC] " Ingo Molnar
2018-03-30 11:15       ` Ingo Molnar
2018-03-30 11:15       ` Ingo Molnar
2018-03-30 11:15       ` Ingo Molnar
2018-04-01 15:05       ` Shea Levy
2018-04-01 15:05         ` [OpenRISC] " Shea Levy
2018-04-01 15:05         ` Shea Levy
2018-04-01 15:05         ` Shea Levy
2018-04-01 15:05         ` Shea Levy
2018-04-02  5:59         ` Ingo Molnar
2018-04-02  5:59           ` [OpenRISC] " Ingo Molnar
2018-04-02  5:59           ` Ingo Molnar
2018-04-02  5:59           ` Ingo Molnar
2018-04-02  5:59           ` Ingo Molnar

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