All of lore.kernel.org
 help / color / mirror / Atom feed
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 03/13] drm/i915: Record the position of the workarounds in the tail of the request
Date: Thu, 25 Aug 2016 12:35:30 +0300	[thread overview]
Message-ID: <87poox9onx.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20160825090839.9952-4-chris@chris-wilson.co.uk>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Rather than blindly assuming we need to advance the tail for
> resubmitting the request via the ELSP, record the position.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_gem_request.h | 15 +++++++++------
>  drivers/gpu/drm/i915/intel_lrc.c        |  4 ++--
>  2 files changed, 11 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_request.h b/drivers/gpu/drm/i915/i915_gem_request.h
> index 91014de8bfbc..2faa3bb4c39b 100644
> --- a/drivers/gpu/drm/i915/i915_gem_request.h
> +++ b/drivers/gpu/drm/i915/i915_gem_request.h
> @@ -88,20 +88,23 @@ struct drm_i915_gem_request {
>  	 */
>  	u32 previous_seqno;
>  
> -	/** Position in the ringbuffer of the start of the request */
> +	/** Position in the ring of the start of the request */
>  	u32 head;
>  
>  	/**
> -	 * Position in the ringbuffer of the start of the postfix.
> -	 * This is required to calculate the maximum available ringbuffer
> -	 * space without overwriting the postfix.
> +	 * Position in the ring of the start of the postfix.
> +	 * This is required to calculate the maximum available ring space
> +	 * without overwriting the postfix.
>  	 */
>  	u32 postfix;
>  
> -	/** Position in the ringbuffer of the end of the whole request */
> +	/** Position in the ring of the end of the whole request */
>  	u32 tail;
>  
> -	/** Preallocate space in the ringbuffer for the emitting the request */
> +	/** Position in the ring of the end of any workarounds after the tail */
> +	u32 wa_tail;
> +
> +	/** Preallocate space in the ring for the emitting the request */
>  	u32 reserved_space;
>  
>  	/**
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index ca52b8e63305..25e0972e7166 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -482,8 +482,7 @@ static void execlists_unqueue(struct intel_engine_cs *engine)
>  		 * resubmit the request. See gen8_emit_request() for where we
>  		 * prepare the padding after the end of the request.
>  		 */
> -		req0->tail += 8;
> -		req0->tail &= req0->ring->size - 1;
> +		req0->tail = req0->wa_tail;
>  	}
>  
>  	execlists_elsp_submit_contexts(req0, req1);
> @@ -711,6 +710,7 @@ intel_logical_ring_advance(struct drm_i915_gem_request *request)
>  	intel_ring_emit(ring, MI_NOOP);
>  	intel_ring_emit(ring, MI_NOOP);
>  	intel_ring_advance(ring);
> +	request->wa_tail = ring->tail;
>  
>  	/* We keep the previous context alive until we retire the following
>  	 * request. This ensures that any the context object is still pinned
> -- 
> 2.9.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-08-25  9:36 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-25  9:08 Shortest path to EGL_ANDRIOD_native_sync Chris Wilson
2016-08-25  9:08 ` [PATCH 01/13] drm/i915: Add a sw fence for collecting up dma fences Chris Wilson
2016-08-25 10:42   ` John Harrison
2016-08-25 10:51     ` Chris Wilson
2016-08-25 11:49   ` Joonas Lahtinen
2016-08-25 12:25     ` Chris Wilson
2016-08-25 16:52     ` Chris Wilson
2016-08-25  9:08 ` [PATCH 02/13] drm/i915: Only queue requests during execlists submission Chris Wilson
2016-08-26  9:41   ` Mika Kuoppala
2016-08-26  9:51     ` Chris Wilson
2016-08-26  9:54     ` Chris Wilson
2016-08-26 10:43       ` Mika Kuoppala
2016-08-26 10:53         ` Chris Wilson
2016-08-25  9:08 ` [PATCH 03/13] drm/i915: Record the position of the workarounds in the tail of the request Chris Wilson
2016-08-25  9:35   ` Mika Kuoppala [this message]
2016-08-25  9:08 ` [PATCH 04/13] drm/i915: Compute the ELSP register location once Chris Wilson
2016-08-25  9:51   ` Mika Kuoppala
2016-08-25 10:37     ` Chris Wilson
2016-08-25  9:08 ` [PATCH 05/13] drm/i915: Reorder submitting the requests to ELSP Chris Wilson
2016-08-25 13:02   ` Mika Kuoppala
2016-08-25  9:08 ` [PATCH 06/13] drm/i915: Simplify ELSP queue request tracking Chris Wilson
2016-08-25  9:08 ` [PATCH 07/13] drm/i915: Update reset path to fix incomplete requests Chris Wilson
2016-08-25  9:08 ` [PATCH 08/13] drm/i915: Drive request submission through fence callbacks Chris Wilson
2016-08-25 12:08   ` Joonas Lahtinen
2016-08-25 12:35     ` Chris Wilson
2016-08-26 12:47   ` John Harrison
2016-08-26 16:20     ` Chris Wilson
2016-08-25  9:08 ` [PATCH 09/13] drm/i915: Move execbuf object synchronisation to i915_gem_execbuffer Chris Wilson
2016-08-26 13:29   ` John Harrison
2016-08-25  9:08 ` [PATCH 10/13] drm/i915: Nonblocking request submission Chris Wilson
2016-08-26 13:39   ` John Harrison
2016-08-26 16:14     ` Chris Wilson
2016-08-25  9:08 ` [PATCH 11/13] drm/i915: Serialise execbuf operation after a dma-buf reservation object Chris Wilson
2016-08-26 13:52   ` John Harrison
2016-08-25  9:08 ` [PATCH 12/13] drm/i915: Enable userspace to opt-out of implicit fencing Chris Wilson
2016-08-25  9:08 ` [PATCH 13/13] drm/i915: Support explicit fencing for execbuf Chris Wilson
2016-08-26 15:08   ` John Harrison
2016-08-26 15:29     ` John Harrison
2016-08-26 15:44       ` Chris Wilson
2016-08-25  9:08 ` [PATCH libdrm 14/15] intel: Allow the client to control implicit synchronisation Chris Wilson
2016-08-25  9:08 ` [PATCH libdrm 15/15] intel: Support passing of explicit fencing from execbuf Chris Wilson
2016-09-30 20:53   ` Rafael Antognolli
2016-10-01  8:36     ` Chris Wilson
2016-08-25  9:08 ` [PATCH 16/21] i965: Add explicit fence tracking to batch flush Chris Wilson
2016-08-25  9:08 ` [PATCH 17/21] i965: Split intel_syncobject into vfuncs Chris Wilson
2016-08-25  9:08 ` [PATCH 18/21] i965: Add fd-fence backend to intel_syncobject Chris Wilson
2016-08-25  9:08 ` [PATCH 19/21] rfc! i965: Add intel_screen::has_fence_fd Chris Wilson
2016-08-25  9:08 ` [PATCH 20/21] i965: Implement EGL_ANDROID_native_fence_sync support for DRI2_FENCE Chris Wilson
2016-08-25  9:08 ` [PATCH 21/21] i965: Disable implicit sync when using EGL_ANDROID_native_fence_sync Chris Wilson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87poox9onx.fsf@gaia.fi.intel.com \
    --to=mika.kuoppala@linux.intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.