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* [PATCH] drm/i915: Fix Sink CRC
@ 2014-09-12 23:49 Rodrigo Vivi
  2014-09-15  8:56 ` Daniel Vetter
  2014-09-15  9:50 ` Jani Nikula
  0 siblings, 2 replies; 7+ messages in thread
From: Rodrigo Vivi @ 2014-09-12 23:49 UTC (permalink / raw)
  To: intel-gfx; +Cc: dri-devel, Rodrigo Vivi

In some cases like when PSR just got enabled the panel need more vblank
times to calculate CRC. I figured that out with the new PSR test cases
facing some cases that I had a green screen but a blank CRC. Even with
2 vblank waits on kernel + 2 vblank waits on test case.

So let's give up to 6 vblank wait time. However we now check for
TEST_CRC_COUNT that shows when panel finished to calculate CRC and
has it ready.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 20 ++++++++++++++------
 include/drm/drm_dp_helper.h     |  5 +++--
 2 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f79473b..eda6467 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3468,21 +3468,29 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
 	struct drm_device *dev = intel_dig_port->base.base.dev;
 	struct intel_crtc *intel_crtc =
 		to_intel_crtc(intel_dig_port->base.base.crtc);
-	u8 buf[1];
+	u8 buf;
+	int test_crc_count;
+	int attempts = 6;
 
-	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, buf) < 0)
+	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0)
 		return -EAGAIN;
 
-	if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
+	if (!(buf & DP_TEST_CRC_SUPPORTED))
 		return -ENOTTY;
 
+	test_crc_count = buf & DP_TEST_COUNT_MASK;
+
 	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
 			       DP_TEST_SINK_START) < 0)
 		return -EAGAIN;
 
-	/* Wait 2 vblanks to be sure we will have the correct CRC value */
-	intel_wait_for_vblank(dev, intel_crtc->pipe);
-	intel_wait_for_vblank(dev, intel_crtc->pipe);
+	do {
+		drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
+		intel_wait_for_vblank(dev, intel_crtc->pipe);
+	} while(attempts-- && (buf & DP_TEST_COUNT_MASK) <= test_crc_count);
+
+	if (attempts == 0)
+		return -EAGAIN;
 
 	if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0)
 		return -EAGAIN;
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 9305c71..8edeed0 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -303,7 +303,8 @@
 #define DP_TEST_CRC_B_CB		    0x244
 
 #define DP_TEST_SINK_MISC		    0x246
-#define DP_TEST_CRC_SUPPORTED		    (1 << 5)
+# define DP_TEST_CRC_SUPPORTED		    (1 << 5)
+# define DP_TEST_COUNT_MASK		    0x7
 
 #define DP_TEST_RESPONSE		    0x260
 # define DP_TEST_ACK			    (1 << 0)
@@ -313,7 +314,7 @@
 #define DP_TEST_EDID_CHECKSUM		    0x261
 
 #define DP_TEST_SINK			    0x270
-#define DP_TEST_SINK_START	    (1 << 0)
+# define DP_TEST_SINK_START		    (1 << 0)
 
 #define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
 # define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)
-- 
1.9.3

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/i915: Fix Sink CRC
  2014-09-12 23:49 [PATCH] drm/i915: Fix Sink CRC Rodrigo Vivi
@ 2014-09-15  8:56 ` Daniel Vetter
  2014-09-15  9:50 ` Jani Nikula
  1 sibling, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2014-09-15  8:56 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx, dri-devel

On Fri, Sep 12, 2014 at 07:49:25PM -0400, Rodrigo Vivi wrote:
> In some cases like when PSR just got enabled the panel need more vblank
> times to calculate CRC. I figured that out with the new PSR test cases
> facing some cases that I had a green screen but a blank CRC. Even with
> 2 vblank waits on kernel + 2 vblank waits on test case.
> 
> So let's give up to 6 vblank wait time. However we now check for
> TEST_CRC_COUNT that shows when panel finished to calculate CRC and
> has it ready.
> 
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 20 ++++++++++++++------
>  include/drm/drm_dp_helper.h     |  5 +++--
>  2 files changed, 17 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index f79473b..eda6467 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3468,21 +3468,29 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
>  	struct drm_device *dev = intel_dig_port->base.base.dev;
>  	struct intel_crtc *intel_crtc =
>  		to_intel_crtc(intel_dig_port->base.base.crtc);
> -	u8 buf[1];
> +	u8 buf;
> +	int test_crc_count;
> +	int attempts = 6;
>  
> -	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, buf) < 0)
> +	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0)
>  		return -EAGAIN;
>  
> -	if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
> +	if (!(buf & DP_TEST_CRC_SUPPORTED))
>  		return -ENOTTY;
>  
> +	test_crc_count = buf & DP_TEST_COUNT_MASK;
> +
>  	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
>  			       DP_TEST_SINK_START) < 0)
>  		return -EAGAIN;
>  
> -	/* Wait 2 vblanks to be sure we will have the correct CRC value */
> -	intel_wait_for_vblank(dev, intel_crtc->pipe);
> -	intel_wait_for_vblank(dev, intel_crtc->pipe);
> +	do {
> +		drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
> +		intel_wait_for_vblank(dev, intel_crtc->pipe);
> +	} while(attempts-- && (buf & DP_TEST_COUNT_MASK) <= test_crc_count);

Shouldn't this here fest for (buf & MAS) != test_crc_count?
-Daniel

> +
> +	if (attempts == 0)
> +		return -EAGAIN;
>  
>  	if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0)
>  		return -EAGAIN;
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 9305c71..8edeed0 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -303,7 +303,8 @@
>  #define DP_TEST_CRC_B_CB		    0x244
>  
>  #define DP_TEST_SINK_MISC		    0x246
> -#define DP_TEST_CRC_SUPPORTED		    (1 << 5)
> +# define DP_TEST_CRC_SUPPORTED		    (1 << 5)
> +# define DP_TEST_COUNT_MASK		    0x7
>  
>  #define DP_TEST_RESPONSE		    0x260
>  # define DP_TEST_ACK			    (1 << 0)
> @@ -313,7 +314,7 @@
>  #define DP_TEST_EDID_CHECKSUM		    0x261
>  
>  #define DP_TEST_SINK			    0x270
> -#define DP_TEST_SINK_START	    (1 << 0)
> +# define DP_TEST_SINK_START		    (1 << 0)
>  
>  #define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
>  # define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)
> -- 
> 1.9.3
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/i915: Fix Sink CRC
  2014-09-12 23:49 [PATCH] drm/i915: Fix Sink CRC Rodrigo Vivi
  2014-09-15  8:56 ` Daniel Vetter
@ 2014-09-15  9:50 ` Jani Nikula
  2014-09-15 23:21   ` [PATCH 1/2] " Rodrigo Vivi
  1 sibling, 1 reply; 7+ messages in thread
From: Jani Nikula @ 2014-09-15  9:50 UTC (permalink / raw)
  To: intel-gfx; +Cc: dri-devel, Rodrigo Vivi

On Sat, 13 Sep 2014, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> In some cases like when PSR just got enabled the panel need more vblank
> times to calculate CRC. I figured that out with the new PSR test cases
> facing some cases that I had a green screen but a blank CRC. Even with
> 2 vblank waits on kernel + 2 vblank waits on test case.
>
> So let's give up to 6 vblank wait time. However we now check for
> TEST_CRC_COUNT that shows when panel finished to calculate CRC and
> has it ready.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 20 ++++++++++++++------
>  include/drm/drm_dp_helper.h     |  5 +++--
>  2 files changed, 17 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index f79473b..eda6467 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3468,21 +3468,29 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
>  	struct drm_device *dev = intel_dig_port->base.base.dev;
>  	struct intel_crtc *intel_crtc =
>  		to_intel_crtc(intel_dig_port->base.base.crtc);
> -	u8 buf[1];
> +	u8 buf;
> +	int test_crc_count;
> +	int attempts = 6;
>  
> -	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, buf) < 0)
> +	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0)
>  		return -EAGAIN;
>  
> -	if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
> +	if (!(buf & DP_TEST_CRC_SUPPORTED))
>  		return -ENOTTY;
>  
> +	test_crc_count = buf & DP_TEST_COUNT_MASK;
> +
>  	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
>  			       DP_TEST_SINK_START) < 0)
>  		return -EAGAIN;
>  
> -	/* Wait 2 vblanks to be sure we will have the correct CRC value */
> -	intel_wait_for_vblank(dev, intel_crtc->pipe);
> -	intel_wait_for_vblank(dev, intel_crtc->pipe);
> +	do {
> +		drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
> +		intel_wait_for_vblank(dev, intel_crtc->pipe);
> +	} while(attempts-- && (buf & DP_TEST_COUNT_MASK) <= test_crc_count);
> +
> +	if (attempts == 0)
> +		return -EAGAIN;

If the do-while stops because of attempts, we'll never end up here
because of the post-decrement. (We'll only return -EAGAIN here if the
other condition does not hold at precisely attempts == 1 before the
post-decrement.)

BR,
Jani.


>  
>  	if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0)
>  		return -EAGAIN;
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 9305c71..8edeed0 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -303,7 +303,8 @@
>  #define DP_TEST_CRC_B_CB		    0x244
>  
>  #define DP_TEST_SINK_MISC		    0x246
> -#define DP_TEST_CRC_SUPPORTED		    (1 << 5)
> +# define DP_TEST_CRC_SUPPORTED		    (1 << 5)
> +# define DP_TEST_COUNT_MASK		    0x7
>  
>  #define DP_TEST_RESPONSE		    0x260
>  # define DP_TEST_ACK			    (1 << 0)
> @@ -313,7 +314,7 @@
>  #define DP_TEST_EDID_CHECKSUM		    0x261
>  
>  #define DP_TEST_SINK			    0x270
> -#define DP_TEST_SINK_START	    (1 << 0)
> +# define DP_TEST_SINK_START		    (1 << 0)
>  
>  #define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
>  # define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)
> -- 
> 1.9.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 1/2] drm/i915: Fix Sink CRC
  2014-09-15  9:50 ` Jani Nikula
@ 2014-09-15 23:21   ` Rodrigo Vivi
  2014-09-16  8:57     ` Daniel Vetter
  0 siblings, 1 reply; 7+ messages in thread
From: Rodrigo Vivi @ 2014-09-15 23:21 UTC (permalink / raw)
  To: intel-gfx; +Cc: Jani Nikula, Daniel Vetter, dri-devel, Rodrigo Vivi

In some cases like when PSR just got enabled the panel need more vblank
times to calculate CRC. I figured that out with the new PSR test cases
facing some cases that I had a green screen but a blank CRC. Even with
2 vblank waits on kernel + 2 vblank waits on test case.

So let's give up to 6 vblank wait time. However we now check for
TEST_CRC_COUNT that shows when panel finished to calculate CRC and
has it ready.

v2: Jani pointed out attempts decrements was wrong and should never reach
the error condition. And Daniel pointed out that EIO is more appropriated than
EGAIN. Also I realized that I have to read test_crc_count after setting
test_sink

Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 21 +++++++++++++++------
 include/drm/drm_dp_helper.h     |  5 +++--
 2 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f79473b..fae0fae 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3468,21 +3468,30 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
 	struct drm_device *dev = intel_dig_port->base.base.dev;
 	struct intel_crtc *intel_crtc =
 		to_intel_crtc(intel_dig_port->base.base.crtc);
-	u8 buf[1];
+	u8 buf;
+	int test_crc_count;
+	int attempts = 6;
 
-	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, buf) < 0)
+	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0)
 		return -EAGAIN;
 
-	if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
+	if (!(buf & DP_TEST_CRC_SUPPORTED))
 		return -ENOTTY;
 
 	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
 			       DP_TEST_SINK_START) < 0)
 		return -EAGAIN;
 
-	/* Wait 2 vblanks to be sure we will have the correct CRC value */
-	intel_wait_for_vblank(dev, intel_crtc->pipe);
-	intel_wait_for_vblank(dev, intel_crtc->pipe);
+	drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
+	test_crc_count = buf & DP_TEST_COUNT_MASK;
+
+	do {
+		drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
+		intel_wait_for_vblank(dev, intel_crtc->pipe);
+	} while (--attempts && (buf & DP_TEST_COUNT_MASK) == test_crc_count);
+
+	if (attempts == 0)
+		return -EIO;
 
 	if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0)
 		return -EAGAIN;
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 9305c71..8edeed0 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -303,7 +303,8 @@
 #define DP_TEST_CRC_B_CB		    0x244
 
 #define DP_TEST_SINK_MISC		    0x246
-#define DP_TEST_CRC_SUPPORTED		    (1 << 5)
+# define DP_TEST_CRC_SUPPORTED		    (1 << 5)
+# define DP_TEST_COUNT_MASK		    0x7
 
 #define DP_TEST_RESPONSE		    0x260
 # define DP_TEST_ACK			    (1 << 0)
@@ -313,7 +314,7 @@
 #define DP_TEST_EDID_CHECKSUM		    0x261
 
 #define DP_TEST_SINK			    0x270
-#define DP_TEST_SINK_START	    (1 << 0)
+# define DP_TEST_SINK_START		    (1 << 0)
 
 #define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
 # define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)
-- 
1.9.3

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH 1/2] drm/i915: Fix Sink CRC
  2014-09-15 23:21   ` [PATCH 1/2] " Rodrigo Vivi
@ 2014-09-16  8:57     ` Daniel Vetter
  2014-09-16 23:18       ` [PATCH] " Rodrigo Vivi
  0 siblings, 1 reply; 7+ messages in thread
From: Daniel Vetter @ 2014-09-16  8:57 UTC (permalink / raw)
  To: Rodrigo Vivi
  Cc: Jani Nikula, Daniel Vetter, intel-gfx, dri-devel, Rodrigo Vivi

On Mon, Sep 15, 2014 at 07:21:50PM -0400, Rodrigo Vivi wrote:
> In some cases like when PSR just got enabled the panel need more vblank
> times to calculate CRC. I figured that out with the new PSR test cases
> facing some cases that I had a green screen but a blank CRC. Even with
> 2 vblank waits on kernel + 2 vblank waits on test case.
> 
> So let's give up to 6 vblank wait time. However we now check for
> TEST_CRC_COUNT that shows when panel finished to calculate CRC and
> has it ready.
> 
> v2: Jani pointed out attempts decrements was wrong and should never reach
> the error condition. And Daniel pointed out that EIO is more appropriated than
> EGAIN. Also I realized that I have to read test_crc_count after setting
> test_sink
> 
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 21 +++++++++++++++------
>  include/drm/drm_dp_helper.h     |  5 +++--
>  2 files changed, 18 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index f79473b..fae0fae 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3468,21 +3468,30 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
>  	struct drm_device *dev = intel_dig_port->base.base.dev;
>  	struct intel_crtc *intel_crtc =
>  		to_intel_crtc(intel_dig_port->base.base.crtc);
> -	u8 buf[1];
> +	u8 buf;
> +	int test_crc_count;
> +	int attempts = 6;
>  
> -	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, buf) < 0)
> +	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0)
>  		return -EAGAIN;
>  
> -	if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
> +	if (!(buf & DP_TEST_CRC_SUPPORTED))
>  		return -ENOTTY;
>  
>  	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
>  			       DP_TEST_SINK_START) < 0)
>  		return -EAGAIN;
>  
> -	/* Wait 2 vblanks to be sure we will have the correct CRC value */
> -	intel_wait_for_vblank(dev, intel_crtc->pipe);
> -	intel_wait_for_vblank(dev, intel_crtc->pipe);
> +	drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
> +	test_crc_count = buf & DP_TEST_COUNT_MASK;
> +
> +	do {
> +		drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
> +		intel_wait_for_vblank(dev, intel_crtc->pipe);
> +	} while (--attempts && (buf & DP_TEST_COUNT_MASK) == test_crc_count);
> +
> +	if (attempts == 0)
> +		return -EIO;

I still think that some debug output here would be useful - after all
we've seen this happen now with your panel, so it could happen at other
places too. If there's nothing else I'll do that when applying.
-Daniel

>  
>  	if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0)
>  		return -EAGAIN;
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 9305c71..8edeed0 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -303,7 +303,8 @@
>  #define DP_TEST_CRC_B_CB		    0x244
>  
>  #define DP_TEST_SINK_MISC		    0x246
> -#define DP_TEST_CRC_SUPPORTED		    (1 << 5)
> +# define DP_TEST_CRC_SUPPORTED		    (1 << 5)
> +# define DP_TEST_COUNT_MASK		    0x7
>  
>  #define DP_TEST_RESPONSE		    0x260
>  # define DP_TEST_ACK			    (1 << 0)
> @@ -313,7 +314,7 @@
>  #define DP_TEST_EDID_CHECKSUM		    0x261
>  
>  #define DP_TEST_SINK			    0x270
> -#define DP_TEST_SINK_START	    (1 << 0)
> +# define DP_TEST_SINK_START		    (1 << 0)
>  
>  #define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
>  # define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)
> -- 
> 1.9.3
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH] drm/i915: Fix Sink CRC
  2014-09-16  8:57     ` Daniel Vetter
@ 2014-09-16 23:18       ` Rodrigo Vivi
  2014-09-29 18:56         ` Todd Previte
  0 siblings, 1 reply; 7+ messages in thread
From: Rodrigo Vivi @ 2014-09-16 23:18 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter, Jani Nikula, dri-devel, Rodrigo Vivi

In some cases like when PSR just got enabled the panel need more vblank
times to calculate CRC. I figured that out with the new PSR test cases
facing some cases that I had a green screen but a blank CRC. Even with
2 vblank waits on kernel + 2 vblank waits on test case.

So let's give up to 6 vblank wait time. However we now check for
TEST_CRC_COUNT that shows when panel finished to calculate CRC and
has it ready.

v2: Jani pointed out attempts decrements was wrong and should never reach
the error condition. And Daniel pointed out that EIO is more appropriated than
EGAIN. Also I realized that I have to read test_crc_count after setting
test_sink

v3: Rebase and adding error message

Cc: Todd Previte <tprevite@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 23 +++++++++++++++++------
 include/drm/drm_dp_helper.h     |  5 +++--
 2 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index e4d0367..d9091dc7 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3468,21 +3468,32 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
 	struct drm_device *dev = intel_dig_port->base.base.dev;
 	struct intel_crtc *intel_crtc =
 		to_intel_crtc(intel_dig_port->base.base.crtc);
-	u8 buf[1];
+	u8 buf;
+	int test_crc_count;
+	int attempts = 6;
 
-	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, buf) < 0)
+	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0)
 		return -EIO;
 
-	if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
+	if (!(buf & DP_TEST_CRC_SUPPORTED))
 		return -ENOTTY;
 
 	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
 			       DP_TEST_SINK_START) < 0)
 		return -EIO;
 
-	/* Wait 2 vblanks to be sure we will have the correct CRC value */
-	intel_wait_for_vblank(dev, intel_crtc->pipe);
-	intel_wait_for_vblank(dev, intel_crtc->pipe);
+	drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
+	test_crc_count = buf & DP_TEST_COUNT_MASK;
+
+	do {
+		drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
+		intel_wait_for_vblank(dev, intel_crtc->pipe);
+	} while (--attempts && (buf & DP_TEST_COUNT_MASK) == test_crc_count);
+
+	if (attempts == 0) {
+		DRM_ERROR("Panel is unable to calculate CRC after 6 vblanks\n");
+		return -EIO;
+	}
 
 	if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0)
 		return -EIO;
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 9305c71..8edeed0 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -303,7 +303,8 @@
 #define DP_TEST_CRC_B_CB		    0x244
 
 #define DP_TEST_SINK_MISC		    0x246
-#define DP_TEST_CRC_SUPPORTED		    (1 << 5)
+# define DP_TEST_CRC_SUPPORTED		    (1 << 5)
+# define DP_TEST_COUNT_MASK		    0x7
 
 #define DP_TEST_RESPONSE		    0x260
 # define DP_TEST_ACK			    (1 << 0)
@@ -313,7 +314,7 @@
 #define DP_TEST_EDID_CHECKSUM		    0x261
 
 #define DP_TEST_SINK			    0x270
-#define DP_TEST_SINK_START	    (1 << 0)
+# define DP_TEST_SINK_START		    (1 << 0)
 
 #define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
 # define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)
-- 
1.9.3

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/i915: Fix Sink CRC
  2014-09-16 23:18       ` [PATCH] " Rodrigo Vivi
@ 2014-09-29 18:56         ` Todd Previte
  0 siblings, 0 replies; 7+ messages in thread
From: Todd Previte @ 2014-09-29 18:56 UTC (permalink / raw)
  To: 'Rodrigo Vivi', intel-gfx
  Cc: 'Jani Nikula', 'Daniel Vetter',
	dri-devel, 'Rodrigo Vivi'

Hi Rodrigo,

This patch looks good. 

Reviewed-by: Todd Previte <tprevite@gmail.com>

-T

-----Original Message-----
From: Rodrigo Vivi [mailto:rodrigo.vivi@gmail.com] 
Sent: Tuesday, September 16, 2014 4:18 PM
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org; Rodrigo Vivi; Todd Previte; Daniel
Vetter; Jani Nikula
Subject: [PATCH] drm/i915: Fix Sink CRC

In some cases like when PSR just got enabled the panel need more vblank
times to calculate CRC. I figured that out with the new PSR test cases
facing some cases that I had a green screen but a blank CRC. Even with
2 vblank waits on kernel + 2 vblank waits on test case.

So let's give up to 6 vblank wait time. However we now check for
TEST_CRC_COUNT that shows when panel finished to calculate CRC and has it
ready.

v2: Jani pointed out attempts decrements was wrong and should never reach
the error condition. And Daniel pointed out that EIO is more appropriated
than EGAIN. Also I realized that I have to read test_crc_count after setting
test_sink

v3: Rebase and adding error message

Cc: Todd Previte <tprevite@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 23 +++++++++++++++++------
 include/drm/drm_dp_helper.h     |  5 +++--
 2 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c
b/drivers/gpu/drm/i915/intel_dp.c index e4d0367..d9091dc7 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3468,21 +3468,32 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8
*crc)
 	struct drm_device *dev = intel_dig_port->base.base.dev;
 	struct intel_crtc *intel_crtc =
 		to_intel_crtc(intel_dig_port->base.base.crtc);
-	u8 buf[1];
+	u8 buf;
+	int test_crc_count;
+	int attempts = 6;
 
-	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, buf) < 0)
+	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0)
 		return -EIO;
 
-	if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
+	if (!(buf & DP_TEST_CRC_SUPPORTED))
 		return -ENOTTY;
 
 	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
 			       DP_TEST_SINK_START) < 0)
 		return -EIO;
 
-	/* Wait 2 vblanks to be sure we will have the correct CRC value */
-	intel_wait_for_vblank(dev, intel_crtc->pipe);
-	intel_wait_for_vblank(dev, intel_crtc->pipe);
+	drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
+	test_crc_count = buf & DP_TEST_COUNT_MASK;
+
+	do {
+		drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf);
+		intel_wait_for_vblank(dev, intel_crtc->pipe);
+	} while (--attempts && (buf & DP_TEST_COUNT_MASK) ==
test_crc_count);
+
+	if (attempts == 0) {
+		DRM_ERROR("Panel is unable to calculate CRC after 6
vblanks\n");
+		return -EIO;
+	}
 
 	if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0)
 		return -EIO;
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index
9305c71..8edeed0 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -303,7 +303,8 @@
 #define DP_TEST_CRC_B_CB		    0x244
 
 #define DP_TEST_SINK_MISC		    0x246
-#define DP_TEST_CRC_SUPPORTED		    (1 << 5)
+# define DP_TEST_CRC_SUPPORTED		    (1 << 5)
+# define DP_TEST_COUNT_MASK		    0x7
 
 #define DP_TEST_RESPONSE		    0x260
 # define DP_TEST_ACK			    (1 << 0)
@@ -313,7 +314,7 @@
 #define DP_TEST_EDID_CHECKSUM		    0x261
 
 #define DP_TEST_SINK			    0x270
-#define DP_TEST_SINK_START	    (1 << 0)
+# define DP_TEST_SINK_START		    (1 << 0)
 
 #define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
 # define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)
--
1.9.3

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2014-09-29 18:56 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-09-12 23:49 [PATCH] drm/i915: Fix Sink CRC Rodrigo Vivi
2014-09-15  8:56 ` Daniel Vetter
2014-09-15  9:50 ` Jani Nikula
2014-09-15 23:21   ` [PATCH 1/2] " Rodrigo Vivi
2014-09-16  8:57     ` Daniel Vetter
2014-09-16 23:18       ` [PATCH] " Rodrigo Vivi
2014-09-29 18:56         ` Todd Previte

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