* [Intel-gfx] [PATCH] drm/i915/selftests: Always flush before unpining after writing
@ 2020-05-11 14:13 Chris Wilson
2020-05-11 15:32 ` Mika Kuoppala
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Chris Wilson @ 2020-05-11 14:13 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
Be consistent, and even when we know we had used a WC, flush the mapped
object after writing into it. The flush understands the mapping type and
will only clflush if !I915_MAP_WC, but will always insert a wmb [sfence]
so that we can be sure that all writes are visible.
v2: Add the unconditional wmb so we are know that we always flush the
writes to memory/HW at that point.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 8 ++++++--
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 1 +
drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c | 2 ++
drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c | 2 ++
drivers/gpu/drm/i915/gt/selftest_ring_submission.c | 2 ++
drivers/gpu/drm/i915/gt/selftest_rps.c | 2 ++
drivers/gpu/drm/i915/selftests/i915_request.c | 9 +++++++--
7 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
index 2fc7737ef5f4..f457d7130491 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
@@ -78,10 +78,12 @@ struct i915_vma *intel_emit_vma_fill_blt(struct intel_context *ce,
} while (rem);
*cmd = MI_BATCH_BUFFER_END;
- intel_gt_chipset_flush(ce->vm->gt);
+ i915_gem_object_flush_map(pool->obj);
i915_gem_object_unpin_map(pool->obj);
+ intel_gt_chipset_flush(ce->vm->gt);
+
batch = i915_vma_instance(pool->obj, ce->vm, NULL);
if (IS_ERR(batch)) {
err = PTR_ERR(batch);
@@ -289,10 +291,12 @@ struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce,
} while (rem);
*cmd = MI_BATCH_BUFFER_END;
- intel_gt_chipset_flush(ce->vm->gt);
+ i915_gem_object_flush_map(pool->obj);
i915_gem_object_unpin_map(pool->obj);
+ intel_gt_chipset_flush(ce->vm->gt);
+
batch = i915_vma_instance(pool->obj, ce->vm, NULL);
if (IS_ERR(batch)) {
err = PTR_ERR(batch);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 5d855fcd5c0f..189efcd58942 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -391,6 +391,7 @@ void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
GEM_BUG_ON(range_overflows_t(typeof(obj->base.size),
offset, size, obj->base.size));
+ wmb(); /* let all previous writes be visible to HW */
obj->mm.dirty = true;
if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
index 3f6079e1dfb6..87d7d8aa080f 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
@@ -158,6 +158,8 @@ static int wc_set(struct context *ctx, unsigned long offset, u32 v)
return PTR_ERR(map);
map[offset / sizeof(*map)] = v;
+
+ __i915_gem_object_flush_map(ctx->obj, offset, sizeof(*map));
i915_gem_object_unpin_map(ctx->obj);
return 0;
diff --git a/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c b/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
index 772d8cba7da9..226b5fa9b430 100644
--- a/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
+++ b/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
@@ -83,6 +83,8 @@ igt_emit_store_dw(struct i915_vma *vma,
offset += PAGE_SIZE;
}
*cmd = MI_BATCH_BUFFER_END;
+
+ i915_gem_object_flush_map(obj);
i915_gem_object_unpin_map(obj);
intel_gt_chipset_flush(vma->vm->gt);
diff --git a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
index 9995faadd7e8..3350e7c995bc 100644
--- a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
@@ -54,6 +54,8 @@ static struct i915_vma *create_wally(struct intel_engine_cs *engine)
*cs++ = STACK_MAGIC;
*cs++ = MI_BATCH_BUFFER_END;
+
+ i915_gem_object_flush_map(obj);
i915_gem_object_unpin_map(obj);
vma->private = intel_context_create(engine); /* dummy residuals */
diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c b/drivers/gpu/drm/i915/gt/selftest_rps.c
index bfa1a15564f7..6275d69aa9cc 100644
--- a/drivers/gpu/drm/i915/gt/selftest_rps.c
+++ b/drivers/gpu/drm/i915/gt/selftest_rps.c
@@ -727,6 +727,7 @@ int live_rps_frequency_cs(void *arg)
err_vma:
*cancel = MI_BATCH_BUFFER_END;
+ i915_gem_object_flush_map(vma->obj);
i915_gem_object_unpin_map(vma->obj);
i915_vma_unpin(vma);
i915_vma_put(vma);
@@ -868,6 +869,7 @@ int live_rps_frequency_srm(void *arg)
err_vma:
*cancel = MI_BATCH_BUFFER_END;
+ i915_gem_object_flush_map(vma->obj);
i915_gem_object_unpin_map(vma->obj);
i915_vma_unpin(vma);
i915_vma_put(vma);
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
index 15b1ca9f7a01..c191976e1d15 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -816,10 +816,12 @@ static int recursive_batch_resolve(struct i915_vma *batch)
return PTR_ERR(cmd);
*cmd = MI_BATCH_BUFFER_END;
- intel_gt_chipset_flush(batch->vm->gt);
+ __i915_gem_object_flush_map(batch->obj, 0, sizeof(*cmd));
i915_gem_object_unpin_map(batch->obj);
+ intel_gt_chipset_flush(batch->vm->gt);
+
return 0;
}
@@ -1060,9 +1062,12 @@ static int live_sequential_engines(void *arg)
I915_MAP_WC);
if (!IS_ERR(cmd)) {
*cmd = MI_BATCH_BUFFER_END;
- intel_gt_chipset_flush(engine->gt);
+ __i915_gem_object_flush_map(request[idx]->batch->obj,
+ 0, sizeof(*cmd));
i915_gem_object_unpin_map(request[idx]->batch->obj);
+
+ intel_gt_chipset_flush(engine->gt);
}
i915_vma_put(request[idx]->batch);
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/selftests: Always flush before unpining after writing
2020-05-11 14:13 [Intel-gfx] [PATCH] drm/i915/selftests: Always flush before unpining after writing Chris Wilson
@ 2020-05-11 15:32 ` Mika Kuoppala
2020-05-11 15:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-05-11 21:35 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Mika Kuoppala @ 2020-05-11 15:32 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: Chris Wilson
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Be consistent, and even when we know we had used a WC, flush the mapped
> object after writing into it. The flush understands the mapping type and
> will only clflush if !I915_MAP_WC, but will always insert a wmb [sfence]
> so that we can be sure that all writes are visible.
>
> v2: Add the unconditional wmb so we are know that we always flush the
> writes to memory/HW at that point.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 8 ++++++--
> drivers/gpu/drm/i915/gem/i915_gem_pages.c | 1 +
> drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c | 2 ++
> drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c | 2 ++
> drivers/gpu/drm/i915/gt/selftest_ring_submission.c | 2 ++
> drivers/gpu/drm/i915/gt/selftest_rps.c | 2 ++
> drivers/gpu/drm/i915/selftests/i915_request.c | 9 +++++++--
> 7 files changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> index 2fc7737ef5f4..f457d7130491 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> @@ -78,10 +78,12 @@ struct i915_vma *intel_emit_vma_fill_blt(struct intel_context *ce,
> } while (rem);
>
> *cmd = MI_BATCH_BUFFER_END;
> - intel_gt_chipset_flush(ce->vm->gt);
>
> + i915_gem_object_flush_map(pool->obj);
> i915_gem_object_unpin_map(pool->obj);
Ok, so there is explicit wmb now in flush_map even
if bo is marketed as coherent. That wmb will then
make the writes to flushed past that point...
>
> + intel_gt_chipset_flush(ce->vm->gt);
and then the do the sfence for wcb. This pattern feels
solid for me.
If we would mark map for writes, we could do everything
in unpin_map.
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> +
> batch = i915_vma_instance(pool->obj, ce->vm, NULL);
> if (IS_ERR(batch)) {
> err = PTR_ERR(batch);
> @@ -289,10 +291,12 @@ struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce,
> } while (rem);
>
> *cmd = MI_BATCH_BUFFER_END;
> - intel_gt_chipset_flush(ce->vm->gt);
>
> + i915_gem_object_flush_map(pool->obj);
> i915_gem_object_unpin_map(pool->obj);
>
> + intel_gt_chipset_flush(ce->vm->gt);
> +
> batch = i915_vma_instance(pool->obj, ce->vm, NULL);
> if (IS_ERR(batch)) {
> err = PTR_ERR(batch);
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> index 5d855fcd5c0f..189efcd58942 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> @@ -391,6 +391,7 @@ void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
> GEM_BUG_ON(range_overflows_t(typeof(obj->base.size),
> offset, size, obj->base.size));
>
> + wmb(); /* let all previous writes be visible to HW */
> obj->mm.dirty = true;
>
> if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE)
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
> index 3f6079e1dfb6..87d7d8aa080f 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
> @@ -158,6 +158,8 @@ static int wc_set(struct context *ctx, unsigned long offset, u32 v)
> return PTR_ERR(map);
>
> map[offset / sizeof(*map)] = v;
> +
> + __i915_gem_object_flush_map(ctx->obj, offset, sizeof(*map));
> i915_gem_object_unpin_map(ctx->obj);
>
> return 0;
> diff --git a/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c b/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
> index 772d8cba7da9..226b5fa9b430 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
> @@ -83,6 +83,8 @@ igt_emit_store_dw(struct i915_vma *vma,
> offset += PAGE_SIZE;
> }
> *cmd = MI_BATCH_BUFFER_END;
> +
> + i915_gem_object_flush_map(obj);
> i915_gem_object_unpin_map(obj);
>
> intel_gt_chipset_flush(vma->vm->gt);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
> index 9995faadd7e8..3350e7c995bc 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
> @@ -54,6 +54,8 @@ static struct i915_vma *create_wally(struct intel_engine_cs *engine)
> *cs++ = STACK_MAGIC;
>
> *cs++ = MI_BATCH_BUFFER_END;
> +
> + i915_gem_object_flush_map(obj);
> i915_gem_object_unpin_map(obj);
>
> vma->private = intel_context_create(engine); /* dummy residuals */
> diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c b/drivers/gpu/drm/i915/gt/selftest_rps.c
> index bfa1a15564f7..6275d69aa9cc 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_rps.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_rps.c
> @@ -727,6 +727,7 @@ int live_rps_frequency_cs(void *arg)
>
> err_vma:
> *cancel = MI_BATCH_BUFFER_END;
> + i915_gem_object_flush_map(vma->obj);
> i915_gem_object_unpin_map(vma->obj);
> i915_vma_unpin(vma);
> i915_vma_put(vma);
> @@ -868,6 +869,7 @@ int live_rps_frequency_srm(void *arg)
>
> err_vma:
> *cancel = MI_BATCH_BUFFER_END;
> + i915_gem_object_flush_map(vma->obj);
> i915_gem_object_unpin_map(vma->obj);
> i915_vma_unpin(vma);
> i915_vma_put(vma);
> diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
> index 15b1ca9f7a01..c191976e1d15 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_request.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_request.c
> @@ -816,10 +816,12 @@ static int recursive_batch_resolve(struct i915_vma *batch)
> return PTR_ERR(cmd);
>
> *cmd = MI_BATCH_BUFFER_END;
> - intel_gt_chipset_flush(batch->vm->gt);
>
> + __i915_gem_object_flush_map(batch->obj, 0, sizeof(*cmd));
> i915_gem_object_unpin_map(batch->obj);
>
> + intel_gt_chipset_flush(batch->vm->gt);
> +
> return 0;
> }
>
> @@ -1060,9 +1062,12 @@ static int live_sequential_engines(void *arg)
> I915_MAP_WC);
> if (!IS_ERR(cmd)) {
> *cmd = MI_BATCH_BUFFER_END;
> - intel_gt_chipset_flush(engine->gt);
>
> + __i915_gem_object_flush_map(request[idx]->batch->obj,
> + 0, sizeof(*cmd));
> i915_gem_object_unpin_map(request[idx]->batch->obj);
> +
> + intel_gt_chipset_flush(engine->gt);
> }
>
> i915_vma_put(request[idx]->batch);
> --
> 2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Always flush before unpining after writing
2020-05-11 14:13 [Intel-gfx] [PATCH] drm/i915/selftests: Always flush before unpining after writing Chris Wilson
2020-05-11 15:32 ` Mika Kuoppala
@ 2020-05-11 15:50 ` Patchwork
2020-05-11 21:35 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2020-05-11 15:50 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Always flush before unpining after writing
URL : https://patchwork.freedesktop.org/series/77156/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8465 -> Patchwork_17625
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/index.html
Known issues
------------
Here are the changes found in Patchwork_17625 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@coherency:
- fi-bwr-2160: [PASS][1] -> [INCOMPLETE][2] ([i915#489])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/fi-bwr-2160/igt@i915_selftest@live@coherency.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/fi-bwr-2160/igt@i915_selftest@live@coherency.html
#### Possible fixes ####
* igt@i915_selftest@live@execlists:
- {fi-tgl-dsi}: [INCOMPLETE][3] ([i915#1803]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/fi-tgl-dsi/igt@i915_selftest@live@execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/fi-tgl-dsi/igt@i915_selftest@live@execlists.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-whl-u: [FAIL][5] ([fdo#103375]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/fi-whl-u/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/fi-whl-u/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[i915#1803]: https://gitlab.freedesktop.org/drm/intel/issues/1803
[i915#489]: https://gitlab.freedesktop.org/drm/intel/issues/489
Participating hosts (47 -> 42)
------------------------------
Additional (1): fi-icl-dsi
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8465 -> Patchwork_17625
CI-20190529: 20190529
CI_DRM_8465: 353e7636140b8a9d873f6a7615dcda2b32535fda @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5646: 5a5a3162a7638b3ae38b6dc2545622c204d1b97c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17625: 421bd67f6d6b5b47b97efcc6548b222dcc13082d @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
421bd67f6d6b drm/i915/selftests: Always flush before unpining after writing
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Always flush before unpining after writing
2020-05-11 14:13 [Intel-gfx] [PATCH] drm/i915/selftests: Always flush before unpining after writing Chris Wilson
2020-05-11 15:32 ` Mika Kuoppala
2020-05-11 15:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
@ 2020-05-11 21:35 ` Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2020-05-11 21:35 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Always flush before unpining after writing
URL : https://patchwork.freedesktop.org/series/77156/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8465_full -> Patchwork_17625_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
New tests
---------
New tests have been introduced between CI_DRM_8465_full and Patchwork_17625_full:
### New IGT tests (1) ###
* igt@gem_ringfill@legacy-basic:
- Statuses :
- Exec time: [None] s
Known issues
------------
Here are the changes found in Patchwork_17625_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@engines-mixed-process@bcs0:
- shard-tglb: [PASS][1] -> [FAIL][2] ([i915#1528])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-tglb3/igt@gem_ctx_persistence@engines-mixed-process@bcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-tglb2/igt@gem_ctx_persistence@engines-mixed-process@bcs0.html
* igt@gen9_exec_parse@allowed-all:
- shard-apl: [PASS][3] -> [DMESG-WARN][4] ([i915#1436] / [i915#716])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-apl1/igt@gen9_exec_parse@allowed-all.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-apl8/igt@gen9_exec_parse@allowed-all.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [PASS][5] -> [DMESG-WARN][6] ([i915#180]) +4 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_crc@pipe-c-cursor-64x21-onscreen:
- shard-skl: [PASS][7] -> [FAIL][8] ([i915#54])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-skl10/igt@kms_cursor_crc@pipe-c-cursor-64x21-onscreen.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-skl9/igt@kms_cursor_crc@pipe-c-cursor-64x21-onscreen.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-apl: [PASS][9] -> [DMESG-WARN][10] ([i915#180]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-apl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-apl8/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [PASS][11] -> [DMESG-WARN][12] ([i915#180] / [i915#93] / [i915#95])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [PASS][13] -> [FAIL][14] ([i915#1188]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-skl5/igt@kms_hdr@bpc-switch-dpms.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [PASS][15] -> [FAIL][16] ([fdo#108145] / [i915#265]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_plane_cursor@pipe-a-viewport-size-64:
- shard-apl: [PASS][17] -> [FAIL][18] ([i915#1559] / [i915#95])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-apl6/igt@kms_plane_cursor@pipe-a-viewport-size-64.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-apl2/igt@kms_plane_cursor@pipe-a-viewport-size-64.html
#### Possible fixes ####
* {igt@gem_exec_schedule@thriceslice@bcs0}:
- shard-glk: [FAIL][19] -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-glk8/igt@gem_exec_schedule@thriceslice@bcs0.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-glk9/igt@gem_exec_schedule@thriceslice@bcs0.html
* igt@i915_suspend@sysfs-reader:
- shard-kbl: [DMESG-WARN][21] ([i915#180] / [i915#93] / [i915#95]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-kbl7/igt@i915_suspend@sysfs-reader.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-kbl4/igt@i915_suspend@sysfs-reader.html
* igt@kms_cursor_crc@pipe-c-cursor-128x42-random:
- shard-skl: [FAIL][23] ([i915#54]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-skl5/igt@kms_cursor_crc@pipe-c-cursor-128x42-random.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-skl3/igt@kms_cursor_crc@pipe-c-cursor-128x42-random.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl: [DMESG-WARN][25] ([i915#180]) -> [PASS][26] +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-kbl2/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* {igt@kms_flip@flip-vs-suspend@a-dp1}:
- shard-apl: [DMESG-WARN][27] ([i915#180]) -> [PASS][28] +5 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-apl4/igt@kms_flip@flip-vs-suspend@a-dp1.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-apl1/igt@kms_flip@flip-vs-suspend@a-dp1.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][29] ([fdo#108145] / [i915#265]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][31] ([i915#31]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-apl7/igt@kms_setmode@basic.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-apl8/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend:
- shard-skl: [INCOMPLETE][33] ([i915#69]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-skl3/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-skl4/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
#### Warnings ####
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: [SKIP][35] ([i915#588]) -> [SKIP][36] ([i915#658])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-iclb5/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@kms_content_protection@legacy:
- shard-apl: [TIMEOUT][37] ([i915#1319]) -> [FAIL][38] ([fdo#110321] / [fdo#110336])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-apl4/igt@kms_content_protection@legacy.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-apl1/igt@kms_content_protection@legacy.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-basic:
- shard-apl: [FAIL][39] ([fdo#108145] / [i915#265] / [i915#95]) -> [FAIL][40] ([fdo#108145] / [i915#265])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-apl8/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-apl6/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-apl: [FAIL][41] ([fdo#108145] / [i915#265]) -> [FAIL][42] ([fdo#108145] / [i915#265] / [i915#95])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
* igt@kms_sysfs_edid_timing:
- shard-apl: [FAIL][43] ([IGT#2]) -> [FAIL][44] ([IGT#2] / [i915#95])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8465/shard-apl3/igt@kms_sysfs_edid_timing.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/shard-apl4/igt@kms_sysfs_edid_timing.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321
[fdo#110336]: https://bugs.freedesktop.org/show_bug.cgi?id=110336
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1528]: https://gitlab.freedesktop.org/drm/intel/issues/1528
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#1559]: https://gitlab.freedesktop.org/drm/intel/issues/1559
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8465 -> Patchwork_17625
CI-20190529: 20190529
CI_DRM_8465: 353e7636140b8a9d873f6a7615dcda2b32535fda @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5646: 5a5a3162a7638b3ae38b6dc2545622c204d1b97c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17625: 421bd67f6d6b5b47b97efcc6548b222dcc13082d @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17625/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-05-11 21:35 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-11 14:13 [Intel-gfx] [PATCH] drm/i915/selftests: Always flush before unpining after writing Chris Wilson
2020-05-11 15:32 ` Mika Kuoppala
2020-05-11 15:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-05-11 21:35 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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