[PATCH v5 0/4] gpio: mvebu: Add PWM fan support

[PATCH v5 0/4] gpio: mvebu: Add PWM fan support

[Ralph Sennhauser]

Hi everyone,

With the bike shedding fixes as Thierry called them out of the way and
the ACK by Rob for the bindings this version could be merged.

The only thing still sort of open is whether to use npwm=1 and giving up
the sysfs use case. Though an ACK was given for this implementation
already I think we should give Thierry a chance to speak up once more if
he so wishes.

Thanks
Ralph

---

Notes:

  About npwm = 1:
    The only way I can think of to achieve that requires reading the
    GPIO line from the device tree. This would prevent a user to
    dynamically choose a line. Which is fine for the fan found on Mamba
    but let's take some development board with freely accessible GPIOs
    and suddenly we limit the use of this driver (sysfs). Given the
    above, npwm = ngpio with only one usable at a time is a closer /
    more appropriate description of the situation. The downside is
    some "wasted" space and not meeting the expectation that all PWMs
    are usable concurrently, only one per chip at any given time.

  About the new compatible string:
    Orion was chosen for the SoC variant for the same reason as in
    commit 5f79c651e81e ("arm: mvebu: use global interrupts for GPIOs on
    Armada XP").
    The "pwm" property remains optional for the new compatible string so
    the compatiple string "marvell,armada-370-xp-gpio" can be used by
    all and not just the first two GPIO chips.

  About extending the driver for use with a third GPIO chip:
    It's possible to add an extra node "mvebugpiopwmctrl" to configure a
    different assignment without requiring changes to the current
    bindings. The current implementation doesn't prevent a fan to be
    used as gpio-fan connect to the 3rd chip.

---

Changes v5->v6:
  Patch 1/4 gpio: mvebu: Add limited PWM support:
    * more uppercase for GPIO / PWM in prose  (suggested by Thierry
      Reding)
    * use a variable for register set A/B selection value (suggested by
      Thierry Reding)
    * Don't set pwm_chip base to gpio_chip base, use hwpwm instead.
      (suggested by Thierry Reding)
    * use pointer to gpio_desc instead of boolen used (suggested by
      Thierry Reding)
    * check a bit earlier for working clock (suggested by Thierry
      Reding)
    * Add Acked-by: Thierry Reding <thierry.reding@gmail.com>
    * Acked-by: Rob Herring <robh@kernel.org>

Changes v4->v5:
  All
    * add Tested-by: Andrew Lunn <andrew@lunn.ch>, thanks
  Patch 2/4 mvebu: xp: Add PWM properties to .dtsi files
    * keep the old compatible stings, we don't have to drop them (suggested by Gregory CLEMENT)
    * subject starts with ARM: dts: mvebu: (suggested by Gregory CLEMENT)
  Patch 4/4 mvebu: wrt1900ac: Use pwm-fan rather than gpio-fan
    * subject starts with ARM: dts: armada-xp: (suggested by Gregory CLEMENT)

Changes v3->v4:
  Patch 1/4 gpio: mvebu: Add limited PWM support:
    * braces for both branches in if statement if one needs it. (suggested
      by Andrew Lunn)
    * introduce compatible string marvell,armada-370-xp-gpio (suggest by
      Rob Herring)
    * fix mvebu_pwmreg_blink_on_duration -> mvebu_pwmreg_blink_off_duration
      for period callculation in mvebu_pwm_get_state()
  Patch 4/4 mvebu: wrt1900ac: Use pwm-fan rather than gpio-fan
    * Drop flags from pwms for Mamba, as no longer used (suggested by
      Andrew Lunn)
    * Use again #pwm-cell = 2, the second cell is actually the period.

Changes v2->v3:
  Patch 1/4 gpio: mvebu: Add limited PWM support:
    * drop pin from mvebu_pwn, can be infered (suggested by Thierry Reding)
    * rename pwm to mvpwm so pwm can be used for pwm_device as in the API,
      avoids some mental gymnastic.
    * drop id from struct mvebu_gpio_chip, select blink counter in
      mvebu_pwm_probe for all lines instead. We do not care about the
      unused ones. I think a clear improvement in readability.
      Makes coming up with a good comment simple as well.
    * Switch to new atomic PWM API (suggested by Thierry Reding)
    * rename use mvebu_gpioreg_blink_select to
      mvebu_gpioreg_blink_counter_select.
    * mark *_suspend() / *_resume() as __maybe_unused (suggested by Linus
      Walleij)
    * document #pwm-cells = 1 (suggested by Thierry Reding)
  Patch 2/4 mvebu: xp: Add PWM properties to .dtsi files
    * add missing reg-names / #pwm-cell properties to
      armada-xp-mv78260.dtsi gpio1 node
    * set pwm-cells = 1 (suggested by Thierry Reding)
  All:
    * always uppercase GPIO/PWM in prose (suggested by Thierry Reding)

Changes v1 -> v2:
  Patch 1/4 gpio: mvebu: Add limited PWM support:
    * use BIT macro (suggested by Linus Walleij)
    * move id from struct mvebu_pwm to struct mvebu_gpio_chip, implement
      blink select as if else and comment on the chip id for code clarity
      (to accommodate Linus Walleijs request for a code clarification /
      comment. If you can word it better I'm all ears.)
    * Move function comment mvebu_pwm_probe into the function itself.

---

Andrew Lunn (4):
  gpio: mvebu: Add limited PWM support
  ARM: dts: mvebu: Add PWM properties to .dtsi files
  ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig
  ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan

 .../devicetree/bindings/gpio/gpio-mvebu.txt        |  32 ++
 MAINTAINERS                                        |   2 +
 arch/arm/boot/dts/armada-370.dtsi                  |  19 +-
 arch/arm/boot/dts/armada-xp-linksys-mamba.dts      |   8 +-
 arch/arm/boot/dts/armada-xp-mv78230.dtsi           |  16 +-
 arch/arm/boot/dts/armada-xp-mv78260.dtsi           |  19 +-
 arch/arm/boot/dts/armada-xp-mv78460.dtsi           |  19 +-
 arch/arm/configs/mvebu_v7_defconfig                |   2 +
 drivers/gpio/gpio-mvebu.c                          | 327 ++++++++++++++++++++-
 9 files changed, 408 insertions(+), 36 deletions(-)

-- 
2.10.2

[PATCH v5 0/4] gpio: mvebu: Add PWM fan support

[Ralph Sennhauser]

Hi everyone,

With the bike shedding fixes as Thierry called them out of the way and
the ACK by Rob for the bindings this version could be merged.

The only thing still sort of open is whether to use npwm=1 and giving up
the sysfs use case. Though an ACK was given for this implementation
already I think we should give Thierry a chance to speak up once more if
he so wishes.

Thanks
Ralph

---

Notes:

  About npwm = 1:
    The only way I can think of to achieve that requires reading the
    GPIO line from the device tree. This would prevent a user to
    dynamically choose a line. Which is fine for the fan found on Mamba
    but let's take some development board with freely accessible GPIOs
    and suddenly we limit the use of this driver (sysfs). Given the
    above, npwm = ngpio with only one usable at a time is a closer /
    more appropriate description of the situation. The downside is
    some "wasted" space and not meeting the expectation that all PWMs
    are usable concurrently, only one per chip at any given time.

  About the new compatible string:
    Orion was chosen for the SoC variant for the same reason as in
    commit 5f79c651e81e ("arm: mvebu: use global interrupts for GPIOs on
    Armada XP").
    The "pwm" property remains optional for the new compatible string so
    the compatiple string "marvell,armada-370-xp-gpio" can be used by
    all and not just the first two GPIO chips.

  About extending the driver for use with a third GPIO chip:
    It's possible to add an extra node "mvebugpiopwmctrl" to configure a
    different assignment without requiring changes to the current
    bindings. The current implementation doesn't prevent a fan to be
    used as gpio-fan connect to the 3rd chip.

---

Changes v5->v6:
  Patch 1/4 gpio: mvebu: Add limited PWM support:
    * more uppercase for GPIO / PWM in prose  (suggested by Thierry
      Reding)
    * use a variable for register set A/B selection value (suggested by
      Thierry Reding)
    * Don't set pwm_chip base to gpio_chip base, use hwpwm instead.
      (suggested by Thierry Reding)
    * use pointer to gpio_desc instead of boolen used (suggested by
      Thierry Reding)
    * check a bit earlier for working clock (suggested by Thierry
      Reding)
    * Add Acked-by: Thierry Reding <thierry.reding@gmail.com>
    * Acked-by: Rob Herring <robh@kernel.org>

Changes v4->v5:
  All
    * add Tested-by: Andrew Lunn <andrew@lunn.ch>, thanks
  Patch 2/4 mvebu: xp: Add PWM properties to .dtsi files
    * keep the old compatible stings, we don't have to drop them (suggested by Gregory CLEMENT)
    * subject starts with ARM: dts: mvebu: (suggested by Gregory CLEMENT)
  Patch 4/4 mvebu: wrt1900ac: Use pwm-fan rather than gpio-fan
    * subject starts with ARM: dts: armada-xp: (suggested by Gregory CLEMENT)

Changes v3->v4:
  Patch 1/4 gpio: mvebu: Add limited PWM support:
    * braces for both branches in if statement if one needs it. (suggested
      by Andrew Lunn)
    * introduce compatible string marvell,armada-370-xp-gpio (suggest by
      Rob Herring)
    * fix mvebu_pwmreg_blink_on_duration -> mvebu_pwmreg_blink_off_duration
      for period callculation in mvebu_pwm_get_state()
  Patch 4/4 mvebu: wrt1900ac: Use pwm-fan rather than gpio-fan
    * Drop flags from pwms for Mamba, as no longer used (suggested by
      Andrew Lunn)
    * Use again #pwm-cell = 2, the second cell is actually the period.

Changes v2->v3:
  Patch 1/4 gpio: mvebu: Add limited PWM support:
    * drop pin from mvebu_pwn, can be infered (suggested by Thierry Reding)
    * rename pwm to mvpwm so pwm can be used for pwm_device as in the API,
      avoids some mental gymnastic.
    * drop id from struct mvebu_gpio_chip, select blink counter in
      mvebu_pwm_probe for all lines instead. We do not care about the
      unused ones. I think a clear improvement in readability.
      Makes coming up with a good comment simple as well.
    * Switch to new atomic PWM API (suggested by Thierry Reding)
    * rename use mvebu_gpioreg_blink_select to
      mvebu_gpioreg_blink_counter_select.
    * mark *_suspend() / *_resume() as __maybe_unused (suggested by Linus
      Walleij)
    * document #pwm-cells = 1 (suggested by Thierry Reding)
  Patch 2/4 mvebu: xp: Add PWM properties to .dtsi files
    * add missing reg-names / #pwm-cell properties to
      armada-xp-mv78260.dtsi gpio1 node
    * set pwm-cells = 1 (suggested by Thierry Reding)
  All:
    * always uppercase GPIO/PWM in prose (suggested by Thierry Reding)

Changes v1 -> v2:
  Patch 1/4 gpio: mvebu: Add limited PWM support:
    * use BIT macro (suggested by Linus Walleij)
    * move id from struct mvebu_pwm to struct mvebu_gpio_chip, implement
      blink select as if else and comment on the chip id for code clarity
      (to accommodate Linus Walleijs request for a code clarification /
      comment. If you can word it better I'm all ears.)
    * Move function comment mvebu_pwm_probe into the function itself.

---

Andrew Lunn (4):
  gpio: mvebu: Add limited PWM support
  ARM: dts: mvebu: Add PWM properties to .dtsi files
  ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig
  ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan

 .../devicetree/bindings/gpio/gpio-mvebu.txt        |  32 ++
 MAINTAINERS                                        |   2 +
 arch/arm/boot/dts/armada-370.dtsi                  |  19 +-
 arch/arm/boot/dts/armada-xp-linksys-mamba.dts      |   8 +-
 arch/arm/boot/dts/armada-xp-mv78230.dtsi           |  16 +-
 arch/arm/boot/dts/armada-xp-mv78260.dtsi           |  19 +-
 arch/arm/boot/dts/armada-xp-mv78460.dtsi           |  19 +-
 arch/arm/configs/mvebu_v7_defconfig                |   2 +
 drivers/gpio/gpio-mvebu.c                          | 327 ++++++++++++++++++++-
 9 files changed, 408 insertions(+), 36 deletions(-)

-- 
2.10.2

[PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Ralph Sennhauser]

From: Andrew Lunn <andrew@lunn.ch>

Armada 370/XP devices can 'blink' GPIO lines with a configurable on
and off period. This can be modelled as a PWM.

However, there are only two sets of PWM configuration registers for
all the GPIO lines. This driver simply allows a single GPIO line per
GPIO chip of 32 lines to be used as a PWM. Attempts to use more return
EBUSY.

Due to the interleaving of registers it is not simple to separate the
PWM driver from the GPIO driver. Thus the GPIO driver has been
extended with a PWM driver.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427287/
URL: https://patchwork.ozlabs.org/patch/427295/
[Ralph Sennhauser:
  * Port forward
  * Merge PWM portion into gpio-mvebu.c
  * Switch to atomic PWM API
  * Add new compatible string marvell,armada-370-xp-gpio
  * Update and merge documentation patch
  * Update MAINTAINERS]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/gpio/gpio-mvebu.txt        |  32 ++
 MAINTAINERS                                        |   2 +
 drivers/gpio/gpio-mvebu.c                          | 327 ++++++++++++++++++++-
 3 files changed, 349 insertions(+), 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
index a6f3bec..42c3bb2 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
@@ -38,6 +38,24 @@ Required properties:
 - #gpio-cells: Should be two. The first cell is the pin number. The
   second cell is reserved for flags, unused at the moment.
 
+Optional properties:
+
+In order to use the GPIO lines in PWM mode, some additional optional
+properties are required. Only Armada 370 and XP support these properties.
+
+- compatible: Must contain "marvell,armada-370-xp-gpio"
+
+- reg: an additional register set is needed, for the GPIO Blink
+  Counter on/off registers.
+
+- reg-names: Must contain an entry "pwm" corresponding to the
+  additional register range needed for PWM operation.
+
+- #pwm-cells: Should be two. The first cell is the GPIO line number. The
+  second cell is the period in nanoseconds.
+
+- clocks: Must be a phandle to the clock for the GPIO controller.
+
 Example:
 
 		gpio0: gpio@d0018100 {
@@ -51,3 +69,17 @@ Example:
 			#interrupt-cells = <2>;
 			interrupts = <16>, <17>, <18>, <19>;
 		};
+
+		gpio1: gpio@18140 {
+			compatible = "marvell,armada-370-xp-gpio";
+			reg = <0x18140 0x40>, <0x181c8 0x08>;
+			reg-names = "gpio", "pwm";
+			ngpios = <17>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			#pwm-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <87>, <88>, <89>;
+			clocks = <&coreclk 0>;
+		};
diff --git a/MAINTAINERS b/MAINTAINERS
index 58b3a22..19382f5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10295,6 +10295,8 @@ F:	include/linux/pwm.h
 F:	drivers/pwm/
 F:	drivers/video/backlight/pwm_bl.c
 F:	include/linux/pwm_backlight.h
+F:	drivers/gpio/gpio-mvebu.c
+F:	Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
 
 PXA2xx/PXA3xx SUPPORT
 M:	Daniel Mack <daniel@zonque.org>
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index fae4db6..19a92ef 100644
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c
@@ -42,22 +42,34 @@
 #include <linux/io.h>
 #include <linux/of_irq.h>
 #include <linux/of_device.h>
+#include <linux/pwm.h>
 #include <linux/clk.h>
 #include <linux/pinctrl/consumer.h>
 #include <linux/irqchip/chained_irq.h>
+#include <linux/platform_device.h>
 #include <linux/bitops.h>
 
+#include "gpiolib.h"
+
 /*
  * GPIO unit register offsets.
  */
-#define GPIO_OUT_OFF		0x0000
-#define GPIO_IO_CONF_OFF	0x0004
-#define GPIO_BLINK_EN_OFF	0x0008
-#define GPIO_IN_POL_OFF		0x000c
-#define GPIO_DATA_IN_OFF	0x0010
-#define GPIO_EDGE_CAUSE_OFF	0x0014
-#define GPIO_EDGE_MASK_OFF	0x0018
-#define GPIO_LEVEL_MASK_OFF	0x001c
+#define GPIO_OUT_OFF			0x0000
+#define GPIO_IO_CONF_OFF		0x0004
+#define GPIO_BLINK_EN_OFF		0x0008
+#define GPIO_IN_POL_OFF			0x000c
+#define GPIO_DATA_IN_OFF		0x0010
+#define GPIO_EDGE_CAUSE_OFF		0x0014
+#define GPIO_EDGE_MASK_OFF		0x0018
+#define GPIO_LEVEL_MASK_OFF		0x001c
+#define GPIO_BLINK_CNT_SELECT_OFF	0x0020
+
+/*
+ * PWM register offsets.
+ */
+#define PWM_BLINK_ON_DURATION_OFF	0x0
+#define PWM_BLINK_OFF_DURATION_OFF	0x4
+
 
 /* The MV78200 has per-CPU registers for edge mask and level mask */
 #define GPIO_EDGE_MASK_MV78200_OFF(cpu)	  ((cpu) ? 0x30 : 0x18)
@@ -78,6 +90,20 @@
 
 #define MVEBU_MAX_GPIO_PER_BANK		32
 
+struct mvebu_pwm {
+	void __iomem		*membase;
+	unsigned long		 clk_rate;
+	struct gpio_desc	*gpiod;
+	struct pwm_chip		 chip;
+	spinlock_t		 lock;
+	struct mvebu_gpio_chip	*mvchip;
+
+	/* Used to preserve GPIO/PWM registers across suspend/resume */
+	u32			 blink_select;
+	u32			 blink_on_duration;
+	u32			 blink_off_duration;
+};
+
 struct mvebu_gpio_chip {
 	struct gpio_chip   chip;
 	spinlock_t	   lock;
@@ -87,6 +113,10 @@ struct mvebu_gpio_chip {
 	struct irq_domain *domain;
 	int		   soc_variant;
 
+	/* Used for PWM support */
+	struct clk	  *clk;
+	struct mvebu_pwm  *mvpwm;
+
 	/* Used to preserve GPIO registers across suspend/resume */
 	u32		   out_reg;
 	u32		   io_conf_reg;
@@ -110,6 +140,12 @@ static void __iomem *mvebu_gpioreg_blink(struct mvebu_gpio_chip *mvchip)
 	return mvchip->membase + GPIO_BLINK_EN_OFF;
 }
 
+static void __iomem *mvebu_gpioreg_blink_counter_select(struct mvebu_gpio_chip
+							*mvchip)
+{
+	return mvchip->membase + GPIO_BLINK_CNT_SELECT_OFF;
+}
+
 static void __iomem *mvebu_gpioreg_io_conf(struct mvebu_gpio_chip *mvchip)
 {
 	return mvchip->membase + GPIO_IO_CONF_OFF;
@@ -181,6 +217,20 @@ static void __iomem *mvebu_gpioreg_level_mask(struct mvebu_gpio_chip *mvchip)
 }
 
 /*
+ * Functions returning addresses of individual registers for a given
+ * PWM controller.
+ */
+static void __iomem *mvebu_pwmreg_blink_on_duration(struct mvebu_pwm *mvpwm)
+{
+	return mvpwm->membase + PWM_BLINK_ON_DURATION_OFF;
+}
+
+static void __iomem *mvebu_pwmreg_blink_off_duration(struct mvebu_pwm *mvpwm)
+{
+	return mvpwm->membase + PWM_BLINK_OFF_DURATION_OFF;
+}
+
+/*
  * Functions implementing the gpio_chip methods
  */
 static void mvebu_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)
@@ -484,6 +534,246 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc)
 	chained_irq_exit(chip, desc);
 }
 
+/*
+ * Functions implementing the pwm_chip methods
+ */
+static struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip)
+{
+	return container_of(chip, struct mvebu_pwm, chip);
+}
+
+static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+	struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
+	struct gpio_desc *desc;
+	unsigned long flags;
+	int ret = 0;
+
+	spin_lock_irqsave(&mvpwm->lock, flags);
+
+	if (mvpwm->gpiod) {
+		ret = -EBUSY;
+	} else {
+		desc = gpio_to_desc(mvchip->chip.base + pwm->hwpwm);
+		if (!desc) {
+			ret = -ENODEV;
+			goto out;
+		}
+
+		ret = gpiod_request(desc, "mvebu-pwm");
+		if (ret)
+			goto out;
+
+		ret = gpiod_direction_output(desc, 0);
+		if (ret) {
+			gpiod_free(desc);
+			goto out;
+		}
+
+		mvpwm->gpiod = desc;
+	}
+out:
+	spin_unlock_irqrestore(&mvpwm->lock, flags);
+	return ret;
+}
+
+static void mvebu_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+	struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
+	unsigned long flags;
+
+	spin_lock_irqsave(&mvpwm->lock, flags);
+	gpiod_free(mvpwm->gpiod);
+	mvpwm->gpiod = NULL;
+	spin_unlock_irqrestore(&mvpwm->lock, flags);
+}
+
+static void mvebu_pwm_get_state(struct pwm_chip *chip,
+				struct pwm_device *pwm,
+				struct pwm_state *state) {
+
+	struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
+	unsigned long long val;
+	unsigned long flags;
+	u32 u;
+
+	spin_lock_irqsave(&mvpwm->lock, flags);
+
+	val = (unsigned long long)
+		readl_relaxed(mvebu_pwmreg_blink_on_duration(mvpwm));
+	val *= NSEC_PER_SEC;
+	do_div(val, mvpwm->clk_rate);
+	if (val > UINT_MAX)
+		state->duty_cycle = UINT_MAX;
+	else if (val)
+		state->duty_cycle = val;
+	else
+		state->duty_cycle = 1;
+
+	val = (unsigned long long)
+		readl_relaxed(mvebu_pwmreg_blink_off_duration(mvpwm));
+	val *= NSEC_PER_SEC;
+	do_div(val, mvpwm->clk_rate);
+	if (val < state->duty_cycle) {
+		state->period = 1;
+	} else {
+		val -= state->duty_cycle;
+		if (val > UINT_MAX)
+			state->period = UINT_MAX;
+		else if (val)
+			state->period = val;
+		else
+			state->period = 1;
+	}
+
+	u = readl_relaxed(mvebu_gpioreg_blink(mvchip));
+	if (u)
+		state->enabled = true;
+	else
+		state->enabled = false;
+
+	spin_unlock_irqrestore(&mvpwm->lock, flags);
+}
+
+static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+			   struct pwm_state *state)
+{
+	struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
+	unsigned long long val;
+	unsigned long flags;
+	unsigned int on, off;
+
+	val = (unsigned long long) mvpwm->clk_rate * state->duty_cycle;
+	do_div(val, NSEC_PER_SEC);
+	if (val > UINT_MAX)
+		return -EINVAL;
+	if (val)
+		on = val;
+	else
+		on = 1;
+
+	val = (unsigned long long) mvpwm->clk_rate *
+		(state->period - state->duty_cycle);
+	do_div(val, NSEC_PER_SEC);
+	if (val > UINT_MAX)
+		return -EINVAL;
+	if (val)
+		off = val;
+	else
+		off = 1;
+
+	spin_lock_irqsave(&mvpwm->lock, flags);
+
+	writel_relaxed(on, mvebu_pwmreg_blink_on_duration(mvpwm));
+	writel_relaxed(off, mvebu_pwmreg_blink_off_duration(mvpwm));
+	if (state->enabled)
+		mvebu_gpio_blink(&mvchip->chip, pwm->hwpwm, 1);
+	else
+		mvebu_gpio_blink(&mvchip->chip, pwm->hwpwm, 0);
+
+	spin_unlock_irqrestore(&mvpwm->lock, flags);
+
+	return 0;
+}
+
+static const struct pwm_ops mvebu_pwm_ops = {
+	.request = mvebu_pwm_request,
+	.free = mvebu_pwm_free,
+	.get_state = mvebu_pwm_get_state,
+	.apply = mvebu_pwm_apply,
+	.owner = THIS_MODULE,
+};
+
+static void __maybe_unused mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip)
+{
+	struct mvebu_pwm *mvpwm = mvchip->mvpwm;
+
+	mvpwm->blink_select =
+		readl_relaxed(mvebu_gpioreg_blink_counter_select(mvchip));
+	mvpwm->blink_on_duration =
+		readl_relaxed(mvebu_pwmreg_blink_on_duration(mvpwm));
+	mvpwm->blink_off_duration =
+		readl_relaxed(mvebu_pwmreg_blink_off_duration(mvpwm));
+}
+
+static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip)
+{
+	struct mvebu_pwm *mvpwm = mvchip->mvpwm;
+
+	writel_relaxed(mvpwm->blink_select,
+		       mvebu_gpioreg_blink_counter_select(mvchip));
+	writel_relaxed(mvpwm->blink_on_duration,
+		       mvebu_pwmreg_blink_on_duration(mvpwm));
+	writel_relaxed(mvpwm->blink_off_duration,
+		       mvebu_pwmreg_blink_off_duration(mvpwm));
+}
+
+static int mvebu_pwm_probe(struct platform_device *pdev,
+			   struct mvebu_gpio_chip *mvchip,
+			   int id)
+{
+	struct device *dev = &pdev->dev;
+	struct mvebu_pwm *mvpwm;
+	struct resource *res;
+	u32 set;
+
+	if (!of_device_is_compatible(mvchip->chip.of_node,
+				     "marvell,armada-370-xp-gpio"))
+		return 0;
+
+	if (IS_ERR(mvchip->clk))
+		return PTR_ERR(mvchip->clk);
+
+	/*
+	 * There are only two sets of PWM configuration registers for
+	 * all the GPIO lines on those SoCs which this driver reserves
+	 * for the first two GPIO chips. So if the resource is missing
+	 * we can't treat it as an error.
+	 */
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm");
+	if (!res)
+		return 0;
+
+	/*
+	 * Use set A for lines of GPIO chip with id 0, B for GPIO chip
+	 * with id 1. Don't allow further GPIO chips to be used for PWM.
+	 */
+	if (id == 0)
+		set = 0;
+	else if (id == 1)
+		set = U32_MAX;
+	else
+		return -EINVAL;
+	writel_relaxed(0, mvebu_gpioreg_blink_counter_select(mvchip));
+
+	mvpwm = devm_kzalloc(dev, sizeof(struct mvebu_pwm), GFP_KERNEL);
+	if (!mvpwm)
+		return -ENOMEM;
+	mvchip->mvpwm = mvpwm;
+	mvpwm->mvchip = mvchip;
+
+	mvpwm->membase = devm_ioremap_resource(dev, res);
+	if (IS_ERR(mvpwm->membase))
+		return PTR_ERR(mvpwm->membase);
+
+	mvpwm->clk_rate = clk_get_rate(mvchip->clk);
+	if (!mvpwm->clk_rate) {
+		dev_err(dev, "failed to get clock rate\n");
+		return -EINVAL;
+	}
+
+	mvpwm->chip.dev = dev;
+	mvpwm->chip.ops = &mvebu_pwm_ops;
+	mvpwm->chip.npwm = mvchip->chip.ngpio;
+
+	spin_lock_init(&mvpwm->lock);
+
+	return pwmchip_add(&mvpwm->chip);
+}
+
 #ifdef CONFIG_DEBUG_FS
 #include <linux/seq_file.h>
 
@@ -555,6 +845,10 @@ static const struct of_device_id mvebu_gpio_of_match[] = {
 		.data	    = (void *) MVEBU_GPIO_SOC_VARIANT_ARMADAXP,
 	},
 	{
+		.compatible = "marvell,armada-370-xp-gpio",
+		.data	    = (void *) MVEBU_GPIO_SOC_VARIANT_ORION,
+	},
+	{
 		/* sentinel */
 	},
 };
@@ -600,6 +894,9 @@ static int mvebu_gpio_suspend(struct platform_device *pdev, pm_message_t state)
 		BUG();
 	}
 
+	if (IS_ENABLED(CONFIG_PWM))
+		mvebu_pwm_suspend(mvchip);
+
 	return 0;
 }
 
@@ -643,6 +940,9 @@ static int mvebu_gpio_resume(struct platform_device *pdev)
 		BUG();
 	}
 
+	if (IS_ENABLED(CONFIG_PWM))
+		mvebu_pwm_resume(mvchip);
+
 	return 0;
 }
 
@@ -654,7 +954,6 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 	struct resource *res;
 	struct irq_chip_generic *gc;
 	struct irq_chip_type *ct;
-	struct clk *clk;
 	unsigned int ngpios;
 	bool have_irqs;
 	int soc_variant;
@@ -688,10 +987,10 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 		return id;
 	}
 
-	clk = devm_clk_get(&pdev->dev, NULL);
+	mvchip->clk = devm_clk_get(&pdev->dev, NULL);
 	/* Not all SoCs require a clock.*/
-	if (!IS_ERR(clk))
-		clk_prepare_enable(clk);
+	if (!IS_ERR(mvchip->clk))
+		clk_prepare_enable(mvchip->clk);
 
 	mvchip->soc_variant = soc_variant;
 	mvchip->chip.label = dev_name(&pdev->dev);
@@ -822,6 +1121,10 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 						 mvchip);
 	}
 
+	/* Armada 370/XP has simple PWM support for GPIO lines */
+	if (IS_ENABLED(CONFIG_PWM))
+		return mvebu_pwm_probe(pdev, mvchip, id);
+
 	return 0;
 
 err_domain:
-- 
2.10.2

[PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Ralph Sennhauser]

From: Andrew Lunn <andrew@lunn.ch>

Armada 370/XP devices can 'blink' GPIO lines with a configurable on
and off period. This can be modelled as a PWM.

However, there are only two sets of PWM configuration registers for
all the GPIO lines. This driver simply allows a single GPIO line per
GPIO chip of 32 lines to be used as a PWM. Attempts to use more return
EBUSY.

Due to the interleaving of registers it is not simple to separate the
PWM driver from the GPIO driver. Thus the GPIO driver has been
extended with a PWM driver.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427287/
URL: https://patchwork.ozlabs.org/patch/427295/
[Ralph Sennhauser:
  * Port forward
  * Merge PWM portion into gpio-mvebu.c
  * Switch to atomic PWM API
  * Add new compatible string marvell,armada-370-xp-gpio
  * Update and merge documentation patch
  * Update MAINTAINERS]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/gpio/gpio-mvebu.txt        |  32 ++
 MAINTAINERS                                        |   2 +
 drivers/gpio/gpio-mvebu.c                          | 327 ++++++++++++++++++++-
 3 files changed, 349 insertions(+), 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
index a6f3bec..42c3bb2 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
@@ -38,6 +38,24 @@ Required properties:
 - #gpio-cells: Should be two. The first cell is the pin number. The
   second cell is reserved for flags, unused at the moment.
 
+Optional properties:
+
+In order to use the GPIO lines in PWM mode, some additional optional
+properties are required. Only Armada 370 and XP support these properties.
+
+- compatible: Must contain "marvell,armada-370-xp-gpio"
+
+- reg: an additional register set is needed, for the GPIO Blink
+  Counter on/off registers.
+
+- reg-names: Must contain an entry "pwm" corresponding to the
+  additional register range needed for PWM operation.
+
+- #pwm-cells: Should be two. The first cell is the GPIO line number. The
+  second cell is the period in nanoseconds.
+
+- clocks: Must be a phandle to the clock for the GPIO controller.
+
 Example:
 
 		gpio0: gpio at d0018100 {
@@ -51,3 +69,17 @@ Example:
 			#interrupt-cells = <2>;
 			interrupts = <16>, <17>, <18>, <19>;
 		};
+
+		gpio1: gpio at 18140 {
+			compatible = "marvell,armada-370-xp-gpio";
+			reg = <0x18140 0x40>, <0x181c8 0x08>;
+			reg-names = "gpio", "pwm";
+			ngpios = <17>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			#pwm-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <87>, <88>, <89>;
+			clocks = <&coreclk 0>;
+		};
diff --git a/MAINTAINERS b/MAINTAINERS
index 58b3a22..19382f5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10295,6 +10295,8 @@ F:	include/linux/pwm.h
 F:	drivers/pwm/
 F:	drivers/video/backlight/pwm_bl.c
 F:	include/linux/pwm_backlight.h
+F:	drivers/gpio/gpio-mvebu.c
+F:	Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
 
 PXA2xx/PXA3xx SUPPORT
 M:	Daniel Mack <daniel@zonque.org>
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index fae4db6..19a92ef 100644
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c
@@ -42,22 +42,34 @@
 #include <linux/io.h>
 #include <linux/of_irq.h>
 #include <linux/of_device.h>
+#include <linux/pwm.h>
 #include <linux/clk.h>
 #include <linux/pinctrl/consumer.h>
 #include <linux/irqchip/chained_irq.h>
+#include <linux/platform_device.h>
 #include <linux/bitops.h>
 
+#include "gpiolib.h"
+
 /*
  * GPIO unit register offsets.
  */
-#define GPIO_OUT_OFF		0x0000
-#define GPIO_IO_CONF_OFF	0x0004
-#define GPIO_BLINK_EN_OFF	0x0008
-#define GPIO_IN_POL_OFF		0x000c
-#define GPIO_DATA_IN_OFF	0x0010
-#define GPIO_EDGE_CAUSE_OFF	0x0014
-#define GPIO_EDGE_MASK_OFF	0x0018
-#define GPIO_LEVEL_MASK_OFF	0x001c
+#define GPIO_OUT_OFF			0x0000
+#define GPIO_IO_CONF_OFF		0x0004
+#define GPIO_BLINK_EN_OFF		0x0008
+#define GPIO_IN_POL_OFF			0x000c
+#define GPIO_DATA_IN_OFF		0x0010
+#define GPIO_EDGE_CAUSE_OFF		0x0014
+#define GPIO_EDGE_MASK_OFF		0x0018
+#define GPIO_LEVEL_MASK_OFF		0x001c
+#define GPIO_BLINK_CNT_SELECT_OFF	0x0020
+
+/*
+ * PWM register offsets.
+ */
+#define PWM_BLINK_ON_DURATION_OFF	0x0
+#define PWM_BLINK_OFF_DURATION_OFF	0x4
+
 
 /* The MV78200 has per-CPU registers for edge mask and level mask */
 #define GPIO_EDGE_MASK_MV78200_OFF(cpu)	  ((cpu) ? 0x30 : 0x18)
@@ -78,6 +90,20 @@
 
 #define MVEBU_MAX_GPIO_PER_BANK		32
 
+struct mvebu_pwm {
+	void __iomem		*membase;
+	unsigned long		 clk_rate;
+	struct gpio_desc	*gpiod;
+	struct pwm_chip		 chip;
+	spinlock_t		 lock;
+	struct mvebu_gpio_chip	*mvchip;
+
+	/* Used to preserve GPIO/PWM registers across suspend/resume */
+	u32			 blink_select;
+	u32			 blink_on_duration;
+	u32			 blink_off_duration;
+};
+
 struct mvebu_gpio_chip {
 	struct gpio_chip   chip;
 	spinlock_t	   lock;
@@ -87,6 +113,10 @@ struct mvebu_gpio_chip {
 	struct irq_domain *domain;
 	int		   soc_variant;
 
+	/* Used for PWM support */
+	struct clk	  *clk;
+	struct mvebu_pwm  *mvpwm;
+
 	/* Used to preserve GPIO registers across suspend/resume */
 	u32		   out_reg;
 	u32		   io_conf_reg;
@@ -110,6 +140,12 @@ static void __iomem *mvebu_gpioreg_blink(struct mvebu_gpio_chip *mvchip)
 	return mvchip->membase + GPIO_BLINK_EN_OFF;
 }
 
+static void __iomem *mvebu_gpioreg_blink_counter_select(struct mvebu_gpio_chip
+							*mvchip)
+{
+	return mvchip->membase + GPIO_BLINK_CNT_SELECT_OFF;
+}
+
 static void __iomem *mvebu_gpioreg_io_conf(struct mvebu_gpio_chip *mvchip)
 {
 	return mvchip->membase + GPIO_IO_CONF_OFF;
@@ -181,6 +217,20 @@ static void __iomem *mvebu_gpioreg_level_mask(struct mvebu_gpio_chip *mvchip)
 }
 
 /*
+ * Functions returning addresses of individual registers for a given
+ * PWM controller.
+ */
+static void __iomem *mvebu_pwmreg_blink_on_duration(struct mvebu_pwm *mvpwm)
+{
+	return mvpwm->membase + PWM_BLINK_ON_DURATION_OFF;
+}
+
+static void __iomem *mvebu_pwmreg_blink_off_duration(struct mvebu_pwm *mvpwm)
+{
+	return mvpwm->membase + PWM_BLINK_OFF_DURATION_OFF;
+}
+
+/*
  * Functions implementing the gpio_chip methods
  */
 static void mvebu_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)
@@ -484,6 +534,246 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc)
 	chained_irq_exit(chip, desc);
 }
 
+/*
+ * Functions implementing the pwm_chip methods
+ */
+static struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip)
+{
+	return container_of(chip, struct mvebu_pwm, chip);
+}
+
+static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+	struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
+	struct gpio_desc *desc;
+	unsigned long flags;
+	int ret = 0;
+
+	spin_lock_irqsave(&mvpwm->lock, flags);
+
+	if (mvpwm->gpiod) {
+		ret = -EBUSY;
+	} else {
+		desc = gpio_to_desc(mvchip->chip.base + pwm->hwpwm);
+		if (!desc) {
+			ret = -ENODEV;
+			goto out;
+		}
+
+		ret = gpiod_request(desc, "mvebu-pwm");
+		if (ret)
+			goto out;
+
+		ret = gpiod_direction_output(desc, 0);
+		if (ret) {
+			gpiod_free(desc);
+			goto out;
+		}
+
+		mvpwm->gpiod = desc;
+	}
+out:
+	spin_unlock_irqrestore(&mvpwm->lock, flags);
+	return ret;
+}
+
+static void mvebu_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+	struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
+	unsigned long flags;
+
+	spin_lock_irqsave(&mvpwm->lock, flags);
+	gpiod_free(mvpwm->gpiod);
+	mvpwm->gpiod = NULL;
+	spin_unlock_irqrestore(&mvpwm->lock, flags);
+}
+
+static void mvebu_pwm_get_state(struct pwm_chip *chip,
+				struct pwm_device *pwm,
+				struct pwm_state *state) {
+
+	struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
+	unsigned long long val;
+	unsigned long flags;
+	u32 u;
+
+	spin_lock_irqsave(&mvpwm->lock, flags);
+
+	val = (unsigned long long)
+		readl_relaxed(mvebu_pwmreg_blink_on_duration(mvpwm));
+	val *= NSEC_PER_SEC;
+	do_div(val, mvpwm->clk_rate);
+	if (val > UINT_MAX)
+		state->duty_cycle = UINT_MAX;
+	else if (val)
+		state->duty_cycle = val;
+	else
+		state->duty_cycle = 1;
+
+	val = (unsigned long long)
+		readl_relaxed(mvebu_pwmreg_blink_off_duration(mvpwm));
+	val *= NSEC_PER_SEC;
+	do_div(val, mvpwm->clk_rate);
+	if (val < state->duty_cycle) {
+		state->period = 1;
+	} else {
+		val -= state->duty_cycle;
+		if (val > UINT_MAX)
+			state->period = UINT_MAX;
+		else if (val)
+			state->period = val;
+		else
+			state->period = 1;
+	}
+
+	u = readl_relaxed(mvebu_gpioreg_blink(mvchip));
+	if (u)
+		state->enabled = true;
+	else
+		state->enabled = false;
+
+	spin_unlock_irqrestore(&mvpwm->lock, flags);
+}
+
+static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+			   struct pwm_state *state)
+{
+	struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
+	unsigned long long val;
+	unsigned long flags;
+	unsigned int on, off;
+
+	val = (unsigned long long) mvpwm->clk_rate * state->duty_cycle;
+	do_div(val, NSEC_PER_SEC);
+	if (val > UINT_MAX)
+		return -EINVAL;
+	if (val)
+		on = val;
+	else
+		on = 1;
+
+	val = (unsigned long long) mvpwm->clk_rate *
+		(state->period - state->duty_cycle);
+	do_div(val, NSEC_PER_SEC);
+	if (val > UINT_MAX)
+		return -EINVAL;
+	if (val)
+		off = val;
+	else
+		off = 1;
+
+	spin_lock_irqsave(&mvpwm->lock, flags);
+
+	writel_relaxed(on, mvebu_pwmreg_blink_on_duration(mvpwm));
+	writel_relaxed(off, mvebu_pwmreg_blink_off_duration(mvpwm));
+	if (state->enabled)
+		mvebu_gpio_blink(&mvchip->chip, pwm->hwpwm, 1);
+	else
+		mvebu_gpio_blink(&mvchip->chip, pwm->hwpwm, 0);
+
+	spin_unlock_irqrestore(&mvpwm->lock, flags);
+
+	return 0;
+}
+
+static const struct pwm_ops mvebu_pwm_ops = {
+	.request = mvebu_pwm_request,
+	.free = mvebu_pwm_free,
+	.get_state = mvebu_pwm_get_state,
+	.apply = mvebu_pwm_apply,
+	.owner = THIS_MODULE,
+};
+
+static void __maybe_unused mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip)
+{
+	struct mvebu_pwm *mvpwm = mvchip->mvpwm;
+
+	mvpwm->blink_select =
+		readl_relaxed(mvebu_gpioreg_blink_counter_select(mvchip));
+	mvpwm->blink_on_duration =
+		readl_relaxed(mvebu_pwmreg_blink_on_duration(mvpwm));
+	mvpwm->blink_off_duration =
+		readl_relaxed(mvebu_pwmreg_blink_off_duration(mvpwm));
+}
+
+static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip)
+{
+	struct mvebu_pwm *mvpwm = mvchip->mvpwm;
+
+	writel_relaxed(mvpwm->blink_select,
+		       mvebu_gpioreg_blink_counter_select(mvchip));
+	writel_relaxed(mvpwm->blink_on_duration,
+		       mvebu_pwmreg_blink_on_duration(mvpwm));
+	writel_relaxed(mvpwm->blink_off_duration,
+		       mvebu_pwmreg_blink_off_duration(mvpwm));
+}
+
+static int mvebu_pwm_probe(struct platform_device *pdev,
+			   struct mvebu_gpio_chip *mvchip,
+			   int id)
+{
+	struct device *dev = &pdev->dev;
+	struct mvebu_pwm *mvpwm;
+	struct resource *res;
+	u32 set;
+
+	if (!of_device_is_compatible(mvchip->chip.of_node,
+				     "marvell,armada-370-xp-gpio"))
+		return 0;
+
+	if (IS_ERR(mvchip->clk))
+		return PTR_ERR(mvchip->clk);
+
+	/*
+	 * There are only two sets of PWM configuration registers for
+	 * all the GPIO lines on those SoCs which this driver reserves
+	 * for the first two GPIO chips. So if the resource is missing
+	 * we can't treat it as an error.
+	 */
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm");
+	if (!res)
+		return 0;
+
+	/*
+	 * Use set A for lines of GPIO chip with id 0, B for GPIO chip
+	 * with id 1. Don't allow further GPIO chips to be used for PWM.
+	 */
+	if (id == 0)
+		set = 0;
+	else if (id == 1)
+		set = U32_MAX;
+	else
+		return -EINVAL;
+	writel_relaxed(0, mvebu_gpioreg_blink_counter_select(mvchip));
+
+	mvpwm = devm_kzalloc(dev, sizeof(struct mvebu_pwm), GFP_KERNEL);
+	if (!mvpwm)
+		return -ENOMEM;
+	mvchip->mvpwm = mvpwm;
+	mvpwm->mvchip = mvchip;
+
+	mvpwm->membase = devm_ioremap_resource(dev, res);
+	if (IS_ERR(mvpwm->membase))
+		return PTR_ERR(mvpwm->membase);
+
+	mvpwm->clk_rate = clk_get_rate(mvchip->clk);
+	if (!mvpwm->clk_rate) {
+		dev_err(dev, "failed to get clock rate\n");
+		return -EINVAL;
+	}
+
+	mvpwm->chip.dev = dev;
+	mvpwm->chip.ops = &mvebu_pwm_ops;
+	mvpwm->chip.npwm = mvchip->chip.ngpio;
+
+	spin_lock_init(&mvpwm->lock);
+
+	return pwmchip_add(&mvpwm->chip);
+}
+
 #ifdef CONFIG_DEBUG_FS
 #include <linux/seq_file.h>
 
@@ -555,6 +845,10 @@ static const struct of_device_id mvebu_gpio_of_match[] = {
 		.data	    = (void *) MVEBU_GPIO_SOC_VARIANT_ARMADAXP,
 	},
 	{
+		.compatible = "marvell,armada-370-xp-gpio",
+		.data	    = (void *) MVEBU_GPIO_SOC_VARIANT_ORION,
+	},
+	{
 		/* sentinel */
 	},
 };
@@ -600,6 +894,9 @@ static int mvebu_gpio_suspend(struct platform_device *pdev, pm_message_t state)
 		BUG();
 	}
 
+	if (IS_ENABLED(CONFIG_PWM))
+		mvebu_pwm_suspend(mvchip);
+
 	return 0;
 }
 
@@ -643,6 +940,9 @@ static int mvebu_gpio_resume(struct platform_device *pdev)
 		BUG();
 	}
 
+	if (IS_ENABLED(CONFIG_PWM))
+		mvebu_pwm_resume(mvchip);
+
 	return 0;
 }
 
@@ -654,7 +954,6 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 	struct resource *res;
 	struct irq_chip_generic *gc;
 	struct irq_chip_type *ct;
-	struct clk *clk;
 	unsigned int ngpios;
 	bool have_irqs;
 	int soc_variant;
@@ -688,10 +987,10 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 		return id;
 	}
 
-	clk = devm_clk_get(&pdev->dev, NULL);
+	mvchip->clk = devm_clk_get(&pdev->dev, NULL);
 	/* Not all SoCs require a clock.*/
-	if (!IS_ERR(clk))
-		clk_prepare_enable(clk);
+	if (!IS_ERR(mvchip->clk))
+		clk_prepare_enable(mvchip->clk);
 
 	mvchip->soc_variant = soc_variant;
 	mvchip->chip.label = dev_name(&pdev->dev);
@@ -822,6 +1121,10 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 						 mvchip);
 	}
 
+	/* Armada 370/XP has simple PWM support for GPIO lines */
+	if (IS_ENABLED(CONFIG_PWM))
+		return mvebu_pwm_probe(pdev, mvchip, id);
+
 	return 0;
 
 err_domain:
-- 
2.10.2

[PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Ralph Sennhauser]

From: Andrew Lunn <andrew@lunn.ch>

Add properties to the GPIO nodes to allow them to be also used as PWM
lines.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427294/
[Ralph Sennhauser: Add new compatible string marvell,armada-370-xp-gpio]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/boot/dts/armada-370.dtsi        | 19 ++++++++++++++-----
 arch/arm/boot/dts/armada-xp-mv78230.dtsi | 16 ++++++++++++----
 arch/arm/boot/dts/armada-xp-mv78260.dtsi | 19 ++++++++++++++-----
 arch/arm/boot/dts/armada-xp-mv78460.dtsi | 19 ++++++++++++++-----
 4 files changed, 54 insertions(+), 19 deletions(-)

diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index cc011c8..5e815cc 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -137,29 +137,38 @@
 			};
 
 			gpio0: gpio@18100 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio@18140 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio@18180 {
-				compatible = "marvell,orion-gpio";
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
 				reg = <0x18180 0x40>;
 				ngpios = <2>;
 				gpio-controller;
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 07c5090..f77168c9 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -202,25 +202,33 @@
 
 		internal-regs {
 			gpio0: gpio@18100 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio@18140 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <17>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>;
+				clocks = <&coreclk 0>;
 			};
 		};
 	};
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 64e936a..0ecfaf4 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -285,29 +285,38 @@
 
 		internal-regs {
 			gpio0: gpio@18100 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio@18140 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio@18180 {
-				compatible = "marvell,orion-gpio";
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
 				reg = <0x18180 0x40>;
 				ngpios = <3>;
 				gpio-controller;
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index d1383dd..670ece4c 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -323,29 +323,38 @@
 
 		internal-regs {
 			gpio0: gpio@18100 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio@18140 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio@18180 {
-				compatible = "marvell,orion-gpio";
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
 				reg = <0x18180 0x40>;
 				ngpios = <3>;
 				gpio-controller;
-- 
2.10.2

[PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Ralph Sennhauser]

From: Andrew Lunn <andrew@lunn.ch>

Add properties to the GPIO nodes to allow them to be also used as PWM
lines.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427294/
[Ralph Sennhauser: Add new compatible string marvell,armada-370-xp-gpio]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/boot/dts/armada-370.dtsi        | 19 ++++++++++++++-----
 arch/arm/boot/dts/armada-xp-mv78230.dtsi | 16 ++++++++++++----
 arch/arm/boot/dts/armada-xp-mv78260.dtsi | 19 ++++++++++++++-----
 arch/arm/boot/dts/armada-xp-mv78460.dtsi | 19 ++++++++++++++-----
 4 files changed, 54 insertions(+), 19 deletions(-)

diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index cc011c8..5e815cc 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -137,29 +137,38 @@
 			};
 
 			gpio0: gpio at 18100 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio at 18140 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio at 18180 {
-				compatible = "marvell,orion-gpio";
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
 				reg = <0x18180 0x40>;
 				ngpios = <2>;
 				gpio-controller;
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 07c5090..f77168c9 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -202,25 +202,33 @@
 
 		internal-regs {
 			gpio0: gpio at 18100 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio at 18140 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <17>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>;
+				clocks = <&coreclk 0>;
 			};
 		};
 	};
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 64e936a..0ecfaf4 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -285,29 +285,38 @@
 
 		internal-regs {
 			gpio0: gpio at 18100 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio at 18140 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio at 18180 {
-				compatible = "marvell,orion-gpio";
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
 				reg = <0x18180 0x40>;
 				ngpios = <3>;
 				gpio-controller;
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index d1383dd..670ece4c 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -323,29 +323,38 @@
 
 		internal-regs {
 			gpio0: gpio at 18100 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio at 18140 {
-				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio at 18180 {
-				compatible = "marvell,orion-gpio";
+				compatible = "marvell,armada-370-xp-gpio",
+					     "marvell,orion-gpio";
 				reg = <0x18180 0x40>;
 				ngpios = <3>;
 				gpio-controller;
-- 
2.10.2

[PATCH v6 3/4] ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig

[Ralph Sennhauser]

From: Andrew Lunn <andrew@lunn.ch>

Now that the GPIO driver also supports PWM operation, enable the PWM
framework and fan driver in mvebu_v7_defconfig.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427297/
[Ralph Sennhauser: add fan driver to defconfig]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/configs/mvebu_v7_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
index f1a0e25..6955370 100644
--- a/arch/arm/configs/mvebu_v7_defconfig
+++ b/arch/arm/configs/mvebu_v7_defconfig
@@ -135,6 +135,8 @@ CONFIG_DMADEVICES=y
 CONFIG_MV_XOR=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_MEMORY=y
+CONFIG_PWM=y
+CONFIG_SENSORS_PWM_FAN=y
 CONFIG_EXT4_FS=y
 CONFIG_ISO9660_FS=y
 CONFIG_JOLIET=y
-- 
2.10.2

[PATCH v6 3/4] ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig

[Ralph Sennhauser]

From: Andrew Lunn <andrew@lunn.ch>

Now that the GPIO driver also supports PWM operation, enable the PWM
framework and fan driver in mvebu_v7_defconfig.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427297/
[Ralph Sennhauser: add fan driver to defconfig]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/configs/mvebu_v7_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
index f1a0e25..6955370 100644
--- a/arch/arm/configs/mvebu_v7_defconfig
+++ b/arch/arm/configs/mvebu_v7_defconfig
@@ -135,6 +135,8 @@ CONFIG_DMADEVICES=y
 CONFIG_MV_XOR=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_MEMORY=y
+CONFIG_PWM=y
+CONFIG_SENSORS_PWM_FAN=y
 CONFIG_EXT4_FS=y
 CONFIG_ISO9660_FS=y
 CONFIG_JOLIET=y
-- 
2.10.2

[PATCH v6 4/4] ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan

[Ralph Sennhauser]

From: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>

The mvebu GPIO driver can also perform PWM on some pins. Use the pwm-fan
driver to control the fan of the WRT1900AC, giving us finer grained control
over its speed and hence noise.

Signed-off-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
URL: https://patchwork.ozlabs.org/patch/427291/
[Ralph Sennhauser: drop flags paramter from pwms, no longer used]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Tested-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
---
 arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
index 9efcf59..6d705f5 100644
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
@@ -308,13 +308,11 @@
 		};
 	};
 
-	gpio_fan {
+	pwm_fan {
 		/* SUNON HA4010V4-0000-C99 */
-		compatible = "gpio-fan";
-		gpios = <&gpio0 24 0>;
 
-		gpio-fan,speed-map = <0    0
-				      4500 1>;
+		compatible = "pwm-fan";
+		pwms = <&gpio0 24 4000>;
 	};
 
 	dsa {
-- 
2.10.2

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[PATCH v6 4/4] ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan

[Ralph Sennhauser]

From: Andrew Lunn <andrew@lunn.ch>

The mvebu GPIO driver can also perform PWM on some pins. Use the pwm-fan
driver to control the fan of the WRT1900AC, giving us finer grained control
over its speed and hence noise.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427291/
[Ralph Sennhauser: drop flags paramter from pwms, no longer used]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
index 9efcf59..6d705f5 100644
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
@@ -308,13 +308,11 @@
 		};
 	};
 
-	gpio_fan {
+	pwm_fan {
 		/* SUNON HA4010V4-0000-C99 */
-		compatible = "gpio-fan";
-		gpios = <&gpio0 24 0>;
 
-		gpio-fan,speed-map = <0    0
-				      4500 1>;
+		compatible = "pwm-fan";
+		pwms = <&gpio0 24 4000>;
 	};
 
 	dsa {
-- 
2.10.2

[PATCH v6 4/4] ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan

[Ralph Sennhauser]

From: Andrew Lunn <andrew@lunn.ch>

The mvebu GPIO driver can also perform PWM on some pins. Use the pwm-fan
driver to control the fan of the WRT1900AC, giving us finer grained control
over its speed and hence noise.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427291/
[Ralph Sennhauser: drop flags paramter from pwms, no longer used]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
index 9efcf59..6d705f5 100644
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
@@ -308,13 +308,11 @@
 		};
 	};
 
-	gpio_fan {
+	pwm_fan {
 		/* SUNON HA4010V4-0000-C99 */
-		compatible = "gpio-fan";
-		gpios = <&gpio0 24 0>;
 
-		gpio-fan,speed-map = <0    0
-				      4500 1>;
+		compatible = "pwm-fan";
+		pwms = <&gpio0 24 4000>;
 	};
 
 	dsa {
-- 
2.10.2

Re: [PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Linus Walleij]

On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> From: Andrew Lunn <andrew@lunn.ch>
>
> Armada 370/XP devices can 'blink' GPIO lines with a configurable on
> and off period. This can be modelled as a PWM.
>
> However, there are only two sets of PWM configuration registers for
> all the GPIO lines. This driver simply allows a single GPIO line per
> GPIO chip of 32 lines to be used as a PWM. Attempts to use more return
> EBUSY.
>
> Due to the interleaving of registers it is not simple to separate the
> PWM driver from the GPIO driver. Thus the GPIO driver has been
> extended with a PWM driver.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427287/
> URL: https://patchwork.ozlabs.org/patch/427295/
> [Ralph Sennhauser:
>   * Port forward
>   * Merge PWM portion into gpio-mvebu.c
>   * Switch to atomic PWM API
>   * Add new compatible string marvell,armada-370-xp-gpio
>   * Update and merge documentation patch
>   * Update MAINTAINERS]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Tested-by: Andrew Lunn <andrew@lunn.ch>
> Acked-by: Thierry Reding <thierry.reding@gmail.com>
> Acked-by: Rob Herring <robh@kernel.org>

Patch applied.

Yours,
Linus Walleij

Re: [PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Linus Walleij]

On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> From: Andrew Lunn <andrew@lunn.ch>
>
> Armada 370/XP devices can 'blink' GPIO lines with a configurable on
> and off period. This can be modelled as a PWM.
>
> However, there are only two sets of PWM configuration registers for
> all the GPIO lines. This driver simply allows a single GPIO line per
> GPIO chip of 32 lines to be used as a PWM. Attempts to use more return
> EBUSY.
>
> Due to the interleaving of registers it is not simple to separate the
> PWM driver from the GPIO driver. Thus the GPIO driver has been
> extended with a PWM driver.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427287/
> URL: https://patchwork.ozlabs.org/patch/427295/
> [Ralph Sennhauser:
>   * Port forward
>   * Merge PWM portion into gpio-mvebu.c
>   * Switch to atomic PWM API
>   * Add new compatible string marvell,armada-370-xp-gpio
>   * Update and merge documentation patch
>   * Update MAINTAINERS]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Tested-by: Andrew Lunn <andrew@lunn.ch>
> Acked-by: Thierry Reding <thierry.reding@gmail.com>
> Acked-by: Rob Herring <robh@kernel.org>

Patch applied.

Yours,
Linus Walleij

[PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Linus Walleij]

On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> From: Andrew Lunn <andrew@lunn.ch>
>
> Armada 370/XP devices can 'blink' GPIO lines with a configurable on
> and off period. This can be modelled as a PWM.
>
> However, there are only two sets of PWM configuration registers for
> all the GPIO lines. This driver simply allows a single GPIO line per
> GPIO chip of 32 lines to be used as a PWM. Attempts to use more return
> EBUSY.
>
> Due to the interleaving of registers it is not simple to separate the
> PWM driver from the GPIO driver. Thus the GPIO driver has been
> extended with a PWM driver.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427287/
> URL: https://patchwork.ozlabs.org/patch/427295/
> [Ralph Sennhauser:
>   * Port forward
>   * Merge PWM portion into gpio-mvebu.c
>   * Switch to atomic PWM API
>   * Add new compatible string marvell,armada-370-xp-gpio
>   * Update and merge documentation patch
>   * Update MAINTAINERS]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Tested-by: Andrew Lunn <andrew@lunn.ch>
> Acked-by: Thierry Reding <thierry.reding@gmail.com>
> Acked-by: Rob Herring <robh@kernel.org>

Patch applied.

Yours,
Linus Walleij

Re: [PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Linus Walleij]

On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> From: Andrew Lunn <andrew@lunn.ch>
>
> Add properties to the GPIO nodes to allow them to be also used as PWM
> lines.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427294/
> [Ralph Sennhauser: Add new compatible string marvell,armada-370-xp-gpio]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Tested-by: Andrew Lunn <andrew@lunn.ch>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Please funnel this through ARM SoC.

Yours,
Linus Walleij

Re: [PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Linus Walleij]

On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> From: Andrew Lunn <andrew@lunn.ch>
>
> Add properties to the GPIO nodes to allow them to be also used as PWM
> lines.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427294/
> [Ralph Sennhauser: Add new compatible string marvell,armada-370-xp-gpio]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Tested-by: Andrew Lunn <andrew@lunn.ch>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Please funnel this through ARM SoC.

Yours,
Linus Walleij

[PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Linus Walleij]

On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> From: Andrew Lunn <andrew@lunn.ch>
>
> Add properties to the GPIO nodes to allow them to be also used as PWM
> lines.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427294/
> [Ralph Sennhauser: Add new compatible string marvell,armada-370-xp-gpio]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Tested-by: Andrew Lunn <andrew@lunn.ch>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Please funnel this through ARM SoC.

Yours,
Linus Walleij

Re: [PATCH v6 3/4] ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig

[Linus Walleij]

On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> From: Andrew Lunn <andrew@lunn.ch>
>
> Now that the GPIO driver also supports PWM operation, enable the PWM
> framework and fan driver in mvebu_v7_defconfig.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427297/
> [Ralph Sennhauser: add fan driver to defconfig]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Tested-by: Andrew Lunn <andrew@lunn.ch>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Please funnel this through ARM SoC.

Yours,
Linus Walleij

Re: [PATCH v6 3/4] ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig

[Linus Walleij]

On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> From: Andrew Lunn <andrew@lunn.ch>
>
> Now that the GPIO driver also supports PWM operation, enable the PWM
> framework and fan driver in mvebu_v7_defconfig.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427297/
> [Ralph Sennhauser: add fan driver to defconfig]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Tested-by: Andrew Lunn <andrew@lunn.ch>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Please funnel this through ARM SoC.

Yours,
Linus Walleij

[PATCH v6 3/4] ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig

[Linus Walleij]

On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> From: Andrew Lunn <andrew@lunn.ch>
>
> Now that the GPIO driver also supports PWM operation, enable the PWM
> framework and fan driver in mvebu_v7_defconfig.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427297/
> [Ralph Sennhauser: add fan driver to defconfig]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Tested-by: Andrew Lunn <andrew@lunn.ch>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Please funnel this through ARM SoC.

Yours,
Linus Walleij

Re: [PATCH v6 4/4] ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan

[Linus Walleij]

On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> From: Andrew Lunn <andrew@lunn.ch>
>
> The mvebu GPIO driver can also perform PWM on some pins. Use the pwm-fan
> driver to control the fan of the WRT1900AC, giving us finer grained control
> over its speed and hence noise.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427291/
> [Ralph Sennhauser: drop flags paramter from pwms, no longer used]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Tested-by: Andrew Lunn <andrew@lunn.ch>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Please funnel this through ARM SoC.

Yours,
Linus Walleij

Re: [PATCH v6 4/4] ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan

[Linus Walleij]

On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> From: Andrew Lunn <andrew@lunn.ch>
>
> The mvebu GPIO driver can also perform PWM on some pins. Use the pwm-fan
> driver to control the fan of the WRT1900AC, giving us finer grained control
> over its speed and hence noise.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427291/
> [Ralph Sennhauser: drop flags paramter from pwms, no longer used]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Tested-by: Andrew Lunn <andrew@lunn.ch>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Please funnel this through ARM SoC.

Yours,
Linus Walleij

[PATCH v6 4/4] ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan

[Linus Walleij]

On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> From: Andrew Lunn <andrew@lunn.ch>
>
> The mvebu GPIO driver can also perform PWM on some pins. Use the pwm-fan
> driver to control the fan of the WRT1900AC, giving us finer grained control
> over its speed and hence noise.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427291/
> [Ralph Sennhauser: drop flags paramter from pwms, no longer used]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> Tested-by: Andrew Lunn <andrew@lunn.ch>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Please funnel this through ARM SoC.

Yours,
Linus Walleij

Re: [PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Ralph Sennhauser]

On Mon, 24 Apr 2017 11:19:32 +0200
Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
> 
> > From: Andrew Lunn <andrew@lunn.ch>
> >
> > Add properties to the GPIO nodes to allow them to be also used as
> > PWM lines.
> >
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> > URL: https://patchwork.ozlabs.org/patch/427294/
> > [Ralph Sennhauser: Add new compatible string
> > marvell,armada-370-xp-gpio] Signed-off-by: Ralph Sennhauser
> > <ralph.sennhauser@gmail.com> Tested-by: Andrew Lunn
> > <andrew@lunn.ch>  
> 
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> 
> Please funnel this through ARM SoC.

Hi Gregory,

A reminder on the off chance you have missed this and it's not to late
already, Linus Walleij took the driver and submitted it for inclusion in
4.12 [1]. So for completeness it be nice to have the dts(i) and
defconfig changes in as well.

Thanks
Ralph

[1] https://lkml.org/lkml/2017/5/4/82

> 
> Yours,
> Linus Walleij

Re: [PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Ralph Sennhauser]

On Mon, 24 Apr 2017 11:19:32 +0200
Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
> 
> > From: Andrew Lunn <andrew@lunn.ch>
> >
> > Add properties to the GPIO nodes to allow them to be also used as
> > PWM lines.
> >
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> > URL: https://patchwork.ozlabs.org/patch/427294/
> > [Ralph Sennhauser: Add new compatible string
> > marvell,armada-370-xp-gpio] Signed-off-by: Ralph Sennhauser
> > <ralph.sennhauser@gmail.com> Tested-by: Andrew Lunn
> > <andrew@lunn.ch>  
> 
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> 
> Please funnel this through ARM SoC.

Hi Gregory,

A reminder on the off chance you have missed this and it's not to late
already, Linus Walleij took the driver and submitted it for inclusion in
4.12 [1]. So for completeness it be nice to have the dts(i) and
defconfig changes in as well.

Thanks
Ralph

[1] https://lkml.org/lkml/2017/5/4/82

> 
> Yours,
> Linus Walleij

[PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Ralph Sennhauser]

On Mon, 24 Apr 2017 11:19:32 +0200
Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
> 
> > From: Andrew Lunn <andrew@lunn.ch>
> >
> > Add properties to the GPIO nodes to allow them to be also used as
> > PWM lines.
> >
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> > URL: https://patchwork.ozlabs.org/patch/427294/
> > [Ralph Sennhauser: Add new compatible string
> > marvell,armada-370-xp-gpio] Signed-off-by: Ralph Sennhauser
> > <ralph.sennhauser@gmail.com> Tested-by: Andrew Lunn
> > <andrew@lunn.ch>  
> 
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> 
> Please funnel this through ARM SoC.

Hi Gregory,

A reminder on the off chance you have missed this and it's not to late
already, Linus Walleij took the driver and submitted it for inclusion in
4.12 [1]. So for completeness it be nice to have the dts(i) and
defconfig changes in as well.

Thanks
Ralph

[1] https://lkml.org/lkml/2017/5/4/82

> 
> Yours,
> Linus Walleij

Re: [PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Gregory CLEMENT]

Hi Ralph,
 
 On ven., mai 05 2017, Ralph Sennhauser <ralph.sennhauser-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:

> On Mon, 24 Apr 2017 11:19:32 +0200
> Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>
>> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
>> <ralph.sennhauser-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>> 
>> > From: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
>> >
>> > Add properties to the GPIO nodes to allow them to be also used as
>> > PWM lines.
>> >
>> > Signed-off-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
>> > URL: https://patchwork.ozlabs.org/patch/427294/
>> > [Ralph Sennhauser: Add new compatible string
>> > marvell,armada-370-xp-gpio] Signed-off-by: Ralph Sennhauser
>> > <ralph.sennhauser-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Tested-by: Andrew Lunn
>> > <andrew-g2DYL2Zd6BY@public.gmane.org>  
>> 
>> Acked-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>> 
>> Please funnel this through ARM SoC.
>
> Hi Gregory,
>
> A reminder on the off chance you have missed this and it's not to late
> already, Linus Walleij took the driver and submitted it for inclusion in
> 4.12 [1]. So for completeness it be nice to have the dts(i) and
> defconfig changes in as well.

Unfortunately it was too late to applied and to push it to arm-soc when
the gpio part was applied.

So I will apply when 4.12-rc1 will be released and it will be
included in the 4.13 release.

Gregory
>
> Thanks
> Ralph
>
> [1] https://lkml.org/lkml/2017/5/4/82
>
>> 
>> Yours,
>> Linus Walleij
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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Re: [PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Gregory CLEMENT]

Hi Ralph,
 
 On ven., mai 05 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com> wrote:

> On Mon, 24 Apr 2017 11:19:32 +0200
> Linus Walleij <linus.walleij@linaro.org> wrote:
>
>> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
>> <ralph.sennhauser@gmail.com> wrote:
>> 
>> > From: Andrew Lunn <andrew@lunn.ch>
>> >
>> > Add properties to the GPIO nodes to allow them to be also used as
>> > PWM lines.
>> >
>> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> > URL: https://patchwork.ozlabs.org/patch/427294/
>> > [Ralph Sennhauser: Add new compatible string
>> > marvell,armada-370-xp-gpio] Signed-off-by: Ralph Sennhauser
>> > <ralph.sennhauser@gmail.com> Tested-by: Andrew Lunn
>> > <andrew@lunn.ch>  
>> 
>> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>> 
>> Please funnel this through ARM SoC.
>
> Hi Gregory,
>
> A reminder on the off chance you have missed this and it's not to late
> already, Linus Walleij took the driver and submitted it for inclusion in
> 4.12 [1]. So for completeness it be nice to have the dts(i) and
> defconfig changes in as well.

Unfortunately it was too late to applied and to push it to arm-soc when
the gpio part was applied.

So I will apply when 4.12-rc1 will be released and it will be
included in the 4.13 release.

Gregory
>
> Thanks
> Ralph
>
> [1] https://lkml.org/lkml/2017/5/4/82
>
>> 
>> Yours,
>> Linus Walleij
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Gregory CLEMENT]

Hi Ralph,
 
 On ven., mai 05 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com> wrote:

> On Mon, 24 Apr 2017 11:19:32 +0200
> Linus Walleij <linus.walleij@linaro.org> wrote:
>
>> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
>> <ralph.sennhauser@gmail.com> wrote:
>> 
>> > From: Andrew Lunn <andrew@lunn.ch>
>> >
>> > Add properties to the GPIO nodes to allow them to be also used as
>> > PWM lines.
>> >
>> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> > URL: https://patchwork.ozlabs.org/patch/427294/
>> > [Ralph Sennhauser: Add new compatible string
>> > marvell,armada-370-xp-gpio] Signed-off-by: Ralph Sennhauser
>> > <ralph.sennhauser@gmail.com> Tested-by: Andrew Lunn
>> > <andrew@lunn.ch>  
>> 
>> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>> 
>> Please funnel this through ARM SoC.
>
> Hi Gregory,
>
> A reminder on the off chance you have missed this and it's not to late
> already, Linus Walleij took the driver and submitted it for inclusion in
> 4.12 [1]. So for completeness it be nice to have the dts(i) and
> defconfig changes in as well.

Unfortunately it was too late to applied and to push it to arm-soc when
the gpio part was applied.

So I will apply when 4.12-rc1 will be released and it will be
included in the 4.13 release.

Gregory
>
> Thanks
> Ralph
>
> [1] https://lkml.org/lkml/2017/5/4/82
>
>> 
>> Yours,
>> Linus Walleij
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Re: [PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Ralph Sennhauser]

On Fri, 05 May 2017 10:09:09 +0200
Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:

> Hi Ralph,
>  
>  On ven., mai 05 2017, Ralph Sennhauser <ralph.sennhauser-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> wrote:
> 
> > On Mon, 24 Apr 2017 11:19:32 +0200
> > Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> >  
> >> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> >> <ralph.sennhauser-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> >>   
> >> > From: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
> >> >
> >> > Add properties to the GPIO nodes to allow them to be also used as
> >> > PWM lines.
> >> >
> >> > Signed-off-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
> >> > URL: https://patchwork.ozlabs.org/patch/427294/
> >> > [Ralph Sennhauser: Add new compatible string
> >> > marvell,armada-370-xp-gpio] Signed-off-by: Ralph Sennhauser
> >> > <ralph.sennhauser-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Tested-by: Andrew Lunn
> >> > <andrew-g2DYL2Zd6BY@public.gmane.org>    
> >> 
> >> Acked-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> >> 
> >> Please funnel this through ARM SoC.  
> >
> > Hi Gregory,
> >
> > A reminder on the off chance you have missed this and it's not to
> > late already, Linus Walleij took the driver and submitted it for
> > inclusion in 4.12 [1]. So for completeness it be nice to have the
> > dts(i) and defconfig changes in as well.  
> 
> Unfortunately it was too late to applied and to push it to arm-soc
> when the gpio part was applied.
> 
> So I will apply when 4.12-rc1 will be released and it will be
> included in the 4.13 release.

Such is life, thanks for the heads up.

Ralph

> 
> Gregory
> >
> > Thanks
> > Ralph
> >
> > [1] https://lkml.org/lkml/2017/5/4/82
> >  
> >> 
> >> Yours,
> >> Linus Walleij  
> >  
> 

--
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Re: [PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Ralph Sennhauser]

On Fri, 05 May 2017 10:09:09 +0200
Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:

> Hi Ralph,
>  
>  On ven., mai 05 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com>
> wrote:
> 
> > On Mon, 24 Apr 2017 11:19:32 +0200
> > Linus Walleij <linus.walleij@linaro.org> wrote:
> >  
> >> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> >> <ralph.sennhauser@gmail.com> wrote:
> >>   
> >> > From: Andrew Lunn <andrew@lunn.ch>
> >> >
> >> > Add properties to the GPIO nodes to allow them to be also used as
> >> > PWM lines.
> >> >
> >> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> >> > URL: https://patchwork.ozlabs.org/patch/427294/
> >> > [Ralph Sennhauser: Add new compatible string
> >> > marvell,armada-370-xp-gpio] Signed-off-by: Ralph Sennhauser
> >> > <ralph.sennhauser@gmail.com> Tested-by: Andrew Lunn
> >> > <andrew@lunn.ch>    
> >> 
> >> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> >> 
> >> Please funnel this through ARM SoC.  
> >
> > Hi Gregory,
> >
> > A reminder on the off chance you have missed this and it's not to
> > late already, Linus Walleij took the driver and submitted it for
> > inclusion in 4.12 [1]. So for completeness it be nice to have the
> > dts(i) and defconfig changes in as well.  
> 
> Unfortunately it was too late to applied and to push it to arm-soc
> when the gpio part was applied.
> 
> So I will apply when 4.12-rc1 will be released and it will be
> included in the 4.13 release.

Such is life, thanks for the heads up.

Ralph

> 
> Gregory
> >
> > Thanks
> > Ralph
> >
> > [1] https://lkml.org/lkml/2017/5/4/82
> >  
> >> 
> >> Yours,
> >> Linus Walleij  
> >  
> 

[PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Ralph Sennhauser]

On Fri, 05 May 2017 10:09:09 +0200
Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:

> Hi Ralph,
>  
>  On ven., mai 05 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com>
> wrote:
> 
> > On Mon, 24 Apr 2017 11:19:32 +0200
> > Linus Walleij <linus.walleij@linaro.org> wrote:
> >  
> >> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> >> <ralph.sennhauser@gmail.com> wrote:
> >>   
> >> > From: Andrew Lunn <andrew@lunn.ch>
> >> >
> >> > Add properties to the GPIO nodes to allow them to be also used as
> >> > PWM lines.
> >> >
> >> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> >> > URL: https://patchwork.ozlabs.org/patch/427294/
> >> > [Ralph Sennhauser: Add new compatible string
> >> > marvell,armada-370-xp-gpio] Signed-off-by: Ralph Sennhauser
> >> > <ralph.sennhauser@gmail.com> Tested-by: Andrew Lunn
> >> > <andrew@lunn.ch>    
> >> 
> >> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> >> 
> >> Please funnel this through ARM SoC.  
> >
> > Hi Gregory,
> >
> > A reminder on the off chance you have missed this and it's not to
> > late already, Linus Walleij took the driver and submitted it for
> > inclusion in 4.12 [1]. So for completeness it be nice to have the
> > dts(i) and defconfig changes in as well.  
> 
> Unfortunately it was too late to applied and to push it to arm-soc
> when the gpio part was applied.
> 
> So I will apply when 4.12-rc1 will be released and it will be
> included in the 4.13 release.

Such is life, thanks for the heads up.

Ralph

> 
> Gregory
> >
> > Thanks
> > Ralph
> >
> > [1] https://lkml.org/lkml/2017/5/4/82
> >  
> >> 
> >> Yours,
> >> Linus Walleij  
> >  
> 

Re: [PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Gregory CLEMENT]

Hi,
 
 On lun., avril 24 2017, Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>
>> From: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
>>
>> Add properties to the GPIO nodes to allow them to be also used as PWM
>> lines.
>>
>> Signed-off-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
>> URL: https://patchwork.ozlabs.org/patch/427294/
>> [Ralph Sennhauser: Add new compatible string marvell,armada-370-xp-gpio]
>> Signed-off-by: Ralph Sennhauser <ralph.sennhauser-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>> Tested-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
>
> Acked-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>
> Please funnel this through ARM SoC.


Applied on mvebu/dt

Thanks,

Gregory

>
> Yours,
> Linus Walleij

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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Re: [PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Gregory CLEMENT]

Hi,
 
 On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
>
>> From: Andrew Lunn <andrew@lunn.ch>
>>
>> Add properties to the GPIO nodes to allow them to be also used as PWM
>> lines.
>>
>> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> URL: https://patchwork.ozlabs.org/patch/427294/
>> [Ralph Sennhauser: Add new compatible string marvell,armada-370-xp-gpio]
>> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> Tested-by: Andrew Lunn <andrew@lunn.ch>
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
> Please funnel this through ARM SoC.


Applied on mvebu/dt

Thanks,

Gregory

>
> Yours,
> Linus Walleij

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH v6 2/4] ARM: dts: mvebu: Add PWM properties to .dtsi files

[Gregory CLEMENT]

Hi,
 
 On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
>
>> From: Andrew Lunn <andrew@lunn.ch>
>>
>> Add properties to the GPIO nodes to allow them to be also used as PWM
>> lines.
>>
>> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> URL: https://patchwork.ozlabs.org/patch/427294/
>> [Ralph Sennhauser: Add new compatible string marvell,armada-370-xp-gpio]
>> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> Tested-by: Andrew Lunn <andrew@lunn.ch>
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
> Please funnel this through ARM SoC.


Applied on mvebu/dt

Thanks,

Gregory

>
> Yours,
> Linus Walleij

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Re: [PATCH v6 4/4] ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan

[Gregory CLEMENT]

Hi
 
 On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
>
>> From: Andrew Lunn <andrew@lunn.ch>
>>
>> The mvebu GPIO driver can also perform PWM on some pins. Use the pwm-fan
>> driver to control the fan of the WRT1900AC, giving us finer grained control
>> over its speed and hence noise.
>>
>> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> URL: https://patchwork.ozlabs.org/patch/427291/
>> [Ralph Sennhauser: drop flags paramter from pwms, no longer used]
>> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> Tested-by: Andrew Lunn <andrew@lunn.ch>
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
> Please funnel this through ARM SoC.

Applied on mvebu/dt

Thanks,

Gregory
>
> Yours,
> Linus Walleij

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Re: [PATCH v6 4/4] ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan

[Gregory CLEMENT]

Hi
 
 On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
>
>> From: Andrew Lunn <andrew@lunn.ch>
>>
>> The mvebu GPIO driver can also perform PWM on some pins. Use the pwm-fan
>> driver to control the fan of the WRT1900AC, giving us finer grained control
>> over its speed and hence noise.
>>
>> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> URL: https://patchwork.ozlabs.org/patch/427291/
>> [Ralph Sennhauser: drop flags paramter from pwms, no longer used]
>> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> Tested-by: Andrew Lunn <andrew@lunn.ch>
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
> Please funnel this through ARM SoC.

Applied on mvebu/dt

Thanks,

Gregory
>
> Yours,
> Linus Walleij

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH v6 4/4] ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan

[Gregory CLEMENT]

Hi
 
 On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
>
>> From: Andrew Lunn <andrew@lunn.ch>
>>
>> The mvebu GPIO driver can also perform PWM on some pins. Use the pwm-fan
>> driver to control the fan of the WRT1900AC, giving us finer grained control
>> over its speed and hence noise.
>>
>> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> URL: https://patchwork.ozlabs.org/patch/427291/
>> [Ralph Sennhauser: drop flags paramter from pwms, no longer used]
>> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> Tested-by: Andrew Lunn <andrew@lunn.ch>
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
> Please funnel this through ARM SoC.

Applied on mvebu/dt

Thanks,

Gregory
>
> Yours,
> Linus Walleij

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Re: [PATCH v6 3/4] ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig

[Gregory CLEMENT]

Hi,
 
 On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
>
>> From: Andrew Lunn <andrew@lunn.ch>
>>
>> Now that the GPIO driver also supports PWM operation, enable the PWM
>> framework and fan driver in mvebu_v7_defconfig.
>>
>> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> URL: https://patchwork.ozlabs.org/patch/427297/
>> [Ralph Sennhauser: add fan driver to defconfig]
>> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> Tested-by: Andrew Lunn <andrew@lunn.ch>
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
> Please funnel this through ARM SoC.

Applied on mvebu/defconfig

Thanks,

Gregory
>
> Yours,
> Linus Walleij

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Re: [PATCH v6 3/4] ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig

[Gregory CLEMENT]

Hi,
 
 On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
>
>> From: Andrew Lunn <andrew@lunn.ch>
>>
>> Now that the GPIO driver also supports PWM operation, enable the PWM
>> framework and fan driver in mvebu_v7_defconfig.
>>
>> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> URL: https://patchwork.ozlabs.org/patch/427297/
>> [Ralph Sennhauser: add fan driver to defconfig]
>> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> Tested-by: Andrew Lunn <andrew@lunn.ch>
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
> Please funnel this through ARM SoC.

Applied on mvebu/defconfig

Thanks,

Gregory
>
> Yours,
> Linus Walleij

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH v6 3/4] ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig

[Gregory CLEMENT]

Hi,
 
 On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
>
>> From: Andrew Lunn <andrew@lunn.ch>
>>
>> Now that the GPIO driver also supports PWM operation, enable the PWM
>> framework and fan driver in mvebu_v7_defconfig.
>>
>> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> URL: https://patchwork.ozlabs.org/patch/427297/
>> [Ralph Sennhauser: add fan driver to defconfig]
>> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> Tested-by: Andrew Lunn <andrew@lunn.ch>
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
> Please funnel this through ARM SoC.

Applied on mvebu/defconfig

Thanks,

Gregory
>
> Yours,
> Linus Walleij

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Re: [PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Gregory CLEMENT]

Hi Ralph and Linus,

I resurrect this thread following the series post by Richard Genoud:
http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/509461.html

 On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
>
>> From: Andrew Lunn <andrew@lunn.ch>
>>
>> Armada 370/XP devices can 'blink' GPIO lines with a configurable on
>> and off period. This can be modelled as a PWM.
>>
>> However, there are only two sets of PWM configuration registers for
>> all the GPIO lines. This driver simply allows a single GPIO line per
>> GPIO chip of 32 lines to be used as a PWM. Attempts to use more return
>> EBUSY.
>>
>> Due to the interleaving of registers it is not simple to separate the
>> PWM driver from the GPIO driver. Thus the GPIO driver has been
>> extended with a PWM driver.
>>
>> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> URL: https://patchwork.ozlabs.org/patch/427287/
>> URL: https://patchwork.ozlabs.org/patch/427295/
>> [Ralph Sennhauser:
>>   * Port forward
>>   * Merge PWM portion into gpio-mvebu.c
>>   * Switch to atomic PWM API
>>   * Add new compatible string marvell,armada-370-xp-gpio

The fact that Richard managed to run the code on Armada 38x draw my
attention on the documentation that need to be amend.

And it makes me realized that I missed the bad naming of the compatible
string. We don't use family name for the compatible string, but the name
of the first SoC compatible with. So in this case we should use
"marvell,armada-370", as it is still in rc and not yet deployed. What
about fixing the name now?

I can send a patch for it if you want and fix the dts that are still in
my mvebu branch.

Thanks,

Gregory


>>   * Update and merge documentation patch
>>   * Update MAINTAINERS]
>> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> Tested-by: Andrew Lunn <andrew@lunn.ch>
>> Acked-by: Thierry Reding <thierry.reding@gmail.com>
>> Acked-by: Rob Herring <robh@kernel.org>
>
> Patch applied.
>
> Yours,
> Linus Walleij

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Re: [PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Gregory CLEMENT]

Hi Ralph and Linus,

I resurrect this thread following the series post by Richard Genoud:
http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/509461.html

 On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
>
>> From: Andrew Lunn <andrew@lunn.ch>
>>
>> Armada 370/XP devices can 'blink' GPIO lines with a configurable on
>> and off period. This can be modelled as a PWM.
>>
>> However, there are only two sets of PWM configuration registers for
>> all the GPIO lines. This driver simply allows a single GPIO line per
>> GPIO chip of 32 lines to be used as a PWM. Attempts to use more return
>> EBUSY.
>>
>> Due to the interleaving of registers it is not simple to separate the
>> PWM driver from the GPIO driver. Thus the GPIO driver has been
>> extended with a PWM driver.
>>
>> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> URL: https://patchwork.ozlabs.org/patch/427287/
>> URL: https://patchwork.ozlabs.org/patch/427295/
>> [Ralph Sennhauser:
>>   * Port forward
>>   * Merge PWM portion into gpio-mvebu.c
>>   * Switch to atomic PWM API
>>   * Add new compatible string marvell,armada-370-xp-gpio

The fact that Richard managed to run the code on Armada 38x draw my
attention on the documentation that need to be amend.

And it makes me realized that I missed the bad naming of the compatible
string. We don't use family name for the compatible string, but the name
of the first SoC compatible with. So in this case we should use
"marvell,armada-370", as it is still in rc and not yet deployed. What
about fixing the name now?

I can send a patch for it if you want and fix the dts that are still in
my mvebu branch.

Thanks,

Gregory


>>   * Update and merge documentation patch
>>   * Update MAINTAINERS]
>> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> Tested-by: Andrew Lunn <andrew@lunn.ch>
>> Acked-by: Thierry Reding <thierry.reding@gmail.com>
>> Acked-by: Rob Herring <robh@kernel.org>
>
> Patch applied.
>
> Yours,
> Linus Walleij

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Gregory CLEMENT]

Hi Ralph and Linus,

I resurrect this thread following the series post by Richard Genoud:
http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/509461.html

 On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org> wrote:

> On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
>
>> From: Andrew Lunn <andrew@lunn.ch>
>>
>> Armada 370/XP devices can 'blink' GPIO lines with a configurable on
>> and off period. This can be modelled as a PWM.
>>
>> However, there are only two sets of PWM configuration registers for
>> all the GPIO lines. This driver simply allows a single GPIO line per
>> GPIO chip of 32 lines to be used as a PWM. Attempts to use more return
>> EBUSY.
>>
>> Due to the interleaving of registers it is not simple to separate the
>> PWM driver from the GPIO driver. Thus the GPIO driver has been
>> extended with a PWM driver.
>>
>> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> URL: https://patchwork.ozlabs.org/patch/427287/
>> URL: https://patchwork.ozlabs.org/patch/427295/
>> [Ralph Sennhauser:
>>   * Port forward
>>   * Merge PWM portion into gpio-mvebu.c
>>   * Switch to atomic PWM API
>>   * Add new compatible string marvell,armada-370-xp-gpio

The fact that Richard managed to run the code on Armada 38x draw my
attention on the documentation that need to be amend.

And it makes me realized that I missed the bad naming of the compatible
string. We don't use family name for the compatible string, but the name
of the first SoC compatible with. So in this case we should use
"marvell,armada-370", as it is still in rc and not yet deployed. What
about fixing the name now?

I can send a patch for it if you want and fix the dts that are still in
my mvebu branch.

Thanks,

Gregory


>>   * Update and merge documentation patch
>>   * Update MAINTAINERS]
>> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> Tested-by: Andrew Lunn <andrew@lunn.ch>
>> Acked-by: Thierry Reding <thierry.reding@gmail.com>
>> Acked-by: Rob Herring <robh@kernel.org>
>
> Patch applied.
>
> Yours,
> Linus Walleij

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Re: [PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Ralph Sennhauser]

On Tue, 30 May 2017 15:40:00 +0200
Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:

> Hi Ralph and Linus,
> 
> I resurrect this thread following the series post by Richard Genoud:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/509461.html
> 
>  On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org>
> wrote:
> 
> > On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> > <ralph.sennhauser@gmail.com> wrote:
> >  
> >> From: Andrew Lunn <andrew@lunn.ch>
> >>
> >> Armada 370/XP devices can 'blink' GPIO lines with a configurable on
> >> and off period. This can be modelled as a PWM.
> >>
> >> However, there are only two sets of PWM configuration registers for
> >> all the GPIO lines. This driver simply allows a single GPIO line
> >> per GPIO chip of 32 lines to be used as a PWM. Attempts to use
> >> more return EBUSY.
> >>
> >> Due to the interleaving of registers it is not simple to separate
> >> the PWM driver from the GPIO driver. Thus the GPIO driver has been
> >> extended with a PWM driver.
> >>
> >> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> >> URL: https://patchwork.ozlabs.org/patch/427287/
> >> URL: https://patchwork.ozlabs.org/patch/427295/
> >> [Ralph Sennhauser:
> >>   * Port forward
> >>   * Merge PWM portion into gpio-mvebu.c
> >>   * Switch to atomic PWM API
> >>   * Add new compatible string marvell,armada-370-xp-gpio  
> 
> The fact that Richard managed to run the code on Armada 38x draw my
> attention on the documentation that need to be amend.

Hi Gregory

But does it behave as a pwm-fan? I don't have access to the 38x
functional spec (no NDA with Marvell), the one for XP is public.
According to Andrew the 38x doesn't have the blinking hardware and so I
expect the pwm-fan is just an overblown gpio-fan there, additionally
writing some random values to random registers where luck has it nothing
goes wrong.

Kirkwood apparently has blinking support but only at fixed frequency of
10Hz, so not usable for this purpose either.

So to my knowledge it really is just 370 and XP.

> 
> And it makes me realized that I missed the bad naming of the
> compatible string. We don't use family name for the compatible
> string, but the name of the first SoC compatible with. So in this
> case we should use "marvell,armada-370", as it is still in rc and not
> yet deployed. What about fixing the name now?

I don't mind but certainly not for me to decide at this point.

> 
> I can send a patch for it if you want and fix the dts that are still
> in my mvebu branch.

Sure, or if you prefer I can do it as well if we decide for the change.
No preference.

Ralph

Re: [PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Ralph Sennhauser]

On Tue, 30 May 2017 15:40:00 +0200
Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:

> Hi Ralph and Linus,
> 
> I resurrect this thread following the series post by Richard Genoud:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/509461.html
> 
>  On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org>
> wrote:
> 
> > On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> > <ralph.sennhauser@gmail.com> wrote:
> >  
> >> From: Andrew Lunn <andrew@lunn.ch>
> >>
> >> Armada 370/XP devices can 'blink' GPIO lines with a configurable on
> >> and off period. This can be modelled as a PWM.
> >>
> >> However, there are only two sets of PWM configuration registers for
> >> all the GPIO lines. This driver simply allows a single GPIO line
> >> per GPIO chip of 32 lines to be used as a PWM. Attempts to use
> >> more return EBUSY.
> >>
> >> Due to the interleaving of registers it is not simple to separate
> >> the PWM driver from the GPIO driver. Thus the GPIO driver has been
> >> extended with a PWM driver.
> >>
> >> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> >> URL: https://patchwork.ozlabs.org/patch/427287/
> >> URL: https://patchwork.ozlabs.org/patch/427295/
> >> [Ralph Sennhauser:
> >>   * Port forward
> >>   * Merge PWM portion into gpio-mvebu.c
> >>   * Switch to atomic PWM API
> >>   * Add new compatible string marvell,armada-370-xp-gpio  
> 
> The fact that Richard managed to run the code on Armada 38x draw my
> attention on the documentation that need to be amend.

Hi Gregory

But does it behave as a pwm-fan? I don't have access to the 38x
functional spec (no NDA with Marvell), the one for XP is public.
According to Andrew the 38x doesn't have the blinking hardware and so I
expect the pwm-fan is just an overblown gpio-fan there, additionally
writing some random values to random registers where luck has it nothing
goes wrong.

Kirkwood apparently has blinking support but only at fixed frequency of
10Hz, so not usable for this purpose either.

So to my knowledge it really is just 370 and XP.

> 
> And it makes me realized that I missed the bad naming of the
> compatible string. We don't use family name for the compatible
> string, but the name of the first SoC compatible with. So in this
> case we should use "marvell,armada-370", as it is still in rc and not
> yet deployed. What about fixing the name now?

I don't mind but certainly not for me to decide at this point.

> 
> I can send a patch for it if you want and fix the dts that are still
> in my mvebu branch.

Sure, or if you prefer I can do it as well if we decide for the change.
No preference.

Ralph

[PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Ralph Sennhauser]

On Tue, 30 May 2017 15:40:00 +0200
Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:

> Hi Ralph and Linus,
> 
> I resurrect this thread following the series post by Richard Genoud:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/509461.html
> 
>  On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org>
> wrote:
> 
> > On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
> > <ralph.sennhauser@gmail.com> wrote:
> >  
> >> From: Andrew Lunn <andrew@lunn.ch>
> >>
> >> Armada 370/XP devices can 'blink' GPIO lines with a configurable on
> >> and off period. This can be modelled as a PWM.
> >>
> >> However, there are only two sets of PWM configuration registers for
> >> all the GPIO lines. This driver simply allows a single GPIO line
> >> per GPIO chip of 32 lines to be used as a PWM. Attempts to use
> >> more return EBUSY.
> >>
> >> Due to the interleaving of registers it is not simple to separate
> >> the PWM driver from the GPIO driver. Thus the GPIO driver has been
> >> extended with a PWM driver.
> >>
> >> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> >> URL: https://patchwork.ozlabs.org/patch/427287/
> >> URL: https://patchwork.ozlabs.org/patch/427295/
> >> [Ralph Sennhauser:
> >>   * Port forward
> >>   * Merge PWM portion into gpio-mvebu.c
> >>   * Switch to atomic PWM API
> >>   * Add new compatible string marvell,armada-370-xp-gpio  
> 
> The fact that Richard managed to run the code on Armada 38x draw my
> attention on the documentation that need to be amend.

Hi Gregory

But does it behave as a pwm-fan? I don't have access to the 38x
functional spec (no NDA with Marvell), the one for XP is public.
According to Andrew the 38x doesn't have the blinking hardware and so I
expect the pwm-fan is just an overblown gpio-fan there, additionally
writing some random values to random registers where luck has it nothing
goes wrong.

Kirkwood apparently has blinking support but only at fixed frequency of
10Hz, so not usable for this purpose either.

So to my knowledge it really is just 370 and XP.

> 
> And it makes me realized that I missed the bad naming of the
> compatible string. We don't use family name for the compatible
> string, but the name of the first SoC compatible with. So in this
> case we should use "marvell,armada-370", as it is still in rc and not
> yet deployed. What about fixing the name now?

I don't mind but certainly not for me to decide at this point.

> 
> I can send a patch for it if you want and fix the dts that are still
> in my mvebu branch.

Sure, or if you prefer I can do it as well if we decide for the change.
No preference.

Ralph

Re: [PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Richard Genoud]

2017-05-30 16:51 GMT+02:00 Ralph Sennhauser <ralph.sennhauser@gmail.com>:
> On Tue, 30 May 2017 15:40:00 +0200
> Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
>
>> Hi Ralph and Linus,
>>
>> I resurrect this thread following the series post by Richard Genoud:
>> http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/509461.html
>>
>>  On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org>
>> wrote:
>>
>> > On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
>> > <ralph.sennhauser@gmail.com> wrote:
>> >
>> >> From: Andrew Lunn <andrew@lunn.ch>
>> >>
>> >> Armada 370/XP devices can 'blink' GPIO lines with a configurable on
>> >> and off period. This can be modelled as a PWM.
>> >>
>> >> However, there are only two sets of PWM configuration registers for
>> >> all the GPIO lines. This driver simply allows a single GPIO line
>> >> per GPIO chip of 32 lines to be used as a PWM. Attempts to use
>> >> more return EBUSY.
>> >>
>> >> Due to the interleaving of registers it is not simple to separate
>> >> the PWM driver from the GPIO driver. Thus the GPIO driver has been
>> >> extended with a PWM driver.
>> >>
>> >> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> >> URL: https://patchwork.ozlabs.org/patch/427287/
>> >> URL: https://patchwork.ozlabs.org/patch/427295/
>> >> [Ralph Sennhauser:
>> >>   * Port forward
>> >>   * Merge PWM portion into gpio-mvebu.c
>> >>   * Switch to atomic PWM API
>> >>   * Add new compatible string marvell,armada-370-xp-gpio
>>
>> The fact that Richard managed to run the code on Armada 38x draw my
>> attention on the documentation that need to be amend.
>
> Hi Gregory
>
> But does it behave as a pwm-fan? I don't have access to the 38x
> functional spec (no NDA with Marvell), the one for XP is public.
> According to Andrew the 38x doesn't have the blinking hardware and so I
> expect the pwm-fan is just an overblown gpio-fan there, additionally
> writing some random values to random registers where luck has it nothing
> goes wrong.
>
> Kirkwood apparently has blinking support but only at fixed frequency of
> 10Hz, so not usable for this purpose either.
>
> So to my knowledge it really is just 370 and XP.
Hi Ralph,

I have the functional spec (no NDA needed, but it's not the full one) :
A38x-Functional-Spec-PU0A.pdf
https://marvellcorp.wufoo.com/forms/marvell-armada-38x-functional-specifications/
(just an email needed, no blood signing nor chicken slaughtering)
There are the GPIO Blink Counter A/B is ON/OFF Duration Registers as well as the
Blink Enable Registers.

I've done a pwm with different periods (8ms, 4ms, 100ns).
Looking at the scope, it seems to work pretty well :)

>>
>> And it makes me realized that I missed the bad naming of the
>> compatible string. We don't use family name for the compatible
>> string, but the name of the first SoC compatible with. So in this
>> case we should use "marvell,armada-370", as it is still in rc and not
>> yet deployed. What about fixing the name now?
>
> I don't mind but certainly not for me to decide at this point.
>
>>
>> I can send a patch for it if you want and fix the dts that are still
>> in my mvebu branch.
>
> Sure, or if you prefer I can do it as well if we decide for the change.
> No preference.
>
> Ralph

Re: [PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Richard Genoud]

2017-05-30 16:51 GMT+02:00 Ralph Sennhauser <ralph.sennhauser@gmail.com>:
> On Tue, 30 May 2017 15:40:00 +0200
> Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
>
>> Hi Ralph and Linus,
>>
>> I resurrect this thread following the series post by Richard Genoud:
>> http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/509461.html
>>
>>  On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org>
>> wrote:
>>
>> > On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
>> > <ralph.sennhauser@gmail.com> wrote:
>> >
>> >> From: Andrew Lunn <andrew@lunn.ch>
>> >>
>> >> Armada 370/XP devices can 'blink' GPIO lines with a configurable on
>> >> and off period. This can be modelled as a PWM.
>> >>
>> >> However, there are only two sets of PWM configuration registers for
>> >> all the GPIO lines. This driver simply allows a single GPIO line
>> >> per GPIO chip of 32 lines to be used as a PWM. Attempts to use
>> >> more return EBUSY.
>> >>
>> >> Due to the interleaving of registers it is not simple to separate
>> >> the PWM driver from the GPIO driver. Thus the GPIO driver has been
>> >> extended with a PWM driver.
>> >>
>> >> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> >> URL: https://patchwork.ozlabs.org/patch/427287/
>> >> URL: https://patchwork.ozlabs.org/patch/427295/
>> >> [Ralph Sennhauser:
>> >>   * Port forward
>> >>   * Merge PWM portion into gpio-mvebu.c
>> >>   * Switch to atomic PWM API
>> >>   * Add new compatible string marvell,armada-370-xp-gpio
>>
>> The fact that Richard managed to run the code on Armada 38x draw my
>> attention on the documentation that need to be amend.
>
> Hi Gregory
>
> But does it behave as a pwm-fan? I don't have access to the 38x
> functional spec (no NDA with Marvell), the one for XP is public.
> According to Andrew the 38x doesn't have the blinking hardware and so I
> expect the pwm-fan is just an overblown gpio-fan there, additionally
> writing some random values to random registers where luck has it nothing
> goes wrong.
>
> Kirkwood apparently has blinking support but only at fixed frequency of
> 10Hz, so not usable for this purpose either.
>
> So to my knowledge it really is just 370 and XP.
Hi Ralph,

I have the functional spec (no NDA needed, but it's not the full one) :
A38x-Functional-Spec-PU0A.pdf
https://marvellcorp.wufoo.com/forms/marvell-armada-38x-functional-specifications/
(just an email needed, no blood signing nor chicken slaughtering)
There are the GPIO Blink Counter A/B is ON/OFF Duration Registers as well as the
Blink Enable Registers.

I've done a pwm with different periods (8ms, 4ms, 100ns).
Looking at the scope, it seems to work pretty well :)

>>
>> And it makes me realized that I missed the bad naming of the
>> compatible string. We don't use family name for the compatible
>> string, but the name of the first SoC compatible with. So in this
>> case we should use "marvell,armada-370", as it is still in rc and not
>> yet deployed. What about fixing the name now?
>
> I don't mind but certainly not for me to decide at this point.
>
>>
>> I can send a patch for it if you want and fix the dts that are still
>> in my mvebu branch.
>
> Sure, or if you prefer I can do it as well if we decide for the change.
> No preference.
>
> Ralph

[PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Richard Genoud]

2017-05-30 16:51 GMT+02:00 Ralph Sennhauser <ralph.sennhauser@gmail.com>:
> On Tue, 30 May 2017 15:40:00 +0200
> Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
>
>> Hi Ralph and Linus,
>>
>> I resurrect this thread following the series post by Richard Genoud:
>> http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/509461.html
>>
>>  On lun., avril 24 2017, Linus Walleij <linus.walleij@linaro.org>
>> wrote:
>>
>> > On Fri, Apr 14, 2017 at 5:40 PM, Ralph Sennhauser
>> > <ralph.sennhauser@gmail.com> wrote:
>> >
>> >> From: Andrew Lunn <andrew@lunn.ch>
>> >>
>> >> Armada 370/XP devices can 'blink' GPIO lines with a configurable on
>> >> and off period. This can be modelled as a PWM.
>> >>
>> >> However, there are only two sets of PWM configuration registers for
>> >> all the GPIO lines. This driver simply allows a single GPIO line
>> >> per GPIO chip of 32 lines to be used as a PWM. Attempts to use
>> >> more return EBUSY.
>> >>
>> >> Due to the interleaving of registers it is not simple to separate
>> >> the PWM driver from the GPIO driver. Thus the GPIO driver has been
>> >> extended with a PWM driver.
>> >>
>> >> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> >> URL: https://patchwork.ozlabs.org/patch/427287/
>> >> URL: https://patchwork.ozlabs.org/patch/427295/
>> >> [Ralph Sennhauser:
>> >>   * Port forward
>> >>   * Merge PWM portion into gpio-mvebu.c
>> >>   * Switch to atomic PWM API
>> >>   * Add new compatible string marvell,armada-370-xp-gpio
>>
>> The fact that Richard managed to run the code on Armada 38x draw my
>> attention on the documentation that need to be amend.
>
> Hi Gregory
>
> But does it behave as a pwm-fan? I don't have access to the 38x
> functional spec (no NDA with Marvell), the one for XP is public.
> According to Andrew the 38x doesn't have the blinking hardware and so I
> expect the pwm-fan is just an overblown gpio-fan there, additionally
> writing some random values to random registers where luck has it nothing
> goes wrong.
>
> Kirkwood apparently has blinking support but only at fixed frequency of
> 10Hz, so not usable for this purpose either.
>
> So to my knowledge it really is just 370 and XP.
Hi Ralph,

I have the functional spec (no NDA needed, but it's not the full one) :
A38x-Functional-Spec-PU0A.pdf
https://marvellcorp.wufoo.com/forms/marvell-armada-38x-functional-specifications/
(just an email needed, no blood signing nor chicken slaughtering)
There are the GPIO Blink Counter A/B is ON/OFF Duration Registers as well as the
Blink Enable Registers.

I've done a pwm with different periods (8ms, 4ms, 100ns).
Looking at the scope, it seems to work pretty well :)

>>
>> And it makes me realized that I missed the bad naming of the
>> compatible string. We don't use family name for the compatible
>> string, but the name of the first SoC compatible with. So in this
>> case we should use "marvell,armada-370", as it is still in rc and not
>> yet deployed. What about fixing the name now?
>
> I don't mind but certainly not for me to decide at this point.
>
>>
>> I can send a patch for it if you want and fix the dts that are still
>> in my mvebu branch.
>
> Sure, or if you prefer I can do it as well if we decide for the change.
> No preference.
>
> Ralph

Re: [PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Ralph Sennhauser]

On Tue, 30 May 2017 17:35:33 +0200
Richard Genoud <richard.genoud@gmail.com> wrote:
  
> Hi Ralph,
> 
> I have the functional spec (no NDA needed, but it's not the full
> one) : A38x-Functional-Spec-PU0A.pdf
> https://marvellcorp.wufoo.com/forms/marvell-armada-38x-functional-specifications/
> (just an email needed, no blood signing nor chicken slaughtering)
> There are the GPIO Blink Counter A/B is ON/OFF Duration Registers as
> well as the Blink Enable Registers.
> 

Hi Richard,

Thanks for the link, as the terms only talk about materials obtained
from www.marvell.com this one from wufoo.com should be exempt ;)
Also at a glance looks like the complete one. Also says "Functional
Specifications – Unrestricted". Maybe you want to re-download it.

Regardless, as you said the blinking registers are all described. So
it's probably safe to assume 39x will have them as well.

> I've done a pwm with different periods (8ms, 4ms, 100ns).
> Looking at the scope, it seems to work pretty well :)
> 
> >>
> >> And it makes me realized that I missed the bad naming of the
> >> compatible string. We don't use family name for the compatible
> >> string, but the name of the first SoC compatible with. So in this
> >> case we should use "marvell,armada-370", as it is still in rc and
> >> not yet deployed. What about fixing the name now?  

Gregory,

Knowing it's not limited to 370/XP makes "marvell,armada-370-gpio" an
obviously better choice for the compatible string. Guess you didn't
mean to drop the "-gpio" suffix.

Will work on a patch changing the compatible string / documentation for
4.12 and an updated patch for armada 370/XP dtsi as well as a patch
adding the properties to 38x for 4.13+. Expect them tomorrow, probably
won't get around to it today anymore.

Ralph

Re: [PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Ralph Sennhauser]

On Tue, 30 May 2017 17:35:33 +0200
Richard Genoud <richard.genoud@gmail.com> wrote:
  
> Hi Ralph,
> 
> I have the functional spec (no NDA needed, but it's not the full
> one) : A38x-Functional-Spec-PU0A.pdf
> https://marvellcorp.wufoo.com/forms/marvell-armada-38x-functional-specifications/
> (just an email needed, no blood signing nor chicken slaughtering)
> There are the GPIO Blink Counter A/B is ON/OFF Duration Registers as
> well as the Blink Enable Registers.
> 

Hi Richard,

Thanks for the link, as the terms only talk about materials obtained
from www.marvell.com this one from wufoo.com should be exempt ;)
Also at a glance looks like the complete one. Also says "Functional
Specifications – Unrestricted". Maybe you want to re-download it.

Regardless, as you said the blinking registers are all described. So
it's probably safe to assume 39x will have them as well.

> I've done a pwm with different periods (8ms, 4ms, 100ns).
> Looking at the scope, it seems to work pretty well :)
> 
> >>
> >> And it makes me realized that I missed the bad naming of the
> >> compatible string. We don't use family name for the compatible
> >> string, but the name of the first SoC compatible with. So in this
> >> case we should use "marvell,armada-370", as it is still in rc and
> >> not yet deployed. What about fixing the name now?  

Gregory,

Knowing it's not limited to 370/XP makes "marvell,armada-370-gpio" an
obviously better choice for the compatible string. Guess you didn't
mean to drop the "-gpio" suffix.

Will work on a patch changing the compatible string / documentation for
4.12 and an updated patch for armada 370/XP dtsi as well as a patch
adding the properties to 38x for 4.13+. Expect them tomorrow, probably
won't get around to it today anymore.

Ralph

[PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Ralph Sennhauser]

On Tue, 30 May 2017 17:35:33 +0200
Richard Genoud <richard.genoud@gmail.com> wrote:
  
> Hi Ralph,
> 
> I have the functional spec (no NDA needed, but it's not the full
> one) : A38x-Functional-Spec-PU0A.pdf
> https://marvellcorp.wufoo.com/forms/marvell-armada-38x-functional-specifications/
> (just an email needed, no blood signing nor chicken slaughtering)
> There are the GPIO Blink Counter A/B is ON/OFF Duration Registers as
> well as the Blink Enable Registers.
> 

Hi Richard,

Thanks for the link, as the terms only talk about materials obtained
from www.marvell.com this one from wufoo.com should be exempt ;)
Also at a glance looks like the complete one. Also says "Functional
Specifications ? Unrestricted". Maybe you want to re-download it.

Regardless, as you said the blinking registers are all described. So
it's probably safe to assume 39x will have them as well.

> I've done a pwm with different periods (8ms, 4ms, 100ns).
> Looking at the scope, it seems to work pretty well :)
> 
> >>
> >> And it makes me realized that I missed the bad naming of the
> >> compatible string. We don't use family name for the compatible
> >> string, but the name of the first SoC compatible with. So in this
> >> case we should use "marvell,armada-370", as it is still in rc and
> >> not yet deployed. What about fixing the name now?  

Gregory,

Knowing it's not limited to 370/XP makes "marvell,armada-370-gpio" an
obviously better choice for the compatible string. Guess you didn't
mean to drop the "-gpio" suffix.

Will work on a patch changing the compatible string / documentation for
4.12 and an updated patch for armada 370/XP dtsi as well as a patch
adding the properties to 38x for 4.13+. Expect them tomorrow, probably
won't get around to it today anymore.

Ralph

Re: [PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Gregory CLEMENT]

Hi Ralph,
 
 On mer., mai 31 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com> wrote:

> On Tue, 30 May 2017 17:35:33 +0200
> Richard Genoud <richard.genoud@gmail.com> wrote:
>   
>> Hi Ralph,
>> 
>> I have the functional spec (no NDA needed, but it's not the full
>> one) : A38x-Functional-Spec-PU0A.pdf
>> https://marvellcorp.wufoo.com/forms/marvell-armada-38x-functional-specifications/
>> (just an email needed, no blood signing nor chicken slaughtering)
>> There are the GPIO Blink Counter A/B is ON/OFF Duration Registers as
>> well as the Blink Enable Registers.
>> 
>
> Hi Richard,
>
> Thanks for the link, as the terms only talk about materials obtained
> from www.marvell.com this one from wufoo.com should be exempt ;)
> Also at a glance looks like the complete one. Also says "Functional
> Specifications – Unrestricted". Maybe you want to re-download it.
>
> Regardless, as you said the blinking registers are all described. So
> it's probably safe to assume 39x will have them as well.

I guess you meant 38x. (But I suppose it is also true for 39x)


>
>> I've done a pwm with different periods (8ms, 4ms, 100ns).
>> Looking at the scope, it seems to work pretty well :)
>> 
>> >>
>> >> And it makes me realized that I missed the bad naming of the
>> >> compatible string. We don't use family name for the compatible
>> >> string, but the name of the first SoC compatible with. So in this
>> >> case we should use "marvell,armada-370", as it is still in rc and
>> >> not yet deployed. What about fixing the name now?  
>
> Gregory,
>
> Knowing it's not limited to 370/XP makes "marvell,armada-370-gpio" an
> obviously better choice for the compatible string. Guess you didn't
> mean to drop the "-gpio" suffix.

You're right I meant "marvell,armada-370-gpio".

>
> Will work on a patch changing the compatible string / documentation for
> 4.12 and an updated patch for armada 370/XP dtsi as well as a patch
> adding the properties to 38x for 4.13+. Expect them tomorrow, probably
> won't get around to it today anymore.

Great!

Thanks,

Gregory

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Re: [PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Gregory CLEMENT]

Hi Ralph,
 
 On mer., mai 31 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com> wrote:

> On Tue, 30 May 2017 17:35:33 +0200
> Richard Genoud <richard.genoud@gmail.com> wrote:
>   
>> Hi Ralph,
>> 
>> I have the functional spec (no NDA needed, but it's not the full
>> one) : A38x-Functional-Spec-PU0A.pdf
>> https://marvellcorp.wufoo.com/forms/marvell-armada-38x-functional-specifications/
>> (just an email needed, no blood signing nor chicken slaughtering)
>> There are the GPIO Blink Counter A/B is ON/OFF Duration Registers as
>> well as the Blink Enable Registers.
>> 
>
> Hi Richard,
>
> Thanks for the link, as the terms only talk about materials obtained
> from www.marvell.com this one from wufoo.com should be exempt ;)
> Also at a glance looks like the complete one. Also says "Functional
> Specifications – Unrestricted". Maybe you want to re-download it.
>
> Regardless, as you said the blinking registers are all described. So
> it's probably safe to assume 39x will have them as well.

I guess you meant 38x. (But I suppose it is also true for 39x)


>
>> I've done a pwm with different periods (8ms, 4ms, 100ns).
>> Looking at the scope, it seems to work pretty well :)
>> 
>> >>
>> >> And it makes me realized that I missed the bad naming of the
>> >> compatible string. We don't use family name for the compatible
>> >> string, but the name of the first SoC compatible with. So in this
>> >> case we should use "marvell,armada-370", as it is still in rc and
>> >> not yet deployed. What about fixing the name now?  
>
> Gregory,
>
> Knowing it's not limited to 370/XP makes "marvell,armada-370-gpio" an
> obviously better choice for the compatible string. Guess you didn't
> mean to drop the "-gpio" suffix.

You're right I meant "marvell,armada-370-gpio".

>
> Will work on a patch changing the compatible string / documentation for
> 4.12 and an updated patch for armada 370/XP dtsi as well as a patch
> adding the properties to 38x for 4.13+. Expect them tomorrow, probably
> won't get around to it today anymore.

Great!

Thanks,

Gregory

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH v6 1/4] gpio: mvebu: Add limited PWM support

[Gregory CLEMENT]

Hi Ralph,
 
 On mer., mai 31 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com> wrote:

> On Tue, 30 May 2017 17:35:33 +0200
> Richard Genoud <richard.genoud@gmail.com> wrote:
>   
>> Hi Ralph,
>> 
>> I have the functional spec (no NDA needed, but it's not the full
>> one) : A38x-Functional-Spec-PU0A.pdf
>> https://marvellcorp.wufoo.com/forms/marvell-armada-38x-functional-specifications/
>> (just an email needed, no blood signing nor chicken slaughtering)
>> There are the GPIO Blink Counter A/B is ON/OFF Duration Registers as
>> well as the Blink Enable Registers.
>> 
>
> Hi Richard,
>
> Thanks for the link, as the terms only talk about materials obtained
> from www.marvell.com this one from wufoo.com should be exempt ;)
> Also at a glance looks like the complete one. Also says "Functional
> Specifications ? Unrestricted". Maybe you want to re-download it.
>
> Regardless, as you said the blinking registers are all described. So
> it's probably safe to assume 39x will have them as well.

I guess you meant 38x. (But I suppose it is also true for 39x)


>
>> I've done a pwm with different periods (8ms, 4ms, 100ns).
>> Looking at the scope, it seems to work pretty well :)
>> 
>> >>
>> >> And it makes me realized that I missed the bad naming of the
>> >> compatible string. We don't use family name for the compatible
>> >> string, but the name of the first SoC compatible with. So in this
>> >> case we should use "marvell,armada-370", as it is still in rc and
>> >> not yet deployed. What about fixing the name now?  
>
> Gregory,
>
> Knowing it's not limited to 370/XP makes "marvell,armada-370-gpio" an
> obviously better choice for the compatible string. Guess you didn't
> mean to drop the "-gpio" suffix.

You're right I meant "marvell,armada-370-gpio".

>
> Will work on a patch changing the compatible string / documentation for
> 4.12 and an updated patch for armada 370/XP dtsi as well as a patch
> adding the properties to 38x for 4.13+. Expect them tomorrow, probably
> won't get around to it today anymore.

Great!

Thanks,

Gregory

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com