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* [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
@ 2017-08-11  1:16 Dhinakaran Pandiyan
  2017-08-11  1:16 ` [PATCH 2/2] drm/i915/dp: Leave the AUX block powered on for MST Dhinakaran Pandiyan
                   ` (4 more replies)
  0 siblings, 5 replies; 14+ messages in thread
From: Dhinakaran Pandiyan @ 2017-08-11  1:16 UTC (permalink / raw)
  To: intel-gfx; +Cc: Dhinakaran Pandiyan, dri-devel

DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state

101 = Set Main-Link for local Sink device and all downstream Sink
devices to D3 (power-down mode), keep AUX block fully powered, ready to
reply within a Response Timeout period of 300us.

This state is useful in a MST dock + MST monitor configuration that
doesn't wake up from D3 state.

Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
 include/drm/drm_dp_helper.h | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index b17476a..d77e0f5 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -614,10 +614,11 @@
 #define DP_BRANCH_HW_REV                    0x509
 #define DP_BRANCH_SW_REV                    0x50A
 
-#define DP_SET_POWER                        0x600
-# define DP_SET_POWER_D0                    0x1
-# define DP_SET_POWER_D3                    0x2
-# define DP_SET_POWER_MASK                  0x3
+#define DP_SET_POWER			0x600
+# define DP_SET_POWER_D0		0x1
+# define DP_SET_POWER_D3		0x2
+# define DP_SET_POWER_MASK		0x3
+# define DP_SET_POWER_D3_AUX_ON		0x5
 
 #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
 # define DP_EDP_11			    0x00
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH 2/2] drm/i915/dp: Leave the AUX block powered on for MST
  2017-08-11  1:16 [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Dhinakaran Pandiyan
@ 2017-08-11  1:16 ` Dhinakaran Pandiyan
  2017-08-14 18:00   ` Lyude Paul
  2017-08-11  5:40 ` [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Jani Nikula
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 14+ messages in thread
From: Dhinakaran Pandiyan @ 2017-08-11  1:16 UTC (permalink / raw)
  To: intel-gfx; +Cc: Lyude, Dhinakaran Pandiyan, dri-devel, Ethan Hsieh

Dell monitor with a built-in MST branch does not light up on boot when
connected to a Thinkpad dock. The monitor also does not wake up after
Suspend-to-Idle or dpms off in this configuration. Keeping the AUX
powered up in the D3 power state solved this problem.

This partially fixes
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90963

Cc: Ethan Hsieh <ethan.hsieh@canonical.com>
Cc: Lyude <cpaul@redhat.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 76c8a0b..5595367 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2485,7 +2485,11 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
 		return;
 
 	if (mode != DRM_MODE_DPMS_ON) {
-		ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER,
+		if (intel_dp->is_mst)
+			ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER,
+					 DP_SET_POWER_D3_AUX_ON);
+		else
+			ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER,
 					 DP_SET_POWER_D3);
 	} else {
 		struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* Re: [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
  2017-08-11  1:16 [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Dhinakaran Pandiyan
  2017-08-11  1:16 ` [PATCH 2/2] drm/i915/dp: Leave the AUX block powered on for MST Dhinakaran Pandiyan
@ 2017-08-11  5:40 ` Jani Nikula
  2017-08-11 18:10   ` [PATCH v2 " Dhinakaran Pandiyan
  2017-08-11  9:55 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 14+ messages in thread
From: Jani Nikula @ 2017-08-11  5:40 UTC (permalink / raw)
  To: Dhinakaran Pandiyan, intel-gfx; +Cc: Dhinakaran Pandiyan, dri-devel

On Fri, 11 Aug 2017, Dhinakaran Pandiyan <dhnkrn@gmail.com> wrote:
> DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state
>
> 101 = Set Main-Link for local Sink device and all downstream Sink
> devices to D3 (power-down mode), keep AUX block fully powered, ready to
> reply within a Response Timeout period of 300us.
>
> This state is useful in a MST dock + MST monitor configuration that
> doesn't wake up from D3 state.
>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
>  include/drm/drm_dp_helper.h | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index b17476a..d77e0f5 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -614,10 +614,11 @@
>  #define DP_BRANCH_HW_REV                    0x509
>  #define DP_BRANCH_SW_REV                    0x50A
>  
> -#define DP_SET_POWER                        0x600
> -# define DP_SET_POWER_D0                    0x1
> -# define DP_SET_POWER_D3                    0x2
> -# define DP_SET_POWER_MASK                  0x3
> +#define DP_SET_POWER			0x600
> +# define DP_SET_POWER_D0		0x1
> +# define DP_SET_POWER_D3		0x2
> +# define DP_SET_POWER_MASK		0x3

Please keep the above intact. It appears space is the indent character
of choice in this file.

BR,
Jani.

> +# define DP_SET_POWER_D3_AUX_ON		0x5
>  
>  #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
>  # define DP_EDP_11			    0x00

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
  2017-08-11  1:16 [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Dhinakaran Pandiyan
  2017-08-11  1:16 ` [PATCH 2/2] drm/i915/dp: Leave the AUX block powered on for MST Dhinakaran Pandiyan
  2017-08-11  5:40 ` [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Jani Nikula
@ 2017-08-11  9:55 ` Patchwork
  2017-08-11 18:33 ` ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered (rev2) Patchwork
  2017-10-26  7:59 ` [Intel-gfx] [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Jani Nikula
  4 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2017-08-11  9:55 UTC (permalink / raw)
  To: Dhinakaran Pandiyan; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
URL   : https://patchwork.freedesktop.org/series/28667/
State : success

== Summary ==

Series 28667v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/28667/revisions/1/mbox/

fi-bdw-5557u     total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:446s
fi-bdw-gvtdvm    total:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  time:440s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:359s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:546s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:513s
fi-byt-j1900     total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  time:527s
fi-byt-n2820     total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  time:516s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:600s
fi-hsw-4770      total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:451s
fi-hsw-4770r     total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:420s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:423s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:511s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:475s
fi-kbl-7500u     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:482s
fi-kbl-7560u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:580s
fi-kbl-r         total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:598s
fi-pnv-d510      total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  time:531s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:465s
fi-skl-6700k     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:476s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:492s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:438s
fi-skl-x1585l    total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:482s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:549s
fi-snb-2600      total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  time:405s

fbb8288699ef622bbfc6e10bdca6773a16f93fac drm-tip: 2017y-08m-11d-09h-03m-47s UTC integration manifest
5e3cbf874cd1 drm/i915/dp: Leave the AUX block powered on for MST
fca0babc8d86 drm/dp: Bit definition for D3 power state that keeps AUX fully powered

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5375/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
  2017-08-11  5:40 ` [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Jani Nikula
@ 2017-08-11 18:10   ` Dhinakaran Pandiyan
  2017-08-14 18:06     ` Harry Wentland
  0 siblings, 1 reply; 14+ messages in thread
From: Dhinakaran Pandiyan @ 2017-08-11 18:10 UTC (permalink / raw)
  To: intel-gfx; +Cc: dri-devel, Dhinakaran Pandiyan

DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state

101 = Set Main-Link for local Sink device and all downstream Sink
devices to D3 (power-down mode), keep AUX block fully powered, ready to
reply within a Response Timeout period of 300us.

This state is useful in a MST dock + MST monitor configuration that
doesn't wake up from D3 state.

v2: Use spaces instead of tabs (Jani)

Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
 include/drm/drm_dp_helper.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index b17476a..47a6cdb 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -618,6 +618,7 @@
 # define DP_SET_POWER_D0                    0x1
 # define DP_SET_POWER_D3                    0x2
 # define DP_SET_POWER_MASK                  0x3
+# define DP_SET_POWER_D3_AUX_ON             0x5
 
 #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
 # define DP_EDP_11			    0x00
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered (rev2)
  2017-08-11  1:16 [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Dhinakaran Pandiyan
                   ` (2 preceding siblings ...)
  2017-08-11  9:55 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
@ 2017-08-11 18:33 ` Patchwork
  2017-10-26  7:59 ` [Intel-gfx] [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Jani Nikula
  4 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2017-08-11 18:33 UTC (permalink / raw)
  To: Dhinakaran Pandiyan; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v2,1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered (rev2)
URL   : https://patchwork.freedesktop.org/series/28667/
State : success

== Summary ==

Series 28667v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/28667/revisions/2/mbox/

Test gem_exec_flush:
        Subgroup basic-batch-kernel-default-uc:
                fail       -> PASS       (fi-snb-2600) fdo#100007
Test kms_flip:
        Subgroup basic-flip-vs-modeset:
                pass       -> SKIP       (fi-skl-x1585l) fdo#101781

fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781

fi-bdw-5557u     total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:444s
fi-bdw-gvtdvm    total:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  time:432s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:356s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:550s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:514s
fi-byt-j1900     total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  time:520s
fi-byt-n2820     total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  time:512s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:603s
fi-hsw-4770      total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:449s
fi-hsw-4770r     total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:413s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:414s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:509s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:479s
fi-kbl-7500u     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:470s
fi-kbl-7560u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:579s
fi-kbl-r         total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:590s
fi-pnv-d510      total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  time:527s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:468s
fi-skl-6700k     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:481s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:482s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:433s
fi-skl-x1585l    total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:476s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:550s
fi-snb-2600      total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  time:415s

354550367a457f96f0ac550bd70d71da373495f2 drm-tip: 2017y-08m-11d-16h-07m-01s UTC integration manifest
c6a56394c5f6 drm/i915/dp: Leave the AUX block powered on for MST
ab2c0e76f16e drm/dp: Bit definition for D3 power state that keeps AUX fully powered

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5384/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH 2/2] drm/i915/dp: Leave the AUX block powered on for MST
  2017-08-11  1:16 ` [PATCH 2/2] drm/i915/dp: Leave the AUX block powered on for MST Dhinakaran Pandiyan
@ 2017-08-14 18:00   ` Lyude Paul
  0 siblings, 0 replies; 14+ messages in thread
From: Lyude Paul @ 2017-08-14 18:00 UTC (permalink / raw)
  To: Dhinakaran Pandiyan, intel-gfx
  Cc: Dhinakaran Pandiyan, dri-devel, Ethan Hsieh

Acked-by: Lyude Paul <lyude@redhat.com>

On Thu, 2017-08-10 at 18:16 -0700, Dhinakaran Pandiyan wrote:
> Dell monitor with a built-in MST branch does not light up on boot
> when
> connected to a Thinkpad dock. The monitor also does not wake up after
> Suspend-to-Idle or dpms off in this configuration. Keeping the AUX
> powered up in the D3 power state solved this problem.
> 
> This partially fixes
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90963
> 
> Cc: Ethan Hsieh <ethan.hsieh@canonical.com>
> Cc: Lyude <cpaul@redhat.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c
> b/drivers/gpu/drm/i915/intel_dp.c
> index 76c8a0b..5595367 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -2485,7 +2485,11 @@ void intel_dp_sink_dpms(struct intel_dp
> *intel_dp, int mode)
>  		return;
>  
>  	if (mode != DRM_MODE_DPMS_ON) {
> -		ret = drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_SET_POWER,
> +		if (intel_dp->is_mst)
> +			ret = drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_SET_POWER,
> +					 DP_SET_POWER_D3_AUX_ON);
> +		else
> +			ret = drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_SET_POWER,
>  					 DP_SET_POWER_D3);
>  	} else {
>  		struct intel_lspcon *lspcon =
> dp_to_lspcon(intel_dp);
-- 
Cheers,
	Lyude
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
  2017-08-11 18:10   ` [PATCH v2 " Dhinakaran Pandiyan
@ 2017-08-14 18:06     ` Harry Wentland
  2017-10-27 10:25       ` [Intel-gfx] " Jani Nikula
  0 siblings, 1 reply; 14+ messages in thread
From: Harry Wentland @ 2017-08-14 18:06 UTC (permalink / raw)
  To: Dhinakaran Pandiyan, intel-gfx; +Cc: Dhinakaran Pandiyan, dri-devel



On 2017-08-11 02:10 PM, Dhinakaran Pandiyan wrote:
> DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state
> 
> 101 = Set Main-Link for local Sink device and all downstream Sink
> devices to D3 (power-down mode), keep AUX block fully powered, ready to
> reply within a Response Timeout period of 300us.
> 
> This state is useful in a MST dock + MST monitor configuration that
> doesn't wake up from D3 state.
> 
> v2: Use spaces instead of tabs (Jani)
> 
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>

Reviewed-by: Harry Wentland <harry.wentland@amd.com>

Harry

> ---
>  include/drm/drm_dp_helper.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index b17476a..47a6cdb 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -618,6 +618,7 @@
>  # define DP_SET_POWER_D0                    0x1
>  # define DP_SET_POWER_D3                    0x2
>  # define DP_SET_POWER_MASK                  0x3
> +# define DP_SET_POWER_D3_AUX_ON             0x5
>  
>  #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
>  # define DP_EDP_11			    0x00
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [Intel-gfx] [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
  2017-08-11  1:16 [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Dhinakaran Pandiyan
                   ` (3 preceding siblings ...)
  2017-08-11 18:33 ` ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered (rev2) Patchwork
@ 2017-10-26  7:59 ` Jani Nikula
  2017-10-26 17:47   ` Pandiyan, Dhinakaran
  4 siblings, 1 reply; 14+ messages in thread
From: Jani Nikula @ 2017-10-26  7:59 UTC (permalink / raw)
  To: Dhinakaran Pandiyan, intel-gfx; +Cc: Dhinakaran Pandiyan, dri-devel

On Thu, 10 Aug 2017, Dhinakaran Pandiyan <dhnkrn@gmail.com> wrote:
> DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state
>
> 101 = Set Main-Link for local Sink device and all downstream Sink
> devices to D3 (power-down mode), keep AUX block fully powered, ready to
> reply within a Response Timeout period of 300us.
>
> This state is useful in a MST dock + MST monitor configuration that
> doesn't wake up from D3 state.

Dhinakaran, these two seem to have fallen through the cracks, please
resend.

Sorry & thanks,
Jani.


>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
>  include/drm/drm_dp_helper.h | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index b17476a..d77e0f5 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -614,10 +614,11 @@
>  #define DP_BRANCH_HW_REV                    0x509
>  #define DP_BRANCH_SW_REV                    0x50A
>  
> -#define DP_SET_POWER                        0x600
> -# define DP_SET_POWER_D0                    0x1
> -# define DP_SET_POWER_D3                    0x2
> -# define DP_SET_POWER_MASK                  0x3
> +#define DP_SET_POWER			0x600
> +# define DP_SET_POWER_D0		0x1
> +# define DP_SET_POWER_D3		0x2
> +# define DP_SET_POWER_MASK		0x3
> +# define DP_SET_POWER_D3_AUX_ON		0x5
>  
>  #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
>  # define DP_EDP_11			    0x00

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [Intel-gfx] [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
  2017-10-26  7:59 ` [Intel-gfx] [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Jani Nikula
@ 2017-10-26 17:47   ` Pandiyan, Dhinakaran
  2017-10-27  7:40     ` Jani Nikula
  0 siblings, 1 reply; 14+ messages in thread
From: Pandiyan, Dhinakaran @ 2017-10-26 17:47 UTC (permalink / raw)
  To: jani.nikula; +Cc: intel-gfx, dri-devel


On Thu, 2017-10-26 at 10:59 +0300, Jani Nikula wrote:
> On Thu, 10 Aug 2017, Dhinakaran Pandiyan <dhnkrn@gmail.com> wrote:
> > DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state
> >
> > 101 = Set Main-Link for local Sink device and all downstream Sink
> > devices to D3 (power-down mode), keep AUX block fully powered, ready to
> > reply within a Response Timeout period of 300us.
> >
> > This state is useful in a MST dock + MST monitor configuration that
> > doesn't wake up from D3 state.
> 
> Dhinakaran, these two seem to have fallen through the cracks, please
> resend.
> 

So the "drm/dp/mst: Sideband message transaction to power up/down nodes"
series I sent fixed the DPMS issues I was seeing with my setup. We'll
have to evaluate whether this patch is still useful for anyone (probably
https://bugs.freedesktop.org/show_bug.cgi?id=90963).


> Sorry & thanks,
> Jani.
> 
> 
> >
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > ---
> >  include/drm/drm_dp_helper.h | 9 +++++----
> >  1 file changed, 5 insertions(+), 4 deletions(-)
> >
> > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> > index b17476a..d77e0f5 100644
> > --- a/include/drm/drm_dp_helper.h
> > +++ b/include/drm/drm_dp_helper.h
> > @@ -614,10 +614,11 @@
> >  #define DP_BRANCH_HW_REV                    0x509
> >  #define DP_BRANCH_SW_REV                    0x50A
> >  
> > -#define DP_SET_POWER                        0x600
> > -# define DP_SET_POWER_D0                    0x1
> > -# define DP_SET_POWER_D3                    0x2
> > -# define DP_SET_POWER_MASK                  0x3
> > +#define DP_SET_POWER			0x600
> > +# define DP_SET_POWER_D0		0x1
> > +# define DP_SET_POWER_D3		0x2
> > +# define DP_SET_POWER_MASK		0x3
> > +# define DP_SET_POWER_D3_AUX_ON		0x5
> >  
> >  #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
> >  # define DP_EDP_11			    0x00
> 
_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
  2017-10-26 17:47   ` Pandiyan, Dhinakaran
@ 2017-10-27  7:40     ` Jani Nikula
  0 siblings, 0 replies; 14+ messages in thread
From: Jani Nikula @ 2017-10-27  7:40 UTC (permalink / raw)
  To: Pandiyan, Dhinakaran; +Cc: intel-gfx, dri-devel

On Thu, 26 Oct 2017, "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com> wrote:
> On Thu, 2017-10-26 at 10:59 +0300, Jani Nikula wrote:
>> On Thu, 10 Aug 2017, Dhinakaran Pandiyan <dhnkrn@gmail.com> wrote:
>> > DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state
>> >
>> > 101 = Set Main-Link for local Sink device and all downstream Sink
>> > devices to D3 (power-down mode), keep AUX block fully powered, ready to
>> > reply within a Response Timeout period of 300us.
>> >
>> > This state is useful in a MST dock + MST monitor configuration that
>> > doesn't wake up from D3 state.
>> 
>> Dhinakaran, these two seem to have fallen through the cracks, please
>> resend.
>> 
>
> So the "drm/dp/mst: Sideband message transaction to power up/down nodes"
> series I sent fixed the DPMS issues I was seeing with my setup. We'll
> have to evaluate whether this patch is still useful for anyone (probably
> https://bugs.freedesktop.org/show_bug.cgi?id=90963).

Well, we could pick patch 1/2 in the mean time. No harm in that.

BR,
Jani.

>
>
>> Sorry & thanks,
>> Jani.
>> 
>> 
>> >
>> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
>> > ---
>> >  include/drm/drm_dp_helper.h | 9 +++++----
>> >  1 file changed, 5 insertions(+), 4 deletions(-)
>> >
>> > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>> > index b17476a..d77e0f5 100644
>> > --- a/include/drm/drm_dp_helper.h
>> > +++ b/include/drm/drm_dp_helper.h
>> > @@ -614,10 +614,11 @@
>> >  #define DP_BRANCH_HW_REV                    0x509
>> >  #define DP_BRANCH_SW_REV                    0x50A
>> >  
>> > -#define DP_SET_POWER                        0x600
>> > -# define DP_SET_POWER_D0                    0x1
>> > -# define DP_SET_POWER_D3                    0x2
>> > -# define DP_SET_POWER_MASK                  0x3
>> > +#define DP_SET_POWER			0x600
>> > +# define DP_SET_POWER_D0		0x1
>> > +# define DP_SET_POWER_D3		0x2
>> > +# define DP_SET_POWER_MASK		0x3
>> > +# define DP_SET_POWER_D3_AUX_ON		0x5
>> >  
>> >  #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
>> >  # define DP_EDP_11			    0x00
>> 

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [Intel-gfx] [PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
  2017-08-14 18:06     ` Harry Wentland
@ 2017-10-27 10:25       ` Jani Nikula
  2017-10-27 11:37         ` Ville Syrjälä
  0 siblings, 1 reply; 14+ messages in thread
From: Jani Nikula @ 2017-10-27 10:25 UTC (permalink / raw)
  To: Harry Wentland, Dhinakaran Pandiyan, intel-gfx
  Cc: Dhinakaran Pandiyan, dri-devel

On Mon, 14 Aug 2017, Harry Wentland <harry.wentland@amd.com> wrote:
> On 2017-08-11 02:10 PM, Dhinakaran Pandiyan wrote:
>> DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state
>> 
>> 101 = Set Main-Link for local Sink device and all downstream Sink
>> devices to D3 (power-down mode), keep AUX block fully powered, ready to
>> reply within a Response Timeout period of 300us.
>> 
>> This state is useful in a MST dock + MST monitor configuration that
>> doesn't wake up from D3 state.
>> 
>> v2: Use spaces instead of tabs (Jani)
>> 
>> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
>
> Reviewed-by: Harry Wentland <harry.wentland@amd.com>

Pushed this one to drm-misc-next, thanks for the patch and review, and
sorry for the delay.

BR,
Jani.

>
> Harry
>
>> ---
>>  include/drm/drm_dp_helper.h | 1 +
>>  1 file changed, 1 insertion(+)
>> 
>> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>> index b17476a..47a6cdb 100644
>> --- a/include/drm/drm_dp_helper.h
>> +++ b/include/drm/drm_dp_helper.h
>> @@ -618,6 +618,7 @@
>>  # define DP_SET_POWER_D0                    0x1
>>  # define DP_SET_POWER_D3                    0x2
>>  # define DP_SET_POWER_MASK                  0x3
>> +# define DP_SET_POWER_D3_AUX_ON             0x5
>>  
>>  #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
>>  # define DP_EDP_11			    0x00
>> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
  2017-10-27 10:25       ` [Intel-gfx] " Jani Nikula
@ 2017-10-27 11:37         ` Ville Syrjälä
  2017-10-30 15:32           ` Jani Nikula
  0 siblings, 1 reply; 14+ messages in thread
From: Ville Syrjälä @ 2017-10-27 11:37 UTC (permalink / raw)
  To: Jani Nikula
  Cc: Dhinakaran Pandiyan, Harry Wentland, intel-gfx, dri-devel,
	Dhinakaran Pandiyan

On Fri, Oct 27, 2017 at 01:25:01PM +0300, Jani Nikula wrote:
> On Mon, 14 Aug 2017, Harry Wentland <harry.wentland@amd.com> wrote:
> > On 2017-08-11 02:10 PM, Dhinakaran Pandiyan wrote:
> >> DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state
> >> 
> >> 101 = Set Main-Link for local Sink device and all downstream Sink
> >> devices to D3 (power-down mode), keep AUX block fully powered, ready to
> >> reply within a Response Timeout period of 300us.
> >> 
> >> This state is useful in a MST dock + MST monitor configuration that
> >> doesn't wake up from D3 state.
> >> 
> >> v2: Use spaces instead of tabs (Jani)
> >> 
> >> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> >
> > Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> 
> Pushed this one to drm-misc-next, thanks for the patch and review, and
> sorry for the delay.

Sorry to start reviewing after this got pushed, but...

> 
> BR,
> Jani.
> 
> >
> > Harry
> >
> >> ---
> >>  include/drm/drm_dp_helper.h | 1 +
> >>  1 file changed, 1 insertion(+)
> >> 
> >> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> >> index b17476a..47a6cdb 100644
> >> --- a/include/drm/drm_dp_helper.h
> >> +++ b/include/drm/drm_dp_helper.h
> >> @@ -618,6 +618,7 @@
> >>  # define DP_SET_POWER_D0                    0x1
> >>  # define DP_SET_POWER_D3                    0x2
> >>  # define DP_SET_POWER_MASK                  0x3

This mask doesn't cover the "aux" bit. I guess it's a purely theoretical
concern at this point since the device should start out in D0 when
first plugged in.

Also IIRC this stuff was added in DPCD 1.2. We might want a comment to
reflect that fact.

> >> +# define DP_SET_POWER_D3_AUX_ON             0x5
> >>  
> >>  #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
> >>  # define DP_EDP_11			    0x00
> >> 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered
  2017-10-27 11:37         ` Ville Syrjälä
@ 2017-10-30 15:32           ` Jani Nikula
  0 siblings, 0 replies; 14+ messages in thread
From: Jani Nikula @ 2017-10-30 15:32 UTC (permalink / raw)
  To: Ville Syrjälä
  Cc: Dhinakaran Pandiyan, Harry Wentland, intel-gfx, dri-devel,
	Dhinakaran Pandiyan

On Fri, 27 Oct 2017, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, Oct 27, 2017 at 01:25:01PM +0300, Jani Nikula wrote:
>> On Mon, 14 Aug 2017, Harry Wentland <harry.wentland@amd.com> wrote:
>> > On 2017-08-11 02:10 PM, Dhinakaran Pandiyan wrote:
>> >> DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state
>> >> 
>> >> 101 = Set Main-Link for local Sink device and all downstream Sink
>> >> devices to D3 (power-down mode), keep AUX block fully powered, ready to
>> >> reply within a Response Timeout period of 300us.
>> >> 
>> >> This state is useful in a MST dock + MST monitor configuration that
>> >> doesn't wake up from D3 state.
>> >> 
>> >> v2: Use spaces instead of tabs (Jani)
>> >> 
>> >> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
>> >
>> > Reviewed-by: Harry Wentland <harry.wentland@amd.com>
>> 
>> Pushed this one to drm-misc-next, thanks for the patch and review, and
>> sorry for the delay.
>
> Sorry to start reviewing after this got pushed, but...
>
>> 
>> BR,
>> Jani.
>> 
>> >
>> > Harry
>> >
>> >> ---
>> >>  include/drm/drm_dp_helper.h | 1 +
>> >>  1 file changed, 1 insertion(+)
>> >> 
>> >> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>> >> index b17476a..47a6cdb 100644
>> >> --- a/include/drm/drm_dp_helper.h
>> >> +++ b/include/drm/drm_dp_helper.h
>> >> @@ -618,6 +618,7 @@
>> >>  # define DP_SET_POWER_D0                    0x1
>> >>  # define DP_SET_POWER_D3                    0x2
>> >>  # define DP_SET_POWER_MASK                  0x3
>
> This mask doesn't cover the "aux" bit. I guess it's a purely theoretical
> concern at this point since the device should start out in D0 when
> first plugged in.
>
> Also IIRC this stuff was added in DPCD 1.2. We might want a comment to
> reflect that fact.

Okay, the damage is done, someone(tm) please send fixup patches on top
to make it right.

BR,
Jani.



>
>> >> +# define DP_SET_POWER_D3_AUX_ON             0x5
>> >>  
>> >>  #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
>> >>  # define DP_EDP_11			    0x00
>> >> 
>> > _______________________________________________
>> > Intel-gfx mailing list
>> > Intel-gfx@lists.freedesktop.org
>> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>> 
>> -- 
>> Jani Nikula, Intel Open Source Technology Center
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

end of thread, other threads:[~2017-10-30 15:32 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-08-11  1:16 [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Dhinakaran Pandiyan
2017-08-11  1:16 ` [PATCH 2/2] drm/i915/dp: Leave the AUX block powered on for MST Dhinakaran Pandiyan
2017-08-14 18:00   ` Lyude Paul
2017-08-11  5:40 ` [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Jani Nikula
2017-08-11 18:10   ` [PATCH v2 " Dhinakaran Pandiyan
2017-08-14 18:06     ` Harry Wentland
2017-10-27 10:25       ` [Intel-gfx] " Jani Nikula
2017-10-27 11:37         ` Ville Syrjälä
2017-10-30 15:32           ` Jani Nikula
2017-08-11  9:55 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2017-08-11 18:33 ` ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered (rev2) Patchwork
2017-10-26  7:59 ` [Intel-gfx] [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Jani Nikula
2017-10-26 17:47   ` Pandiyan, Dhinakaran
2017-10-27  7:40     ` Jani Nikula

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