From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> To: Paul Mackerras <paulus@ozlabs.org>, kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, linuxppc-dev@ozlabs.org Subject: Re: [PATCH 10/13] KVM: PPC: Book3S HV: Use msgsnd for IPIs to other cores on POWER9 Date: Fri, 18 Nov 2016 20:17:25 +0530 [thread overview] Message-ID: <87vavkn8ua.fsf@linux.vnet.ibm.com> (raw) In-Reply-To: <1479454122-26994-11-git-send-email-paulus@ozlabs.org> Paul Mackerras <paulus@ozlabs.org> writes: > On POWER9, the msgsnd instruction is able to send interrupts to > other cores, as well as other threads on the local core. Since > msgsnd is generally simpler and faster than sending an IPI via the > XICS, we use msgsnd for all IPIs sent by KVM on POWER9. > > Signed-off-by: Paul Mackerras <paulus@ozlabs.org> > --- > arch/powerpc/kvm/book3s_hv.c | 11 ++++++++++- > arch/powerpc/kvm/book3s_hv_builtin.c | 10 ++++++++-- > 2 files changed, 18 insertions(+), 3 deletions(-) > > diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c > index 8395a7f..ace89df 100644 > --- a/arch/powerpc/kvm/book3s_hv.c > +++ b/arch/powerpc/kvm/book3s_hv.c > @@ -147,12 +147,21 @@ static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, > > static bool kvmppc_ipi_thread(int cpu) > { > + unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); > + > + /* On POWER9 we can use msgsnd to IPI any cpu */ > + if (cpu_has_feature(CPU_FTR_ARCH_300)) { > + msg |= get_hard_smp_processor_id(cpu); > + smp_mb(); > + __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); > + return true; > + } > + > /* On POWER8 for IPIs to threads in the same core, use msgsnd */ > if (cpu_has_feature(CPU_FTR_ARCH_207S)) { > preempt_disable(); > if (cpu_first_thread_sibling(cpu) == > cpu_first_thread_sibling(smp_processor_id())) { > - unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); > msg |= cpu_thread_in_core(cpu); > smp_mb(); > __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); > diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c > index 0c84d6b..37ed045 100644 > --- a/arch/powerpc/kvm/book3s_hv_builtin.c > +++ b/arch/powerpc/kvm/book3s_hv_builtin.c > @@ -205,12 +205,18 @@ static inline void rm_writeb(unsigned long paddr, u8 val) > void kvmhv_rm_send_ipi(int cpu) > { > unsigned long xics_phys; > + unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); > > - /* On POWER8 for IPIs to threads in the same core, use msgsnd */ > + /* On POWER9 we can use msgsnd for any destination cpu. */ > + if (cpu_has_feature(CPU_FTR_ARCH_300)) { > + msg |= get_hard_smp_processor_id(cpu); > + __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); > + return; Do we need a "sync" there before msgsnd ? > + } > + /* On POWER8 for IPIs to threads in the same core, use msgsnd. */ > if (cpu_has_feature(CPU_FTR_ARCH_207S) && > cpu_first_thread_sibling(cpu) == > cpu_first_thread_sibling(raw_smp_processor_id())) { > - unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); > msg |= cpu_thread_in_core(cpu); > __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); > return; > -- > 2.7.4 > > -- > To unsubscribe from this list: send the line "unsubscribe kvm" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> To: Paul Mackerras <paulus@ozlabs.org>, kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, linuxppc-dev@ozlabs.org Subject: Re: [PATCH 10/13] KVM: PPC: Book3S HV: Use msgsnd for IPIs to other cores on POWER9 Date: Fri, 18 Nov 2016 14:59:25 +0000 [thread overview] Message-ID: <87vavkn8ua.fsf@linux.vnet.ibm.com> (raw) In-Reply-To: <1479454122-26994-11-git-send-email-paulus@ozlabs.org> Paul Mackerras <paulus@ozlabs.org> writes: > On POWER9, the msgsnd instruction is able to send interrupts to > other cores, as well as other threads on the local core. Since > msgsnd is generally simpler and faster than sending an IPI via the > XICS, we use msgsnd for all IPIs sent by KVM on POWER9. > > Signed-off-by: Paul Mackerras <paulus@ozlabs.org> > --- > arch/powerpc/kvm/book3s_hv.c | 11 ++++++++++- > arch/powerpc/kvm/book3s_hv_builtin.c | 10 ++++++++-- > 2 files changed, 18 insertions(+), 3 deletions(-) > > diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c > index 8395a7f..ace89df 100644 > --- a/arch/powerpc/kvm/book3s_hv.c > +++ b/arch/powerpc/kvm/book3s_hv.c > @@ -147,12 +147,21 @@ static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, > > static bool kvmppc_ipi_thread(int cpu) > { > + unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); > + > + /* On POWER9 we can use msgsnd to IPI any cpu */ > + if (cpu_has_feature(CPU_FTR_ARCH_300)) { > + msg |= get_hard_smp_processor_id(cpu); > + smp_mb(); > + __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); > + return true; > + } > + > /* On POWER8 for IPIs to threads in the same core, use msgsnd */ > if (cpu_has_feature(CPU_FTR_ARCH_207S)) { > preempt_disable(); > if (cpu_first_thread_sibling(cpu) = > cpu_first_thread_sibling(smp_processor_id())) { > - unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); > msg |= cpu_thread_in_core(cpu); > smp_mb(); > __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); > diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c > index 0c84d6b..37ed045 100644 > --- a/arch/powerpc/kvm/book3s_hv_builtin.c > +++ b/arch/powerpc/kvm/book3s_hv_builtin.c > @@ -205,12 +205,18 @@ static inline void rm_writeb(unsigned long paddr, u8 val) > void kvmhv_rm_send_ipi(int cpu) > { > unsigned long xics_phys; > + unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); > > - /* On POWER8 for IPIs to threads in the same core, use msgsnd */ > + /* On POWER9 we can use msgsnd for any destination cpu. */ > + if (cpu_has_feature(CPU_FTR_ARCH_300)) { > + msg |= get_hard_smp_processor_id(cpu); > + __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); > + return; Do we need a "sync" there before msgsnd ? > + } > + /* On POWER8 for IPIs to threads in the same core, use msgsnd. */ > if (cpu_has_feature(CPU_FTR_ARCH_207S) && > cpu_first_thread_sibling(cpu) = > cpu_first_thread_sibling(raw_smp_processor_id())) { > - unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); > msg |= cpu_thread_in_core(cpu); > __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); > return; > -- > 2.7.4 > > -- > To unsubscribe from this list: send the line "unsubscribe kvm" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html
next prev parent reply other threads:[~2016-11-18 14:51 UTC|newest] Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-11-18 7:28 [PATCH 00/13] KVM: PPC: Support POWER9 guests Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-18 7:28 ` [PATCH 01/13] powerpc/64: Add some more SPRs and SPR bits for POWER9 Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-18 7:28 ` [PATCH 02/13] powerpc/64: Provide functions for accessing POWER9 partition table Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-18 14:27 ` Aneesh Kumar K.V 2016-11-18 14:39 ` Aneesh Kumar K.V 2016-11-19 4:19 ` Paul Mackerras 2016-11-19 4:19 ` Paul Mackerras 2016-11-19 6:35 ` Aneesh Kumar K.V 2016-11-19 6:47 ` Aneesh Kumar K.V 2016-11-21 2:14 ` Paul Mackerras 2016-11-21 2:14 ` Paul Mackerras 2016-11-19 0:45 ` Balbir Singh 2016-11-19 0:45 ` Balbir Singh 2016-11-19 4:23 ` Paul Mackerras 2016-11-19 4:23 ` Paul Mackerras 2016-11-18 7:28 ` [PATCH 03/13] powerpc/powernv: Define real-mode versions of OPAL XICS accessors Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-18 7:28 ` [PATCH 04/13] KVM: PPC: Book3S HV: Don't lose hardware R/C bit updates in H_PROTECT Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-18 7:28 ` [PATCH 05/13] KVM: PPC: Book3S HV: Adapt to new HPTE format on POWER9 Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-19 0:38 ` Balbir Singh 2016-11-19 0:38 ` Balbir Singh 2016-11-21 2:02 ` Paul Mackerras 2016-11-21 2:02 ` Paul Mackerras 2016-11-18 7:28 ` [PATCH 06/13] KVM: PPC: Book3S HV: Set partition table rather than SDR1 " Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-19 1:01 ` Balbir Singh 2016-11-19 1:01 ` Balbir Singh 2016-11-18 7:28 ` [PATCH 07/13] KVM: PPC: Book3S HV: Adjust host/guest context switch for POWER9 Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-18 14:35 ` Aneesh Kumar K.V 2016-11-18 14:47 ` Aneesh Kumar K.V 2016-11-19 4:02 ` Paul Mackerras 2016-11-19 4:02 ` Paul Mackerras 2016-11-18 7:28 ` [PATCH 08/13] KVM: PPC: Book3S HV: Add new POWER9 guest-accessible SPRs Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-18 7:28 ` [PATCH 09/13] KVM: PPC: Book3S HV: Adapt TLB invalidations to work on POWER9 Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-18 14:41 ` Aneesh Kumar K.V 2016-11-18 14:53 ` Aneesh Kumar K.V 2016-11-18 21:57 ` Benjamin Herrenschmidt 2016-11-18 21:57 ` Benjamin Herrenschmidt 2016-11-19 4:14 ` Paul Mackerras 2016-11-19 4:14 ` Paul Mackerras 2016-11-19 4:41 ` Benjamin Herrenschmidt 2016-11-19 4:41 ` Benjamin Herrenschmidt 2016-11-19 4:13 ` Paul Mackerras 2016-11-19 4:13 ` Paul Mackerras 2016-11-18 7:28 ` [PATCH 10/13] KVM: PPC: Book3S HV: Use msgsnd for IPIs to other cores " Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-18 14:47 ` Aneesh Kumar K.V [this message] 2016-11-18 14:59 ` Aneesh Kumar K.V 2016-11-19 3:53 ` Paul Mackerras 2016-11-19 3:53 ` Paul Mackerras 2016-11-18 7:28 ` [PATCH 11/13] KVM: PPC: Book3S HV: Use OPAL XICS emulation " Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-18 7:28 ` [PATCH 12/13] KVM: PPC: Book3S HV: Use stop instruction rather than nap " Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras 2016-11-18 7:28 ` [PATCH 13/13] KVM: PPC: Book3S HV: Treat POWER9 CPU threads as independent subcores Paul Mackerras 2016-11-18 7:28 ` Paul Mackerras
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