[PATCH 00/23] drm/i915: Organize most GPU features by platform

[PATCH 00/23] drm/i915: Organize most GPU features by platform

[Carlos Santa]

This patchset includes the following changes:

 - organize most GPU features so that they are easy to group by platforms.
   It seems some of the ground work was already done for Gen7 features.
   Reuse some of that work for the rest of the Gen platforms (GEN6, GEN5, GEN4, GEN3
   and GEN2).

 - make most of these GPU features now a device_info flag also based on
   previous work done by others. The idea is here is to have a central place where
   to add new features and also now it should be possible to see what the supported 
   features are for a given platform by dumping of the struct definitions.
   The list of the features that were converted to a device_info flag include: PSR,
   RUNTIME_PM, CORE_RING_FREQ, CSR, GUC, GUC_UCODE, GUC_SCHED, RESOURCE_STREAMER, RC6,
   RC6p, DP_MST, GMBUS_IRQ, FW_BLC, HW_CONTEXTS, LOGICAL_RING_CONTEXTS, L3_DPF, and
   GMCH_DISPLAY.

Carlos Santa (23):
  drm/i915: Move HAS_PSR definition to platform struct definition
  drm/i915: Introduce GEN6_FEATURES for device info
  drm/i915: Move HAS_RUNTIME_PM definition to platform
  drm/i915: Move HAS_CORE_RING_FREQ definition to platform definition
  drm/i915: Move HAS_CSR definition to platform definition
  drm/i915: Move HAS_GUC definition to platform definition
  drm/i915: Move HAS_GUC_UCODE definition to platform definition
  drm/i915: Move HAS_GUC_SCHED definition to platform definition
  drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition
  drm/i915: Move HAS_RC6 definition to platform definition
  drm/i915: Move HAS_RC6p definition to platform definition
  drm/i915: Move HAS_DP_MST definition to platform definition
  drm/i915: Introduce GEN5_FEATURES for device info
  drm/i915: Move HAS_AUX_IRQ definition to platform definition
  drm/i915: Move HAS_GMBUS_IRQ definition to platform definition
  drm/i915: Introduce GEN4_FEATURES for device info
  drm/i915: Introduce GEN3_FEATURES for device info
  drm/i915: Introduce GEN2 FEATURES for device info
  drm/915: Move HAS_FW_BLC definition to platform
  drm/i915: Move HAS_HW_CONTEXTS definition to platform
  drm/i915: Move HAS_LOGICAL_RING_CONTEXTS definition to platform
    definition
  drm/i915: Move HAS_L3_DPF definition to platform definition
  drm/i915: Move HAS_GMCH_DISPLAY definition to platform

 drivers/gpu/drm/i915/i915_drv.h |  67 +++++-----
 drivers/gpu/drm/i915/i915_pci.c | 272 +++++++++++++++++++++++++---------------
 2 files changed, 206 insertions(+), 133 deletions(-)

-- 
1.9.1

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[PATCH 01/23] drm/i915: Move HAS_PSR definition to platform struct definition

[Carlos Santa]

[patch series] Moving all GPU features to the platform struct definition
allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct definition

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 5 ++---
 drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e76cfe2..6569eb7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -768,6 +768,7 @@ struct intel_csr {
 	func(is_kabylake) sep \
 	func(is_preliminary) sep \
 	func(has_fbc) sep \
+	func(has_psr) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2846,9 +2847,7 @@ struct drm_i915_cmd_table {
 
 #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
 #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
-#define HAS_PSR(dev)		(IS_HASWELL(dev) || IS_BROADWELL(dev) || \
-				 IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
-				 IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
+#define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
 #define HAS_RUNTIME_PM(dev)	(IS_GEN6(dev) || IS_HASWELL(dev) || \
 				 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
 				 IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 949c016..08cdeb3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -242,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 
 #define VLV_FEATURES  \
 	.gen = 7, .num_pipes = 2, \
+	.has_psr = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -263,7 +264,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
 	GEN7_FEATURES, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
 	.has_ddi = 1, \
-	.has_fpga_dbg = 1
+	.has_fpga_dbg = 1, \
+	.has_psr = 1
 
 static const struct intel_device_info intel_haswell_d_info = {
 	HSW_FEATURES,
@@ -311,6 +313,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.need_gfx_hws = 1, .has_hotplug = 1,
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
 	.is_cherryview = 1,
+	.has_psr = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
-- 
1.9.1

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[PATCH 02/23] drm/i915: Introduce GEN6_FEATURES for device info

[Carlos Santa]

Based on the GEN7_FEATURES changes from Ben W.

Use it for snb.

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 26 ++++++++++++--------------
 1 file changed, 12 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 08cdeb3..8b1311d 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -194,24 +194,22 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	CURSOR_OFFSETS,
 };
 
+#define GEN6_FEATURES \
+	.gen = 6, .num_pipes = 2, \
+	.need_gfx_hws = 1, .has_hotplug = 1, \
+	.has_fbc = 1, \
+	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
+	.has_llc = 1, \
+	GEN_DEFAULT_PIPEOFFSETS, \
+	CURSOR_OFFSETS
+
 static const struct intel_device_info intel_sandybridge_d_info = {
-	.gen = 6, .num_pipes = 2,
-	.need_gfx_hws = 1, .has_hotplug = 1,
-	.has_fbc = 1,
-	.ring_mask = RENDER_RING | BSD_RING | BLT_RING,
-	.has_llc = 1,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN6_FEATURES
 };
 
 static const struct intel_device_info intel_sandybridge_m_info = {
-	.gen = 6, .is_mobile = 1, .num_pipes = 2,
-	.need_gfx_hws = 1, .has_hotplug = 1,
-	.has_fbc = 1,
-	.ring_mask = RENDER_RING | BSD_RING | BLT_RING,
-	.has_llc = 1,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN6_FEATURES,
+	.is_mobile = 1
 };
 
 #define GEN7_FEATURES  \
-- 
1.9.1

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[PATCH 03/23] drm/i915: Move HAS_RUNTIME_PM definition to platform

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 6 ++----
 drivers/gpu/drm/i915/i915_pci.c | 7 ++++++-
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6569eb7..7443b9a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -769,6 +769,7 @@ struct intel_csr {
 	func(is_preliminary) sep \
 	func(has_fbc) sep \
 	func(has_psr) sep \
+	func(has_runtime_pm) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2848,10 +2849,7 @@ struct drm_i915_cmd_table {
 #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
 #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
 #define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
-#define HAS_RUNTIME_PM(dev)	(IS_GEN6(dev) || IS_HASWELL(dev) || \
-				 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
-				 IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
-				 IS_KABYLAKE(dev) || IS_BROXTON(dev))
+#define HAS_RUNTIME_PM(dev)	(INTEL_INFO(dev)->has_runtime_pm)
 #define HAS_RC6(dev)		(INTEL_INFO(dev)->gen >= 6)
 #define HAS_RC6p(dev)		(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 8b1311d..92ab3c2 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -198,6 +198,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.gen = 6, .num_pipes = 2, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.has_fbc = 1, \
+	.has_runtime_pm = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -241,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 #define VLV_FEATURES  \
 	.gen = 7, .num_pipes = 2, \
 	.has_psr = 1, \
+	.has_runtime_pm = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -263,7 +265,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
 	.has_ddi = 1, \
 	.has_fpga_dbg = 1, \
-	.has_psr = 1
+	.has_psr = 1, \
+	.has_runtime_pm = 1
 
 static const struct intel_device_info intel_haswell_d_info = {
 	HSW_FEATURES,
@@ -312,6 +315,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
 	.is_cherryview = 1,
 	.has_psr = 1,
+	.has_runtime_pm = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -340,6 +344,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_ddi = 1,
 	.has_fpga_dbg = 1,
 	.has_fbc = 1,
+	.has_runtime_pm = 1,
 	.has_pooled_eu = 0,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
-- 
1.9.1

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[PATCH 04/23] drm/i915: Move HAS_CORE_RING_FREQ definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 5 ++---
 drivers/gpu/drm/i915/i915_pci.c | 2 ++
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7443b9a..69e3818 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -770,6 +770,7 @@ struct intel_csr {
 	func(has_fbc) sep \
 	func(has_psr) sep \
 	func(has_runtime_pm) sep \
+	func(has_core_ring_freq) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2867,9 +2868,7 @@ struct drm_i915_cmd_table {
 #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
 				    INTEL_INFO(dev)->gen >= 8)
 
-#define HAS_CORE_RING_FREQ(dev)	(INTEL_INFO(dev)->gen >= 6 && \
-				 !IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) && \
-				 !IS_BROXTON(dev))
+#define HAS_CORE_RING_FREQ(dev)	(INTEL_INFO(dev)->has_core_ring_freq)
 
 #define HAS_POOLED_EU(dev)	(INTEL_INFO(dev)->has_pooled_eu)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 92ab3c2..674b298 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -199,6 +199,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.has_fbc = 1, \
 	.has_runtime_pm = 1, \
+	.has_core_ring_freq = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -217,6 +218,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 	.gen = 7, .num_pipes = 3, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.has_fbc = 1, \
+	.has_core_ring_freq = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
-- 
1.9.1

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[PATCH 05/23] drm/i915: Move HAS_CSR definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h |  3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 14 +++++++++-----
 2 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 69e3818..db4930c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -771,6 +771,7 @@ struct intel_csr {
 	func(has_psr) sep \
 	func(has_runtime_pm) sep \
 	func(has_core_ring_freq) sep \
+	func(has_csr) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2854,7 +2855,7 @@ struct drm_i915_cmd_table {
 #define HAS_RC6(dev)		(INTEL_INFO(dev)->gen >= 6)
 #define HAS_RC6p(dev)		(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
 
-#define HAS_CSR(dev)	(IS_GEN9(dev))
+#define HAS_CSR(dev)	(INTEL_INFO(dev)->has_csr)
 
 /*
  * For now, anything with a GuC requires uCode loading, and then supports
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 674b298..d266af5 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -324,22 +324,26 @@ static const struct intel_device_info intel_cherryview_info = {
 	CHV_COLORS,
 };
 
+#define GEN9_FEATURES  \
+	.gen = 9, \
+	.has_csr = 1
+
 static const struct intel_device_info intel_skylake_info = {
 	BDW_FEATURES,
+	GEN9_FEATURES,
 	.is_skylake = 1,
-	.gen = 9,
 };
 
 static const struct intel_device_info intel_skylake_gt3_info = {
 	BDW_FEATURES,
+	GEN9_FEATURES,
 	.is_skylake = 1,
-	.gen = 9,
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
 
 static const struct intel_device_info intel_broxton_info = {
+	GEN9_FEATURES,
 	.is_broxton = 1,
-	.gen = 9,
 	.need_gfx_hws = 1, .has_hotplug = 1,
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
 	.num_pipes = 3,
@@ -355,14 +359,14 @@ static const struct intel_device_info intel_broxton_info = {
 
 static const struct intel_device_info intel_kabylake_info = {
 	BDW_FEATURES,
+	GEN9_FEATURES,
 	.is_kabylake = 1,
-	.gen = 9,
 };
 
 static const struct intel_device_info intel_kabylake_gt3_info = {
 	BDW_FEATURES,
+	GEN9_FEATURES,
 	.is_kabylake = 1,
-	.gen = 9,
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
 
-- 
1.9.1

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[PATCH 06/23] drm/i915: Move HAS_GUC definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platform
	- possible to see supported features when dumping struct
          definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index db4930c..09c907f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -772,6 +772,7 @@ struct intel_csr {
 	func(has_runtime_pm) sep \
 	func(has_core_ring_freq) sep \
 	func(has_csr) sep \
+	func(has_guc) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2862,7 +2863,7 @@ struct drm_i915_cmd_table {
  * command submission once loaded. But these are logically independent
  * properties, so we have separate macros to test them.
  */
-#define HAS_GUC(dev)		(IS_GEN9(dev))
+#define HAS_GUC(dev)		(INTEL_INFO(dev)->has_guc)
 #define HAS_GUC_UCODE(dev)	(HAS_GUC(dev))
 #define HAS_GUC_SCHED(dev)	(HAS_GUC(dev))
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index d266af5..f42bf19 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -326,7 +326,8 @@ static const struct intel_device_info intel_cherryview_info = {
 
 #define GEN9_FEATURES  \
 	.gen = 9, \
-	.has_csr = 1
+	.has_csr = 1, \
+	.has_guc = 1
 
 static const struct intel_device_info intel_skylake_info = {
 	BDW_FEATURES,
-- 
1.9.1

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[PATCH 07/23] drm/i915: Move HAS_GUC_UCODE definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported featurs when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 09c907f..7186665 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -773,6 +773,7 @@ struct intel_csr {
 	func(has_core_ring_freq) sep \
 	func(has_csr) sep \
 	func(has_guc) sep \
+	func(has_guc_ucode) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2864,7 +2865,7 @@ struct drm_i915_cmd_table {
  * properties, so we have separate macros to test them.
  */
 #define HAS_GUC(dev)		(INTEL_INFO(dev)->has_guc)
-#define HAS_GUC_UCODE(dev)	(HAS_GUC(dev))
+#define HAS_GUC_UCODE(dev)	(INTEL_INFO(dev)->has_guc_ucode)
 #define HAS_GUC_SCHED(dev)	(HAS_GUC(dev))
 
 #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f42bf19..8171915 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -327,7 +327,8 @@ static const struct intel_device_info intel_cherryview_info = {
 #define GEN9_FEATURES  \
 	.gen = 9, \
 	.has_csr = 1, \
-	.has_guc = 1
+	.has_guc = 1, \
+	.has_guc_ucode = 1
 
 static const struct intel_device_info intel_skylake_info = {
 	BDW_FEATURES,
-- 
1.9.1

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[PATCH 08/23] drm/i915: Move HAS_GUC_SCHED definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7186665..2ba441e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -774,6 +774,7 @@ struct intel_csr {
 	func(has_csr) sep \
 	func(has_guc) sep \
 	func(has_guc_ucode) sep \
+	func(has_guc_sched) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2866,7 +2867,7 @@ struct drm_i915_cmd_table {
  */
 #define HAS_GUC(dev)		(INTEL_INFO(dev)->has_guc)
 #define HAS_GUC_UCODE(dev)	(INTEL_INFO(dev)->has_guc_ucode)
-#define HAS_GUC_SCHED(dev)	(HAS_GUC(dev))
+#define HAS_GUC_SCHED(dev)	(INTEL_INFO(dev)->has_guc_sched)
 
 #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
 				    INTEL_INFO(dev)->gen >= 8)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 8171915..f2cb5c3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -328,7 +328,8 @@ static const struct intel_device_info intel_cherryview_info = {
 	.gen = 9, \
 	.has_csr = 1, \
 	.has_guc = 1, \
-	.has_guc_ucode = 1
+	.has_guc_ucode = 1, \
+	.has_guc_sched = 1
 
 static const struct intel_device_info intel_skylake_info = {
 	BDW_FEATURES,
-- 
1.9.1

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[PATCH 09/23] drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 4 ++--
 drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2ba441e..a326a88 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -775,6 +775,7 @@ struct intel_csr {
 	func(has_guc) sep \
 	func(has_guc_ucode) sep \
 	func(has_guc_sched) sep \
+	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2869,8 +2870,7 @@ struct drm_i915_cmd_table {
 #define HAS_GUC_UCODE(dev)	(INTEL_INFO(dev)->has_guc_ucode)
 #define HAS_GUC_SCHED(dev)	(INTEL_INFO(dev)->has_guc_sched)
 
-#define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
-				    INTEL_INFO(dev)->gen >= 8)
+#define HAS_RESOURCE_STREAMER(dev) (INTEL_INFO(dev)->has_resource_streamer)
 
 #define HAS_CORE_RING_FREQ(dev)	(INTEL_INFO(dev)->has_core_ring_freq)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f2cb5c3..f59ad4b 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -268,7 +268,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
 	.has_ddi = 1, \
 	.has_fpga_dbg = 1, \
 	.has_psr = 1, \
-	.has_runtime_pm = 1
+	.has_runtime_pm = 1, \
+	.has_resource_streamer = 1
 
 static const struct intel_device_info intel_haswell_d_info = {
 	HSW_FEATURES,
@@ -318,6 +319,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.is_cherryview = 1,
 	.has_psr = 1,
 	.has_runtime_pm = 1,
+	.has_resource_streamer = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -355,6 +357,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_fbc = 1,
 	.has_runtime_pm = 1,
 	.has_pooled_eu = 0,
+	.has_resource_streamer = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH 10/23] drm/i915: Move HAS_RC6 definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 5 +++++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a326a88..75131a0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -775,6 +775,7 @@ struct intel_csr {
 	func(has_guc) sep \
 	func(has_guc_ucode) sep \
 	func(has_guc_sched) sep \
+	func(has_rc6) sep \
 	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
@@ -2856,7 +2857,7 @@ struct drm_i915_cmd_table {
 #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
 #define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
 #define HAS_RUNTIME_PM(dev)	(INTEL_INFO(dev)->has_runtime_pm)
-#define HAS_RC6(dev)		(INTEL_INFO(dev)->gen >= 6)
+#define HAS_RC6(dev)		(INTEL_INFO(dev)->has_rc6)
 #define HAS_RC6p(dev)		(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
 
 #define HAS_CSR(dev)	(INTEL_INFO(dev)->has_csr)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f59ad4b..e10fb5c 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -200,6 +200,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.has_fbc = 1, \
 	.has_runtime_pm = 1, \
 	.has_core_ring_freq = 1, \
+	.has_rc6 = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -219,6 +220,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.has_fbc = 1, \
 	.has_core_ring_freq = 1, \
+	.has_rc6 = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -245,6 +247,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 	.gen = 7, .num_pipes = 2, \
 	.has_psr = 1, \
 	.has_runtime_pm = 1, \
+	.has_rc6 = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -320,6 +323,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_psr = 1,
 	.has_runtime_pm = 1,
 	.has_resource_streamer = 1,
+	.has_rc6 = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -358,6 +362,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_runtime_pm = 1,
 	.has_pooled_eu = 0,
 	.has_resource_streamer = 1,
+	.has_rc6 = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH 11/23] drm/i915: Move HAS_RC6p definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 7 +++++++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 75131a0..a6a22b4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -776,6 +776,7 @@ struct intel_csr {
 	func(has_guc_ucode) sep \
 	func(has_guc_sched) sep \
 	func(has_rc6) sep \
+	func(has_rc6p) sep \
 	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
@@ -2858,7 +2859,7 @@ struct drm_i915_cmd_table {
 #define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
 #define HAS_RUNTIME_PM(dev)	(INTEL_INFO(dev)->has_runtime_pm)
 #define HAS_RC6(dev)		(INTEL_INFO(dev)->has_rc6)
-#define HAS_RC6p(dev)		(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
+#define HAS_RC6p(dev)		(INTEL_INFO(dev)->has_rc6p)
 
 #define HAS_CSR(dev)	(INTEL_INFO(dev)->has_csr)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index e10fb5c..c6dae2c 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -201,6 +201,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.has_runtime_pm = 1, \
 	.has_core_ring_freq = 1, \
 	.has_rc6 = 1, \
+	.has_rc6p = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -226,19 +227,25 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 	GEN_DEFAULT_PIPEOFFSETS, \
 	IVB_CURSOR_OFFSETS
 
+#define IVB_FEATURES  \
+	.has_rc6p = 1
+
 static const struct intel_device_info intel_ivybridge_d_info = {
 	GEN7_FEATURES,
+	IVB_FEATURES,
 	.is_ivybridge = 1,
 };
 
 static const struct intel_device_info intel_ivybridge_m_info = {
 	GEN7_FEATURES,
+	IVB_FEATURES,
 	.is_ivybridge = 1,
 	.is_mobile = 1,
 };
 
 static const struct intel_device_info intel_ivybridge_q_info = {
 	GEN7_FEATURES,
+	IVB_FEATURES,
 	.is_ivybridge = 1,
 	.num_pipes = 0, /* legal, last one wins */
 };
-- 
1.9.1

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[PATCH 12/23] drm/i915: Move HAS_DP_MST definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 5 ++---
 drivers/gpu/drm/i915/i915_pci.c | 4 +++-
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a6a22b4..27f23cc5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -777,6 +777,7 @@ struct intel_csr {
 	func(has_guc_sched) sep \
 	func(has_rc6) sep \
 	func(has_rc6p) sep \
+	func(has_dp_mst) sep \
 	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
@@ -2851,9 +2852,7 @@ struct drm_i915_cmd_table {
 
 #define HAS_IPS(dev)		(IS_HSW_ULT(dev) || IS_BROADWELL(dev))
 
-#define HAS_DP_MST(dev)		(IS_HASWELL(dev) || IS_BROADWELL(dev) || \
-				 INTEL_INFO(dev)->gen >= 9)
-
+#define HAS_DP_MST(dev)		(INTEL_INFO(dev)->has_dp_mst)
 #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
 #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
 #define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c6dae2c..099f134 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -279,7 +279,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
 	.has_fpga_dbg = 1, \
 	.has_psr = 1, \
 	.has_runtime_pm = 1, \
-	.has_resource_streamer = 1
+	.has_resource_streamer = 1, \
+	.has_dp_mst = 1
 
 static const struct intel_device_info intel_haswell_d_info = {
 	HSW_FEATURES,
@@ -331,6 +332,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_runtime_pm = 1,
 	.has_resource_streamer = 1,
 	.has_rc6 = 1,
+	.has_dp_mst = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
-- 
1.9.1

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[PATCH 13/23] drm/i915: Introduce GEN5_FEATURES for device info

[Carlos Santa]

Based on the GEN7_FEATURES changes from Ben W.

Use it for ilk.

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 099f134..3844840 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -177,21 +177,22 @@ static const struct intel_device_info intel_pineview_info = {
 	CURSOR_OFFSETS,
 };
 
+#define GEN5_FEATURES \
+	.gen = 5, .num_pipes = 2, \
+	.need_gfx_hws = 1, .has_hotplug = 1, \
+	.ring_mask = RENDER_RING | BSD_RING, \
+	GEN_DEFAULT_PIPEOFFSETS, \
+	CURSOR_OFFSETS
+
 static const struct intel_device_info intel_ironlake_d_info = {
-	.gen = 5, .num_pipes = 2,
-	.need_gfx_hws = 1, .has_hotplug = 1,
-	.ring_mask = RENDER_RING | BSD_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN5_FEATURES
 };
 
 static const struct intel_device_info intel_ironlake_m_info = {
-	.gen = 5, .is_mobile = 1, .num_pipes = 2,
-	.need_gfx_hws = 1, .has_hotplug = 1,
+	GEN5_FEATURES,
+	.is_mobile = 1,
 	.has_fbc = 1,
-	.ring_mask = RENDER_RING | BSD_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+
 };
 
 #define GEN6_FEATURES \
-- 
1.9.1

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[PATCH 14/23] drm/i915: Move HAS_AUX_IRQ definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 6 ++++++
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 27f23cc5..26283b5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -778,6 +778,7 @@ struct intel_csr {
 	func(has_rc6) sep \
 	func(has_rc6p) sep \
 	func(has_dp_mst) sep \
+	func(has_aux_irq) sep \
 	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
@@ -2835,7 +2836,7 @@ struct drm_i915_cmd_table {
  * legacy irq no. is shared with another device. The kernel then disables that
  * interrupt source and so prevents the other device from working properly.
  */
-#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
+#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->has_aux_irq)
 #define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
 
 /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 3844840..9a5cb33 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -180,6 +180,7 @@ static const struct intel_device_info intel_pineview_info = {
 #define GEN5_FEATURES \
 	.gen = 5, .num_pipes = 2, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
+	.has_aux_irq = 1, \
 	.ring_mask = RENDER_RING | BSD_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -203,6 +204,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.has_core_ring_freq = 1, \
 	.has_rc6 = 1, \
 	.has_rc6p = 1, \
+	.has_aux_irq = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -223,6 +225,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 	.has_fbc = 1, \
 	.has_core_ring_freq = 1, \
 	.has_rc6 = 1, \
+	.has_aux_irq = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -256,6 +259,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 	.has_psr = 1, \
 	.has_runtime_pm = 1, \
 	.has_rc6 = 1, \
+	.has_aux_irq = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -334,6 +338,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_resource_streamer = 1,
 	.has_rc6 = 1,
 	.has_dp_mst = 1,
+	.has_aux_irq = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -373,6 +378,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_pooled_eu = 0,
 	.has_resource_streamer = 1,
 	.has_rc6 = 1,
+	.has_aux_irq = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH 15/23] drm/i915: Move HAS_GMBUS_IRQ definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 6 ++++++
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 26283b5..a58765b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -779,6 +779,7 @@ struct intel_csr {
 	func(has_rc6p) sep \
 	func(has_dp_mst) sep \
 	func(has_aux_irq) sep \
+	func(has_gmbus_irq) sep \
 	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
@@ -2837,7 +2838,7 @@ struct drm_i915_cmd_table {
  * interrupt source and so prevents the other device from working properly.
  */
 #define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->has_aux_irq)
-#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
+#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->has_gmbus_irq)
 
 /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
  * rows, which changed the alignment requirements and fence programming.
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 9a5cb33..4652e2d 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -181,6 +181,7 @@ static const struct intel_device_info intel_pineview_info = {
 	.gen = 5, .num_pipes = 2, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.has_aux_irq = 1, \
+	.has_gmbus_irq = 1, \
 	.ring_mask = RENDER_RING | BSD_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -205,6 +206,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.has_rc6 = 1, \
 	.has_rc6p = 1, \
 	.has_aux_irq = 1, \
+	.has_gmbus_irq = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -226,6 +228,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 	.has_core_ring_freq = 1, \
 	.has_rc6 = 1, \
 	.has_aux_irq = 1, \
+	.has_gmbus_irq = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -260,6 +263,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 	.has_runtime_pm = 1, \
 	.has_rc6 = 1, \
 	.has_aux_irq = 1, \
+	.has_gmbus_irq = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -339,6 +343,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_rc6 = 1,
 	.has_dp_mst = 1,
 	.has_aux_irq = 1,
+	.has_gmbus_irq = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -379,6 +384,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_resource_streamer = 1,
 	.has_rc6 = 1,
 	.has_aux_irq = 1,
+	.has_gmbus_irq = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH 16/23] drm/i915: Introduce GEN4_FEATURES for device info

[Carlos Santa]

Based on the GEN7_FEATURES changes from Ben W.

Use it for i965g, i965gm, g45,and gm45.

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 51 ++++++++++++++++++++++-------------------
 1 file changed, 28 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 4652e2d..c4fdb4d 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -123,23 +123,34 @@ static const struct intel_device_info intel_i945gm_info = {
 	CURSOR_OFFSETS,
 };
 
+#define GEN4_FEATURES \
+	.gen = 4, .num_pipes = 2, \
+	.has_hotplug = 1, \
+	GEN_DEFAULT_PIPEOFFSETS, \
+	CURSOR_OFFSETS
+
+#define GEN4_G45_FEATURES \
+	.is_g4x = 1, .need_gfx_hws = 1, \
+	.has_pipe_cxsr = 1, \
+	.ring_mask = RENDER_RING | BSD_RING
+
+#define GEN4_i965_FEATURES \
+	.has_overlay = 1, \
+	.ring_mask = RENDER_RING
+
 static const struct intel_device_info intel_i965g_info = {
-	.gen = 4, .is_broadwater = 1, .num_pipes = 2,
-	.has_hotplug = 1,
-	.has_overlay = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN4_FEATURES,
+	GEN4_i965_FEATURES,
+	.is_broadwater = 1,
+
 };
 
 static const struct intel_device_info intel_i965gm_info = {
-	.gen = 4, .is_crestline = 1, .num_pipes = 2,
-	.is_mobile = 1, .has_fbc = 1, .has_hotplug = 1,
-	.has_overlay = 1,
+	GEN4_FEATURES,
+	GEN4_i965_FEATURES,
+	.is_crestline = 1,
+	.is_mobile = 1, .has_fbc = 1,
 	.supports_tv = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 static const struct intel_device_info intel_g33_info = {
@@ -152,21 +163,15 @@ static const struct intel_device_info intel_g33_info = {
 };
 
 static const struct intel_device_info intel_g45_info = {
-	.gen = 4, .is_g4x = 1, .need_gfx_hws = 1, .num_pipes = 2,
-	.has_pipe_cxsr = 1, .has_hotplug = 1,
-	.ring_mask = RENDER_RING | BSD_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN4_FEATURES,
+	GEN4_G45_FEATURES,
 };
 
 static const struct intel_device_info intel_gm45_info = {
-	.gen = 4, .is_g4x = 1, .num_pipes = 2,
-	.is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1,
-	.has_pipe_cxsr = 1, .has_hotplug = 1,
+	GEN4_FEATURES,
+	GEN4_G45_FEATURES,
+	.is_mobile = 1, .has_fbc = 1,
 	.supports_tv = 1,
-	.ring_mask = RENDER_RING | BSD_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 static const struct intel_device_info intel_pineview_info = {
-- 
1.9.1

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[PATCH 17/23] drm/i915: Introduce GEN3_FEATURES for device info

[Carlos Santa]

Based on the GEN7_FEATURES changes from Ben W.

Use it for i915g, i915gm, i945g, i945gm, g33 and pineview.

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 58 ++++++++++++++++++++---------------------
 1 file changed, 29 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c4fdb4d..5c490f8 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -88,39 +88,42 @@ static const struct intel_device_info intel_i865g_info = {
 	CURSOR_OFFSETS,
 };
 
+#define GEN3_FEATURES \
+	.gen = 3, .num_pipes = 2,\
+	.ring_mask = RENDER_RING, \
+	GEN_DEFAULT_PIPEOFFSETS, \
+	CURSOR_OFFSETS
+
+#define GEN3_i9X5_FEATURES \
+	.cursor_needs_physical = 1, \
+	.has_overlay = 1, \
+	.overlay_needs_physical = 1
+
 static const struct intel_device_info intel_i915g_info = {
-	.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
-	.has_overlay = 1, .overlay_needs_physical = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN3_FEATURES,
+	GEN3_i9X5_FEATURES,
+	.is_i915g = 1,
+
 };
 static const struct intel_device_info intel_i915gm_info = {
-	.gen = 3, .is_mobile = 1, .num_pipes = 2,
-	.cursor_needs_physical = 1,
-	.has_overlay = 1, .overlay_needs_physical = 1,
+	GEN3_FEATURES,
+	GEN3_i9X5_FEATURES,
+	.is_mobile = 1,
 	.supports_tv = 1,
 	.has_fbc = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 static const struct intel_device_info intel_i945g_info = {
-	.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
-	.has_overlay = 1, .overlay_needs_physical = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN3_FEATURES,
+	GEN3_i9X5_FEATURES,
+	.has_hotplug = 1,
 };
 static const struct intel_device_info intel_i945gm_info = {
-	.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
-	.has_hotplug = 1, .cursor_needs_physical = 1,
-	.has_overlay = 1, .overlay_needs_physical = 1,
+	GEN3_FEATURES,
+	GEN3_i9X5_FEATURES,
+	.is_i945gm = 1, .is_mobile = 1,
+	.has_hotplug = 1,
 	.supports_tv = 1,
 	.has_fbc = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 #define GEN4_FEATURES \
@@ -154,12 +157,10 @@ static const struct intel_device_info intel_i965gm_info = {
 };
 
 static const struct intel_device_info intel_g33_info = {
-	.gen = 3, .is_g33 = 1, .num_pipes = 2,
+	GEN3_FEATURES,
+	.is_g33 = 1,
 	.need_gfx_hws = 1, .has_hotplug = 1,
 	.has_overlay = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 static const struct intel_device_info intel_g45_info = {
@@ -175,11 +176,10 @@ static const struct intel_device_info intel_gm45_info = {
 };
 
 static const struct intel_device_info intel_pineview_info = {
-	.gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .num_pipes = 2,
+	GEN3_FEATURES,
+	.is_g33 = 1, .is_pineview = 1, .is_mobile = 1,
 	.need_gfx_hws = 1, .has_hotplug = 1,
 	.has_overlay = 1,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 #define GEN5_FEATURES \
-- 
1.9.1

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[PATCH 18/23] drm/i915: Introduce GEN2 FEATURES for device info

[Carlos Santa]

Based on the GEN7_FEATURES changes from Ben W.

Use it for 830, 845g, i85x, i865g.

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 33 +++++++++++++--------------------
 1 file changed, 13 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 5c490f8..50569c1 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -54,38 +54,31 @@
 #define CHV_COLORS \
 	.color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
 
+#define GEN2_FEATURES \
+	.gen = 2, .num_pipes = 1, \
+	.has_overlay = 1, .overlay_needs_physical = 1, \
+	.ring_mask = RENDER_RING, \
+	GEN_DEFAULT_PIPEOFFSETS, \
+	CURSOR_OFFSETS
+
 static const struct intel_device_info intel_i830_info = {
-	.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
-	.has_overlay = 1, .overlay_needs_physical = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN2_FEATURES,
+	.is_mobile = 1, .cursor_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_845g_info = {
-	.gen = 2, .num_pipes = 1,
-	.has_overlay = 1, .overlay_needs_physical = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN2_FEATURES,
 };
 
 static const struct intel_device_info intel_i85x_info = {
-	.gen = 2, .is_i85x = 1, .is_mobile = 1, .num_pipes = 2,
+	GEN2_FEATURES,
+	.is_i85x = 1, .is_mobile = 1,
 	.cursor_needs_physical = 1,
-	.has_overlay = 1, .overlay_needs_physical = 1,
 	.has_fbc = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
 };
 
 static const struct intel_device_info intel_i865g_info = {
-	.gen = 2, .num_pipes = 1,
-	.has_overlay = 1, .overlay_needs_physical = 1,
-	.ring_mask = RENDER_RING,
-	GEN_DEFAULT_PIPEOFFSETS,
-	CURSOR_OFFSETS,
+	GEN2_FEATURES,
 };
 
 #define GEN3_FEATURES \
-- 
1.9.1

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[PATCH 19/23] drm/915: Move HAS_FW_BLC definition to platform

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard placae when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h |  3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 10 +++++++++-
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a58765b..8f5b9fd 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -780,6 +780,7 @@ struct intel_csr {
 	func(has_dp_mst) sep \
 	func(has_aux_irq) sep \
 	func(has_gmbus_irq) sep \
+	func(has_fw_blc) sep \
 	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
@@ -2848,7 +2849,7 @@ struct drm_i915_cmd_table {
 #define SUPPORTS_TV(dev)		(INTEL_INFO(dev)->supports_tv)
 #define I915_HAS_HOTPLUG(dev)		 (INTEL_INFO(dev)->has_hotplug)
 
-#define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)
+#define HAS_FW_BLC(dev) (INTEL_INFO(dev)->has_fw_blc)
 #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
 #define HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 50569c1..b44d162 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -82,7 +82,8 @@ static const struct intel_device_info intel_i865g_info = {
 };
 
 #define GEN3_FEATURES \
-	.gen = 3, .num_pipes = 2,\
+	.gen = 3, .num_pipes = 2, \
+	.has_fw_blc = 1, \
 	.ring_mask = RENDER_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -122,6 +123,7 @@ static const struct intel_device_info intel_i945gm_info = {
 #define GEN4_FEATURES \
 	.gen = 4, .num_pipes = 2, \
 	.has_hotplug = 1, \
+	.has_fw_blc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
 
@@ -180,6 +182,7 @@ static const struct intel_device_info intel_pineview_info = {
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.has_aux_irq = 1, \
 	.has_gmbus_irq = 1, \
+	.has_fw_blc = 1, \
 	.ring_mask = RENDER_RING | BSD_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -205,6 +208,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.has_rc6p = 1, \
 	.has_aux_irq = 1, \
 	.has_gmbus_irq = 1, \
+	.has_fw_blc = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -227,6 +231,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 	.has_rc6 = 1, \
 	.has_aux_irq = 1, \
 	.has_gmbus_irq = 1, \
+	.has_fw_blc = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -262,6 +267,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 	.has_rc6 = 1, \
 	.has_aux_irq = 1, \
 	.has_gmbus_irq = 1, \
+	.has_fw_blc = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -342,6 +348,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_dp_mst = 1,
 	.has_aux_irq = 1,
 	.has_gmbus_irq = 1,
+	.has_fw_blc = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -383,6 +390,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_rc6 = 1,
 	.has_aux_irq = 1,
 	.has_gmbus_irq = 1,
+	.has_fw_blc = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH 20/23] drm/i915: Move HAS_HW_CONTEXTS definition to platform

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumpig struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 5 +++++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8f5b9fd..06d2850 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -781,6 +781,7 @@ struct intel_csr {
 	func(has_aux_irq) sep \
 	func(has_gmbus_irq) sep \
 	func(has_fw_blc) sep \
+	func(has_hw_contexts) sep \
 	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
@@ -2814,7 +2815,7 @@ struct drm_i915_cmd_table {
 				 HAS_EDRAM(dev))
 #define I915_NEED_GFX_HWS(dev)	(INTEL_INFO(dev)->need_gfx_hws)
 
-#define HAS_HW_CONTEXTS(dev)	(INTEL_INFO(dev)->gen >= 6)
+#define HAS_HW_CONTEXTS(dev)	(INTEL_INFO(dev)->has_hw_contexts)
 #define HAS_LOGICAL_RING_CONTEXTS(dev)	(INTEL_INFO(dev)->gen >= 8)
 #define USES_PPGTT(dev)		(i915.enable_ppgtt)
 #define USES_FULL_PPGTT(dev)	(i915.enable_ppgtt >= 2)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index b44d162..26ff54e 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -209,6 +209,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.has_aux_irq = 1, \
 	.has_gmbus_irq = 1, \
 	.has_fw_blc = 1, \
+	.has_hw_contexts = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -232,6 +233,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 	.has_aux_irq = 1, \
 	.has_gmbus_irq = 1, \
 	.has_fw_blc = 1, \
+	.has_hw_contexts = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.has_llc = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
@@ -268,6 +270,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 	.has_aux_irq = 1, \
 	.has_gmbus_irq = 1, \
 	.has_fw_blc = 1, \
+	.has_hw_contexts = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -349,6 +352,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_aux_irq = 1,
 	.has_gmbus_irq = 1,
 	.has_fw_blc = 1,
+	.has_hw_contexts = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -391,6 +395,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_aux_irq = 1,
 	.has_gmbus_irq = 1,
 	.has_fw_blc = 1,
+	.has_hw_contexts = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH 21/23] drm/i915: Move HAS_LOGICAL_RING_CONTEXTS definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 06d2850..8f93a93 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -782,6 +782,7 @@ struct intel_csr {
 	func(has_gmbus_irq) sep \
 	func(has_fw_blc) sep \
 	func(has_hw_contexts) sep \
+	func(has_logical_ring_contexts) sep \
 	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
@@ -2816,7 +2817,7 @@ struct drm_i915_cmd_table {
 #define I915_NEED_GFX_HWS(dev)	(INTEL_INFO(dev)->need_gfx_hws)
 
 #define HAS_HW_CONTEXTS(dev)	(INTEL_INFO(dev)->has_hw_contexts)
-#define HAS_LOGICAL_RING_CONTEXTS(dev)	(INTEL_INFO(dev)->gen >= 8)
+#define HAS_LOGICAL_RING_CONTEXTS(dev)	(INTEL_INFO(dev)->has_logical_ring_contexts)
 #define USES_PPGTT(dev)		(i915.enable_ppgtt)
 #define USES_FULL_PPGTT(dev)	(i915.enable_ppgtt >= 2)
 #define USES_FULL_48BIT_PPGTT(dev)	(i915.enable_ppgtt == 3)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 26ff54e..d90cb47 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -311,7 +311,8 @@ static const struct intel_device_info intel_haswell_m_info = {
 
 #define BDW_FEATURES \
 	HSW_FEATURES, \
-	BDW_COLORS
+	BDW_COLORS, \
+	.has_logical_ring_contexts = 1
 
 static const struct intel_device_info intel_broadwell_d_info = {
 	BDW_FEATURES,
@@ -353,6 +354,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_gmbus_irq = 1,
 	.has_fw_blc = 1,
 	.has_hw_contexts = 1,
+	.has_logical_ring_contexts = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -396,6 +398,7 @@ static const struct intel_device_info intel_broxton_info = {
 	.has_gmbus_irq = 1,
 	.has_fw_blc = 1,
 	.has_hw_contexts = 1,
+	.has_logical_ring_contexts = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,
-- 
1.9.1

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[PATCH 22/23] drm/i915: Move HAS_L3_DPF definition to platform definition

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c | 6 ++++--
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8f93a93..7075f76 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -783,6 +783,7 @@ struct intel_csr {
 	func(has_fw_blc) sep \
 	func(has_hw_contexts) sep \
 	func(has_logical_ring_contexts) sep \
+	func(has_l3_dpf) sep \
 	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
@@ -2910,7 +2911,7 @@ struct drm_i915_cmd_table {
 			       IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
 
 /* DPF == dynamic parity feature */
-#define HAS_L3_DPF(dev) (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
+#define HAS_L3_DPF(dev) (INTEL_INFO(dev)->has_l3_dpf)
 #define NUM_L3_SLICES(dev) (IS_HSW_GT3(dev) ? 2 : HAS_L3_DPF(dev))
 
 #define GT_FREQUENCY_MULTIPLIER 50
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index d90cb47..c03cb97 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -240,7 +240,8 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 	IVB_CURSOR_OFFSETS
 
 #define IVB_FEATURES  \
-	.has_rc6p = 1
+	.has_rc6p = 1, \
+	.has_l3_dpf = 1
 
 static const struct intel_device_info intel_ivybridge_d_info = {
 	GEN7_FEATURES,
@@ -296,7 +297,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
 	.has_psr = 1, \
 	.has_runtime_pm = 1, \
 	.has_resource_streamer = 1, \
-	.has_dp_mst = 1
+	.has_dp_mst = 1, \
+	.has_l3_dpf = 1
 
 static const struct intel_device_info intel_haswell_d_info = {
 	HSW_FEATURES,
-- 
1.9.1

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[PATCH 23/23] drm/i915: Move HAS_GMCH_DISPLAY definition to platform

[Carlos Santa]

Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 4 ++--
 drivers/gpu/drm/i915/i915_pci.c | 5 +++++
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7075f76..b9d0478 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -784,6 +784,7 @@ struct intel_csr {
 	func(has_hw_contexts) sep \
 	func(has_logical_ring_contexts) sep \
 	func(has_l3_dpf) sep \
+	func(has_gmch_display) sep \
 	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
@@ -2907,8 +2908,7 @@ struct drm_i915_cmd_table {
 #define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP)
 #define HAS_PCH_SPLIT(dev) (INTEL_PCH_TYPE(dev) != PCH_NONE)
 
-#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->gen < 5 || \
-			       IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
+#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->has_gmch_display)
 
 /* DPF == dynamic parity feature */
 #define HAS_L3_DPF(dev) (INTEL_INFO(dev)->has_l3_dpf)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c03cb97..59f3e35 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -57,6 +57,7 @@
 #define GEN2_FEATURES \
 	.gen = 2, .num_pipes = 1, \
 	.has_overlay = 1, .overlay_needs_physical = 1, \
+	.has_gmch_display = 1, \
 	.ring_mask = RENDER_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -84,6 +85,7 @@ static const struct intel_device_info intel_i865g_info = {
 #define GEN3_FEATURES \
 	.gen = 3, .num_pipes = 2, \
 	.has_fw_blc = 1, \
+	.has_gmch_display = 1, \
 	.ring_mask = RENDER_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -124,6 +126,7 @@ static const struct intel_device_info intel_i945gm_info = {
 	.gen = 4, .num_pipes = 2, \
 	.has_hotplug = 1, \
 	.has_fw_blc = 1, \
+	.has_gmch_display = 1, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
 
@@ -272,6 +275,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 	.has_gmbus_irq = 1, \
 	.has_fw_blc = 1, \
 	.has_hw_contexts = 1, \
+	.has_gmch_display = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -357,6 +361,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	.has_fw_blc = 1,
 	.has_hw_contexts = 1,
 	.has_logical_ring_contexts = 1,
+	.has_gmch_display = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
-- 
1.9.1

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Re: [PATCH 01/23] drm/i915: Move HAS_PSR definition to platform struct definition

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> [patch series] Moving all GPU features to the platform struct definition
> allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct definition
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 5 ++---
>  drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
>  2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index e76cfe2..6569eb7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -768,6 +768,7 @@ struct intel_csr {
>         func(is_kabylake) sep \
>         func(is_preliminary) sep \
>         func(has_fbc) sep \
> +       func(has_psr) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
>         func(cursor_needs_physical) sep \
> @@ -2846,9 +2847,7 @@ struct drm_i915_cmd_table {
>
>  #define HAS_DDI(dev)           (INTEL_INFO(dev)->has_ddi)
>  #define HAS_FPGA_DBG_UNCLAIMED(dev)    (INTEL_INFO(dev)->has_fpga_dbg)
> -#define HAS_PSR(dev)           (IS_HASWELL(dev) || IS_BROADWELL(dev) || \
> -                                IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
> -                                IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
> +#define HAS_PSR(dev)           (INTEL_INFO(dev)->has_psr)
>  #define HAS_RUNTIME_PM(dev)    (IS_GEN6(dev) || IS_HASWELL(dev) || \
>                                  IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
>                                  IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 949c016..08cdeb3 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -242,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>
>  #define VLV_FEATURES  \
>         .gen = 7, .num_pipes = 2, \
> +       .has_psr = 1, \
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -263,7 +264,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
>         GEN7_FEATURES, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
>         .has_ddi = 1, \
> -       .has_fpga_dbg = 1
> +       .has_fpga_dbg = 1, \
> +       .has_psr = 1
>
>  static const struct intel_device_info intel_haswell_d_info = {
>         HSW_FEATURES,
> @@ -311,6 +313,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         .need_gfx_hws = 1, .has_hotplug = 1,
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
>         .is_cherryview = 1,
> +       .has_psr = 1,
>         .display_mmio_offset = VLV_DISPLAY_BASE,
>         GEN_CHV_PIPEOFFSETS,
>         CURSOR_OFFSETS,
> --
> 1.9.1
>
> _______________________________________________
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> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



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Blog: http://blog.vivi.eng.br
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Re: [PATCH 02/23] drm/i915: Introduce GEN6_FEATURES for device info

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>


On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Based on the GEN7_FEATURES changes from Ben W.
>
> Use it for snb.
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c | 26 ++++++++++++--------------
>  1 file changed, 12 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 08cdeb3..8b1311d 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -194,24 +194,22 @@ static const struct intel_device_info intel_ironlake_m_info = {
>         CURSOR_OFFSETS,
>  };
>
> +#define GEN6_FEATURES \
> +       .gen = 6, .num_pipes = 2, \
> +       .need_gfx_hws = 1, .has_hotplug = 1, \
> +       .has_fbc = 1, \
> +       .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> +       .has_llc = 1, \
> +       GEN_DEFAULT_PIPEOFFSETS, \
> +       CURSOR_OFFSETS
> +
>  static const struct intel_device_info intel_sandybridge_d_info = {
> -       .gen = 6, .num_pipes = 2,
> -       .need_gfx_hws = 1, .has_hotplug = 1,
> -       .has_fbc = 1,
> -       .ring_mask = RENDER_RING | BSD_RING | BLT_RING,
> -       .has_llc = 1,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
> +       GEN6_FEATURES
>  };
>
>  static const struct intel_device_info intel_sandybridge_m_info = {
> -       .gen = 6, .is_mobile = 1, .num_pipes = 2,
> -       .need_gfx_hws = 1, .has_hotplug = 1,
> -       .has_fbc = 1,
> -       .ring_mask = RENDER_RING | BSD_RING | BLT_RING,
> -       .has_llc = 1,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
> +       GEN6_FEATURES,
> +       .is_mobile = 1
>  };
>
>  #define GEN7_FEATURES  \
> --
> 1.9.1
>
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Re: [PATCH 03/23] drm/i915: Move HAS_RUNTIME_PM definition to platform

[Rodrigo Vivi]

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform struct definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 6 ++----
>  drivers/gpu/drm/i915/i915_pci.c | 7 ++++++-
>  2 files changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6569eb7..7443b9a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -769,6 +769,7 @@ struct intel_csr {
>         func(is_preliminary) sep \
>         func(has_fbc) sep \
>         func(has_psr) sep \
> +       func(has_runtime_pm) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
>         func(cursor_needs_physical) sep \
> @@ -2848,10 +2849,7 @@ struct drm_i915_cmd_table {
>  #define HAS_DDI(dev)           (INTEL_INFO(dev)->has_ddi)
>  #define HAS_FPGA_DBG_UNCLAIMED(dev)    (INTEL_INFO(dev)->has_fpga_dbg)
>  #define HAS_PSR(dev)           (INTEL_INFO(dev)->has_psr)
> -#define HAS_RUNTIME_PM(dev)    (IS_GEN6(dev) || IS_HASWELL(dev) || \
> -                                IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
> -                                IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
> -                                IS_KABYLAKE(dev) || IS_BROXTON(dev))

Why don't we have runtime_pm on Ivybridge since we have on
sandybdrige? Imre, any idea?

> +#define HAS_RUNTIME_PM(dev)    (INTEL_INFO(dev)->has_runtime_pm)
>  #define HAS_RC6(dev)           (INTEL_INFO(dev)->gen >= 6)
>  #define HAS_RC6p(dev)          (IS_GEN6(dev) || IS_IVYBRIDGE(dev))
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 8b1311d..92ab3c2 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -198,6 +198,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>         .gen = 6, .num_pipes = 2, \
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .has_fbc = 1, \
> +       .has_runtime_pm = 1, \

This patch made me notice that we should define the

GEN7_FEATURE on GEN6_FEATURES + new changes as a followup of patch
02/32 or in that same patch.
However for this case we should redefine .has_runtime_pm=0 on gen7,
what is really strange.

Anyway, this patch itself has nothing wrong and just follows what it
was set there already.
any change related to my comments should be addressed in separated patches.
So fell free to also use
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -241,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>  #define VLV_FEATURES  \
>         .gen = 7, .num_pipes = 2, \
>         .has_psr = 1, \
> +       .has_runtime_pm = 1, \
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -263,7 +265,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
>         .has_ddi = 1, \
>         .has_fpga_dbg = 1, \
> -       .has_psr = 1
> +       .has_psr = 1, \
> +       .has_runtime_pm = 1
>
>  static const struct intel_device_info intel_haswell_d_info = {
>         HSW_FEATURES,
> @@ -312,6 +315,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
>         .is_cherryview = 1,
>         .has_psr = 1,
> +       .has_runtime_pm = 1,
>         .display_mmio_offset = VLV_DISPLAY_BASE,
>         GEN_CHV_PIPEOFFSETS,
>         CURSOR_OFFSETS,
> @@ -340,6 +344,7 @@ static const struct intel_device_info intel_broxton_info = {
>         .has_ddi = 1,
>         .has_fpga_dbg = 1,
>         .has_fbc = 1,
> +       .has_runtime_pm = 1,
>         .has_pooled_eu = 0,
>         GEN_DEFAULT_PIPEOFFSETS,
>         IVB_CURSOR_OFFSETS,
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
_______________________________________________
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Re: [PATCH 04/23] drm/i915: Move HAS_CORE_RING_FREQ definition to platform definition

[Rodrigo Vivi]

another reason to have GEN7_FEATURES based on GEN6_FEATURES.

Please add that before patches like this so we avoid duplication since
the beginning. And do that has_runtime_pm=0 and put a comment or a
FIXME there...

Thanks,
Rodrigo.

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform struct definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 5 ++---
>  drivers/gpu/drm/i915/i915_pci.c | 2 ++
>  2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7443b9a..69e3818 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -770,6 +770,7 @@ struct intel_csr {
>         func(has_fbc) sep \
>         func(has_psr) sep \
>         func(has_runtime_pm) sep \
> +       func(has_core_ring_freq) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
>         func(cursor_needs_physical) sep \
> @@ -2867,9 +2868,7 @@ struct drm_i915_cmd_table {
>  #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
>                                     INTEL_INFO(dev)->gen >= 8)
>
> -#define HAS_CORE_RING_FREQ(dev)        (INTEL_INFO(dev)->gen >= 6 && \
> -                                !IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) && \
> -                                !IS_BROXTON(dev))
> +#define HAS_CORE_RING_FREQ(dev)        (INTEL_INFO(dev)->has_core_ring_freq)
>
>  #define HAS_POOLED_EU(dev)     (INTEL_INFO(dev)->has_pooled_eu)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 92ab3c2..674b298 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -199,6 +199,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .has_fbc = 1, \
>         .has_runtime_pm = 1, \
> +       .has_core_ring_freq = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -217,6 +218,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
>         .gen = 7, .num_pipes = 3, \
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .has_fbc = 1, \
> +       .has_core_ring_freq = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 05/23] drm/i915: Move HAS_CSR definition to platform definition

[Rodrigo Vivi]

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform struct definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h |  3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 14 +++++++++-----
>  2 files changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 69e3818..db4930c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -771,6 +771,7 @@ struct intel_csr {
>         func(has_psr) sep \
>         func(has_runtime_pm) sep \
>         func(has_core_ring_freq) sep \
> +       func(has_csr) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
>         func(cursor_needs_physical) sep \
> @@ -2854,7 +2855,7 @@ struct drm_i915_cmd_table {
>  #define HAS_RC6(dev)           (INTEL_INFO(dev)->gen >= 6)
>  #define HAS_RC6p(dev)          (IS_GEN6(dev) || IS_IVYBRIDGE(dev))
>
> -#define HAS_CSR(dev)   (IS_GEN9(dev))
> +#define HAS_CSR(dev)   (INTEL_INFO(dev)->has_csr)
>
>  /*
>   * For now, anything with a GuC requires uCode loading, and then supports
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 674b298..d266af5 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -324,22 +324,26 @@ static const struct intel_device_info intel_cherryview_info = {
>         CHV_COLORS,
>  };
>
> +#define GEN9_FEATURES  \
> +       .gen = 9, \
> +       .has_csr = 1
> +
>  static const struct intel_device_info intel_skylake_info = {
>         BDW_FEATURES,
> +       GEN9_FEATURES,

hmmm.. not sure about this GEN9_FEATURES along with BDW_FEATURES one...
Might be confusing and lead to mistakes.

I believe for now is better to spread the has_csr...

>         .is_skylake = 1,
> -       .gen = 9,
>  };
>
>  static const struct intel_device_info intel_skylake_gt3_info = {
>         BDW_FEATURES,
> +       GEN9_FEATURES,
>         .is_skylake = 1,
> -       .gen = 9,
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
>  };
>
>  static const struct intel_device_info intel_broxton_info = {
> +       GEN9_FEATURES,
>         .is_broxton = 1,
> -       .gen = 9,
>         .need_gfx_hws = 1, .has_hotplug = 1,
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
>         .num_pipes = 3,
> @@ -355,14 +359,14 @@ static const struct intel_device_info intel_broxton_info = {
>
>  static const struct intel_device_info intel_kabylake_info = {
>         BDW_FEATURES,
> +       GEN9_FEATURES,
>         .is_kabylake = 1,
> -       .gen = 9,
>  };
>
>  static const struct intel_device_info intel_kabylake_gt3_info = {
>         BDW_FEATURES,
> +       GEN9_FEATURES,
>         .is_kabylake = 1,
> -       .gen = 9,
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
>  };
>
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
_______________________________________________
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Re: [PATCH 07/23] drm/i915: Move HAS_GUC_UCODE definition to platform definition

[Rodrigo Vivi]

please kill this _ucode variation that is just a alias to guc instead....

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported featurs when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 3 ++-
>  2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 09c907f..7186665 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -773,6 +773,7 @@ struct intel_csr {
>         func(has_core_ring_freq) sep \
>         func(has_csr) sep \
>         func(has_guc) sep \
> +       func(has_guc_ucode) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
>         func(cursor_needs_physical) sep \
> @@ -2864,7 +2865,7 @@ struct drm_i915_cmd_table {
>   * properties, so we have separate macros to test them.
>   */
>  #define HAS_GUC(dev)           (INTEL_INFO(dev)->has_guc)
> -#define HAS_GUC_UCODE(dev)     (HAS_GUC(dev))
> +#define HAS_GUC_UCODE(dev)     (INTEL_INFO(dev)->has_guc_ucode)
>  #define HAS_GUC_SCHED(dev)     (HAS_GUC(dev))
>
>  #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index f42bf19..8171915 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -327,7 +327,8 @@ static const struct intel_device_info intel_cherryview_info = {
>  #define GEN9_FEATURES  \
>         .gen = 9, \
>         .has_csr = 1, \
> -       .has_guc = 1
> +       .has_guc = 1, \
> +       .has_guc_ucode = 1
>
>  static const struct intel_device_info intel_skylake_info = {
>         BDW_FEATURES,
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
_______________________________________________
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Re: [PATCH 08/23] drm/i915: Move HAS_GUC_SCHED definition to platform definition

[Rodrigo Vivi]

please kill this _sched variation that is just a alias to guc instead....

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 3 ++-
>  2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7186665..2ba441e 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -774,6 +774,7 @@ struct intel_csr {
>         func(has_csr) sep \
>         func(has_guc) sep \
>         func(has_guc_ucode) sep \
> +       func(has_guc_sched) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
>         func(cursor_needs_physical) sep \
> @@ -2866,7 +2867,7 @@ struct drm_i915_cmd_table {
>   */
>  #define HAS_GUC(dev)           (INTEL_INFO(dev)->has_guc)
>  #define HAS_GUC_UCODE(dev)     (INTEL_INFO(dev)->has_guc_ucode)
> -#define HAS_GUC_SCHED(dev)     (HAS_GUC(dev))
> +#define HAS_GUC_SCHED(dev)     (INTEL_INFO(dev)->has_guc_sched)
>
>  #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
>                                     INTEL_INFO(dev)->gen >= 8)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 8171915..f2cb5c3 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -328,7 +328,8 @@ static const struct intel_device_info intel_cherryview_info = {
>         .gen = 9, \
>         .has_csr = 1, \
>         .has_guc = 1, \
> -       .has_guc_ucode = 1
> +       .has_guc_ucode = 1, \
> +       .has_guc_sched = 1
>
>  static const struct intel_device_info intel_skylake_info = {
>         BDW_FEATURES,
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
_______________________________________________
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Re: [PATCH 09/23] drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform struct definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 4 ++--
>  drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
>  2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2ba441e..a326a88 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -775,6 +775,7 @@ struct intel_csr {
>         func(has_guc) sep \
>         func(has_guc_ucode) sep \
>         func(has_guc_sched) sep \
> +       func(has_resource_streamer) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
>         func(cursor_needs_physical) sep \
> @@ -2869,8 +2870,7 @@ struct drm_i915_cmd_table {
>  #define HAS_GUC_UCODE(dev)     (INTEL_INFO(dev)->has_guc_ucode)
>  #define HAS_GUC_SCHED(dev)     (INTEL_INFO(dev)->has_guc_sched)
>
> -#define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
> -                                   INTEL_INFO(dev)->gen >= 8)
> +#define HAS_RESOURCE_STREAMER(dev) (INTEL_INFO(dev)->has_resource_streamer)
>
>  #define HAS_CORE_RING_FREQ(dev)        (INTEL_INFO(dev)->has_core_ring_freq)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index f2cb5c3..f59ad4b 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -268,7 +268,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
>         .has_ddi = 1, \
>         .has_fpga_dbg = 1, \
>         .has_psr = 1, \
> -       .has_runtime_pm = 1
> +       .has_runtime_pm = 1, \
> +       .has_resource_streamer = 1
>
>  static const struct intel_device_info intel_haswell_d_info = {
>         HSW_FEATURES,
> @@ -318,6 +319,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         .is_cherryview = 1,
>         .has_psr = 1,
>         .has_runtime_pm = 1,
> +       .has_resource_streamer = 1,
>         .display_mmio_offset = VLV_DISPLAY_BASE,
>         GEN_CHV_PIPEOFFSETS,
>         CURSOR_OFFSETS,
> @@ -355,6 +357,7 @@ static const struct intel_device_info intel_broxton_info = {
>         .has_fbc = 1,
>         .has_runtime_pm = 1,
>         .has_pooled_eu = 0,
> +       .has_resource_streamer = 1,
>         GEN_DEFAULT_PIPEOFFSETS,
>         IVB_CURSOR_OFFSETS,
>         BDW_COLORS,
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
_______________________________________________
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 10/23] drm/i915: Move HAS_RC6 definition to platform definition

[Rodrigo Vivi]

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform struct definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 5 +++++
>  2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a326a88..75131a0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -775,6 +775,7 @@ struct intel_csr {
>         func(has_guc) sep \
>         func(has_guc_ucode) sep \
>         func(has_guc_sched) sep \
> +       func(has_rc6) sep \
>         func(has_resource_streamer) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
> @@ -2856,7 +2857,7 @@ struct drm_i915_cmd_table {
>  #define HAS_FPGA_DBG_UNCLAIMED(dev)    (INTEL_INFO(dev)->has_fpga_dbg)
>  #define HAS_PSR(dev)           (INTEL_INFO(dev)->has_psr)
>  #define HAS_RUNTIME_PM(dev)    (INTEL_INFO(dev)->has_runtime_pm)
> -#define HAS_RC6(dev)           (INTEL_INFO(dev)->gen >= 6)
> +#define HAS_RC6(dev)           (INTEL_INFO(dev)->has_rc6)
>  #define HAS_RC6p(dev)          (IS_GEN6(dev) || IS_IVYBRIDGE(dev))
>
>  #define HAS_CSR(dev)   (INTEL_INFO(dev)->has_csr)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index f59ad4b..e10fb5c 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -200,6 +200,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>         .has_fbc = 1, \
>         .has_runtime_pm = 1, \
>         .has_core_ring_freq = 1, \
> +       .has_rc6 = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -219,6 +220,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .has_fbc = 1, \
>         .has_core_ring_freq = 1, \
> +       .has_rc6 = 1, \

another case where the GEN7 features based on GEN6 needs to come first.

>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -245,6 +247,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>         .gen = 7, .num_pipes = 2, \
>         .has_psr = 1, \
>         .has_runtime_pm = 1, \
> +       .has_rc6 = 1, \
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -320,6 +323,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         .has_psr = 1,
>         .has_runtime_pm = 1,
>         .has_resource_streamer = 1,
> +       .has_rc6 = 1,
>         .display_mmio_offset = VLV_DISPLAY_BASE,
>         GEN_CHV_PIPEOFFSETS,
>         CURSOR_OFFSETS,
> @@ -358,6 +362,7 @@ static const struct intel_device_info intel_broxton_info = {
>         .has_runtime_pm = 1,
>         .has_pooled_eu = 0,
>         .has_resource_streamer = 1,
> +       .has_rc6 = 1,
>         GEN_DEFAULT_PIPEOFFSETS,
>         IVB_CURSOR_OFFSETS,
>         BDW_COLORS,
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
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Re: [PATCH 11/23] drm/i915: Move HAS_RC6p definition to platform definition

[Rodrigo Vivi]

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform struct definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 7 +++++++
>  2 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 75131a0..a6a22b4 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -776,6 +776,7 @@ struct intel_csr {
>         func(has_guc_ucode) sep \
>         func(has_guc_sched) sep \
>         func(has_rc6) sep \
> +       func(has_rc6p) sep \
>         func(has_resource_streamer) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
> @@ -2858,7 +2859,7 @@ struct drm_i915_cmd_table {
>  #define HAS_PSR(dev)           (INTEL_INFO(dev)->has_psr)
>  #define HAS_RUNTIME_PM(dev)    (INTEL_INFO(dev)->has_runtime_pm)
>  #define HAS_RC6(dev)           (INTEL_INFO(dev)->has_rc6)
> -#define HAS_RC6p(dev)          (IS_GEN6(dev) || IS_IVYBRIDGE(dev))
> +#define HAS_RC6p(dev)          (INTEL_INFO(dev)->has_rc6p)
>
>  #define HAS_CSR(dev)   (INTEL_INFO(dev)->has_csr)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index e10fb5c..c6dae2c 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -201,6 +201,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>         .has_runtime_pm = 1, \
>         .has_core_ring_freq = 1, \
>         .has_rc6 = 1, \
> +       .has_rc6p = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -226,19 +227,25 @@ static const struct intel_device_info intel_sandybridge_m_info = {
>         GEN_DEFAULT_PIPEOFFSETS, \
>         IVB_CURSOR_OFFSETS
>
> +#define IVB_FEATURES  \
> +       .has_rc6p = 1
> +
>  static const struct intel_device_info intel_ivybridge_d_info = {
>         GEN7_FEATURES,
> +       IVB_FEATURES,

another case where I don't like 2 macros together...

>         .is_ivybridge = 1,
>  };
>
>  static const struct intel_device_info intel_ivybridge_m_info = {
>         GEN7_FEATURES,
> +       IVB_FEATURES,
>         .is_ivybridge = 1,
>         .is_mobile = 1,
>  };
>
>  static const struct intel_device_info intel_ivybridge_q_info = {
>         GEN7_FEATURES,
> +       IVB_FEATURES,
>         .is_ivybridge = 1,
>         .num_pipes = 0, /* legal, last one wins */
>  };
> --
> 1.9.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



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Blog: http://blog.vivi.eng.br
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Re: [PATCH 12/23] drm/i915: Move HAS_DP_MST definition to platform definition

[Rodrigo Vivi]

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform struct definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 5 ++---
>  drivers/gpu/drm/i915/i915_pci.c | 4 +++-
>  2 files changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a6a22b4..27f23cc5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -777,6 +777,7 @@ struct intel_csr {
>         func(has_guc_sched) sep \
>         func(has_rc6) sep \
>         func(has_rc6p) sep \
> +       func(has_dp_mst) sep \
>         func(has_resource_streamer) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
> @@ -2851,9 +2852,7 @@ struct drm_i915_cmd_table {
>
>  #define HAS_IPS(dev)           (IS_HSW_ULT(dev) || IS_BROADWELL(dev))
>
> -#define HAS_DP_MST(dev)                (IS_HASWELL(dev) || IS_BROADWELL(dev) || \
> -                                INTEL_INFO(dev)->gen >= 9)

= hsw, bdw, skl, kbl, bxt.

> -
> +#define HAS_DP_MST(dev)                (INTEL_INFO(dev)->has_dp_mst)
>  #define HAS_DDI(dev)           (INTEL_INFO(dev)->has_ddi)
>  #define HAS_FPGA_DBG_UNCLAIMED(dev)    (INTEL_INFO(dev)->has_fpga_dbg)
>  #define HAS_PSR(dev)           (INTEL_INFO(dev)->has_psr)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index c6dae2c..099f134 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -279,7 +279,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
>         .has_fpga_dbg = 1, \
>         .has_psr = 1, \
>         .has_runtime_pm = 1, \
> -       .has_resource_streamer = 1
> +       .has_resource_streamer = 1, \
> +       .has_dp_mst = 1
>
>  static const struct intel_device_info intel_haswell_d_info = {
>         HSW_FEATURES,
> @@ -331,6 +332,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         .has_runtime_pm = 1,
>         .has_resource_streamer = 1,
>         .has_rc6 = 1,
> +       .has_dp_mst = 1,

This is in the wrong block.
Cherryview is gen8. This one here should be in broxton.

>         .display_mmio_offset = VLV_DISPLAY_BASE,
>         GEN_CHV_PIPEOFFSETS,
>         CURSOR_OFFSETS,
> --
> 1.9.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



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Blog: http://blog.vivi.eng.br
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Re: [PATCH 13/23] drm/i915: Introduce GEN5_FEATURES for device info

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Based on the GEN7_FEATURES changes from Ben W.
>
> Use it for ilk.
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c | 21 +++++++++++----------
>  1 file changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 099f134..3844840 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -177,21 +177,22 @@ static const struct intel_device_info intel_pineview_info = {
>         CURSOR_OFFSETS,
>  };
>
> +#define GEN5_FEATURES \
> +       .gen = 5, .num_pipes = 2, \
> +       .need_gfx_hws = 1, .has_hotplug = 1, \
> +       .ring_mask = RENDER_RING | BSD_RING, \
> +       GEN_DEFAULT_PIPEOFFSETS, \
> +       CURSOR_OFFSETS
> +
>  static const struct intel_device_info intel_ironlake_d_info = {
> -       .gen = 5, .num_pipes = 2,
> -       .need_gfx_hws = 1, .has_hotplug = 1,
> -       .ring_mask = RENDER_RING | BSD_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
> +       GEN5_FEATURES
>  };
>
>  static const struct intel_device_info intel_ironlake_m_info = {
> -       .gen = 5, .is_mobile = 1, .num_pipes = 2,
> -       .need_gfx_hws = 1, .has_hotplug = 1,
> +       GEN5_FEATURES,
> +       .is_mobile = 1,
>         .has_fbc = 1,
> -       .ring_mask = RENDER_RING | BSD_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
> +
>  };
>
>  #define GEN6_FEATURES \
> --
> 1.9.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
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Re: [PATCH 13/23] drm/i915: Introduce GEN5_FEATURES for device info

[Rodrigo Vivi]

ops, actually on this one you could do GEN6_FEATURE inherit and extend this.

On Wed, Jul 20, 2016 at 2:22 PM, Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote:
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
>> Based on the GEN7_FEATURES changes from Ben W.
>>
>> Use it for ilk.
>>
>> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_pci.c | 21 +++++++++++----------
>>  1 file changed, 11 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>> index 099f134..3844840 100644
>> --- a/drivers/gpu/drm/i915/i915_pci.c
>> +++ b/drivers/gpu/drm/i915/i915_pci.c
>> @@ -177,21 +177,22 @@ static const struct intel_device_info intel_pineview_info = {
>>         CURSOR_OFFSETS,
>>  };
>>
>> +#define GEN5_FEATURES \
>> +       .gen = 5, .num_pipes = 2, \
>> +       .need_gfx_hws = 1, .has_hotplug = 1, \
>> +       .ring_mask = RENDER_RING | BSD_RING, \
>> +       GEN_DEFAULT_PIPEOFFSETS, \
>> +       CURSOR_OFFSETS
>> +
>>  static const struct intel_device_info intel_ironlake_d_info = {
>> -       .gen = 5, .num_pipes = 2,
>> -       .need_gfx_hws = 1, .has_hotplug = 1,
>> -       .ring_mask = RENDER_RING | BSD_RING,
>> -       GEN_DEFAULT_PIPEOFFSETS,
>> -       CURSOR_OFFSETS,
>> +       GEN5_FEATURES
>>  };
>>
>>  static const struct intel_device_info intel_ironlake_m_info = {
>> -       .gen = 5, .is_mobile = 1, .num_pipes = 2,
>> -       .need_gfx_hws = 1, .has_hotplug = 1,
>> +       GEN5_FEATURES,
>> +       .is_mobile = 1,
>>         .has_fbc = 1,
>> -       .ring_mask = RENDER_RING | BSD_RING,
>> -       GEN_DEFAULT_PIPEOFFSETS,
>> -       CURSOR_OFFSETS,
>> +
>>  };
>>
>>  #define GEN6_FEATURES \
>> --
>> 1.9.1
>>
>> _______________________________________________
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>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br



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Re: [PATCH 14/23] drm/i915: Move HAS_AUX_IRQ definition to platform definition

[Rodrigo Vivi]

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform struct definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 6 ++++++
>  2 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 27f23cc5..26283b5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -778,6 +778,7 @@ struct intel_csr {
>         func(has_rc6) sep \
>         func(has_rc6p) sep \
>         func(has_dp_mst) sep \
> +       func(has_aux_irq) sep \
>         func(has_resource_streamer) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
> @@ -2835,7 +2836,7 @@ struct drm_i915_cmd_table {
>   * legacy irq no. is shared with another device. The kernel then disables that
>   * interrupt source and so prevents the other device from working properly.
>   */
> -#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
> +#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->has_aux_irq)
>  #define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
>
>  /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 3844840..9a5cb33 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -180,6 +180,7 @@ static const struct intel_device_info intel_pineview_info = {
>  #define GEN5_FEATURES \
>         .gen = 5, .num_pipes = 2, \
>         .need_gfx_hws = 1, .has_hotplug = 1, \
> +       .has_aux_irq = 1, \
>         .ring_mask = RENDER_RING | BSD_RING, \
>         GEN_DEFAULT_PIPEOFFSETS, \
>         CURSOR_OFFSETS
> @@ -203,6 +204,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>         .has_core_ring_freq = 1, \
>         .has_rc6 = 1, \
>         .has_rc6p = 1, \
> +       .has_aux_irq = 1, \

GEN6 based on GEN5 should come first

>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -223,6 +225,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
>         .has_fbc = 1, \
>         .has_core_ring_freq = 1, \
>         .has_rc6 = 1, \
> +       .has_aux_irq = 1, \

GEN7 based on GEN6 should come first

>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -256,6 +259,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>         .has_psr = 1, \
>         .has_runtime_pm = 1, \
>         .has_rc6 = 1, \
> +       .has_aux_irq = 1, \
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -334,6 +338,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         .has_resource_streamer = 1,
>         .has_rc6 = 1,
>         .has_dp_mst = 1,
> +       .has_aux_irq = 1,
>         .display_mmio_offset = VLV_DISPLAY_BASE,
>         GEN_CHV_PIPEOFFSETS,
>         CURSOR_OFFSETS,
> @@ -373,6 +378,7 @@ static const struct intel_device_info intel_broxton_info = {
>         .has_pooled_eu = 0,
>         .has_resource_streamer = 1,
>         .has_rc6 = 1,
> +       .has_aux_irq = 1,
>         GEN_DEFAULT_PIPEOFFSETS,
>         IVB_CURSOR_OFFSETS,
>         BDW_COLORS,
> --
> 1.9.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
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Blog: http://blog.vivi.eng.br
_______________________________________________
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Re: [PATCH 15/23] drm/i915: Move HAS_GMBUS_IRQ definition to platform definition

[Rodrigo Vivi]

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform struct definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 6 ++++++
>  2 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 26283b5..a58765b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -779,6 +779,7 @@ struct intel_csr {
>         func(has_rc6p) sep \
>         func(has_dp_mst) sep \
>         func(has_aux_irq) sep \
> +       func(has_gmbus_irq) sep \
>         func(has_resource_streamer) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
> @@ -2837,7 +2838,7 @@ struct drm_i915_cmd_table {
>   * interrupt source and so prevents the other device from working properly.
>   */
>  #define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->has_aux_irq)
> -#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
> +#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->has_gmbus_irq)
>
>  /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
>   * rows, which changed the alignment requirements and fence programming.
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 9a5cb33..4652e2d 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -181,6 +181,7 @@ static const struct intel_device_info intel_pineview_info = {
>         .gen = 5, .num_pipes = 2, \
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .has_aux_irq = 1, \
> +       .has_gmbus_irq = 1, \
>         .ring_mask = RENDER_RING | BSD_RING, \
>         GEN_DEFAULT_PIPEOFFSETS, \
>         CURSOR_OFFSETS
> @@ -205,6 +206,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>         .has_rc6 = 1, \
>         .has_rc6p = 1, \
>         .has_aux_irq = 1, \
> +       .has_gmbus_irq = 1, \

same as aux_irq

>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -226,6 +228,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
>         .has_core_ring_freq = 1, \
>         .has_rc6 = 1, \
>         .has_aux_irq = 1, \
> +       .has_gmbus_irq = 1, \

same as aux_irq

>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -260,6 +263,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>         .has_runtime_pm = 1, \
>         .has_rc6 = 1, \
>         .has_aux_irq = 1, \
> +       .has_gmbus_irq = 1, \
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -339,6 +343,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         .has_rc6 = 1,
>         .has_dp_mst = 1,
>         .has_aux_irq = 1,
> +       .has_gmbus_irq = 1,
>         .display_mmio_offset = VLV_DISPLAY_BASE,
>         GEN_CHV_PIPEOFFSETS,
>         CURSOR_OFFSETS,
> @@ -379,6 +384,7 @@ static const struct intel_device_info intel_broxton_info = {
>         .has_resource_streamer = 1,
>         .has_rc6 = 1,
>         .has_aux_irq = 1,
> +       .has_gmbus_irq = 1,
>         GEN_DEFAULT_PIPEOFFSETS,
>         IVB_CURSOR_OFFSETS,
>         BDW_COLORS,
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
_______________________________________________
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Re: [PATCH 16/23] drm/i915: Introduce GEN4_FEATURES for device info

[Rodrigo Vivi]

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Based on the GEN7_FEATURES changes from Ben W.
>
> Use it for i965g, i965gm, g45,and gm45.
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c | 51 ++++++++++++++++++++++-------------------
>  1 file changed, 28 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 4652e2d..c4fdb4d 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -123,23 +123,34 @@ static const struct intel_device_info intel_i945gm_info = {
>         CURSOR_OFFSETS,
>  };
>
> +#define GEN4_FEATURES \
> +       .gen = 4, .num_pipes = 2, \
> +       .has_hotplug = 1, \
> +       GEN_DEFAULT_PIPEOFFSETS, \
> +       CURSOR_OFFSETS
> +

I like this

> +#define GEN4_G45_FEATURES \
> +       .is_g4x = 1, .need_gfx_hws = 1, \
> +       .has_pipe_cxsr = 1, \
> +       .ring_mask = RENDER_RING | BSD_RING
> +
> +#define GEN4_i965_FEATURES \
> +       .has_overlay = 1, \
> +       .ring_mask = RENDER_RING
> +

but I believe these should be handled separated/individually
unless they inherit GEN4_FEATURES somehow...

>  static const struct intel_device_info intel_i965g_info = {
> -       .gen = 4, .is_broadwater = 1, .num_pipes = 2,
> -       .has_hotplug = 1,
> -       .has_overlay = 1,
> -       .ring_mask = RENDER_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
> +       GEN4_FEATURES,
> +       GEN4_i965_FEATURES,
> +       .is_broadwater = 1,
> +
>  };
>
>  static const struct intel_device_info intel_i965gm_info = {
> -       .gen = 4, .is_crestline = 1, .num_pipes = 2,
> -       .is_mobile = 1, .has_fbc = 1, .has_hotplug = 1,
> -       .has_overlay = 1,
> +       GEN4_FEATURES,
> +       GEN4_i965_FEATURES,

... to avoid these 2 macros here.

> +       .is_crestline = 1,
> +       .is_mobile = 1, .has_fbc = 1,
>         .supports_tv = 1,
> -       .ring_mask = RENDER_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
>  };
>
>  static const struct intel_device_info intel_g33_info = {
> @@ -152,21 +163,15 @@ static const struct intel_device_info intel_g33_info = {
>  };
>
>  static const struct intel_device_info intel_g45_info = {
> -       .gen = 4, .is_g4x = 1, .need_gfx_hws = 1, .num_pipes = 2,
> -       .has_pipe_cxsr = 1, .has_hotplug = 1,
> -       .ring_mask = RENDER_RING | BSD_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
> +       GEN4_FEATURES,
> +       GEN4_G45_FEATURES,
>  };
>
>  static const struct intel_device_info intel_gm45_info = {
> -       .gen = 4, .is_g4x = 1, .num_pipes = 2,
> -       .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1,
> -       .has_pipe_cxsr = 1, .has_hotplug = 1,
> +       GEN4_FEATURES,
> +       GEN4_G45_FEATURES,
> +       .is_mobile = 1, .has_fbc = 1,
>         .supports_tv = 1,
> -       .ring_mask = RENDER_RING | BSD_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
>  };
>
>  static const struct intel_device_info intel_pineview_info = {
> --
> 1.9.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



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Blog: http://blog.vivi.eng.br
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Re: [PATCH 17/23] drm/i915: Introduce GEN3_FEATURES for device info

[Rodrigo Vivi]

same as previous patch

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Based on the GEN7_FEATURES changes from Ben W.
>
> Use it for i915g, i915gm, i945g, i945gm, g33 and pineview.
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c | 58 ++++++++++++++++++++---------------------
>  1 file changed, 29 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index c4fdb4d..5c490f8 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -88,39 +88,42 @@ static const struct intel_device_info intel_i865g_info = {
>         CURSOR_OFFSETS,
>  };
>
> +#define GEN3_FEATURES \
> +       .gen = 3, .num_pipes = 2,\
> +       .ring_mask = RENDER_RING, \
> +       GEN_DEFAULT_PIPEOFFSETS, \
> +       CURSOR_OFFSETS
> +
> +#define GEN3_i9X5_FEATURES \
> +       .cursor_needs_physical = 1, \
> +       .has_overlay = 1, \
> +       .overlay_needs_physical = 1
> +
>  static const struct intel_device_info intel_i915g_info = {
> -       .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
> -       .has_overlay = 1, .overlay_needs_physical = 1,
> -       .ring_mask = RENDER_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
> +       GEN3_FEATURES,
> +       GEN3_i9X5_FEATURES,
> +       .is_i915g = 1,
> +
>  };
>  static const struct intel_device_info intel_i915gm_info = {
> -       .gen = 3, .is_mobile = 1, .num_pipes = 2,
> -       .cursor_needs_physical = 1,
> -       .has_overlay = 1, .overlay_needs_physical = 1,
> +       GEN3_FEATURES,
> +       GEN3_i9X5_FEATURES,
> +       .is_mobile = 1,
>         .supports_tv = 1,
>         .has_fbc = 1,
> -       .ring_mask = RENDER_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
>  };
>  static const struct intel_device_info intel_i945g_info = {
> -       .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
> -       .has_overlay = 1, .overlay_needs_physical = 1,
> -       .ring_mask = RENDER_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
> +       GEN3_FEATURES,
> +       GEN3_i9X5_FEATURES,
> +       .has_hotplug = 1,
>  };
>  static const struct intel_device_info intel_i945gm_info = {
> -       .gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
> -       .has_hotplug = 1, .cursor_needs_physical = 1,
> -       .has_overlay = 1, .overlay_needs_physical = 1,
> +       GEN3_FEATURES,
> +       GEN3_i9X5_FEATURES,
> +       .is_i945gm = 1, .is_mobile = 1,
> +       .has_hotplug = 1,
>         .supports_tv = 1,
>         .has_fbc = 1,
> -       .ring_mask = RENDER_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
>  };
>
>  #define GEN4_FEATURES \
> @@ -154,12 +157,10 @@ static const struct intel_device_info intel_i965gm_info = {
>  };
>
>  static const struct intel_device_info intel_g33_info = {
> -       .gen = 3, .is_g33 = 1, .num_pipes = 2,
> +       GEN3_FEATURES,
> +       .is_g33 = 1,
>         .need_gfx_hws = 1, .has_hotplug = 1,
>         .has_overlay = 1,
> -       .ring_mask = RENDER_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
>  };
>
>  static const struct intel_device_info intel_g45_info = {
> @@ -175,11 +176,10 @@ static const struct intel_device_info intel_gm45_info = {
>  };
>
>  static const struct intel_device_info intel_pineview_info = {
> -       .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .num_pipes = 2,
> +       GEN3_FEATURES,
> +       .is_g33 = 1, .is_pineview = 1, .is_mobile = 1,
>         .need_gfx_hws = 1, .has_hotplug = 1,
>         .has_overlay = 1,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
>  };
>
>  #define GEN5_FEATURES \
> --
> 1.9.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
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Blog: http://blog.vivi.eng.br
_______________________________________________
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Re: [PATCH 18/23] drm/i915: Introduce GEN2 FEATURES for device info

[Rodrigo Vivi]

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Based on the GEN7_FEATURES changes from Ben W.
>
> Use it for 830, 845g, i85x, i865g.
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c | 33 +++++++++++++--------------------
>  1 file changed, 13 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 5c490f8..50569c1 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -54,38 +54,31 @@
>  #define CHV_COLORS \
>         .color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
>
> +#define GEN2_FEATURES \
> +       .gen = 2, .num_pipes = 1, \
> +       .has_overlay = 1, .overlay_needs_physical = 1, \
> +       .ring_mask = RENDER_RING, \
> +       GEN_DEFAULT_PIPEOFFSETS, \
> +       CURSOR_OFFSETS
> +
>  static const struct intel_device_info intel_i830_info = {
> -       .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
> -       .has_overlay = 1, .overlay_needs_physical = 1,
> -       .ring_mask = RENDER_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
> +       GEN2_FEATURES,
> +       .is_mobile = 1, .cursor_needs_physical = 1,
>  };
>
>  static const struct intel_device_info intel_845g_info = {
> -       .gen = 2, .num_pipes = 1,
> -       .has_overlay = 1, .overlay_needs_physical = 1,
> -       .ring_mask = RENDER_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
> +       GEN2_FEATURES,
>  };
>
>  static const struct intel_device_info intel_i85x_info = {
> -       .gen = 2, .is_i85x = 1, .is_mobile = 1, .num_pipes = 2,
> +       GEN2_FEATURES,

this patch is reducing the number of supported pipes for this platform.

> +       .is_i85x = 1, .is_mobile = 1,
>         .cursor_needs_physical = 1,
> -       .has_overlay = 1, .overlay_needs_physical = 1,
>         .has_fbc = 1,
> -       .ring_mask = RENDER_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
>  };
>
>  static const struct intel_device_info intel_i865g_info = {
> -       .gen = 2, .num_pipes = 1,
> -       .has_overlay = 1, .overlay_needs_physical = 1,
> -       .ring_mask = RENDER_RING,
> -       GEN_DEFAULT_PIPEOFFSETS,
> -       CURSOR_OFFSETS,
> +       GEN2_FEATURES,
>  };
>
>  #define GEN3_FEATURES \
> --
> 1.9.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



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Blog: http://blog.vivi.eng.br
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Re: [PATCH 19/23] drm/915: Move HAS_FW_BLC definition to platform

[Rodrigo Vivi]

this patch could be cleaner if on gen inherit and extend the previous.

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform definition allows for
>         - standard placae when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h |  3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 10 +++++++++-
>  2 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a58765b..8f5b9fd 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -780,6 +780,7 @@ struct intel_csr {
>         func(has_dp_mst) sep \
>         func(has_aux_irq) sep \
>         func(has_gmbus_irq) sep \
> +       func(has_fw_blc) sep \
>         func(has_resource_streamer) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
> @@ -2848,7 +2849,7 @@ struct drm_i915_cmd_table {
>  #define SUPPORTS_TV(dev)               (INTEL_INFO(dev)->supports_tv)
>  #define I915_HAS_HOTPLUG(dev)           (INTEL_INFO(dev)->has_hotplug)
>
> -#define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)
> +#define HAS_FW_BLC(dev) (INTEL_INFO(dev)->has_fw_blc)
>  #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
>  #define HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 50569c1..b44d162 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -82,7 +82,8 @@ static const struct intel_device_info intel_i865g_info = {
>  };
>
>  #define GEN3_FEATURES \
> -       .gen = 3, .num_pipes = 2,\
> +       .gen = 3, .num_pipes = 2, \
> +       .has_fw_blc = 1, \
>         .ring_mask = RENDER_RING, \
>         GEN_DEFAULT_PIPEOFFSETS, \
>         CURSOR_OFFSETS
> @@ -122,6 +123,7 @@ static const struct intel_device_info intel_i945gm_info = {
>  #define GEN4_FEATURES \
>         .gen = 4, .num_pipes = 2, \
>         .has_hotplug = 1, \
> +       .has_fw_blc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
>         CURSOR_OFFSETS
>
> @@ -180,6 +182,7 @@ static const struct intel_device_info intel_pineview_info = {
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .has_aux_irq = 1, \
>         .has_gmbus_irq = 1, \
> +       .has_fw_blc = 1, \
>         .ring_mask = RENDER_RING | BSD_RING, \
>         GEN_DEFAULT_PIPEOFFSETS, \
>         CURSOR_OFFSETS
> @@ -205,6 +208,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>         .has_rc6p = 1, \
>         .has_aux_irq = 1, \
>         .has_gmbus_irq = 1, \
> +       .has_fw_blc = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -227,6 +231,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
>         .has_rc6 = 1, \
>         .has_aux_irq = 1, \
>         .has_gmbus_irq = 1, \
> +       .has_fw_blc = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -262,6 +267,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>         .has_rc6 = 1, \
>         .has_aux_irq = 1, \
>         .has_gmbus_irq = 1, \
> +       .has_fw_blc = 1, \
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -342,6 +348,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         .has_dp_mst = 1,
>         .has_aux_irq = 1,
>         .has_gmbus_irq = 1,
> +       .has_fw_blc = 1,
>         .display_mmio_offset = VLV_DISPLAY_BASE,
>         GEN_CHV_PIPEOFFSETS,
>         CURSOR_OFFSETS,
> @@ -383,6 +390,7 @@ static const struct intel_device_info intel_broxton_info = {
>         .has_rc6 = 1,
>         .has_aux_irq = 1,
>         .has_gmbus_irq = 1,
> +       .has_fw_blc = 1,
>         GEN_DEFAULT_PIPEOFFSETS,
>         IVB_CURSOR_OFFSETS,
>         BDW_COLORS,
> --
> 1.9.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
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Blog: http://blog.vivi.eng.br
_______________________________________________
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Re: [PATCH 20/23] drm/i915: Move HAS_HW_CONTEXTS definition to platform

[Rodrigo Vivi]

this patch could be cleaner if on gen inherit and extend the previous.

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumpig struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 5 +++++
>  2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 8f5b9fd..06d2850 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -781,6 +781,7 @@ struct intel_csr {
>         func(has_aux_irq) sep \
>         func(has_gmbus_irq) sep \
>         func(has_fw_blc) sep \
> +       func(has_hw_contexts) sep \
>         func(has_resource_streamer) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
> @@ -2814,7 +2815,7 @@ struct drm_i915_cmd_table {
>                                  HAS_EDRAM(dev))
>  #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
>
> -#define HAS_HW_CONTEXTS(dev)   (INTEL_INFO(dev)->gen >= 6)
> +#define HAS_HW_CONTEXTS(dev)   (INTEL_INFO(dev)->has_hw_contexts)
>  #define HAS_LOGICAL_RING_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 8)
>  #define USES_PPGTT(dev)                (i915.enable_ppgtt)
>  #define USES_FULL_PPGTT(dev)   (i915.enable_ppgtt >= 2)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index b44d162..26ff54e 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -209,6 +209,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>         .has_aux_irq = 1, \
>         .has_gmbus_irq = 1, \
>         .has_fw_blc = 1, \
> +       .has_hw_contexts = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -232,6 +233,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
>         .has_aux_irq = 1, \
>         .has_gmbus_irq = 1, \
>         .has_fw_blc = 1, \
> +       .has_hw_contexts = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .has_llc = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
> @@ -268,6 +270,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>         .has_aux_irq = 1, \
>         .has_gmbus_irq = 1, \
>         .has_fw_blc = 1, \
> +       .has_hw_contexts = 1, \
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -349,6 +352,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         .has_aux_irq = 1,
>         .has_gmbus_irq = 1,
>         .has_fw_blc = 1,
> +       .has_hw_contexts = 1,
>         .display_mmio_offset = VLV_DISPLAY_BASE,
>         GEN_CHV_PIPEOFFSETS,
>         CURSOR_OFFSETS,
> @@ -391,6 +395,7 @@ static const struct intel_device_info intel_broxton_info = {
>         .has_aux_irq = 1,
>         .has_gmbus_irq = 1,
>         .has_fw_blc = 1,
> +       .has_hw_contexts = 1,
>         GEN_DEFAULT_PIPEOFFSETS,
>         IVB_CURSOR_OFFSETS,
>         BDW_COLORS,
> --
> 1.9.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
_______________________________________________
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Re: [PATCH 21/23] drm/i915: Move HAS_LOGICAL_RING_CONTEXTS definition to platform definition

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
>  2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 06d2850..8f93a93 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -782,6 +782,7 @@ struct intel_csr {
>         func(has_gmbus_irq) sep \
>         func(has_fw_blc) sep \
>         func(has_hw_contexts) sep \
> +       func(has_logical_ring_contexts) sep \
>         func(has_resource_streamer) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
> @@ -2816,7 +2817,7 @@ struct drm_i915_cmd_table {
>  #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
>
>  #define HAS_HW_CONTEXTS(dev)   (INTEL_INFO(dev)->has_hw_contexts)
> -#define HAS_LOGICAL_RING_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 8)
> +#define HAS_LOGICAL_RING_CONTEXTS(dev) (INTEL_INFO(dev)->has_logical_ring_contexts)
>  #define USES_PPGTT(dev)                (i915.enable_ppgtt)
>  #define USES_FULL_PPGTT(dev)   (i915.enable_ppgtt >= 2)
>  #define USES_FULL_48BIT_PPGTT(dev)     (i915.enable_ppgtt == 3)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 26ff54e..d90cb47 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -311,7 +311,8 @@ static const struct intel_device_info intel_haswell_m_info = {
>
>  #define BDW_FEATURES \
>         HSW_FEATURES, \
> -       BDW_COLORS
> +       BDW_COLORS, \
> +       .has_logical_ring_contexts = 1
>
>  static const struct intel_device_info intel_broadwell_d_info = {
>         BDW_FEATURES,
> @@ -353,6 +354,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         .has_gmbus_irq = 1,
>         .has_fw_blc = 1,
>         .has_hw_contexts = 1,
> +       .has_logical_ring_contexts = 1,
>         .display_mmio_offset = VLV_DISPLAY_BASE,
>         GEN_CHV_PIPEOFFSETS,
>         CURSOR_OFFSETS,
> @@ -396,6 +398,7 @@ static const struct intel_device_info intel_broxton_info = {
>         .has_gmbus_irq = 1,
>         .has_fw_blc = 1,
>         .has_hw_contexts = 1,
> +       .has_logical_ring_contexts = 1,
>         GEN_DEFAULT_PIPEOFFSETS,
>         IVB_CURSOR_OFFSETS,
>         BDW_COLORS,
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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Re: [PATCH 22/23] drm/i915: Move HAS_L3_DPF definition to platform definition

[Rodrigo Vivi]

This patch is adding support to l3_dpf to bdw, skl and kbl...

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c | 6 ++++--
>  2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 8f93a93..7075f76 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -783,6 +783,7 @@ struct intel_csr {
>         func(has_fw_blc) sep \
>         func(has_hw_contexts) sep \
>         func(has_logical_ring_contexts) sep \
> +       func(has_l3_dpf) sep \
>         func(has_resource_streamer) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
> @@ -2910,7 +2911,7 @@ struct drm_i915_cmd_table {
>                                IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
>
>  /* DPF == dynamic parity feature */
> -#define HAS_L3_DPF(dev) (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
> +#define HAS_L3_DPF(dev) (INTEL_INFO(dev)->has_l3_dpf)
>  #define NUM_L3_SLICES(dev) (IS_HSW_GT3(dev) ? 2 : HAS_L3_DPF(dev))
>
>  #define GT_FREQUENCY_MULTIPLIER 50
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index d90cb47..c03cb97 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -240,7 +240,8 @@ static const struct intel_device_info intel_sandybridge_m_info = {
>         IVB_CURSOR_OFFSETS
>
>  #define IVB_FEATURES  \
> -       .has_rc6p = 1
> +       .has_rc6p = 1, \
> +       .has_l3_dpf = 1
>
>  static const struct intel_device_info intel_ivybridge_d_info = {
>         GEN7_FEATURES,
> @@ -296,7 +297,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
>         .has_psr = 1, \
>         .has_runtime_pm = 1, \
>         .has_resource_streamer = 1, \
> -       .has_dp_mst = 1
> +       .has_dp_mst = 1, \
> +       .has_l3_dpf = 1
>
>  static const struct intel_device_info intel_haswell_d_info = {
>         HSW_FEATURES,
> --
> 1.9.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
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Blog: http://blog.vivi.eng.br
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Re: [PATCH 23/23] drm/i915: Move HAS_GMCH_DISPLAY definition to platform

[Rodrigo Vivi]

well... this is where one inheriting and extending the previous make
it a bit ugly...
you would need to set it to 0 at GEN5_FEATURES. maybe with a comment
/* support discontinued */


On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 4 ++--
>  drivers/gpu/drm/i915/i915_pci.c | 5 +++++
>  2 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7075f76..b9d0478 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -784,6 +784,7 @@ struct intel_csr {
>         func(has_hw_contexts) sep \
>         func(has_logical_ring_contexts) sep \
>         func(has_l3_dpf) sep \
> +       func(has_gmch_display) sep \
>         func(has_resource_streamer) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
> @@ -2907,8 +2908,7 @@ struct drm_i915_cmd_table {
>  #define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP)
>  #define HAS_PCH_SPLIT(dev) (INTEL_PCH_TYPE(dev) != PCH_NONE)
>
> -#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->gen < 5 || \
> -                              IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
> +#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->has_gmch_display)
>
>  /* DPF == dynamic parity feature */
>  #define HAS_L3_DPF(dev) (INTEL_INFO(dev)->has_l3_dpf)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index c03cb97..59f3e35 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -57,6 +57,7 @@
>  #define GEN2_FEATURES \
>         .gen = 2, .num_pipes = 1, \
>         .has_overlay = 1, .overlay_needs_physical = 1, \
> +       .has_gmch_display = 1, \
>         .ring_mask = RENDER_RING, \
>         GEN_DEFAULT_PIPEOFFSETS, \
>         CURSOR_OFFSETS
> @@ -84,6 +85,7 @@ static const struct intel_device_info intel_i865g_info = {
>  #define GEN3_FEATURES \
>         .gen = 3, .num_pipes = 2, \
>         .has_fw_blc = 1, \
> +       .has_gmch_display = 1, \
>         .ring_mask = RENDER_RING, \
>         GEN_DEFAULT_PIPEOFFSETS, \
>         CURSOR_OFFSETS
> @@ -124,6 +126,7 @@ static const struct intel_device_info intel_i945gm_info = {
>         .gen = 4, .num_pipes = 2, \
>         .has_hotplug = 1, \
>         .has_fw_blc = 1, \
> +       .has_gmch_display = 1, \
>         GEN_DEFAULT_PIPEOFFSETS, \
>         CURSOR_OFFSETS
>
> @@ -272,6 +275,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>         .has_gmbus_irq = 1, \
>         .has_fw_blc = 1, \
>         .has_hw_contexts = 1, \
> +       .has_gmch_display = 1, \
>         .need_gfx_hws = 1, .has_hotplug = 1, \
>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>         .display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -357,6 +361,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         .has_fw_blc = 1,
>         .has_hw_contexts = 1,
>         .has_logical_ring_contexts = 1,
> +       .has_gmch_display = 1,
>         .display_mmio_offset = VLV_DISPLAY_BASE,
>         GEN_CHV_PIPEOFFSETS,
>         CURSOR_OFFSETS,
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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✗ Ro.CI.BAT: failure for drm/i915: Organize most GPU features by platform

[Patchwork]

== Series Details ==

Series: drm/i915: Organize most GPU features by platform
URL   : https://patchwork.freedesktop.org/series/10102/
State : failure

== Summary ==

Series 10102v1 drm/i915: Organize most GPU features by platform
http://patchwork.freedesktop.org/api/1.0/series/10102/revisions/1/mbox

Test drv_module_reload_basic:
                pass       -> SKIP       (ro-hsw-i3-4010u)
Test gem_sync:
        Subgroup basic-store-each:
                pass       -> DMESG-FAIL (ro-bdw-i7-5600u)
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-a:
                pass       -> INCOMPLETE (fi-snb-i7-2600)
        Subgroup suspend-read-crc-pipe-a:
                pass       -> INCOMPLETE (fi-skl-i5-6260u)
        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (fi-skl-i7-6700k)

fi-hsw-i7-4770k  total:244  pass:216  dwarn:0   dfail:0   fail:8   skip:20 
fi-kbl-qkkr      total:244  pass:180  dwarn:29  dfail:1   fail:7   skip:27 
fi-skl-i5-6260u  total:196  pass:185  dwarn:0   dfail:0   fail:0   skip:10 
fi-skl-i7-6700k  total:202  pass:177  dwarn:0   dfail:0   fail:0   skip:24 
fi-snb-i7-2600   total:197  pass:164  dwarn:0   dfail:0   fail:0   skip:32 
ro-bdw-i5-5250u  total:244  pass:219  dwarn:4   dfail:0   fail:8   skip:13 
ro-bdw-i7-5557U  total:244  pass:220  dwarn:3   dfail:0   fail:8   skip:13 
ro-bdw-i7-5600u  total:244  pass:203  dwarn:0   dfail:1   fail:8   skip:32 
ro-bsw-n3050     total:218  pass:173  dwarn:0   dfail:0   fail:2   skip:42 
ro-byt-n2820     total:244  pass:197  dwarn:0   dfail:0   fail:9   skip:38 
ro-hsw-i3-4010u  total:244  pass:211  dwarn:0   dfail:0   fail:8   skip:25 
ro-hsw-i7-4770r  total:244  pass:212  dwarn:0   dfail:0   fail:8   skip:24 
ro-ilk-i7-620lm  total:244  pass:172  dwarn:0   dfail:0   fail:9   skip:63 
ro-ilk1-i5-650   total:239  pass:172  dwarn:0   dfail:0   fail:9   skip:58 
ro-ivb-i7-3770   total:244  pass:203  dwarn:0   dfail:0   fail:8   skip:33 
ro-skl3-i5-6260u total:244  pass:224  dwarn:0   dfail:0   fail:8   skip:12 
ro-snb-i7-2620M  total:244  pass:193  dwarn:0   dfail:0   fail:9   skip:42 

Results at /archive/results/CI_IGT_test/RO_Patchwork_1550/

621e9dc drm-intel-nightly: 2016y-07m-20d-19h-19m-37s UTC integration manifest
6b69cd9 drm/i915: Move HAS_GMCH_DISPLAY definition to platform
34a1a9d drm/i915: Move HAS_L3_DPF definition to platform definition
891b835 drm/i915: Move HAS_LOGICAL_RING_CONTEXTS definition to platform definition
525ba6d drm/i915: Move HAS_HW_CONTEXTS definition to platform
82106c5 drm/915: Move HAS_FW_BLC definition to platform
394c735 drm/i915: Introduce GEN2 FEATURES for device info
3d17c64 drm/i915: Introduce GEN3_FEATURES for device info
effe44b drm/i915: Introduce GEN4_FEATURES for device info
f32cde2 drm/i915: Move HAS_GMBUS_IRQ definition to platform definition
0c3e26f drm/i915: Move HAS_AUX_IRQ definition to platform definition
6186b95 drm/i915: Introduce GEN5_FEATURES for device info
a0faaa1 drm/i915: Move HAS_DP_MST definition to platform definition
13a1cf5 drm/i915: Move HAS_RC6p definition to platform definition
cdf099d drm/i915: Move HAS_RC6 definition to platform definition
f5cfe9b drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition
7aa4599 drm/i915: Move HAS_GUC_SCHED definition to platform definition
2b921d7 drm/i915: Move HAS_GUC_UCODE definition to platform definition
02a34e1 drm/i915: Move HAS_GUC definition to platform definition
8330d3d drm/i915: Move HAS_CSR definition to platform definition
d1fff4b drm/i915: Move HAS_CORE_RING_FREQ definition to platform definition
07cc1f5 drm/i915: Move HAS_RUNTIME_PM definition to platform
1a75b86 drm/i915: Introduce GEN6_FEATURES for device info
2598bac drm/i915: Move HAS_PSR definition to platform struct definition

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Re: [PATCH 07/23] drm/i915: Move HAS_GUC_UCODE definition to platform definition

[Tvrtko Ursulin]

On 20/07/16 22:07, Rodrigo Vivi wrote:
> please kill this _ucode variation that is just a alias to guc instead....

Not sure, it was added with a particular goal. Cc Dave in case he wants 
to comment.

Regards,

Tvrtko

> On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
>> Moving all GPU features to the platform definition allows for
>>          - standard place when adding new features from new platforms
>>          - possible to see supported featurs when dumping struct
>>            definitions
>>
>> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>>   drivers/gpu/drm/i915/i915_pci.c | 3 ++-
>>   2 files changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 09c907f..7186665 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -773,6 +773,7 @@ struct intel_csr {
>>          func(has_core_ring_freq) sep \
>>          func(has_csr) sep \
>>          func(has_guc) sep \
>> +       func(has_guc_ucode) sep \
>>          func(has_pipe_cxsr) sep \
>>          func(has_hotplug) sep \
>>          func(cursor_needs_physical) sep \
>> @@ -2864,7 +2865,7 @@ struct drm_i915_cmd_table {
>>    * properties, so we have separate macros to test them.
>>    */
>>   #define HAS_GUC(dev)           (INTEL_INFO(dev)->has_guc)
>> -#define HAS_GUC_UCODE(dev)     (HAS_GUC(dev))
>> +#define HAS_GUC_UCODE(dev)     (INTEL_INFO(dev)->has_guc_ucode)
>>   #define HAS_GUC_SCHED(dev)     (HAS_GUC(dev))
>>
>>   #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
>> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>> index f42bf19..8171915 100644
>> --- a/drivers/gpu/drm/i915/i915_pci.c
>> +++ b/drivers/gpu/drm/i915/i915_pci.c
>> @@ -327,7 +327,8 @@ static const struct intel_device_info intel_cherryview_info = {
>>   #define GEN9_FEATURES  \
>>          .gen = 9, \
>>          .has_csr = 1, \
>> -       .has_guc = 1
>> +       .has_guc = 1, \
>> +       .has_guc_ucode = 1
>>
>>   static const struct intel_device_info intel_skylake_info = {
>>          BDW_FEATURES,
>> --
>> 1.9.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
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Re: [PATCH 10/23] drm/i915: Move HAS_RC6 definition to platform definition

[Tvrtko Ursulin]

On 20/07/16 18:40, Carlos Santa wrote:
> Moving all GPU features to the platform struct definition allows for
> 	- standard place when adding new features from new platforms
> 	- possible to see supported features when dumping struct
> 	  definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>   drivers/gpu/drm/i915/i915_pci.c | 5 +++++
>   2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a326a88..75131a0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -775,6 +775,7 @@ struct intel_csr {
>   	func(has_guc) sep \
>   	func(has_guc_ucode) sep \
>   	func(has_guc_sched) sep \
> +	func(has_rc6) sep \
>   	func(has_resource_streamer) sep \
>   	func(has_pipe_cxsr) sep \
>   	func(has_hotplug) sep \
> @@ -2856,7 +2857,7 @@ struct drm_i915_cmd_table {
>   #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
>   #define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
>   #define HAS_RUNTIME_PM(dev)	(INTEL_INFO(dev)->has_runtime_pm)
> -#define HAS_RC6(dev)		(INTEL_INFO(dev)->gen >= 6)
> +#define HAS_RC6(dev)		(INTEL_INFO(dev)->has_rc6)
>   #define HAS_RC6p(dev)		(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
>
>   #define HAS_CSR(dev)	(INTEL_INFO(dev)->has_csr)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index f59ad4b..e10fb5c 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -200,6 +200,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>   	.has_fbc = 1, \
>   	.has_runtime_pm = 1, \
>   	.has_core_ring_freq = 1, \
> +	.has_rc6 = 1, \

This platform claims to be Gen5 so no RC6.

I have a slight reservation on all this because sometimes it is very 
useful to see that "INTEL_INFO(dev)->gen >= 6". When sprinkled around 
like here it becomes harder to figure out which feature is supported by 
which platforms.

Once I tried something like this work (mind you I was concentrating only 
on HAS_ and IS_ macros which contain multiple conditionals - it was an 
excercise in reducing multiple conditionals at runtime), I decided to 
keep the macro but renamed it to have a leading underscore. And I did 
the assignment to device_info in an appropriate place, for example:

device_info->has_rc6 = _HAS_RC6(dev_priv);

For completeness:

#define _HAS_RC6(dev)		(INTEL_INFO(dev)->gen >= 6)
#define HAS_RC6(dev)		(INTEL_INFO(dev)->has_rc6)

I was not too happy with that approach either, but I think the downside 
I mentioned above is real.

Regards,

Tvrtko

>   	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>   	.has_llc = 1, \
>   	GEN_DEFAULT_PIPEOFFSETS, \
> @@ -219,6 +220,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
>   	.need_gfx_hws = 1, .has_hotplug = 1, \
>   	.has_fbc = 1, \
>   	.has_core_ring_freq = 1, \
> +	.has_rc6 = 1, \
>   	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>   	.has_llc = 1, \
>   	GEN_DEFAULT_PIPEOFFSETS, \
> @@ -245,6 +247,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>   	.gen = 7, .num_pipes = 2, \
>   	.has_psr = 1, \
>   	.has_runtime_pm = 1, \
> +	.has_rc6 = 1, \
>   	.need_gfx_hws = 1, .has_hotplug = 1, \
>   	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>   	.display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -320,6 +323,7 @@ static const struct intel_device_info intel_cherryview_info = {
>   	.has_psr = 1,
>   	.has_runtime_pm = 1,
>   	.has_resource_streamer = 1,
> +	.has_rc6 = 1,
>   	.display_mmio_offset = VLV_DISPLAY_BASE,
>   	GEN_CHV_PIPEOFFSETS,
>   	CURSOR_OFFSETS,
> @@ -358,6 +362,7 @@ static const struct intel_device_info intel_broxton_info = {
>   	.has_runtime_pm = 1,
>   	.has_pooled_eu = 0,
>   	.has_resource_streamer = 1,
> +	.has_rc6 = 1,
>   	GEN_DEFAULT_PIPEOFFSETS,
>   	IVB_CURSOR_OFFSETS,
>   	BDW_COLORS,
>
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Re: [PATCH 03/23] drm/i915: Move HAS_RUNTIME_PM definition to platform

[Imre Deak]

On ke, 2016-07-20 at 13:25 -0700, Rodrigo Vivi wrote:
> On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa  wrote:
> > Moving all GPU features to the platform struct definition allows for
> >         - standard place when adding new features from new platforms
> >         - possible to see supported features when dumping struct
> >           definitions
> > 
> > Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h | 6 ++----
> >  drivers/gpu/drm/i915/i915_pci.c | 7 ++++++-
> >  2 files changed, 8 insertions(+), 5 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 6569eb7..7443b9a 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -769,6 +769,7 @@ struct intel_csr {
> >         func(is_preliminary) sep \
> >         func(has_fbc) sep \
> >         func(has_psr) sep \
> > +       func(has_runtime_pm) sep \
> >         func(has_pipe_cxsr) sep \
> >         func(has_hotplug) sep \
> >         func(cursor_needs_physical) sep \
> > @@ -2848,10 +2849,7 @@ struct drm_i915_cmd_table {
> >  #define HAS_DDI(dev)           (INTEL_INFO(dev)->has_ddi)
> >  #define HAS_FPGA_DBG_UNCLAIMED(dev)    (INTEL_INFO(dev)->has_fpga_dbg)
> >  #define HAS_PSR(dev)           (INTEL_INFO(dev)->has_psr)
> > -#define HAS_RUNTIME_PM(dev)    (IS_GEN6(dev) || IS_HASWELL(dev) || \
> > -                                IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
> > -                                IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
> > -                                IS_KABYLAKE(dev) || IS_BROXTON(dev))
> 
> Why don't we have runtime_pm on Ivybridge since we have on
> sandybdrige? Imre, any idea?

I don't know what are the exact differences, in any case I haven't
tried to enable RPM on IVB. I think Ville had plans for this.

--Imre

> 
> > +#define HAS_RUNTIME_PM(dev)    (INTEL_INFO(dev)->has_runtime_pm)
> >  #define HAS_RC6(dev)           (INTEL_INFO(dev)->gen >= 6)
> >  #define HAS_RC6p(dev)          (IS_GEN6(dev) || IS_IVYBRIDGE(dev))
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > index 8b1311d..92ab3c2 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -198,6 +198,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
> >         .gen = 6, .num_pipes = 2, \
> >         .need_gfx_hws = 1, .has_hotplug = 1, \
> >         .has_fbc = 1, \
> > +       .has_runtime_pm = 1, \
> 
> This patch made me notice that we should define the
> 
> GEN7_FEATURE on GEN6_FEATURES + new changes as a followup of patch
> 02/32 or in that same patch.
> However for this case we should redefine .has_runtime_pm=0 on gen7,
> what is really strange.
> 
> Anyway, this patch itself has nothing wrong and just follows what it
> was set there already.
> any change related to my comments should be addressed in separated patches.
> So fell free to also use
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> >         .has_llc = 1, \
> >         GEN_DEFAULT_PIPEOFFSETS, \
> > @@ -241,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
> >  #define VLV_FEATURES  \
> >         .gen = 7, .num_pipes = 2, \
> >         .has_psr = 1, \
> > +       .has_runtime_pm = 1, \
> >         .need_gfx_hws = 1, .has_hotplug = 1, \
> >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> >         .display_mmio_offset = VLV_DISPLAY_BASE, \
> > @@ -263,7 +265,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
> >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
> >         .has_ddi = 1, \
> >         .has_fpga_dbg = 1, \
> > -       .has_psr = 1
> > +       .has_psr = 1, \
> > +       .has_runtime_pm = 1
> > 
> >  static const struct intel_device_info intel_haswell_d_info = {
> >         HSW_FEATURES,
> > @@ -312,6 +315,7 @@ static const struct intel_device_info intel_cherryview_info = {
> >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> >         .is_cherryview = 1,
> >         .has_psr = 1,
> > +       .has_runtime_pm = 1,
> >         .display_mmio_offset = VLV_DISPLAY_BASE,
> >         GEN_CHV_PIPEOFFSETS,
> >         CURSOR_OFFSETS,
> > @@ -340,6 +344,7 @@ static const struct intel_device_info intel_broxton_info = {
> >         .has_ddi = 1,
> >         .has_fpga_dbg = 1,
> >         .has_fbc = 1,
> > +       .has_runtime_pm = 1,
> >         .has_pooled_eu = 0,
> >         GEN_DEFAULT_PIPEOFFSETS,
> >         IVB_CURSOR_OFFSETS,
> > --
> > 1.9.1
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
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Re: [PATCH 10/23] drm/i915: Move HAS_RC6 definition to platform definition

[Rodrigo Vivi]

On Thu, Jul 21, 2016 at 3:50 AM, Tvrtko Ursulin
<tvrtko.ursulin@linux.intel.com> wrote:
>
> On 20/07/16 18:40, Carlos Santa wrote:
>>
>> Moving all GPU features to the platform struct definition allows for
>>         - standard place when adding new features from new platforms
>>         - possible to see supported features when dumping struct
>>           definitions
>>
>> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>>   drivers/gpu/drm/i915/i915_pci.c | 5 +++++
>>   2 files changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>> b/drivers/gpu/drm/i915/i915_drv.h
>> index a326a88..75131a0 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -775,6 +775,7 @@ struct intel_csr {
>>         func(has_guc) sep \
>>         func(has_guc_ucode) sep \
>>         func(has_guc_sched) sep \
>> +       func(has_rc6) sep \
>>         func(has_resource_streamer) sep \
>>         func(has_pipe_cxsr) sep \
>>         func(has_hotplug) sep \
>> @@ -2856,7 +2857,7 @@ struct drm_i915_cmd_table {
>>   #define HAS_FPGA_DBG_UNCLAIMED(dev)   (INTEL_INFO(dev)->has_fpga_dbg)
>>   #define HAS_PSR(dev)          (INTEL_INFO(dev)->has_psr)
>>   #define HAS_RUNTIME_PM(dev)   (INTEL_INFO(dev)->has_runtime_pm)
>> -#define HAS_RC6(dev)           (INTEL_INFO(dev)->gen >= 6)
>> +#define HAS_RC6(dev)           (INTEL_INFO(dev)->has_rc6)
>>   #define HAS_RC6p(dev)         (IS_GEN6(dev) || IS_IVYBRIDGE(dev))
>>
>>   #define HAS_CSR(dev)  (INTEL_INFO(dev)->has_csr)
>> diff --git a/drivers/gpu/drm/i915/i915_pci.c
>> b/drivers/gpu/drm/i915/i915_pci.c
>> index f59ad4b..e10fb5c 100644
>> --- a/drivers/gpu/drm/i915/i915_pci.c
>> +++ b/drivers/gpu/drm/i915/i915_pci.c
>> @@ -200,6 +200,7 @@ static const struct intel_device_info
>> intel_ironlake_m_info = {
>>         .has_fbc = 1, \
>>         .has_runtime_pm = 1, \
>>         .has_core_ring_freq = 1, \
>> +       .has_rc6 = 1, \
>
>
> This platform claims to be Gen5 so no RC6.
>
> I have a slight reservation on all this because sometimes it is very useful
> to see that "INTEL_INFO(dev)->gen >= 6". When sprinkled around like here it
> becomes harder to figure out which feature is supported by which platforms.

Well, right now we have 3 issues that this series address:

1 - unify/standardize the way we introduce a feature in a giving platform.
2 - have a view to all features available on a giving platform.
3 - Make platform enabling with legacy features easy

the only downside is indeed for some cases it is getting hard now to answer:
"which platforms support this specific feature?"
But anyways they are all organized in only one file on structs and
macros that are
easy to navigate and understand.

>
> Once I tried something like this work (mind you I was concentrating only on
> HAS_ and IS_ macros which contain multiple conditionals - it was an
> excercise in reducing multiple conditionals at runtime), I decided to keep
> the macro but renamed it to have a leading underscore. And I did the
> assignment to device_info in an appropriate place, for example:
>
> device_info->has_rc6 = _HAS_RC6(dev_priv);

But if you do this you loose the

>
> For completeness:
>
> #define _HAS_RC6(dev)           (INTEL_INFO(dev)->gen >= 6)

Maybe a comment here would solve this downside:

/* RC6 is supported on all platforms starting on gen6. */
#define HAS_RC6(dev)            (INTEL_INFO(dev)->has_rc6)

or something like this...

Thanks,
Rodrigo.

>
> I was not too happy with that approach either, but I think the downside I
> mentioned above is real.
>
> Regards,
>
> Tvrtko
>
>
>>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>>         .has_llc = 1, \
>>         GEN_DEFAULT_PIPEOFFSETS, \
>> @@ -219,6 +220,7 @@ static const struct intel_device_info
>> intel_sandybridge_m_info = {
>>         .need_gfx_hws = 1, .has_hotplug = 1, \
>>         .has_fbc = 1, \
>>         .has_core_ring_freq = 1, \
>> +       .has_rc6 = 1, \
>>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>>         .has_llc = 1, \
>>         GEN_DEFAULT_PIPEOFFSETS, \
>> @@ -245,6 +247,7 @@ static const struct intel_device_info
>> intel_ivybridge_q_info = {
>>         .gen = 7, .num_pipes = 2, \
>>         .has_psr = 1, \
>>         .has_runtime_pm = 1, \
>> +       .has_rc6 = 1, \
>>         .need_gfx_hws = 1, .has_hotplug = 1, \
>>         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>>         .display_mmio_offset = VLV_DISPLAY_BASE, \
>> @@ -320,6 +323,7 @@ static const struct intel_device_info
>> intel_cherryview_info = {
>>         .has_psr = 1,
>>         .has_runtime_pm = 1,
>>         .has_resource_streamer = 1,
>> +       .has_rc6 = 1,
>>         .display_mmio_offset = VLV_DISPLAY_BASE,
>>         GEN_CHV_PIPEOFFSETS,
>>         CURSOR_OFFSETS,
>> @@ -358,6 +362,7 @@ static const struct intel_device_info
>> intel_broxton_info = {
>>         .has_runtime_pm = 1,
>>         .has_pooled_eu = 0,
>>         .has_resource_streamer = 1,
>> +       .has_rc6 = 1,
>>         GEN_DEFAULT_PIPEOFFSETS,
>>         IVB_CURSOR_OFFSETS,
>>         BDW_COLORS,
>>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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Re: [PATCH 07/23] drm/i915: Move HAS_GUC_UCODE definition to platform definition

[Dave Gordon]

On 21/07/16 11:38, Tvrtko Ursulin wrote:
>
> On 20/07/16 22:07, Rodrigo Vivi wrote:
>> please kill this _ucode variation that is just a alias to guc instead....
>
> Not sure, it was added with a particular goal. Cc Dave in case he wants
> to comment.
>
> Regards,
> Tvrtko

The comment is already in the source code, just above the lines that 
this patch changes.

.Dave.
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Re: [PATCH 03/23] drm/i915: Move HAS_RUNTIME_PM definition to platform

[Jani Nikula]

On Wed, 20 Jul 2016, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform struct definition allows for
> 	- standard place when adding new features from new platforms
> 	- possible to see supported features when dumping struct
> 	  definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 6 ++----
>  drivers/gpu/drm/i915/i915_pci.c | 7 ++++++-
>  2 files changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6569eb7..7443b9a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -769,6 +769,7 @@ struct intel_csr {
>  	func(is_preliminary) sep \
>  	func(has_fbc) sep \
>  	func(has_psr) sep \
> +	func(has_runtime_pm) sep \
>  	func(has_pipe_cxsr) sep \
>  	func(has_hotplug) sep \
>  	func(cursor_needs_physical) sep \
> @@ -2848,10 +2849,7 @@ struct drm_i915_cmd_table {
>  #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
>  #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
>  #define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)
> -#define HAS_RUNTIME_PM(dev)	(IS_GEN6(dev) || IS_HASWELL(dev) || \
> -				 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
> -				 IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
> -				 IS_KABYLAKE(dev) || IS_BROXTON(dev))
> +#define HAS_RUNTIME_PM(dev)	(INTEL_INFO(dev)->has_runtime_pm)
>  #define HAS_RC6(dev)		(INTEL_INFO(dev)->gen >= 6)
>  #define HAS_RC6p(dev)		(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
>  
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 8b1311d..92ab3c2 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -198,6 +198,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>  	.gen = 6, .num_pipes = 2, \
>  	.need_gfx_hws = 1, .has_hotplug = 1, \
>  	.has_fbc = 1, \
> +	.has_runtime_pm = 1, \
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>  	.has_llc = 1, \
>  	GEN_DEFAULT_PIPEOFFSETS, \
> @@ -241,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
>  #define VLV_FEATURES  \
>  	.gen = 7, .num_pipes = 2, \
>  	.has_psr = 1, \
> +	.has_runtime_pm = 1, \
>  	.need_gfx_hws = 1, .has_hotplug = 1, \
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>  	.display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -263,7 +265,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
>  	.has_ddi = 1, \
>  	.has_fpga_dbg = 1, \
> -	.has_psr = 1
> +	.has_psr = 1, \
> +	.has_runtime_pm = 1

Drive by bikeshedding, please always add the comma in the end even for
the last line so that you can add new ones without touching the
preceding lines like here.

BR,
Jani.

>  
>  static const struct intel_device_info intel_haswell_d_info = {
>  	HSW_FEATURES,
> @@ -312,6 +315,7 @@ static const struct intel_device_info intel_cherryview_info = {
>  	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
>  	.is_cherryview = 1,
>  	.has_psr = 1,
> +	.has_runtime_pm = 1,
>  	.display_mmio_offset = VLV_DISPLAY_BASE,
>  	GEN_CHV_PIPEOFFSETS,
>  	CURSOR_OFFSETS,
> @@ -340,6 +344,7 @@ static const struct intel_device_info intel_broxton_info = {
>  	.has_ddi = 1,
>  	.has_fpga_dbg = 1,
>  	.has_fbc = 1,
> +	.has_runtime_pm = 1,
>  	.has_pooled_eu = 0,
>  	GEN_DEFAULT_PIPEOFFSETS,
>  	IVB_CURSOR_OFFSETS,

-- 
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Re: [PATCH 13/23] drm/i915: Introduce GEN5_FEATURES for device info

[Jani Nikula]

On Wed, 20 Jul 2016, Carlos Santa <carlos.santa@intel.com> wrote:
> Based on the GEN7_FEATURES changes from Ben W.
>
> Use it for ilk.
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c | 21 +++++++++++----------
>  1 file changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 099f134..3844840 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -177,21 +177,22 @@ static const struct intel_device_info intel_pineview_info = {
>  	CURSOR_OFFSETS,
>  };
>  
> +#define GEN5_FEATURES \
> +	.gen = 5, .num_pipes = 2, \
> +	.need_gfx_hws = 1, .has_hotplug = 1, \
> +	.ring_mask = RENDER_RING | BSD_RING, \
> +	GEN_DEFAULT_PIPEOFFSETS, \
> +	CURSOR_OFFSETS
> +
>  static const struct intel_device_info intel_ironlake_d_info = {
> -	.gen = 5, .num_pipes = 2,
> -	.need_gfx_hws = 1, .has_hotplug = 1,
> -	.ring_mask = RENDER_RING | BSD_RING,
> -	GEN_DEFAULT_PIPEOFFSETS,
> -	CURSOR_OFFSETS,
> +	GEN5_FEATURES

Like before, please stick the comma at the end.

>  };
>  
>  static const struct intel_device_info intel_ironlake_m_info = {
> -	.gen = 5, .is_mobile = 1, .num_pipes = 2,
> -	.need_gfx_hws = 1, .has_hotplug = 1,
> +	GEN5_FEATURES,
> +	.is_mobile = 1,
>  	.has_fbc = 1,
> -	.ring_mask = RENDER_RING | BSD_RING,
> -	GEN_DEFAULT_PIPEOFFSETS,
> -	CURSOR_OFFSETS,
> +

Do not add superfluous empty lines.

BR,
Jani.

>  };
>  
>  #define GEN6_FEATURES \

-- 
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Re: [PATCH 00/23] drm/i915: Organize most GPU features by platform

[Jani Nikula]

On Wed, 20 Jul 2016, Carlos Santa <carlos.santa@intel.com> wrote:
> This patchset includes the following changes:
>
>  - organize most GPU features so that they are easy to group by platforms.
>    It seems some of the ground work was already done for Gen7 features.
>    Reuse some of that work for the rest of the Gen platforms (GEN6, GEN5, GEN4, GEN3
>    and GEN2).
>
>  - make most of these GPU features now a device_info flag also based on
>    previous work done by others. The idea is here is to have a central place where
>    to add new features and also now it should be possible to see what the supported 
>    features are for a given platform by dumping of the struct definitions.
>    The list of the features that were converted to a device_info flag include: PSR,
>    RUNTIME_PM, CORE_RING_FREQ, CSR, GUC, GUC_UCODE, GUC_SCHED, RESOURCE_STREAMER, RC6,
>    RC6p, DP_MST, GMBUS_IRQ, FW_BLC, HW_CONTEXTS, LOGICAL_RING_CONTEXTS, L3_DPF, and
>    GMCH_DISPLAY.

Ack on the general approach. I didn't do actual review. Please check the
spelling in commit messages.

BR,
Jani.


>
> Carlos Santa (23):
>   drm/i915: Move HAS_PSR definition to platform struct definition
>   drm/i915: Introduce GEN6_FEATURES for device info
>   drm/i915: Move HAS_RUNTIME_PM definition to platform
>   drm/i915: Move HAS_CORE_RING_FREQ definition to platform definition
>   drm/i915: Move HAS_CSR definition to platform definition
>   drm/i915: Move HAS_GUC definition to platform definition
>   drm/i915: Move HAS_GUC_UCODE definition to platform definition
>   drm/i915: Move HAS_GUC_SCHED definition to platform definition
>   drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition
>   drm/i915: Move HAS_RC6 definition to platform definition
>   drm/i915: Move HAS_RC6p definition to platform definition
>   drm/i915: Move HAS_DP_MST definition to platform definition
>   drm/i915: Introduce GEN5_FEATURES for device info
>   drm/i915: Move HAS_AUX_IRQ definition to platform definition
>   drm/i915: Move HAS_GMBUS_IRQ definition to platform definition
>   drm/i915: Introduce GEN4_FEATURES for device info
>   drm/i915: Introduce GEN3_FEATURES for device info
>   drm/i915: Introduce GEN2 FEATURES for device info
>   drm/915: Move HAS_FW_BLC definition to platform
>   drm/i915: Move HAS_HW_CONTEXTS definition to platform
>   drm/i915: Move HAS_LOGICAL_RING_CONTEXTS definition to platform
>     definition
>   drm/i915: Move HAS_L3_DPF definition to platform definition
>   drm/i915: Move HAS_GMCH_DISPLAY definition to platform
>
>  drivers/gpu/drm/i915/i915_drv.h |  67 +++++-----
>  drivers/gpu/drm/i915/i915_pci.c | 272 +++++++++++++++++++++++++---------------
>  2 files changed, 206 insertions(+), 133 deletions(-)

-- 
Jani Nikula, Intel Open Source Technology Center
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Re: [PATCH 07/23] drm/i915: Move HAS_GUC_UCODE definition to platform definition

[Dave Gordon]

On 21/07/16 18:10, Dave Gordon wrote:
> On 21/07/16 11:38, Tvrtko Ursulin wrote:
>>
>> On 20/07/16 22:07, Rodrigo Vivi wrote:
>>> please kill this _ucode variation that is just a alias to guc
>>> instead....
>>
>> Not sure, it was added with a particular goal. Cc Dave in case he wants
>> to comment.
>>
>> Regards,
>> Tvrtko
>
> The comment is already in the source code, just above the lines that
> this patch changes.
>
> .Dave.

Which is to say that,
+   having a GuC that can be used for command submission
+   having a GuC that requires firmware before use
are logically distinct properties, and are both subsets of
* having GuC hardware.

We can *imagine* products that might:

(1) have a GuC that requires firmware before use ...
(2) have a GuC with predefined but reloadable firmware ...
(3) have a GuC that contains a permanent firmware image ...
  x
(a) ... which supports command submission but not SLPC
(b) ... which supports both command submission and SLPC
(c) ... which supports SLPC but not command submission

where all combinations are logically plausible, even though we only have 
(1a) in today's devices. So we might as well make future development 
easier rather than more difficult; it is always easier to make different 
things equivalent than to separate identical things into different cases.

.Dave.
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Re: [PATCH 07/23] drm/i915: Move HAS_GUC_UCODE definition to platform definition

[Daniel Vetter]

On Tue, Aug 02, 2016 at 11:10:46AM +0100, Dave Gordon wrote:
> On 21/07/16 18:10, Dave Gordon wrote:
> > On 21/07/16 11:38, Tvrtko Ursulin wrote:
> > > 
> > > On 20/07/16 22:07, Rodrigo Vivi wrote:
> > > > please kill this _ucode variation that is just a alias to guc
> > > > instead....
> > > 
> > > Not sure, it was added with a particular goal. Cc Dave in case he wants
> > > to comment.
> > > 
> > > Regards,
> > > Tvrtko
> > 
> > The comment is already in the source code, just above the lines that
> > this patch changes.
> > 
> > .Dave.
> 
> Which is to say that,
> +   having a GuC that can be used for command submission
> +   having a GuC that requires firmware before use
> are logically distinct properties, and are both subsets of
> * having GuC hardware.
> 
> We can *imagine* products that might:
> 
> (1) have a GuC that requires firmware before use ...
> (2) have a GuC with predefined but reloadable firmware ...
> (3) have a GuC that contains a permanent firmware image ...
>  x
> (a) ... which supports command submission but not SLPC
> (b) ... which supports both command submission and SLPC
> (c) ... which supports SLPC but not command submission
> 
> where all combinations are logically plausible, even though we only have
> (1a) in today's devices. So we might as well make future development easier
> rather than more difficult; it is always easier to make different things
> equivalent than to separate identical things into different cases.

Let's please not add code for everything we can imagine. If there's a
product in the pipeline for which the above is true then sure, makes sense
(but needs one of the generic "needed for future platforms" notice in the
commit message). Otherwise I'll vote to nuke the difference.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH 07/23] drm/i915: Move HAS_GUC_UCODE definition to platform definition

[Dave Gordon]

On 02/08/16 15:16, Daniel Vetter wrote:
> On Tue, Aug 02, 2016 at 11:10:46AM +0100, Dave Gordon wrote:
>> On 21/07/16 18:10, Dave Gordon wrote:
>>> On 21/07/16 11:38, Tvrtko Ursulin wrote:
>>>>
>>>> On 20/07/16 22:07, Rodrigo Vivi wrote:
>>>>> please kill this _ucode variation that is just a alias to guc
>>>>> instead....
>>>>
>>>> Not sure, it was added with a particular goal. Cc Dave in case he wants
>>>> to comment.
>>>>
>>>> Regards,
>>>> Tvrtko
>>>
>>> The comment is already in the source code, just above the lines that
>>> this patch changes.
>>>
>>> .Dave.
>>
>> Which is to say that,
>> +   having a GuC that can be used for command submission
>> +   having a GuC that requires firmware before use
>> are logically distinct properties, and are both subsets of
>> * having GuC hardware.
>>
>> We can *imagine* products that might:
>>
>> (1) have a GuC that requires firmware before use ...
>> (2) have a GuC with predefined but reloadable firmware ...
>> (3) have a GuC that contains a permanent firmware image ...
>>  x
>> (a) ... which supports command submission but not SLPC
>> (b) ... which supports both command submission and SLPC
>> (c) ... which supports SLPC but not command submission
>>
>> where all combinations are logically plausible, even though we only have
>> (1a) in today's devices. So we might as well make future development easier
>> rather than more difficult; it is always easier to make different things
>> equivalent than to separate identical things into different cases.
>
> Let's please not add code for everything we can imagine. If there's a
> product in the pipeline for which the above is true then sure, makes sense
> (but needs one of the generic "needed for future platforms" notice in the
> commit message). Otherwise I'll vote to nuke the difference.
> -Daniel

I didn't say you had to *store* three different flags for these; for 
now, they could all be the same flag. And they involve no "code" at all, 
just one (or three) bit flags. But they *will* be distinguished at the 
point-of-use by by having different MACRO names, even if they all alias 
to the same bit. This helps the reader understand what property of the 
GuC (or other h/w)  is relevant to a particular bit of code, which will 
become ever more important as more auxiliary processors are added and 
more functions offloaded into them. Remember how much confusion has 
previously been caused by, for example, conflating "nonprivileged 
execution" with "private address space" or "ring of CS commands" with 
"command dispatcher". So looking ahead a little and remembering that a 
single blob of hardware may support multiple logically independent 
functions can save a lot of work in the long run.

.Dave.
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Re: [PATCH 03/23] drm/i915: Move HAS_RUNTIME_PM definition to platform

[Ville Syrjälä]

On Thu, Jul 21, 2016 at 04:34:28PM +0300, Imre Deak wrote:
> On ke, 2016-07-20 at 13:25 -0700, Rodrigo Vivi wrote:
> > On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa  wrote:
> > > Moving all GPU features to the platform struct definition allows for
> > >         - standard place when adding new features from new platforms
> > >         - possible to see supported features when dumping struct
> > >           definitions
> > > 
> > > Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/i915_drv.h | 6 ++----
> > >  drivers/gpu/drm/i915/i915_pci.c | 7 ++++++-
> > >  2 files changed, 8 insertions(+), 5 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > > index 6569eb7..7443b9a 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -769,6 +769,7 @@ struct intel_csr {
> > >         func(is_preliminary) sep \
> > >         func(has_fbc) sep \
> > >         func(has_psr) sep \
> > > +       func(has_runtime_pm) sep \
> > >         func(has_pipe_cxsr) sep \
> > >         func(has_hotplug) sep \
> > >         func(cursor_needs_physical) sep \
> > > @@ -2848,10 +2849,7 @@ struct drm_i915_cmd_table {
> > >  #define HAS_DDI(dev)           (INTEL_INFO(dev)->has_ddi)
> > >  #define HAS_FPGA_DBG_UNCLAIMED(dev)    (INTEL_INFO(dev)->has_fpga_dbg)
> > >  #define HAS_PSR(dev)           (INTEL_INFO(dev)->has_psr)
> > > -#define HAS_RUNTIME_PM(dev)    (IS_GEN6(dev) || IS_HASWELL(dev) || \
> > > -                                IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
> > > -                                IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
> > > -                                IS_KABYLAKE(dev) || IS_BROXTON(dev))
> > 
> > Why don't we have runtime_pm on Ivybridge since we have on
> > sandybdrige? Imre, any idea?
> 
> I don't know what are the exact differences, in any case I haven't
> tried to enable RPM on IVB. I think Ville had plans for this.

I tried it, it gave zero benefit with the downside of killing HPD. So
I've changed my mind and now I want to see the SNB runtime PM support
removed instead. So runtime PM would be only for HSW+/VLV/CHV.

And we still need to fix HPD while runtime suspended. But at least
it's theoretically possible for those platforms. I don't think we can
do it for SNB/IVB and older machines. And polling is no answer as
it just increases the power consumption. So adding ineffective
runtime PM with HPD polling is just wasting more power than not
runtime suspending in the first place.

> 
> --Imre
> 
> > 
> > > +#define HAS_RUNTIME_PM(dev)    (INTEL_INFO(dev)->has_runtime_pm)
> > >  #define HAS_RC6(dev)           (INTEL_INFO(dev)->gen >= 6)
> > >  #define HAS_RC6p(dev)          (IS_GEN6(dev) || IS_IVYBRIDGE(dev))
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > > index 8b1311d..92ab3c2 100644
> > > --- a/drivers/gpu/drm/i915/i915_pci.c
> > > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > > @@ -198,6 +198,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
> > >         .gen = 6, .num_pipes = 2, \
> > >         .need_gfx_hws = 1, .has_hotplug = 1, \
> > >         .has_fbc = 1, \
> > > +       .has_runtime_pm = 1, \
> > 
> > This patch made me notice that we should define the
> > 
> > GEN7_FEATURE on GEN6_FEATURES + new changes as a followup of patch
> > 02/32 or in that same patch.
> > However for this case we should redefine .has_runtime_pm=0 on gen7,
> > what is really strange.
> > 
> > Anyway, this patch itself has nothing wrong and just follows what it
> > was set there already.
> > any change related to my comments should be addressed in separated patches.
> > So fell free to also use
> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > 
> > >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> > >         .has_llc = 1, \
> > >         GEN_DEFAULT_PIPEOFFSETS, \
> > > @@ -241,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
> > >  #define VLV_FEATURES  \
> > >         .gen = 7, .num_pipes = 2, \
> > >         .has_psr = 1, \
> > > +       .has_runtime_pm = 1, \
> > >         .need_gfx_hws = 1, .has_hotplug = 1, \
> > >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> > >         .display_mmio_offset = VLV_DISPLAY_BASE, \
> > > @@ -263,7 +265,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
> > >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
> > >         .has_ddi = 1, \
> > >         .has_fpga_dbg = 1, \
> > > -       .has_psr = 1
> > > +       .has_psr = 1, \
> > > +       .has_runtime_pm = 1
> > > 
> > >  static const struct intel_device_info intel_haswell_d_info = {
> > >         HSW_FEATURES,
> > > @@ -312,6 +315,7 @@ static const struct intel_device_info intel_cherryview_info = {
> > >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> > >         .is_cherryview = 1,
> > >         .has_psr = 1,
> > > +       .has_runtime_pm = 1,
> > >         .display_mmio_offset = VLV_DISPLAY_BASE,
> > >         GEN_CHV_PIPEOFFSETS,
> > >         CURSOR_OFFSETS,
> > > @@ -340,6 +344,7 @@ static const struct intel_device_info intel_broxton_info = {
> > >         .has_ddi = 1,
> > >         .has_fpga_dbg = 1,
> > >         .has_fbc = 1,
> > > +       .has_runtime_pm = 1,
> > >         .has_pooled_eu = 0,
> > >         GEN_DEFAULT_PIPEOFFSETS,
> > >         IVB_CURSOR_OFFSETS,
> > > --
> > > 1.9.1
> > > 
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > 
> > 
> > 

-- 
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Intel OTC
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Re: [PATCH 03/23] drm/i915: Move HAS_RUNTIME_PM definition to platform

[Carlos Santa]

On Tue, 2016-08-09 at 16:49 +0300, Ville Syrjälä wrote:
> On Thu, Jul 21, 2016 at 04:34:28PM +0300, Imre Deak wrote:
> > On ke, 2016-07-20 at 13:25 -0700, Rodrigo Vivi wrote:
> > > On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa  wrote:
> > > > Moving all GPU features to the platform struct definition allows for
> > > >         - standard place when adding new features from new platforms
> > > >         - possible to see supported features when dumping struct
> > > >           definitions
> > > > 
> > > > Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/i915_drv.h | 6 ++----
> > > >  drivers/gpu/drm/i915/i915_pci.c | 7 ++++++-
> > > >  2 files changed, 8 insertions(+), 5 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > > > index 6569eb7..7443b9a 100644
> > > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > > @@ -769,6 +769,7 @@ struct intel_csr {
> > > >         func(is_preliminary) sep \
> > > >         func(has_fbc) sep \
> > > >         func(has_psr) sep \
> > > > +       func(has_runtime_pm) sep \
> > > >         func(has_pipe_cxsr) sep \
> > > >         func(has_hotplug) sep \
> > > >         func(cursor_needs_physical) sep \
> > > > @@ -2848,10 +2849,7 @@ struct drm_i915_cmd_table {
> > > >  #define HAS_DDI(dev)           (INTEL_INFO(dev)->has_ddi)
> > > >  #define HAS_FPGA_DBG_UNCLAIMED(dev)    (INTEL_INFO(dev)->has_fpga_dbg)
> > > >  #define HAS_PSR(dev)           (INTEL_INFO(dev)->has_psr)
> > > > -#define HAS_RUNTIME_PM(dev)    (IS_GEN6(dev) || IS_HASWELL(dev) || \
> > > > -                                IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
> > > > -                                IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
> > > > -                                IS_KABYLAKE(dev) || IS_BROXTON(dev))
> > > 
> > > Why don't we have runtime_pm on Ivybridge since we have on
> > > sandybdrige? Imre, any idea?
> > 
> > I don't know what are the exact differences, in any case I haven't
> > tried to enable RPM on IVB. I think Ville had plans for this.
> 
> I tried it, it gave zero benefit with the downside of killing HPD. So
> I've changed my mind and now I want to see the SNB runtime PM support
> removed instead. So runtime PM would be only for HSW+/VLV/CHV.

V3 of this patch series already does this.

> 
> And we still need to fix HPD while runtime suspended. But at least
> it's theoretically possible for those platforms. I don't think we can
> do it for SNB/IVB and older machines. And polling is no answer as
> it just increases the power consumption. So adding ineffective
> runtime PM with HPD polling is just wasting more power than not
> runtime suspending in the first place.
> 
> > 
> > --Imre
> > 
> > > 
> > > > +#define HAS_RUNTIME_PM(dev)    (INTEL_INFO(dev)->has_runtime_pm)
> > > >  #define HAS_RC6(dev)           (INTEL_INFO(dev)->gen >= 6)
> > > >  #define HAS_RC6p(dev)          (IS_GEN6(dev) || IS_IVYBRIDGE(dev))
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > > > index 8b1311d..92ab3c2 100644
> > > > --- a/drivers/gpu/drm/i915/i915_pci.c
> > > > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > > > @@ -198,6 +198,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
> > > >         .gen = 6, .num_pipes = 2, \
> > > >         .need_gfx_hws = 1, .has_hotplug = 1, \
> > > >         .has_fbc = 1, \
> > > > +       .has_runtime_pm = 1, \
> > > 
> > > This patch made me notice that we should define the
> > > 
> > > GEN7_FEATURE on GEN6_FEATURES + new changes as a followup of patch
> > > 02/32 or in that same patch.
> > > However for this case we should redefine .has_runtime_pm=0 on gen7,
> > > what is really strange.
> > > 
> > > Anyway, this patch itself has nothing wrong and just follows what it
> > > was set there already.
> > > any change related to my comments should be addressed in separated patches.
> > > So fell free to also use
> > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > 
> > > >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> > > >         .has_llc = 1, \
> > > >         GEN_DEFAULT_PIPEOFFSETS, \
> > > > @@ -241,6 +242,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
> > > >  #define VLV_FEATURES  \
> > > >         .gen = 7, .num_pipes = 2, \
> > > >         .has_psr = 1, \
> > > > +       .has_runtime_pm = 1, \
> > > >         .need_gfx_hws = 1, .has_hotplug = 1, \
> > > >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> > > >         .display_mmio_offset = VLV_DISPLAY_BASE, \
> > > > @@ -263,7 +265,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
> > > >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
> > > >         .has_ddi = 1, \
> > > >         .has_fpga_dbg = 1, \
> > > > -       .has_psr = 1
> > > > +       .has_psr = 1, \
> > > > +       .has_runtime_pm = 1
> > > > 
> > > >  static const struct intel_device_info intel_haswell_d_info = {
> > > >         HSW_FEATURES,
> > > > @@ -312,6 +315,7 @@ static const struct intel_device_info intel_cherryview_info = {
> > > >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> > > >         .is_cherryview = 1,
> > > >         .has_psr = 1,
> > > > +       .has_runtime_pm = 1,
> > > >         .display_mmio_offset = VLV_DISPLAY_BASE,
> > > >         GEN_CHV_PIPEOFFSETS,
> > > >         CURSOR_OFFSETS,
> > > > @@ -340,6 +344,7 @@ static const struct intel_device_info intel_broxton_info = {
> > > >         .has_ddi = 1,
> > > >         .has_fpga_dbg = 1,
> > > >         .has_fbc = 1,
> > > > +       .has_runtime_pm = 1,
> > > >         .has_pooled_eu = 0,
> > > >         GEN_DEFAULT_PIPEOFFSETS,
> > > >         IVB_CURSOR_OFFSETS,
> > > > --
> > > > 1.9.1
> > > > 
> > > > _______________________________________________
> > > > Intel-gfx mailing list
> > > > Intel-gfx@lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > > 
> > > 
> > > 
> 

thanks,
Carlos Santa
Intel OTC

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