* ✓ Fi.CI.BAT: success for drm/i915 : Restore PWM_GRANULARITY after resume
2016-09-08 10:18 [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume Lee, Shawn C
@ 2016-09-08 10:24 ` Patchwork
2016-09-09 7:46 ` [PATCH] " Jani Nikula
` (3 subsequent siblings)
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2016-09-08 10:24 UTC (permalink / raw)
To: Lee, Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915 : Restore PWM_GRANULARITY after resume
URL : https://patchwork.freedesktop.org/series/12165/
State : success
== Summary ==
Series 12165v1 drm/i915 : Restore PWM_GRANULARITY after resume
http://patchwork.freedesktop.org/api/1.0/series/12165/revisions/1/mbox/
Test drv_module_reload_basic:
skip -> PASS (fi-skl-6260u)
fi-bdw-5557u total:252 pass:236 dwarn:0 dfail:0 fail:1 skip:15
fi-bsw-n3050 total:252 pass:205 dwarn:0 dfail:0 fail:1 skip:46
fi-byt-n2820 total:252 pass:209 dwarn:0 dfail:0 fail:2 skip:41
fi-hsw-4770k total:252 pass:229 dwarn:0 dfail:0 fail:1 skip:22
fi-hsw-4770r total:252 pass:225 dwarn:0 dfail:0 fail:1 skip:26
fi-ilk-650 total:252 pass:182 dwarn:0 dfail:0 fail:3 skip:67
fi-ivb-3520m total:252 pass:220 dwarn:0 dfail:0 fail:1 skip:31
fi-ivb-3770 total:252 pass:220 dwarn:0 dfail:0 fail:1 skip:31
fi-skl-6260u total:252 pass:237 dwarn:0 dfail:0 fail:1 skip:14
fi-skl-6700k total:252 pass:222 dwarn:1 dfail:0 fail:1 skip:28
fi-snb-2520m total:252 pass:206 dwarn:0 dfail:0 fail:1 skip:45
fi-snb-2600 total:252 pass:206 dwarn:0 dfail:0 fail:1 skip:45
Results at /archive/results/CI_IGT_test/Patchwork_2490/
5986f290e25f42d3d5df390411cc43683deb1301 drm-intel-nightly: 2016y-09m-08d-09h-11m-50s UTC integration manifest
d33e787 drm/i915 : Restore PWM_GRANULARITY after resume
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume
2016-09-08 10:18 [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume Lee, Shawn C
2016-09-08 10:24 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2016-09-09 7:46 ` Jani Nikula
2016-09-19 8:53 ` [PATCH v2] " Lee, Shawn C
` (2 subsequent siblings)
4 siblings, 0 replies; 12+ messages in thread
From: Jani Nikula @ 2016-09-09 7:46 UTC (permalink / raw)
To: Lee, Shawn C, intel-gfx
On Thu, 08 Sep 2016, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote:
> From: "Lee, Shawn C" <shawn.c.lee@intel.com>
>
> SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity
> (minimum increment) of the PWM backlight control counter. PWM frequency
> adjustment on 128 clock increments when this bit was 1. And 16 clock
> increments when it was 0.
>
> PWM frequency multiple octuple (from 200Hz to 1.6KHz) due to
> SPT_PWM_GRANULARITY was clear to 0 after S3. This patch save
> SOUTH_CHICKEN1 register value before suspend. And will restore
> it after i915 resume.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97486
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
> Reviewed-by: Wei Shun Chen <wei.shun.chang@intel.com>
> Reviewed-by: Gary C Wang <gary.c.wang@intel.com>
> Signed-off-by: Shawn Lee <shawn.c.lee@intel.com>
> ---
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/intel_panel.c | 21 +++++++++++++++++++--
> 2 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 570a7ca..4c28692 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -256,6 +256,7 @@ struct intel_panel {
> u32 level;
> u32 min;
> u32 max;
> + u32 pwm_granularity;
None of the fields here store register information directly. Please
don't do so here either. Make this a bool. Call it
pwm_alternate_increment or something.
> bool enabled;
> bool combination_mode; /* gen 2/4 only */
> bool active_low_pwm;
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index c10e9b0..720fd5a 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -841,7 +841,17 @@ static void lpt_enable_backlight(struct intel_connector *connector)
> {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> struct intel_panel *panel = &connector->panel;
> - u32 pch_ctl1, pch_ctl2;
> + u32 pch_ctl1, pch_ctl2, mul;
> +
> + if (HAS_PCH_LPT(dev_priv)) {
> + mul = I915_READ(SOUTH_CHICKEN2);
> + mul &= ~LPT_PWM_GRANULARITY;
> + I915_WRITE(SOUTH_CHICKEN2, mul | panel->backlight.pwm_granularity);
> + } else {
> + mul = I915_READ(SOUTH_CHICKEN1);
> + mul &= ~SPT_PWM_GRANULARITY;
> + I915_WRITE(SOUTH_CHICKEN1, mul | panel->backlight.pwm_granularity);
> + }
It's probably safer to modify the granularity after we've ensured the
backlight is disabled below.
>
> pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
> if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
> @@ -1413,7 +1423,7 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
> {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> struct intel_panel *panel = &connector->panel;
> - u32 pch_ctl1, pch_ctl2, val;
> + u32 pch_ctl1, pch_ctl2, val, mul;
>
> pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
> panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
> @@ -1421,6 +1431,13 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
> pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
> panel->backlight.max = pch_ctl2 >> 16;
>
> + if (HAS_PCH_LPT(dev_priv))
> + mul = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
> + else
> + mul = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
> +
> + panel->backlight.pwm_granularity = mul;
In the function, there's a sequence of figuring out the max backlight,
please don't put this stuff in the middle of it. You can just make this
the first thing.
As follow-up, you can then use the field in spt_hz_to_pwm and
lpt_hz_to_pwm instead of re-reading the chicken bits there.
> +
> if (!panel->backlight.max)
> panel->backlight.max = get_backlight_max_vbt(connector);
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH v2] drm/i915 : Restore PWM_GRANULARITY after resume
2016-09-08 10:18 [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume Lee, Shawn C
2016-09-08 10:24 ` ✓ Fi.CI.BAT: success for " Patchwork
2016-09-09 7:46 ` [PATCH] " Jani Nikula
@ 2016-09-19 8:53 ` Lee, Shawn C
2016-09-19 8:38 ` Jani Nikula
` (3 more replies)
2016-09-19 9:56 ` [PATCH] " Lee, Shawn C
2016-09-19 10:20 ` ✓ Fi.CI.BAT: success for drm/i915 : Restore PWM_GRANULARITY after resume (rev3) Patchwork
4 siblings, 4 replies; 12+ messages in thread
From: Lee, Shawn C @ 2016-09-19 8:53 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
From: "Lee, Shawn C" <shawn.c.lee@intel.com>
SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity
(minimum increment) of the PWM backlight control counter. PWM frequency
adjustment on 128 clock increments when this bit was 1. And 16 clock
increments when it was 0.
PWM frequency multiple octuple (from 200Hz to 1.6KHz) due to
SPT_PWM_GRANULARITY was clear to 0 after S3. This patch save
SOUTH_CHICKEN1 register value before suspend. And will restore
it after i915 resume.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97486
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
Reviewed-by: Wei Shun Chen <wei.shun.chang@intel.com>
Reviewed-by: Gary C Wang <gary.c.wang@intel.com>
Signed-off-by: Shawn Lee <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_panel.c | 24 ++++++++++++++++++++++--
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 570a7ca..c4bc690 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -256,6 +256,7 @@ struct intel_panel {
u32 level;
u32 min;
u32 max;
+ bool pwm_alternate_increment;
bool enabled;
bool combination_mode; /* gen 2/4 only */
bool active_low_pwm;
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index c10e9b0..e1dc6bd 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -841,7 +841,7 @@ static void lpt_enable_backlight(struct intel_connector *connector)
{
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_panel *panel = &connector->panel;
- u32 pch_ctl1, pch_ctl2;
+ u32 pch_ctl1, pch_ctl2, mul;
pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
@@ -867,6 +867,16 @@ static void lpt_enable_backlight(struct intel_connector *connector)
/* This won't stick until the above enable. */
intel_panel_actually_set_backlight(connector, panel->backlight.level);
+
+ if (HAS_PCH_LPT(dev_priv)) {
+ mul = I915_READ(SOUTH_CHICKEN2);
+ mul &= ~LPT_PWM_GRANULARITY;
+ I915_WRITE(SOUTH_CHICKEN2, mul | (panel->backlight.pwm_alternate_increment << LPT_PWM_GRANULARITY));
+ } else {
+ mul = I915_READ(SOUTH_CHICKEN1);
+ mul &= ~SPT_PWM_GRANULARITY;
+ I915_WRITE(SOUTH_CHICKEN1, mul | (panel->backlight.pwm_alternate_increment << SPT_PWM_GRANULARITY));
+ }
}
static void pch_enable_backlight(struct intel_connector *connector)
@@ -1413,7 +1423,7 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
{
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_panel *panel = &connector->panel;
- u32 pch_ctl1, pch_ctl2, val;
+ u32 pch_ctl1, pch_ctl2, val, mul;
pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
@@ -1436,6 +1446,16 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
+ if (HAS_PCH_LPT(dev_priv))
+ mul = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
+ else
+ mul = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
+
+ if ( mul )
+ panel->backlight.pwm_alternate_increment = true;
+ else
+ panel->backlight.pwm_alternate_increment = false;
+
return 0;
}
--
1.7.9.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v2] drm/i915 : Restore PWM_GRANULARITY after resume
2016-09-19 8:53 ` [PATCH v2] " Lee, Shawn C
@ 2016-09-19 8:38 ` Jani Nikula
2016-09-19 8:41 ` Jani Nikula
` (2 subsequent siblings)
3 siblings, 0 replies; 12+ messages in thread
From: Jani Nikula @ 2016-09-19 8:38 UTC (permalink / raw)
To: Lee, Shawn C, intel-gfx
On Mon, 19 Sep 2016, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote:
> From: "Lee, Shawn C" <shawn.c.lee@intel.com>
>
> SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity
> (minimum increment) of the PWM backlight control counter. PWM frequency
> adjustment on 128 clock increments when this bit was 1. And 16 clock
> increments when it was 0.
>
> PWM frequency multiple octuple (from 200Hz to 1.6KHz) due to
> SPT_PWM_GRANULARITY was clear to 0 after S3. This patch save
> SOUTH_CHICKEN1 register value before suspend. And will restore
> it after i915 resume.
Sorry, I updated the patch already
https://patchwork.freedesktop.org/patch/111128/
https://patchwork.freedesktop.org/patch/111129/
BR,
Jani.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97486
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
> Reviewed-by: Wei Shun Chen <wei.shun.chang@intel.com>
> Reviewed-by: Gary C Wang <gary.c.wang@intel.com>
> Signed-off-by: Shawn Lee <shawn.c.lee@intel.com>
> ---
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/intel_panel.c | 24 ++++++++++++++++++++++--
> 2 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 570a7ca..c4bc690 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -256,6 +256,7 @@ struct intel_panel {
> u32 level;
> u32 min;
> u32 max;
> + bool pwm_alternate_increment;
> bool enabled;
> bool combination_mode; /* gen 2/4 only */
> bool active_low_pwm;
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index c10e9b0..e1dc6bd 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -841,7 +841,7 @@ static void lpt_enable_backlight(struct intel_connector *connector)
> {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> struct intel_panel *panel = &connector->panel;
> - u32 pch_ctl1, pch_ctl2;
> + u32 pch_ctl1, pch_ctl2, mul;
>
> pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
> if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
> @@ -867,6 +867,16 @@ static void lpt_enable_backlight(struct intel_connector *connector)
>
> /* This won't stick until the above enable. */
> intel_panel_actually_set_backlight(connector, panel->backlight.level);
> +
> + if (HAS_PCH_LPT(dev_priv)) {
> + mul = I915_READ(SOUTH_CHICKEN2);
> + mul &= ~LPT_PWM_GRANULARITY;
> + I915_WRITE(SOUTH_CHICKEN2, mul | (panel->backlight.pwm_alternate_increment << LPT_PWM_GRANULARITY));
> + } else {
> + mul = I915_READ(SOUTH_CHICKEN1);
> + mul &= ~SPT_PWM_GRANULARITY;
> + I915_WRITE(SOUTH_CHICKEN1, mul | (panel->backlight.pwm_alternate_increment << SPT_PWM_GRANULARITY));
> + }
> }
>
> static void pch_enable_backlight(struct intel_connector *connector)
> @@ -1413,7 +1423,7 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
> {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> struct intel_panel *panel = &connector->panel;
> - u32 pch_ctl1, pch_ctl2, val;
> + u32 pch_ctl1, pch_ctl2, val, mul;
>
> pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
> panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
> @@ -1436,6 +1446,16 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
>
> panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
>
> + if (HAS_PCH_LPT(dev_priv))
> + mul = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
> + else
> + mul = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
> +
> + if ( mul )
> + panel->backlight.pwm_alternate_increment = true;
> + else
> + panel->backlight.pwm_alternate_increment = false;
> +
> return 0;
> }
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v2] drm/i915 : Restore PWM_GRANULARITY after resume
2016-09-19 8:53 ` [PATCH v2] " Lee, Shawn C
2016-09-19 8:38 ` Jani Nikula
@ 2016-09-19 8:41 ` Jani Nikula
2016-09-19 10:30 ` kbuild test robot
2016-09-19 10:50 ` kbuild test robot
3 siblings, 0 replies; 12+ messages in thread
From: Jani Nikula @ 2016-09-19 8:41 UTC (permalink / raw)
To: Lee, Shawn C, intel-gfx
On Mon, 19 Sep 2016, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote:
> + if (HAS_PCH_LPT(dev_priv)) {
> + mul = I915_READ(SOUTH_CHICKEN2);
> + mul &= ~LPT_PWM_GRANULARITY;
> + I915_WRITE(SOUTH_CHICKEN2, mul | (panel->backlight.pwm_alternate_increment << LPT_PWM_GRANULARITY));
> + } else {
> + mul = I915_READ(SOUTH_CHICKEN1);
> + mul &= ~SPT_PWM_GRANULARITY;
> + I915_WRITE(SOUTH_CHICKEN1, mul | (panel->backlight.pwm_alternate_increment << SPT_PWM_GRANULARITY));
> + }
Also, both of the shifts are wrong here. The *_PWM_GRANULARITY macros
already contain the shifts.
BR,
Jani.
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v2] drm/i915 : Restore PWM_GRANULARITY after resume
2016-09-19 8:53 ` [PATCH v2] " Lee, Shawn C
2016-09-19 8:38 ` Jani Nikula
2016-09-19 8:41 ` Jani Nikula
@ 2016-09-19 10:30 ` kbuild test robot
2016-09-19 10:50 ` kbuild test robot
3 siblings, 0 replies; 12+ messages in thread
From: kbuild test robot @ 2016-09-19 10:30 UTC (permalink / raw)
To: Lee, Shawn C; +Cc: Jani Nikula, intel-gfx, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 2900 bytes --]
Hi Shawn,
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.8-rc7 next-20160916]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
[Suggest to use git(>=2.9.0) format-patch --base=<commit> (or --base=auto for convenience) to record what (public, well-known) commit your patch series was built on]
[Check https://git-scm.com/docs/git-format-patch for more information]
url: https://github.com/0day-ci/linux/commits/Lee-Shawn-C/drm-i915-Restore-PWM_GRANULARITY-after-resume/20160919-180644
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x008-201638 (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All warnings (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/intel_drv.h:32:0,
from drivers/gpu/drm/i915/intel_panel.c:36:
drivers/gpu/drm/i915/intel_panel.c: In function 'lpt_enable_backlight':
>> drivers/gpu/drm/i915/intel_panel.c:874:78: warning: left shift count >= width of type [-Wshift-count-overflow]
I915_WRITE(SOUTH_CHICKEN2, mul | (panel->backlight.pwm_alternate_increment << LPT_PWM_GRANULARITY));
^
drivers/gpu/drm/i915/i915_drv.h:3735:83: note: in definition of macro 'I915_WRITE'
#define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
^~~
vim +874 drivers/gpu/drm/i915/intel_panel.c
858 pch_ctl1 |= BLM_PCH_POLARITY;
859
860 /* After LPT, override is the default. */
861 if (HAS_PCH_LPT(dev_priv))
862 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
863
864 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
865 POSTING_READ(BLC_PWM_PCH_CTL1);
866 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
867
868 /* This won't stick until the above enable. */
869 intel_panel_actually_set_backlight(connector, panel->backlight.level);
870
871 if (HAS_PCH_LPT(dev_priv)) {
872 mul = I915_READ(SOUTH_CHICKEN2);
873 mul &= ~LPT_PWM_GRANULARITY;
> 874 I915_WRITE(SOUTH_CHICKEN2, mul | (panel->backlight.pwm_alternate_increment << LPT_PWM_GRANULARITY));
875 } else {
876 mul = I915_READ(SOUTH_CHICKEN1);
877 mul &= ~SPT_PWM_GRANULARITY;
878 I915_WRITE(SOUTH_CHICKEN1, mul | (panel->backlight.pwm_alternate_increment << SPT_PWM_GRANULARITY));
879 }
880 }
881
882 static void pch_enable_backlight(struct intel_connector *connector)
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 27646 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v2] drm/i915 : Restore PWM_GRANULARITY after resume
2016-09-19 8:53 ` [PATCH v2] " Lee, Shawn C
` (2 preceding siblings ...)
2016-09-19 10:30 ` kbuild test robot
@ 2016-09-19 10:50 ` kbuild test robot
3 siblings, 0 replies; 12+ messages in thread
From: kbuild test robot @ 2016-09-19 10:50 UTC (permalink / raw)
To: Lee, Shawn C; +Cc: Jani Nikula, intel-gfx, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 2380 bytes --]
Hi Shawn,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.8-rc7 next-20160916]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
[Suggest to use git(>=2.9.0) format-patch --base=<commit> (or --base=auto for convenience) to record what (public, well-known) commit your patch series was built on]
[Check https://git-scm.com/docs/git-format-patch for more information]
url: https://github.com/0day-ci/linux/commits/Lee-Shawn-C/drm-i915-Restore-PWM_GRANULARITY-after-resume/20160919-180644
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x012-201638 (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/intel_drv.h:32:0,
from drivers/gpu/drm/i915/intel_panel.c:36:
drivers/gpu/drm/i915/intel_panel.c: In function 'lpt_enable_backlight':
>> drivers/gpu/drm/i915/intel_panel.c:874:78: error: left shift count >= width of type [-Werror=shift-count-overflow]
I915_WRITE(SOUTH_CHICKEN2, mul | (panel->backlight.pwm_alternate_increment << LPT_PWM_GRANULARITY));
^
drivers/gpu/drm/i915/i915_drv.h:3735:83: note: in definition of macro 'I915_WRITE'
#define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
^~~
cc1: all warnings being treated as errors
vim +874 drivers/gpu/drm/i915/intel_panel.c
868 /* This won't stick until the above enable. */
869 intel_panel_actually_set_backlight(connector, panel->backlight.level);
870
871 if (HAS_PCH_LPT(dev_priv)) {
872 mul = I915_READ(SOUTH_CHICKEN2);
873 mul &= ~LPT_PWM_GRANULARITY;
> 874 I915_WRITE(SOUTH_CHICKEN2, mul | (panel->backlight.pwm_alternate_increment << LPT_PWM_GRANULARITY));
875 } else {
876 mul = I915_READ(SOUTH_CHICKEN1);
877 mul &= ~SPT_PWM_GRANULARITY;
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 21687 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume
2016-09-08 10:18 [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume Lee, Shawn C
` (2 preceding siblings ...)
2016-09-19 8:53 ` [PATCH v2] " Lee, Shawn C
@ 2016-09-19 9:56 ` Lee, Shawn C
2016-09-19 9:42 ` Jani Nikula
2016-09-19 10:20 ` ✓ Fi.CI.BAT: success for drm/i915 : Restore PWM_GRANULARITY after resume (rev3) Patchwork
4 siblings, 1 reply; 12+ messages in thread
From: Lee, Shawn C @ 2016-09-19 9:56 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
From: "Lee, Shawn C" <shawn.c.lee@intel.com>
SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity
(minimum increment) of the PWM backlight control counter. PWM frequency
adjustment on 128 clock increments when this bit was 1. And 16 clock
increments when it was 0.
PWM frequency multiple octuple (from 200Hz to 1.6KHz) due to
SPT_PWM_GRANULARITY was clear to 0 after S3. This patch save
SOUTH_CHICKEN1 register value before suspend. And will restore
it after i915 resume.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97486
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
Reviewed-by: Wei Shun Chen <wei.shun.chang@intel.com>
Reviewed-by: Gary C Wang <gary.c.wang@intel.com>
Signed-off-by: Shawn Lee <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_panel.c | 30 ++++++++++++++++++++++++++++--
2 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 570a7ca..c4bc690 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -256,6 +256,7 @@ struct intel_panel {
u32 level;
u32 min;
u32 max;
+ bool pwm_alternate_increment;
bool enabled;
bool combination_mode; /* gen 2/4 only */
bool active_low_pwm;
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index c10e9b0..6f8469b 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -841,7 +841,7 @@ static void lpt_enable_backlight(struct intel_connector *connector)
{
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_panel *panel = &connector->panel;
- u32 pch_ctl1, pch_ctl2;
+ u32 pch_ctl1, pch_ctl2, mul;
pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
@@ -867,6 +867,22 @@ static void lpt_enable_backlight(struct intel_connector *connector)
/* This won't stick until the above enable. */
intel_panel_actually_set_backlight(connector, panel->backlight.level);
+
+ if (HAS_PCH_LPT(dev_priv)) {
+ mul = I915_READ(SOUTH_CHICKEN2);
+ if (panel->backlight.pwm_alternate_increment)
+ mul |= LPT_PWM_GRANULARITY;
+ else
+ mul &= ~LPT_PWM_GRANULARITY;
+ I915_WRITE(SOUTH_CHICKEN2, mul);
+ } else {
+ mul = I915_READ(SOUTH_CHICKEN1);
+ if (panel->backlight.pwm_alternate_increment)
+ mul |= SPT_PWM_GRANULARITY;
+ else
+ mul &= ~SPT_PWM_GRANULARITY;
+ I915_WRITE(SOUTH_CHICKEN1, mul);
+ }
}
static void pch_enable_backlight(struct intel_connector *connector)
@@ -1413,7 +1429,7 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
{
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_panel *panel = &connector->panel;
- u32 pch_ctl1, pch_ctl2, val;
+ u32 pch_ctl1, pch_ctl2, val, mul;
pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
@@ -1436,6 +1452,16 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
+ if (HAS_PCH_LPT(dev_priv))
+ mul = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
+ else
+ mul = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
+
+ if ( mul )
+ panel->backlight.pwm_alternate_increment = true;
+ else
+ panel->backlight.pwm_alternate_increment = false;
+
return 0;
}
--
1.7.9.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume
2016-09-19 9:56 ` [PATCH] " Lee, Shawn C
@ 2016-09-19 9:42 ` Jani Nikula
2016-09-19 10:01 ` Lee, Shawn C
0 siblings, 1 reply; 12+ messages in thread
From: Jani Nikula @ 2016-09-19 9:42 UTC (permalink / raw)
To: Lee, Shawn C, intel-gfx
On Mon, 19 Sep 2016, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote:
> From: "Lee, Shawn C" <shawn.c.lee@intel.com>
>
> SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity
> (minimum increment) of the PWM backlight control counter. PWM frequency
> adjustment on 128 clock increments when this bit was 1. And 16 clock
> increments when it was 0.
>
> PWM frequency multiple octuple (from 200Hz to 1.6KHz) due to
> SPT_PWM_GRANULARITY was clear to 0 after S3. This patch save
> SOUTH_CHICKEN1 register value before suspend. And will restore
> it after i915 resume.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97486
Shawn, I already updated the patch. Perhaps I jumped the gun but I was
expecting an update and didn't get one and wanted to move this forward.
That patch still has your authorship [1]. This one still has issues.
BR,
Jani.
[1] http://patchwork.freedesktop.org/patch/msgid/1474273457-31680-2-git-send-email-jani.nikula@intel.com
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
> Reviewed-by: Wei Shun Chen <wei.shun.chang@intel.com>
> Reviewed-by: Gary C Wang <gary.c.wang@intel.com>
> Signed-off-by: Shawn Lee <shawn.c.lee@intel.com>
> ---
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/intel_panel.c | 30 ++++++++++++++++++++++++++++--
> 2 files changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 570a7ca..c4bc690 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -256,6 +256,7 @@ struct intel_panel {
> u32 level;
> u32 min;
> u32 max;
> + bool pwm_alternate_increment;
> bool enabled;
> bool combination_mode; /* gen 2/4 only */
> bool active_low_pwm;
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index c10e9b0..6f8469b 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -841,7 +841,7 @@ static void lpt_enable_backlight(struct intel_connector *connector)
> {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> struct intel_panel *panel = &connector->panel;
> - u32 pch_ctl1, pch_ctl2;
> + u32 pch_ctl1, pch_ctl2, mul;
>
> pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
> if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
> @@ -867,6 +867,22 @@ static void lpt_enable_backlight(struct intel_connector *connector)
>
> /* This won't stick until the above enable. */
> intel_panel_actually_set_backlight(connector, panel->backlight.level);
> +
> + if (HAS_PCH_LPT(dev_priv)) {
> + mul = I915_READ(SOUTH_CHICKEN2);
> + if (panel->backlight.pwm_alternate_increment)
> + mul |= LPT_PWM_GRANULARITY;
> + else
> + mul &= ~LPT_PWM_GRANULARITY;
> + I915_WRITE(SOUTH_CHICKEN2, mul);
> + } else {
> + mul = I915_READ(SOUTH_CHICKEN1);
> + if (panel->backlight.pwm_alternate_increment)
> + mul |= SPT_PWM_GRANULARITY;
> + else
> + mul &= ~SPT_PWM_GRANULARITY;
> + I915_WRITE(SOUTH_CHICKEN1, mul);
> + }
> }
>
> static void pch_enable_backlight(struct intel_connector *connector)
> @@ -1413,7 +1429,7 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
> {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> struct intel_panel *panel = &connector->panel;
> - u32 pch_ctl1, pch_ctl2, val;
> + u32 pch_ctl1, pch_ctl2, val, mul;
>
> pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
> panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
> @@ -1436,6 +1452,16 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
>
> panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
>
> + if (HAS_PCH_LPT(dev_priv))
> + mul = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
> + else
> + mul = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
> +
> + if ( mul )
> + panel->backlight.pwm_alternate_increment = true;
> + else
> + panel->backlight.pwm_alternate_increment = false;
> +
> return 0;
> }
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume
2016-09-19 9:42 ` Jani Nikula
@ 2016-09-19 10:01 ` Lee, Shawn C
0 siblings, 0 replies; 12+ messages in thread
From: Lee, Shawn C @ 2016-09-19 10:01 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx
Understood. Thanks!
-----Original Message-----
From: Nikula, Jani
Sent: Monday, September 19, 2016 5:43 PM
To: Lee, Shawn C <shawn.c.lee@intel.com>; intel-gfx@lists.freedesktop.org
Cc: Lee, Shawn C <shawn.c.lee@intel.com>
Subject: Re: [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume
On Mon, 19 Sep 2016, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote:
> From: "Lee, Shawn C" <shawn.c.lee@intel.com>
>
> SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity
> (minimum increment) of the PWM backlight control counter. PWM
> frequency adjustment on 128 clock increments when this bit was 1. And
> 16 clock increments when it was 0.
>
> PWM frequency multiple octuple (from 200Hz to 1.6KHz) due to
> SPT_PWM_GRANULARITY was clear to 0 after S3. This patch save
> SOUTH_CHICKEN1 register value before suspend. And will restore it
> after i915 resume.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97486
Shawn, I already updated the patch. Perhaps I jumped the gun but I was expecting an update and didn't get one and wanted to move this forward.
That patch still has your authorship [1]. This one still has issues.
BR,
Jani.
[1] http://patchwork.freedesktop.org/patch/msgid/1474273457-31680-2-git-send-email-jani.nikula@intel.com
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
> Reviewed-by: Wei Shun Chen <wei.shun.chang@intel.com>
> Reviewed-by: Gary C Wang <gary.c.wang@intel.com>
> Signed-off-by: Shawn Lee <shawn.c.lee@intel.com>
> ---
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/intel_panel.c | 30 ++++++++++++++++++++++++++++--
> 2 files changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 570a7ca..c4bc690 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -256,6 +256,7 @@ struct intel_panel {
> u32 level;
> u32 min;
> u32 max;
> + bool pwm_alternate_increment;
> bool enabled;
> bool combination_mode; /* gen 2/4 only */
> bool active_low_pwm;
> diff --git a/drivers/gpu/drm/i915/intel_panel.c
> b/drivers/gpu/drm/i915/intel_panel.c
> index c10e9b0..6f8469b 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -841,7 +841,7 @@ static void lpt_enable_backlight(struct
> intel_connector *connector) {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> struct intel_panel *panel = &connector->panel;
> - u32 pch_ctl1, pch_ctl2;
> + u32 pch_ctl1, pch_ctl2, mul;
>
> pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
> if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { @@ -867,6 +867,22 @@ static
> void lpt_enable_backlight(struct intel_connector *connector)
>
> /* This won't stick until the above enable. */
> intel_panel_actually_set_backlight(connector,
> panel->backlight.level);
> +
> + if (HAS_PCH_LPT(dev_priv)) {
> + mul = I915_READ(SOUTH_CHICKEN2);
> + if (panel->backlight.pwm_alternate_increment)
> + mul |= LPT_PWM_GRANULARITY;
> + else
> + mul &= ~LPT_PWM_GRANULARITY;
> + I915_WRITE(SOUTH_CHICKEN2, mul);
> + } else {
> + mul = I915_READ(SOUTH_CHICKEN1);
> + if (panel->backlight.pwm_alternate_increment)
> + mul |= SPT_PWM_GRANULARITY;
> + else
> + mul &= ~SPT_PWM_GRANULARITY;
> + I915_WRITE(SOUTH_CHICKEN1, mul);
> + }
> }
>
> static void pch_enable_backlight(struct intel_connector *connector)
> @@ -1413,7 +1429,7 @@ static int lpt_setup_backlight(struct
> intel_connector *connector, enum pipe unus {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> struct intel_panel *panel = &connector->panel;
> - u32 pch_ctl1, pch_ctl2, val;
> + u32 pch_ctl1, pch_ctl2, val, mul;
>
> pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
> panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; @@
> -1436,6 +1452,16 @@ static int lpt_setup_backlight(struct
> intel_connector *connector, enum pipe unus
>
> panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
>
> + if (HAS_PCH_LPT(dev_priv))
> + mul = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
> + else
> + mul = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
> +
> + if ( mul )
> + panel->backlight.pwm_alternate_increment = true;
> + else
> + panel->backlight.pwm_alternate_increment = false;
> +
> return 0;
> }
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915 : Restore PWM_GRANULARITY after resume (rev3)
2016-09-08 10:18 [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume Lee, Shawn C
` (3 preceding siblings ...)
2016-09-19 9:56 ` [PATCH] " Lee, Shawn C
@ 2016-09-19 10:20 ` Patchwork
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2016-09-19 10:20 UTC (permalink / raw)
To: Lee, Shawn C; +Cc: intel-gfx
== Series Details ==
Series: drm/i915 : Restore PWM_GRANULARITY after resume (rev3)
URL : https://patchwork.freedesktop.org/series/12165/
State : success
== Summary ==
Series 12165v3 drm/i915 : Restore PWM_GRANULARITY after resume
https://patchwork.freedesktop.org/api/1.0/series/12165/revisions/3/mbox/
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-a:
dmesg-warn -> PASS (fi-skl-6700k)
fi-bdw-5557u total:244 pass:229 dwarn:0 dfail:0 fail:0 skip:15
fi-bsw-n3050 total:244 pass:202 dwarn:0 dfail:0 fail:0 skip:42
fi-byt-n2820 total:244 pass:208 dwarn:0 dfail:0 fail:1 skip:35
fi-hsw-4770k total:244 pass:226 dwarn:0 dfail:0 fail:0 skip:18
fi-hsw-4770r total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-ilk-650 total:244 pass:183 dwarn:0 dfail:0 fail:1 skip:60
fi-ivb-3520m total:244 pass:219 dwarn:0 dfail:0 fail:0 skip:25
fi-ivb-3770 total:244 pass:207 dwarn:0 dfail:0 fail:0 skip:37
fi-skl-6260u total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:244 pass:221 dwarn:0 dfail:0 fail:1 skip:22
fi-skl-6700k total:244 pass:219 dwarn:1 dfail:0 fail:0 skip:24
fi-skl-6770hq total:244 pass:228 dwarn:1 dfail:0 fail:1 skip:14
fi-snb-2520m total:244 pass:208 dwarn:0 dfail:0 fail:0 skip:36
fi-snb-2600 total:244 pass:207 dwarn:0 dfail:0 fail:0 skip:37
Results at /archive/results/CI_IGT_test/Patchwork_2552/
0d6fa72a8c18ec6ab4dbabf5202b8d1cad840e04 drm-intel-nightly: 2016y-09m-19d-09h-28m-11s UTC integration manifest
887b9f7 drm/i915 : Restore PWM_GRANULARITY after resume
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread