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From: Marc Zyngier <maz@kernel.org>
To: Reiji Watanabe <reijiw@google.com>
Cc: Oliver Upton <oliver.upton@linux.dev>,
	kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Ricardo Koller <ricarkol@google.com>,
	Jing Zhang <jingzhangos@google.com>,
	Raghavendra Rao Anata <rananta@google.com>,
	Will Deacon <will@kernel.org>
Subject: Re: [PATCH 0/4] KVM: arm64: PMU: Fix PMUVer handling on heterogeneous PMU systems
Date: Mon, 29 May 2023 14:39:28 +0100	[thread overview]
Message-ID: <87zg5njlyn.wl-maz@kernel.org> (raw)
In-Reply-To: <20230527040236.1875860-1-reijiw@google.com>

On Sat, 27 May 2023 05:02:32 +0100,
Reiji Watanabe <reijiw@google.com> wrote:
> 
> This series fixes issues with PMUVer handling for a guest with
> PMU configured on heterogeneous PMU systems.
> Specifically, it addresses the following two issues.
> 
> [A] The default value of ID_AA64DFR0_EL1.PMUVer of the vCPU is set
>     to its sanitized value.  This could be inappropriate on
>     heterogeneous PMU systems, as arm64_ftr_bits for PMUVer is defined
>     as FTR_EXACT with safe_val == 0 (when ID_AA64DFR0_EL1.PMUVer of all
>     PEs on the host is not uniform, the sanitized value will be 0).

Why is this a problem? The CPUs don't implement the same version of
the architecture, we don't get a PMU. Why should we try to do anything
better? I really don't think we should go out or out way and make the
code more complicated for something that doesn't really exist.

Or am I missing the problem altogether?

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Reiji Watanabe <reijiw@google.com>
Cc: Oliver Upton <oliver.upton@linux.dev>,
	kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Ricardo Koller <ricarkol@google.com>,
	Jing Zhang <jingzhangos@google.com>,
	Raghavendra Rao Anata <rananta@google.com>,
	Will Deacon <will@kernel.org>
Subject: Re: [PATCH 0/4] KVM: arm64: PMU: Fix PMUVer handling on heterogeneous PMU systems
Date: Mon, 29 May 2023 14:39:28 +0100	[thread overview]
Message-ID: <87zg5njlyn.wl-maz@kernel.org> (raw)
In-Reply-To: <20230527040236.1875860-1-reijiw@google.com>

On Sat, 27 May 2023 05:02:32 +0100,
Reiji Watanabe <reijiw@google.com> wrote:
> 
> This series fixes issues with PMUVer handling for a guest with
> PMU configured on heterogeneous PMU systems.
> Specifically, it addresses the following two issues.
> 
> [A] The default value of ID_AA64DFR0_EL1.PMUVer of the vCPU is set
>     to its sanitized value.  This could be inappropriate on
>     heterogeneous PMU systems, as arm64_ftr_bits for PMUVer is defined
>     as FTR_EXACT with safe_val == 0 (when ID_AA64DFR0_EL1.PMUVer of all
>     PEs on the host is not uniform, the sanitized value will be 0).

Why is this a problem? The CPUs don't implement the same version of
the architecture, we don't get a PMU. Why should we try to do anything
better? I really don't think we should go out or out way and make the
code more complicated for something that doesn't really exist.

Or am I missing the problem altogether?

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2023-05-29 13:39 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-27  4:02 [PATCH 0/4] KVM: arm64: PMU: Fix PMUVer handling on heterogeneous PMU systems Reiji Watanabe
2023-05-27  4:02 ` Reiji Watanabe
2023-05-27  4:02 ` [PATCH 1/4] KVM: arm64: PMU: Introduce a helper to set the guest's PMU Reiji Watanabe
2023-05-27  4:02   ` Reiji Watanabe
2023-05-27  4:02 ` [PATCH 2/4] KVM: arm64: PMU: Set the default PMU for the guest on vCPU reset Reiji Watanabe
2023-05-27  4:02   ` Reiji Watanabe
2023-05-27 17:35   ` kernel test robot
2023-05-27 17:35     ` kernel test robot
2023-05-27  4:02 ` [PATCH 3/4] KVM: arm64: PMU: Use PMUVer of the guest's PMU for ID_AA64DFR0.PMUVer Reiji Watanabe
2023-05-27  4:02   ` Reiji Watanabe
2023-05-27  4:02 ` [PATCH 4/4] KVM: arm64: PMU: Don't use the PMUVer of the PMU set for guest Reiji Watanabe
2023-05-27  4:02   ` Reiji Watanabe
2023-05-29 13:39 ` Marc Zyngier [this message]
2023-05-29 13:39   ` [PATCH 0/4] KVM: arm64: PMU: Fix PMUVer handling on heterogeneous PMU systems Marc Zyngier
2023-05-30 12:53   ` Reiji Watanabe
2023-05-30 12:53     ` Reiji Watanabe
2023-06-01  5:02     ` Marc Zyngier
2023-06-01  5:02       ` Marc Zyngier
2023-06-02  5:23       ` Reiji Watanabe
2023-06-02  5:23         ` Reiji Watanabe
2023-06-02  9:05         ` Marc Zyngier
2023-06-02  9:05           ` Marc Zyngier
2023-06-02 16:07           ` Reiji Watanabe
2023-06-02 16:07             ` Reiji Watanabe

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