[PATCH 0/2] ARM: shmobile: lager: enable Ether

[PATCH 0/2] ARM: shmobile: lager: enable Ether

[Simon Horman]

Hi,

this short series enables the on-board ethernet
of the r8a7790 SoC for on lager baord.

It is based on the renesas-next-20130509 tag of my renesas tree.

It has a run-time dependency on
"sh_eth: add support for r8a7790 SoC"

Simon Horman (2):
  ARM: shmobile: r8a7790: add Ether support
  ARM: shmobile: lager: enable Ether

 arch/arm/boot/dts/r8a7790-lager.dts           |  2 +-
 arch/arm/mach-shmobile/board-lager.c          | 26 ++++++++++++++++++++++++++
 arch/arm/mach-shmobile/clock-r8a7790.c        |  6 +++++-
 arch/arm/mach-shmobile/include/mach/r8a7790.h |  3 +++
 arch/arm/mach-shmobile/setup-r8a7790.c        | 15 +++++++++++++++
 5 files changed, 50 insertions(+), 2 deletions(-)

-- 
1.8.2.1

[PATCH 0/2] ARM: shmobile: lager: enable Ether

[Simon Horman]

Hi,

this short series enables the on-board ethernet
of the r8a7790 SoC for on lager baord.

It is based on the renesas-next-20130509 tag of my renesas tree.

It has a run-time dependency on
"sh_eth: add support for r8a7790 SoC"

Simon Horman (2):
  ARM: shmobile: r8a7790: add Ether support
  ARM: shmobile: lager: enable Ether

 arch/arm/boot/dts/r8a7790-lager.dts           |  2 +-
 arch/arm/mach-shmobile/board-lager.c          | 26 ++++++++++++++++++++++++++
 arch/arm/mach-shmobile/clock-r8a7790.c        |  6 +++++-
 arch/arm/mach-shmobile/include/mach/r8a7790.h |  3 +++
 arch/arm/mach-shmobile/setup-r8a7790.c        | 15 +++++++++++++++
 5 files changed, 50 insertions(+), 2 deletions(-)

-- 
1.8.2.1

[PATCH 1/2] ARM: shmobile: r8a7790: add Ether support

[Simon Horman]

Add Ether clock and platform device for R8A7779 SoC; add a function to
register this device with board-specific platform data.

Based on a similar change for the r8a7779 by Sergei Shtylyov.

Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

---

This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".
---
 arch/arm/mach-shmobile/clock-r8a7790.c        |  6 +++++-
 arch/arm/mach-shmobile/include/mach/r8a7790.h |  3 +++
 arch/arm/mach-shmobile/setup-r8a7790.c        | 15 +++++++++++++++
 3 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index bedd20c..2c3123e 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -49,6 +49,7 @@
 
 #define SMSTPCR2 0xe6150138
 #define SMSTPCR7 0xe615014c
+#define SMSTPCR8 0xe6150990
 
 #define MODEMR		0xE6160060
 #define SDCKCR		0xE6150074
@@ -178,9 +179,11 @@ static struct clk div6_clks[DIV6_NR] = {
 };
 
 /* MSTP */
-enum { MSTP721, MSTP720,
+enum { MSTP813, MSTP812, MSTP721, MSTP720,
 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR };
 static struct clk mstp_clks[MSTP_NR] = {
+	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
+	[MSTP812] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 12, 0), /* EtherAVB */
 	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
 	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
 	[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
@@ -242,6 +245,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]),
 	CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]),
 	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
+	CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP813]),
 };
 
 #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
index 2e919e6..95b8f7e 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
@@ -1,9 +1,12 @@
 #ifndef __ASM_R8A7790_H__
 #define __ASM_R8A7790_H__
 
+#include <linux/sh_eth.h>
+
 void r8a7790_add_standard_devices(void);
 void r8a7790_clock_init(void);
 void r8a7790_pinmux_init(void);
 void r8a7790_timer_init(void);
+void r8a7790_add_ether_device(struct sh_eth_plat_data *pdata);
 
 #endif /* __ASM_R8A7790_H__ */
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
index eeef5f6..8ed0d7b 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -30,6 +30,21 @@
 #include <mach/r8a7790.h>
 #include <asm/mach/arch.h>
 
+
+/* Ether */
+static struct resource ether_resources[] = {
+	DEFINE_RES_MEM(0xee700000, 0x400),
+	DEFINE_RES_IRQ(gic_spi(162)), /* IRQ0 */
+};
+
+void __init r8a7790_add_ether_device(struct sh_eth_plat_data *pdata)
+{
+	platform_device_register_resndata(&platform_bus, "sh-eth", -1,
+					  ether_resources,
+					  ARRAY_SIZE(ether_resources),
+					  pdata, sizeof(*pdata));
+}
+
 static const struct resource pfc_resources[] = {
 	DEFINE_RES_MEM(0xe6060000, 0x250),
 };
-- 
1.8.2.1

[PATCH 1/2] ARM: shmobile: r8a7790: add Ether support

[Simon Horman]

Add Ether clock and platform device for R8A7779 SoC; add a function to
register this device with board-specific platform data.

Based on a similar change for the r8a7779 by Sergei Shtylyov.

Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

---

This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".
---
 arch/arm/mach-shmobile/clock-r8a7790.c        |  6 +++++-
 arch/arm/mach-shmobile/include/mach/r8a7790.h |  3 +++
 arch/arm/mach-shmobile/setup-r8a7790.c        | 15 +++++++++++++++
 3 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index bedd20c..2c3123e 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -49,6 +49,7 @@
 
 #define SMSTPCR2 0xe6150138
 #define SMSTPCR7 0xe615014c
+#define SMSTPCR8 0xe6150990
 
 #define MODEMR		0xE6160060
 #define SDCKCR		0xE6150074
@@ -178,9 +179,11 @@ static struct clk div6_clks[DIV6_NR] = {
 };
 
 /* MSTP */
-enum { MSTP721, MSTP720,
+enum { MSTP813, MSTP812, MSTP721, MSTP720,
 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR };
 static struct clk mstp_clks[MSTP_NR] = {
+	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
+	[MSTP812] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 12, 0), /* EtherAVB */
 	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
 	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
 	[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
@@ -242,6 +245,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]),
 	CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]),
 	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
+	CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP813]),
 };
 
 #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
index 2e919e6..95b8f7e 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
@@ -1,9 +1,12 @@
 #ifndef __ASM_R8A7790_H__
 #define __ASM_R8A7790_H__
 
+#include <linux/sh_eth.h>
+
 void r8a7790_add_standard_devices(void);
 void r8a7790_clock_init(void);
 void r8a7790_pinmux_init(void);
 void r8a7790_timer_init(void);
+void r8a7790_add_ether_device(struct sh_eth_plat_data *pdata);
 
 #endif /* __ASM_R8A7790_H__ */
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
index eeef5f6..8ed0d7b 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -30,6 +30,21 @@
 #include <mach/r8a7790.h>
 #include <asm/mach/arch.h>
 
+
+/* Ether */
+static struct resource ether_resources[] = {
+	DEFINE_RES_MEM(0xee700000, 0x400),
+	DEFINE_RES_IRQ(gic_spi(162)), /* IRQ0 */
+};
+
+void __init r8a7790_add_ether_device(struct sh_eth_plat_data *pdata)
+{
+	platform_device_register_resndata(&platform_bus, "sh-eth", -1,
+					  ether_resources,
+					  ARRAY_SIZE(ether_resources),
+					  pdata, sizeof(*pdata));
+}
+
 static const struct resource pfc_resources[] = {
 	DEFINE_RES_MEM(0xe6060000, 0x250),
 };
-- 
1.8.2.1

[PATCH 2/2] ARM: shmobile: lager: enable Ether

[Simon Horman]

Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

---

This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".
---
 arch/arm/boot/dts/r8a7790-lager.dts  |  2 +-
 arch/arm/mach-shmobile/board-lager.c | 26 ++++++++++++++++++++++++++
 2 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 09a84fc..b2f61f0 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -16,7 +16,7 @@
 	compatible = "renesas,lager", "renesas,r8a7790";
 
 	chosen {
-		bootargs = "console=ttySC6,115200 ignore_loglevel";
+		bootargs = "console=ttySC6,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize@96,wsize@96 rw";
 	};
 
 	memory@40000000 {
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index 6a1ba38..0b8112d 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -18,6 +18,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 
+#include <linux/gpio.h>
 #include <linux/interrupt.h>
 #include <linux/irqchip.h>
 #include <linux/kernel.h>
@@ -52,6 +53,15 @@ static struct gpio_led_platform_data lager_leds_pdata = {
 	.num_leds	= ARRAY_SIZE(lager_leds),
 };
 
+/* Ether */
+static struct sh_eth_plat_data ether_platdata = {
+	.phy			= 0x1,
+	.edmac_endian		= EDMAC_LITTLE_ENDIAN,
+	.register_type		= SH_ETH_REG_FAST_RCAR,
+	.phy_interface		= PHY_INTERFACE_MODE_RMII,
+	.ether_link_active_low	= 1,
+};
+
 static const struct pinctrl_map lager_pinctrl_map[] = {
 	/* SCIF0 (CN19: DEBUG SERIAL0) */
 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
@@ -59,6 +69,17 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
 	/* SCIF1 (CN20: DEBUG SERIAL1) */
 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
 				  "scif1_data", "scif1"),
+	/* Ether */
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
+				  "eth_link", "eth"),
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
+				  "eth_magic", "eth"),
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
+				  "eth_mdio", "eth"),
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
+				  "eth_rmii", "eth"),
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
+				  "intc_irq0", "intc"),
 };
 
 static void __init lager_add_standard_devices(void)
@@ -73,6 +94,11 @@ static void __init lager_add_standard_devices(void)
 	platform_device_register_data(&platform_bus, "leds-gpio", -1,
 				      &lager_leds_pdata,
 				      sizeof(lager_leds_pdata));
+
+	/* Ether RESET */
+	gpio_request_one(RCAR_GP_PIN(5, 31), GPIOF_OUT_INIT_HIGH, NULL);
+
+	r8a7790_add_ether_device(&ether_platdata);
 }
 
 static const char *lager_boards_compat_dt[] __initdata = {
-- 
1.8.2.1

[PATCH 2/2] ARM: shmobile: lager: enable Ether

[Simon Horman]

Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

---

This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".
---
 arch/arm/boot/dts/r8a7790-lager.dts  |  2 +-
 arch/arm/mach-shmobile/board-lager.c | 26 ++++++++++++++++++++++++++
 2 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 09a84fc..b2f61f0 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -16,7 +16,7 @@
 	compatible = "renesas,lager", "renesas,r8a7790";
 
 	chosen {
-		bootargs = "console=ttySC6,115200 ignore_loglevel";
+		bootargs = "console=ttySC6,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw";
 	};
 
 	memory at 40000000 {
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index 6a1ba38..0b8112d 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -18,6 +18,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 
+#include <linux/gpio.h>
 #include <linux/interrupt.h>
 #include <linux/irqchip.h>
 #include <linux/kernel.h>
@@ -52,6 +53,15 @@ static struct gpio_led_platform_data lager_leds_pdata = {
 	.num_leds	= ARRAY_SIZE(lager_leds),
 };
 
+/* Ether */
+static struct sh_eth_plat_data ether_platdata = {
+	.phy			= 0x1,
+	.edmac_endian		= EDMAC_LITTLE_ENDIAN,
+	.register_type		= SH_ETH_REG_FAST_RCAR,
+	.phy_interface		= PHY_INTERFACE_MODE_RMII,
+	.ether_link_active_low	= 1,
+};
+
 static const struct pinctrl_map lager_pinctrl_map[] = {
 	/* SCIF0 (CN19: DEBUG SERIAL0) */
 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
@@ -59,6 +69,17 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
 	/* SCIF1 (CN20: DEBUG SERIAL1) */
 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
 				  "scif1_data", "scif1"),
+	/* Ether */
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
+				  "eth_link", "eth"),
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
+				  "eth_magic", "eth"),
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
+				  "eth_mdio", "eth"),
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
+				  "eth_rmii", "eth"),
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
+				  "intc_irq0", "intc"),
 };
 
 static void __init lager_add_standard_devices(void)
@@ -73,6 +94,11 @@ static void __init lager_add_standard_devices(void)
 	platform_device_register_data(&platform_bus, "leds-gpio", -1,
 				      &lager_leds_pdata,
 				      sizeof(lager_leds_pdata));
+
+	/* Ether RESET */
+	gpio_request_one(RCAR_GP_PIN(5, 31), GPIOF_OUT_INIT_HIGH, NULL);
+
+	r8a7790_add_ether_device(&ether_platdata);
 }
 
 static const char *lager_boards_compat_dt[] __initdata = {
-- 
1.8.2.1

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add Ether support

[Sergei Shtylyov]

Hello.

On 10-05-2013 12:05, Simon Horman wrote:

> Add Ether clock and platform device for R8A7779 SoC; add a function to
> register this device with board-specific platform data.

> Based on a similar change for the r8a7779 by Sergei Shtylyov.

> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

> ---

> This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".
> ---
>   arch/arm/mach-shmobile/clock-r8a7790.c        |  6 +++++-
>   arch/arm/mach-shmobile/include/mach/r8a7790.h |  3 +++
>   arch/arm/mach-shmobile/setup-r8a7790.c        | 15 +++++++++++++++
>   3 files changed, 23 insertions(+), 1 deletion(-)

> diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
> index bedd20c..2c3123e 100644
> --- a/arch/arm/mach-shmobile/clock-r8a7790.c
> +++ b/arch/arm/mach-shmobile/clock-r8a7790.c
[...]
> @@ -178,9 +179,11 @@ static struct clk div6_clks[DIV6_NR] = {
>   };
>
>   /* MSTP */
> -enum { MSTP721, MSTP720,
> +enum { MSTP813, MSTP812,

    I think these two should be on a line of their own...

> MSTP721, MSTP720,
>   	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR };
>   static struct clk mstp_clks[MSTP_NR] = {
> +	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
> +	[MSTP812] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 12, 0), /* EtherAVB */
>   	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
>   	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
>   	[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
[...]
> diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> index 2e919e6..95b8f7e 100644
> --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
> +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> @@ -1,9 +1,12 @@
>   #ifndef __ASM_R8A7790_H__
>   #define __ASM_R8A7790_H__
>
> +#include <linux/sh_eth.h>
> +
>   void r8a7790_add_standard_devices(void);
>   void r8a7790_clock_init(void);
>   void r8a7790_pinmux_init(void);
>   void r8a7790_timer_init(void);
> +void r8a7790_add_ether_device(struct sh_eth_plat_data *pdata);

    Perhaps better place is right after r8a7790_add_standard_devices()...

>   #endif /* __ASM_R8A7790_H__ */
> diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
> index eeef5f6..8ed0d7b 100644
> --- a/arch/arm/mach-shmobile/setup-r8a7790.c
> +++ b/arch/arm/mach-shmobile/setup-r8a7790.c
> @@ -30,6 +30,21 @@
>   #include <mach/r8a7790.h>
>   #include <asm/mach/arch.h>
>
> +
> +/* Ether */
> +static struct resource ether_resources[] = {

    You missed the '__initdata' annotation.

> +	DEFINE_RES_MEM(0xee700000, 0x400),
> +	DEFINE_RES_IRQ(gic_spi(162)), /* IRQ0 */
> +};

WBR, Sergei

[PATCH 1/2] ARM: shmobile: r8a7790: add Ether support

[Sergei Shtylyov]

Hello.

On 10-05-2013 12:05, Simon Horman wrote:

> Add Ether clock and platform device for R8A7779 SoC; add a function to
> register this device with board-specific platform data.

> Based on a similar change for the r8a7779 by Sergei Shtylyov.

> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

> ---

> This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".
> ---
>   arch/arm/mach-shmobile/clock-r8a7790.c        |  6 +++++-
>   arch/arm/mach-shmobile/include/mach/r8a7790.h |  3 +++
>   arch/arm/mach-shmobile/setup-r8a7790.c        | 15 +++++++++++++++
>   3 files changed, 23 insertions(+), 1 deletion(-)

> diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
> index bedd20c..2c3123e 100644
> --- a/arch/arm/mach-shmobile/clock-r8a7790.c
> +++ b/arch/arm/mach-shmobile/clock-r8a7790.c
[...]
> @@ -178,9 +179,11 @@ static struct clk div6_clks[DIV6_NR] = {
>   };
>
>   /* MSTP */
> -enum { MSTP721, MSTP720,
> +enum { MSTP813, MSTP812,

    I think these two should be on a line of their own...

> MSTP721, MSTP720,
>   	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR };
>   static struct clk mstp_clks[MSTP_NR] = {
> +	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
> +	[MSTP812] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 12, 0), /* EtherAVB */
>   	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
>   	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
>   	[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
[...]
> diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> index 2e919e6..95b8f7e 100644
> --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
> +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> @@ -1,9 +1,12 @@
>   #ifndef __ASM_R8A7790_H__
>   #define __ASM_R8A7790_H__
>
> +#include <linux/sh_eth.h>
> +
>   void r8a7790_add_standard_devices(void);
>   void r8a7790_clock_init(void);
>   void r8a7790_pinmux_init(void);
>   void r8a7790_timer_init(void);
> +void r8a7790_add_ether_device(struct sh_eth_plat_data *pdata);

    Perhaps better place is right after r8a7790_add_standard_devices()...

>   #endif /* __ASM_R8A7790_H__ */
> diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
> index eeef5f6..8ed0d7b 100644
> --- a/arch/arm/mach-shmobile/setup-r8a7790.c
> +++ b/arch/arm/mach-shmobile/setup-r8a7790.c
> @@ -30,6 +30,21 @@
>   #include <mach/r8a7790.h>
>   #include <asm/mach/arch.h>
>
> +
> +/* Ether */
> +static struct resource ether_resources[] = {

    You missed the '__initdata' annotation.

> +	DEFINE_RES_MEM(0xee700000, 0x400),
> +	DEFINE_RES_IRQ(gic_spi(162)), /* IRQ0 */
> +};

WBR, Sergei

Re: [PATCH 2/2] ARM: shmobile: lager: enable Ether

[Sergei Shtylyov]

Hello.

On 10-05-2013 12:05, Simon Horman wrote:

> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

> ---

> This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".
> ---
>   arch/arm/boot/dts/r8a7790-lager.dts  |  2 +-
>   arch/arm/mach-shmobile/board-lager.c | 26 ++++++++++++++++++++++++++
>   2 files changed, 27 insertions(+), 1 deletion(-)

> diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
> index 09a84fc..b2f61f0 100644
> --- a/arch/arm/boot/dts/r8a7790-lager.dts
> +++ b/arch/arm/boot/dts/r8a7790-lager.dts
> @@ -16,7 +16,7 @@
>   	compatible = "renesas,lager", "renesas,r8a7790";
>
>   	chosen {
> -		bootargs = "console=ttySC6,115200 ignore_loglevel";
> +		bootargs = "console=ttySC6,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize@96,wsize@96 rw";
>   	};
>
>   	memory@40000000 {

    Perhaps you shouldn't mix .dts changes with source changes?

> diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
> index 6a1ba38..0b8112d 100644
> --- a/arch/arm/mach-shmobile/board-lager.c
> +++ b/arch/arm/mach-shmobile/board-lager.c
[...]
> @@ -59,6 +69,17 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
>   	/* SCIF1 (CN20: DEBUG SERIAL1) */
>   	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
>   				  "scif1_data", "scif1"),
> +	/* Ether */
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_link", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_magic", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_mdio", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_rmii", "eth"),

     I thought MDIO bus was a part of RMII. At least Wikipedia told me 
so. :-)

WBR, Sergei

[PATCH 2/2] ARM: shmobile: lager: enable Ether

[Sergei Shtylyov]

Hello.

On 10-05-2013 12:05, Simon Horman wrote:

> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

> ---

> This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".
> ---
>   arch/arm/boot/dts/r8a7790-lager.dts  |  2 +-
>   arch/arm/mach-shmobile/board-lager.c | 26 ++++++++++++++++++++++++++
>   2 files changed, 27 insertions(+), 1 deletion(-)

> diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
> index 09a84fc..b2f61f0 100644
> --- a/arch/arm/boot/dts/r8a7790-lager.dts
> +++ b/arch/arm/boot/dts/r8a7790-lager.dts
> @@ -16,7 +16,7 @@
>   	compatible = "renesas,lager", "renesas,r8a7790";
>
>   	chosen {
> -		bootargs = "console=ttySC6,115200 ignore_loglevel";
> +		bootargs = "console=ttySC6,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw";
>   	};
>
>   	memory at 40000000 {

    Perhaps you shouldn't mix .dts changes with source changes?

> diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
> index 6a1ba38..0b8112d 100644
> --- a/arch/arm/mach-shmobile/board-lager.c
> +++ b/arch/arm/mach-shmobile/board-lager.c
[...]
> @@ -59,6 +69,17 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
>   	/* SCIF1 (CN20: DEBUG SERIAL1) */
>   	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
>   				  "scif1_data", "scif1"),
> +	/* Ether */
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_link", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_magic", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_mdio", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_rmii", "eth"),

     I thought MDIO bus was a part of RMII. At least Wikipedia told me 
so. :-)

WBR, Sergei

Re: [PATCH 2/2] ARM: shmobile: lager: enable Ether

[Simon Horman]

[ CC Laurent ]

On Fri, May 10, 2013 at 02:35:01PM +0400, Sergei Shtylyov wrote:
> Hello.
> 
> On 10-05-2013 12:05, Simon Horman wrote:
> 
> >Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> >---
> 
> >This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".
> >---
> >  arch/arm/boot/dts/r8a7790-lager.dts  |  2 +-
> >  arch/arm/mach-shmobile/board-lager.c | 26 ++++++++++++++++++++++++++
> >  2 files changed, 27 insertions(+), 1 deletion(-)
> 
> >diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
> >index 09a84fc..b2f61f0 100644
> >--- a/arch/arm/boot/dts/r8a7790-lager.dts
> >+++ b/arch/arm/boot/dts/r8a7790-lager.dts
> >@@ -16,7 +16,7 @@
> >  	compatible = "renesas,lager", "renesas,r8a7790";
> >
> >  	chosen {
> >-		bootargs = "console=ttySC6,115200 ignore_loglevel";
> >+		bootargs = "console=ttySC6,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize@96,wsize@96 rw";
> >  	};
> >
> >  	memory@40000000 {
> 
>    Perhaps you shouldn't mix .dts changes with source changes?

Sure, I can break that out into a separate patch.

> 
> >diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
> >index 6a1ba38..0b8112d 100644
> >--- a/arch/arm/mach-shmobile/board-lager.c
> >+++ b/arch/arm/mach-shmobile/board-lager.c
> [...]
> >@@ -59,6 +69,17 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
> >  	/* SCIF1 (CN20: DEBUG SERIAL1) */
> >  	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
> >  				  "scif1_data", "scif1"),
> >+	/* Ether */
> >+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >+				  "eth_link", "eth"),
> >+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >+				  "eth_magic", "eth"),
> >+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >+				  "eth_mdio", "eth"),
> >+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >+				  "eth_rmii", "eth"),
> 
>     I thought MDIO bus was a part of RMII. At least Wikipedia told
> me so. :-)

Is the implication that you think that the eth_mdio and eth_rmii
groups should be combined?

[PATCH 2/2] ARM: shmobile: lager: enable Ether

[Simon Horman]

[ CC Laurent ]

On Fri, May 10, 2013 at 02:35:01PM +0400, Sergei Shtylyov wrote:
> Hello.
> 
> On 10-05-2013 12:05, Simon Horman wrote:
> 
> >Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> >---
> 
> >This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".
> >---
> >  arch/arm/boot/dts/r8a7790-lager.dts  |  2 +-
> >  arch/arm/mach-shmobile/board-lager.c | 26 ++++++++++++++++++++++++++
> >  2 files changed, 27 insertions(+), 1 deletion(-)
> 
> >diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
> >index 09a84fc..b2f61f0 100644
> >--- a/arch/arm/boot/dts/r8a7790-lager.dts
> >+++ b/arch/arm/boot/dts/r8a7790-lager.dts
> >@@ -16,7 +16,7 @@
> >  	compatible = "renesas,lager", "renesas,r8a7790";
> >
> >  	chosen {
> >-		bootargs = "console=ttySC6,115200 ignore_loglevel";
> >+		bootargs = "console=ttySC6,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw";
> >  	};
> >
> >  	memory at 40000000 {
> 
>    Perhaps you shouldn't mix .dts changes with source changes?

Sure, I can break that out into a separate patch.

> 
> >diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
> >index 6a1ba38..0b8112d 100644
> >--- a/arch/arm/mach-shmobile/board-lager.c
> >+++ b/arch/arm/mach-shmobile/board-lager.c
> [...]
> >@@ -59,6 +69,17 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
> >  	/* SCIF1 (CN20: DEBUG SERIAL1) */
> >  	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
> >  				  "scif1_data", "scif1"),
> >+	/* Ether */
> >+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >+				  "eth_link", "eth"),
> >+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >+				  "eth_magic", "eth"),
> >+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >+				  "eth_mdio", "eth"),
> >+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >+				  "eth_rmii", "eth"),
> 
>     I thought MDIO bus was a part of RMII. At least Wikipedia told
> me so. :-)

Is the implication that you think that the eth_mdio and eth_rmii
groups should be combined?

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add Ether support

[Simon Horman]

On Fri, May 10, 2013 at 02:26:50PM +0400, Sergei Shtylyov wrote:
> Hello.
> 
> On 10-05-2013 12:05, Simon Horman wrote:
> 
> >Add Ether clock and platform device for R8A7779 SoC; add a function to
> >register this device with board-specific platform data.
> 
> >Based on a similar change for the r8a7779 by Sergei Shtylyov.
> 
> >Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> >---
> 
> >This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".
> >---
> >  arch/arm/mach-shmobile/clock-r8a7790.c        |  6 +++++-
> >  arch/arm/mach-shmobile/include/mach/r8a7790.h |  3 +++
> >  arch/arm/mach-shmobile/setup-r8a7790.c        | 15 +++++++++++++++
> >  3 files changed, 23 insertions(+), 1 deletion(-)
> 
> >diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
> >index bedd20c..2c3123e 100644
> >--- a/arch/arm/mach-shmobile/clock-r8a7790.c
> >+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
> [...]
> >@@ -178,9 +179,11 @@ static struct clk div6_clks[DIV6_NR] = {
> >  };
> >
> >  /* MSTP */
> >-enum { MSTP721, MSTP720,
> >+enum { MSTP813, MSTP812,
> 
>    I think these two should be on a line of their own...
> 
> >MSTP721, MSTP720,
> >  	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR };
> >  static struct clk mstp_clks[MSTP_NR] = {
> >+	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
> >+	[MSTP812] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 12, 0), /* EtherAVB */
> >  	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
> >  	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
> >  	[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
> [...]
> >diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >index 2e919e6..95b8f7e 100644
> >--- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >@@ -1,9 +1,12 @@
> >  #ifndef __ASM_R8A7790_H__
> >  #define __ASM_R8A7790_H__
> >
> >+#include <linux/sh_eth.h>
> >+
> >  void r8a7790_add_standard_devices(void);
> >  void r8a7790_clock_init(void);
> >  void r8a7790_pinmux_init(void);
> >  void r8a7790_timer_init(void);
> >+void r8a7790_add_ether_device(struct sh_eth_plat_data *pdata);
> 
>    Perhaps better place is right after r8a7790_add_standard_devices()...

Is the implication that the struct sh_eth_plat_data can be defined
in setup-r8a7790.c? Or do you for see adding a struct sh_eth_plat_data
parameter to r8a7790_add_standard_devices() ?

> >  #endif /* __ASM_R8A7790_H__ */
> >diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
> >index eeef5f6..8ed0d7b 100644
> >--- a/arch/arm/mach-shmobile/setup-r8a7790.c
> >+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
> >@@ -30,6 +30,21 @@
> >  #include <mach/r8a7790.h>
> >  #include <asm/mach/arch.h>
> >
> >+
> >+/* Ether */
> >+static struct resource ether_resources[] = {
> 
>    You missed the '__initdata' annotation.

Thanks, I will fix that.

> 
> >+	DEFINE_RES_MEM(0xee700000, 0x400),
> >+	DEFINE_RES_IRQ(gic_spi(162)), /* IRQ0 */
> >+};

[PATCH 1/2] ARM: shmobile: r8a7790: add Ether support

[Simon Horman]

On Fri, May 10, 2013 at 02:26:50PM +0400, Sergei Shtylyov wrote:
> Hello.
> 
> On 10-05-2013 12:05, Simon Horman wrote:
> 
> >Add Ether clock and platform device for R8A7779 SoC; add a function to
> >register this device with board-specific platform data.
> 
> >Based on a similar change for the r8a7779 by Sergei Shtylyov.
> 
> >Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> >---
> 
> >This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".
> >---
> >  arch/arm/mach-shmobile/clock-r8a7790.c        |  6 +++++-
> >  arch/arm/mach-shmobile/include/mach/r8a7790.h |  3 +++
> >  arch/arm/mach-shmobile/setup-r8a7790.c        | 15 +++++++++++++++
> >  3 files changed, 23 insertions(+), 1 deletion(-)
> 
> >diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
> >index bedd20c..2c3123e 100644
> >--- a/arch/arm/mach-shmobile/clock-r8a7790.c
> >+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
> [...]
> >@@ -178,9 +179,11 @@ static struct clk div6_clks[DIV6_NR] = {
> >  };
> >
> >  /* MSTP */
> >-enum { MSTP721, MSTP720,
> >+enum { MSTP813, MSTP812,
> 
>    I think these two should be on a line of their own...
> 
> >MSTP721, MSTP720,
> >  	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR };
> >  static struct clk mstp_clks[MSTP_NR] = {
> >+	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
> >+	[MSTP812] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 12, 0), /* EtherAVB */
> >  	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
> >  	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
> >  	[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
> [...]
> >diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >index 2e919e6..95b8f7e 100644
> >--- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >@@ -1,9 +1,12 @@
> >  #ifndef __ASM_R8A7790_H__
> >  #define __ASM_R8A7790_H__
> >
> >+#include <linux/sh_eth.h>
> >+
> >  void r8a7790_add_standard_devices(void);
> >  void r8a7790_clock_init(void);
> >  void r8a7790_pinmux_init(void);
> >  void r8a7790_timer_init(void);
> >+void r8a7790_add_ether_device(struct sh_eth_plat_data *pdata);
> 
>    Perhaps better place is right after r8a7790_add_standard_devices()...

Is the implication that the struct sh_eth_plat_data can be defined
in setup-r8a7790.c? Or do you for see adding a struct sh_eth_plat_data
parameter to r8a7790_add_standard_devices() ?

> >  #endif /* __ASM_R8A7790_H__ */
> >diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
> >index eeef5f6..8ed0d7b 100644
> >--- a/arch/arm/mach-shmobile/setup-r8a7790.c
> >+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
> >@@ -30,6 +30,21 @@
> >  #include <mach/r8a7790.h>
> >  #include <asm/mach/arch.h>
> >
> >+
> >+/* Ether */
> >+static struct resource ether_resources[] = {
> 
>    You missed the '__initdata' annotation.

Thanks, I will fix that.

> 
> >+	DEFINE_RES_MEM(0xee700000, 0x400),
> >+	DEFINE_RES_IRQ(gic_spi(162)), /* IRQ0 */
> >+};

Re: [PATCH 2/2] ARM: shmobile: lager: enable Ether

[Sergei Shtylyov]

On 13.05.2013 4:40, Simon Horman wrote:
> [ CC Laurent ]

>>> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>>> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

>>> ---

>>> This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".

[...]

>>> diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
>>> index 6a1ba38..0b8112d 100644
>>> --- a/arch/arm/mach-shmobile/board-lager.c
>>> +++ b/arch/arm/mach-shmobile/board-lager.c
>> [...]
>>> @@ -59,6 +69,17 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
>>>   	/* SCIF1 (CN20: DEBUG SERIAL1) */
>>>   	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
>>>   				  "scif1_data", "scif1"),
>>> +	/* Ether */
>>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
>>> +				  "eth_link", "eth"),
>>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
>>> +				  "eth_magic", "eth"),
>>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
>>> +				  "eth_mdio", "eth"),
>>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
>>> +				  "eth_rmii", "eth"),

>>      I thought MDIO bus was a part of RMII. At least Wikipedia told
>> me so. :-)

> Is the implication that you think that the eth_mdio and eth_rmii
> groups should be combined?

     Well, yes.

WBR, Sergei

[PATCH 2/2] ARM: shmobile: lager: enable Ether

[Sergei Shtylyov]

On 13.05.2013 4:40, Simon Horman wrote:
> [ CC Laurent ]

>>> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>>> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

>>> ---

>>> This patch has a run-time dependency on "sh_eth: add support for r8a7790 SoC".

[...]

>>> diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
>>> index 6a1ba38..0b8112d 100644
>>> --- a/arch/arm/mach-shmobile/board-lager.c
>>> +++ b/arch/arm/mach-shmobile/board-lager.c
>> [...]
>>> @@ -59,6 +69,17 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
>>>   	/* SCIF1 (CN20: DEBUG SERIAL1) */
>>>   	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
>>>   				  "scif1_data", "scif1"),
>>> +	/* Ether */
>>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
>>> +				  "eth_link", "eth"),
>>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
>>> +				  "eth_magic", "eth"),
>>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
>>> +				  "eth_mdio", "eth"),
>>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
>>> +				  "eth_rmii", "eth"),

>>      I thought MDIO bus was a part of RMII. At least Wikipedia told
>> me so. :-)

> Is the implication that you think that the eth_mdio and eth_rmii
> groups should be combined?

     Well, yes.

WBR, Sergei

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add Ether support

[Sergei Shtylyov]

Hello.

On 13-05-2013 4:43, Simon Horman wrote:

>>> Add Ether clock and platform device for R8A7779 SoC; add a function to
>>> register this device with board-specific platform data.

>>> Based on a similar change for the r8a7779 by Sergei Shtylyov.

>>> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>>> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

[...]

>>> diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
>>> index 2e919e6..95b8f7e 100644
>>> --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
>>> +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
>>> @@ -1,9 +1,12 @@
>>>   #ifndef __ASM_R8A7790_H__
>>>   #define __ASM_R8A7790_H__
>>>
>>> +#include <linux/sh_eth.h>
>>> +
>>>   void r8a7790_add_standard_devices(void);
>>>   void r8a7790_clock_init(void);
>>>   void r8a7790_pinmux_init(void);
>>>   void r8a7790_timer_init(void);
>>> +void r8a7790_add_ether_device(struct sh_eth_plat_data *pdata);

>>     Perhaps better place is right after r8a7790_add_standard_devices()...

> Is the implication that the struct sh_eth_plat_data can be defined
> in setup-r8a7790.c?

    No, why?

> Or do you for see adding a struct sh_eth_plat_data
> parameter to r8a7790_add_standard_devices() ?

    Not at all.

WBR, Sergei

[PATCH 1/2] ARM: shmobile: r8a7790: add Ether support

[Sergei Shtylyov]

Hello.

On 13-05-2013 4:43, Simon Horman wrote:

>>> Add Ether clock and platform device for R8A7779 SoC; add a function to
>>> register this device with board-specific platform data.

>>> Based on a similar change for the r8a7779 by Sergei Shtylyov.

>>> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>>> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

[...]

>>> diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
>>> index 2e919e6..95b8f7e 100644
>>> --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
>>> +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
>>> @@ -1,9 +1,12 @@
>>>   #ifndef __ASM_R8A7790_H__
>>>   #define __ASM_R8A7790_H__
>>>
>>> +#include <linux/sh_eth.h>
>>> +
>>>   void r8a7790_add_standard_devices(void);
>>>   void r8a7790_clock_init(void);
>>>   void r8a7790_pinmux_init(void);
>>>   void r8a7790_timer_init(void);
>>> +void r8a7790_add_ether_device(struct sh_eth_plat_data *pdata);

>>     Perhaps better place is right after r8a7790_add_standard_devices()...

> Is the implication that the struct sh_eth_plat_data can be defined
> in setup-r8a7790.c?

    No, why?

> Or do you for see adding a struct sh_eth_plat_data
> parameter to r8a7790_add_standard_devices() ?

    Not at all.

WBR, Sergei

Re: [PATCH 2/2] ARM: shmobile: lager: enable Ether

[Laurent Pinchart]

On Monday 13 May 2013 17:04:41 Sergei Shtylyov wrote:
> On 13.05.2013 4:40, Simon Horman wrote:
> > [ CC Laurent ]
> > 
> >>> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >>> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> >>> 
> >>> ---
> >>> 
> >>> This patch has a run-time dependency on "sh_eth: add support for r8a7790
> >>> SoC".
> [...]
> 
> >>> diff --git a/arch/arm/mach-shmobile/board-lager.c
> >>> b/arch/arm/mach-shmobile/board-lager.c index 6a1ba38..0b8112d 100644
> >>> --- a/arch/arm/mach-shmobile/board-lager.c
> >>> +++ b/arch/arm/mach-shmobile/board-lager.c
> >> 
> >> [...]
> >> 
> >>> @@ -59,6 +69,17 @@ static const struct pinctrl_map lager_pinctrl_map[] > >>> {
> >>> 
> >>>   	/* SCIF1 (CN20: DEBUG SERIAL1) */
> >>>   	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
> >>>   	
> >>>   				  "scif1_data", "scif1"),
> >>> 
> >>> +	/* Ether */
> >>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >>> +				  "eth_link", "eth"),
> >>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >>> +				  "eth_magic", "eth"),
> >>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >>> +				  "eth_mdio", "eth"),
> >>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >>> +				  "eth_rmii", "eth"),
> >>> 
> >>      I thought MDIO bus was a part of RMII. At least Wikipedia told
> >> 
> >> me so. :-)
> > 
> > Is the implication that you think that the eth_mdio and eth_rmii
> > groups should be combined?

MDIO is used by RMII, MII and (R)GMII. Merging eth_mdio and eth_rmii would 
require duplicating the pins in all those ethernet-related functions.

-- 
Regards,

Laurent Pinchart

[PATCH 2/2] ARM: shmobile: lager: enable Ether

[Laurent Pinchart]

On Monday 13 May 2013 17:04:41 Sergei Shtylyov wrote:
> On 13.05.2013 4:40, Simon Horman wrote:
> > [ CC Laurent ]
> > 
> >>> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >>> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> >>> 
> >>> ---
> >>> 
> >>> This patch has a run-time dependency on "sh_eth: add support for r8a7790
> >>> SoC".
> [...]
> 
> >>> diff --git a/arch/arm/mach-shmobile/board-lager.c
> >>> b/arch/arm/mach-shmobile/board-lager.c index 6a1ba38..0b8112d 100644
> >>> --- a/arch/arm/mach-shmobile/board-lager.c
> >>> +++ b/arch/arm/mach-shmobile/board-lager.c
> >> 
> >> [...]
> >> 
> >>> @@ -59,6 +69,17 @@ static const struct pinctrl_map lager_pinctrl_map[] =
> >>> {
> >>> 
> >>>   	/* SCIF1 (CN20: DEBUG SERIAL1) */
> >>>   	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
> >>>   	
> >>>   				  "scif1_data", "scif1"),
> >>> 
> >>> +	/* Ether */
> >>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >>> +				  "eth_link", "eth"),
> >>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >>> +				  "eth_magic", "eth"),
> >>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >>> +				  "eth_mdio", "eth"),
> >>> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> >>> +				  "eth_rmii", "eth"),
> >>> 
> >>      I thought MDIO bus was a part of RMII. At least Wikipedia told
> >> 
> >> me so. :-)
> > 
> > Is the implication that you think that the eth_mdio and eth_rmii
> > groups should be combined?

MDIO is used by RMII, MII and (R)GMII. Merging eth_mdio and eth_rmii would 
require duplicating the pins in all those ethernet-related functions.

-- 
Regards,

Laurent Pinchart

Re: [PATCH 2/2] ARM: shmobile: lager: enable Ether

[Laurent Pinchart]

Hi Simon,

On Friday 10 May 2013 17:05:19 Simon Horman wrote:
> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> ---
> 
> This patch has a run-time dependency on "sh_eth: add support for r8a7790
> SoC". ---
>  arch/arm/boot/dts/r8a7790-lager.dts  |  2 +-
>  arch/arm/mach-shmobile/board-lager.c | 26 ++++++++++++++++++++++++++
>  2 files changed, 27 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/r8a7790-lager.dts
> b/arch/arm/boot/dts/r8a7790-lager.dts index 09a84fc..b2f61f0 100644
> --- a/arch/arm/boot/dts/r8a7790-lager.dts
> +++ b/arch/arm/boot/dts/r8a7790-lager.dts
> @@ -16,7 +16,7 @@
>  	compatible = "renesas,lager", "renesas,r8a7790";
> 
>  	chosen {
> -		bootargs = "console=ttySC6,115200 ignore_loglevel";
> +		bootargs = "console=ttySC6,115200 ignore_loglevel root=/dev/nfs 
ip=dhcp
> nfsroot=,rsize@96,wsize@96 rw"; };
> 
>  	memory@40000000 {
> diff --git a/arch/arm/mach-shmobile/board-lager.c
> b/arch/arm/mach-shmobile/board-lager.c index 6a1ba38..0b8112d 100644
> --- a/arch/arm/mach-shmobile/board-lager.c
> +++ b/arch/arm/mach-shmobile/board-lager.c
> @@ -18,6 +18,7 @@
>   * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 
> USA */
> 
> +#include <linux/gpio.h>
>  #include <linux/interrupt.h>
>  #include <linux/irqchip.h>
>  #include <linux/kernel.h>
> @@ -52,6 +53,15 @@ static struct gpio_led_platform_data lager_leds_pdata = {
> .num_leds	= ARRAY_SIZE(lager_leds),
>  };
> 
> +/* Ether */
> +static struct sh_eth_plat_data ether_platdata = {
> +	.phy			= 0x1,
> +	.edmac_endian		= EDMAC_LITTLE_ENDIAN,
> +	.register_type		= SH_ETH_REG_FAST_RCAR,
> +	.phy_interface		= PHY_INTERFACE_MODE_RMII,
> +	.ether_link_active_low	= 1,
> +};
> +
>  static const struct pinctrl_map lager_pinctrl_map[] = {
>  	/* SCIF0 (CN19: DEBUG SERIAL0) */
>  	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
> @@ -59,6 +69,17 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
>  	/* SCIF1 (CN20: DEBUG SERIAL1) */
>  	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
>  				  "scif1_data", "scif1"),
> +	/* Ether */
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_link", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_magic", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_mdio", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_rmii", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "intc_irq0", "intc"),
>  };
> 
>  static void __init lager_add_standard_devices(void)
> @@ -73,6 +94,11 @@ static void __init lager_add_standard_devices(void)
>  	platform_device_register_data(&platform_bus, "leds-gpio", -1,
>  				      &lager_leds_pdata,
>  				      sizeof(lager_leds_pdata));
> +
> +	/* Ether RESET */
> +	gpio_request_one(RCAR_GP_PIN(5, 31), GPIOF_OUT_INIT_HIGH, NULL);

Please don't touch GPIOs directly from board files. The reset GPIO number 
should be passed to the related device through platform data (and/or DT), and 
GPIO handling should be moved to the driver.

> +	r8a7790_add_ether_device(&ether_platdata);
>  }
> 
>  static const char *lager_boards_compat_dt[] __initdata = {
-- 
Regards,

Laurent Pinchart

[PATCH 2/2] ARM: shmobile: lager: enable Ether

[Laurent Pinchart]

Hi Simon,

On Friday 10 May 2013 17:05:19 Simon Horman wrote:
> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> ---
> 
> This patch has a run-time dependency on "sh_eth: add support for r8a7790
> SoC". ---
>  arch/arm/boot/dts/r8a7790-lager.dts  |  2 +-
>  arch/arm/mach-shmobile/board-lager.c | 26 ++++++++++++++++++++++++++
>  2 files changed, 27 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/r8a7790-lager.dts
> b/arch/arm/boot/dts/r8a7790-lager.dts index 09a84fc..b2f61f0 100644
> --- a/arch/arm/boot/dts/r8a7790-lager.dts
> +++ b/arch/arm/boot/dts/r8a7790-lager.dts
> @@ -16,7 +16,7 @@
>  	compatible = "renesas,lager", "renesas,r8a7790";
> 
>  	chosen {
> -		bootargs = "console=ttySC6,115200 ignore_loglevel";
> +		bootargs = "console=ttySC6,115200 ignore_loglevel root=/dev/nfs 
ip=dhcp
> nfsroot=,rsize=4096,wsize=4096 rw"; };
> 
>  	memory at 40000000 {
> diff --git a/arch/arm/mach-shmobile/board-lager.c
> b/arch/arm/mach-shmobile/board-lager.c index 6a1ba38..0b8112d 100644
> --- a/arch/arm/mach-shmobile/board-lager.c
> +++ b/arch/arm/mach-shmobile/board-lager.c
> @@ -18,6 +18,7 @@
>   * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 
> USA */
> 
> +#include <linux/gpio.h>
>  #include <linux/interrupt.h>
>  #include <linux/irqchip.h>
>  #include <linux/kernel.h>
> @@ -52,6 +53,15 @@ static struct gpio_led_platform_data lager_leds_pdata = {
> .num_leds	= ARRAY_SIZE(lager_leds),
>  };
> 
> +/* Ether */
> +static struct sh_eth_plat_data ether_platdata = {
> +	.phy			= 0x1,
> +	.edmac_endian		= EDMAC_LITTLE_ENDIAN,
> +	.register_type		= SH_ETH_REG_FAST_RCAR,
> +	.phy_interface		= PHY_INTERFACE_MODE_RMII,
> +	.ether_link_active_low	= 1,
> +};
> +
>  static const struct pinctrl_map lager_pinctrl_map[] = {
>  	/* SCIF0 (CN19: DEBUG SERIAL0) */
>  	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
> @@ -59,6 +69,17 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
>  	/* SCIF1 (CN20: DEBUG SERIAL1) */
>  	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
>  				  "scif1_data", "scif1"),
> +	/* Ether */
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_link", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_magic", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_mdio", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "eth_rmii", "eth"),
> +	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7790",
> +				  "intc_irq0", "intc"),
>  };
> 
>  static void __init lager_add_standard_devices(void)
> @@ -73,6 +94,11 @@ static void __init lager_add_standard_devices(void)
>  	platform_device_register_data(&platform_bus, "leds-gpio", -1,
>  				      &lager_leds_pdata,
>  				      sizeof(lager_leds_pdata));
> +
> +	/* Ether RESET */
> +	gpio_request_one(RCAR_GP_PIN(5, 31), GPIOF_OUT_INIT_HIGH, NULL);

Please don't touch GPIOs directly from board files. The reset GPIO number 
should be passed to the related device through platform data (and/or DT), and 
GPIO handling should be moved to the driver.

> +	r8a7790_add_ether_device(&ether_platdata);
>  }
> 
>  static const char *lager_boards_compat_dt[] __initdata = {
-- 
Regards,

Laurent Pinchart

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add Ether support

[Simon Horman]

On Mon, May 13, 2013 at 05:07:49PM +0400, Sergei Shtylyov wrote:
> Hello.
> 
> On 13-05-2013 4:43, Simon Horman wrote:
> 
> >>>Add Ether clock and platform device for R8A7779 SoC; add a function to
> >>>register this device with board-specific platform data.
> 
> >>>Based on a similar change for the r8a7779 by Sergei Shtylyov.
> 
> >>>Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >>>Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> [...]
> 
> >>>diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >>>index 2e919e6..95b8f7e 100644
> >>>--- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >>>+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >>>@@ -1,9 +1,12 @@
> >>>  #ifndef __ASM_R8A7790_H__
> >>>  #define __ASM_R8A7790_H__
> >>>
> >>>+#include <linux/sh_eth.h>
> >>>+
> >>>  void r8a7790_add_standard_devices(void);
> >>>  void r8a7790_clock_init(void);
> >>>  void r8a7790_pinmux_init(void);
> >>>  void r8a7790_timer_init(void);
> >>>+void r8a7790_add_ether_device(struct sh_eth_plat_data *pdata);
> 
> >>    Perhaps better place is right after r8a7790_add_standard_devices()...
> 
> >Is the implication that the struct sh_eth_plat_data can be defined
> >in setup-r8a7790.c?
> 
>    No, why?
> 
> >Or do you for see adding a struct sh_eth_plat_data
> >parameter to r8a7790_add_standard_devices() ?
> 
>    Not at all.

Sorry, I miss-read your previous email.

[PATCH 1/2] ARM: shmobile: r8a7790: add Ether support

[Simon Horman]

On Mon, May 13, 2013 at 05:07:49PM +0400, Sergei Shtylyov wrote:
> Hello.
> 
> On 13-05-2013 4:43, Simon Horman wrote:
> 
> >>>Add Ether clock and platform device for R8A7779 SoC; add a function to
> >>>register this device with board-specific platform data.
> 
> >>>Based on a similar change for the r8a7779 by Sergei Shtylyov.
> 
> >>>Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >>>Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> [...]
> 
> >>>diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >>>index 2e919e6..95b8f7e 100644
> >>>--- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >>>+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >>>@@ -1,9 +1,12 @@
> >>>  #ifndef __ASM_R8A7790_H__
> >>>  #define __ASM_R8A7790_H__
> >>>
> >>>+#include <linux/sh_eth.h>
> >>>+
> >>>  void r8a7790_add_standard_devices(void);
> >>>  void r8a7790_clock_init(void);
> >>>  void r8a7790_pinmux_init(void);
> >>>  void r8a7790_timer_init(void);
> >>>+void r8a7790_add_ether_device(struct sh_eth_plat_data *pdata);
> 
> >>    Perhaps better place is right after r8a7790_add_standard_devices()...
> 
> >Is the implication that the struct sh_eth_plat_data can be defined
> >in setup-r8a7790.c?
> 
>    No, why?
> 
> >Or do you for see adding a struct sh_eth_plat_data
> >parameter to r8a7790_add_standard_devices() ?
> 
>    Not at all.

Sorry, I miss-read your previous email.

[PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[Cao Minh Hiep]

From: Hiep Cao Minh <cm-hiep@jinso.co.jp>

Add platform device and clock for the r8a7790 QSPI.

Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
---
 arch/arm/mach-shmobile/clock-r8a7790.c        |    4 ++++
 arch/arm/mach-shmobile/include/mach/r8a7790.h |    2 ++
 arch/arm/mach-shmobile/setup-r8a7790.c        |   16 ++++++++++++++++
 3 files changed, 22 insertions(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index fc36d3d..baabceb 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -52,6 +52,7 @@
 #define SMSTPCR5 0xe6150144
 #define SMSTPCR7 0xe615014c
 #define SMSTPCR8 0xe6150990
+#define SMSTPCR9 0xE6150994
 
 #define SDCKCR		0xE6150074
 #define SD2CKCR		0xE6150078
@@ -181,6 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {
 
 /* MSTP */
 enum {
+	MSTP917,
 	MSTP813,
 	MSTP721, MSTP720,
 	MSTP717, MSTP716,
@@ -192,6 +194,7 @@ enum {
 };
 
 static struct clk mstp_clks[MSTP_NR] = {
+	[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
 	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
 	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
 	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
@@ -276,6 +279,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
 	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
 	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+	CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
 };
 
 #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
index 788d559..d590cad 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
@@ -1,5 +1,6 @@
 #ifndef __ASM_R8A7790_H__
 #define __ASM_R8A7790_H__
+#include <linux/spi/rspi.h>
 
 void r8a7790_add_standard_devices(void);
 void r8a7790_add_dt_devices(void);
@@ -7,6 +8,7 @@ void r8a7790_clock_init(void);
 void r8a7790_pinmux_init(void);
 void r8a7790_init_delay(void);
 void r8a7790_timer_init(void);
+void r8a7790_add_qspi_device(struct rspi_plat_data *pdata);
 
 #define MD(nr) BIT(nr)
 u32 r8a7790_read_mode_pins(void);
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
index d0f5c9f..30e3362 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -30,6 +30,22 @@
 #include <mach/irqs.h>
 #include <mach/r8a7790.h>
 #include <asm/mach/arch.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/rspi.h>
+
+/* QSPI resource */
+static struct resource qspi_resources[] __initdata = {
+	DEFINE_RES_MEM(0xe6b10000, 0x1000),
+	DEFINE_RES_IRQ(gic_spi(184)),
+};
+
+void __init r8a7790_add_qspi_device(struct rspi_plat_data *pdata)
+{
+	platform_device_register_resndata(
+		&platform_bus, "qspi", 0,
+		qspi_resources, ARRAY_SIZE(qspi_resources),
+		pdata, sizeof(*pdata));
+}
 
 static struct resource pfc_resources[] __initdata = {
 	DEFINE_RES_MEM(0xe6060000, 0x250),
-- 
1.7.9.5

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[Simon Horman]

On Tue, Oct 15, 2013 at 06:08:23PM +0900, Cao Minh Hiep wrote:
> From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
> 
> Add platform device and clock for the r8a7790 QSPI.
> 
> Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>

Hi Hiep-san,

thanks for your nice patches :)

Morimoto-san, Magnus,

It seems to me that moving all of the device registration
into the board-lager.c would be more in keeping with our
recent work. Could you confirm this or otherwise?

> ---
>  arch/arm/mach-shmobile/clock-r8a7790.c        |    4 ++++
>  arch/arm/mach-shmobile/include/mach/r8a7790.h |    2 ++
>  arch/arm/mach-shmobile/setup-r8a7790.c        |   16 ++++++++++++++++
>  3 files changed, 22 insertions(+)
> 
> diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
> index fc36d3d..baabceb 100644
> --- a/arch/arm/mach-shmobile/clock-r8a7790.c
> +++ b/arch/arm/mach-shmobile/clock-r8a7790.c
> @@ -52,6 +52,7 @@
>  #define SMSTPCR5 0xe6150144
>  #define SMSTPCR7 0xe615014c
>  #define SMSTPCR8 0xe6150990
> +#define SMSTPCR9 0xE6150994
>  
>  #define SDCKCR		0xE6150074
>  #define SD2CKCR		0xE6150078
> @@ -181,6 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {
>  
>  /* MSTP */
>  enum {
> +	MSTP917,
>  	MSTP813,
>  	MSTP721, MSTP720,
>  	MSTP717, MSTP716,
> @@ -192,6 +194,7 @@ enum {
>  };
>  
>  static struct clk mstp_clks[MSTP_NR] = {
> +	[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
>  	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
>  	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
>  	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
> @@ -276,6 +279,7 @@ static struct clk_lookup lookups[] = {
>  	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
>  	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
>  	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
> +	CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
>  };
>  
>  #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
> diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> index 788d559..d590cad 100644
> --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
> +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> @@ -1,5 +1,6 @@
>  #ifndef __ASM_R8A7790_H__
>  #define __ASM_R8A7790_H__
> +#include <linux/spi/rspi.h>
>  
>  void r8a7790_add_standard_devices(void);
>  void r8a7790_add_dt_devices(void);
> @@ -7,6 +8,7 @@ void r8a7790_clock_init(void);
>  void r8a7790_pinmux_init(void);
>  void r8a7790_init_delay(void);
>  void r8a7790_timer_init(void);
> +void r8a7790_add_qspi_device(struct rspi_plat_data *pdata);
>  
>  #define MD(nr) BIT(nr)
>  u32 r8a7790_read_mode_pins(void);
> diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
> index d0f5c9f..30e3362 100644
> --- a/arch/arm/mach-shmobile/setup-r8a7790.c
> +++ b/arch/arm/mach-shmobile/setup-r8a7790.c
> @@ -30,6 +30,22 @@
>  #include <mach/irqs.h>
>  #include <mach/r8a7790.h>
>  #include <asm/mach/arch.h>
> +#include <linux/spi/spi.h>
> +#include <linux/spi/rspi.h>
> +
> +/* QSPI resource */
> +static struct resource qspi_resources[] __initdata = {
> +	DEFINE_RES_MEM(0xe6b10000, 0x1000),
> +	DEFINE_RES_IRQ(gic_spi(184)),
> +};
> +
> +void __init r8a7790_add_qspi_device(struct rspi_plat_data *pdata)
> +{
> +	platform_device_register_resndata(
> +		&platform_bus, "qspi", 0,
> +		qspi_resources, ARRAY_SIZE(qspi_resources),
> +		pdata, sizeof(*pdata));
> +}
>  
>  static struct resource pfc_resources[] __initdata = {
>  	DEFINE_RES_MEM(0xe6060000, 0x250),
> -- 
> 1.7.9.5
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[Magnus Damm]

Hi Hiep-san,

On Tue, Oct 15, 2013 at 6:08 PM, Cao Minh Hiep <cm-hiep@jinso.co.jp> wrote:
> From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
>
> Add platform device and clock for the r8a7790 QSPI.
>
> Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>

Thanks for the patch.

> ---
>  arch/arm/mach-shmobile/clock-r8a7790.c        |    4 ++++
>  arch/arm/mach-shmobile/include/mach/r8a7790.h |    2 ++
>  arch/arm/mach-shmobile/setup-r8a7790.c        |   16 ++++++++++++++++
>  3 files changed, 22 insertions(+)
>
> diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
> index fc36d3d..baabceb 100644
> --- a/arch/arm/mach-shmobile/clock-r8a7790.c
> +++ b/arch/arm/mach-shmobile/clock-r8a7790.c
> @@ -52,6 +52,7 @@
>  #define SMSTPCR5 0xe6150144
>  #define SMSTPCR7 0xe615014c
>  #define SMSTPCR8 0xe6150990
> +#define SMSTPCR9 0xE6150994

Please follow same style as other MSTP registers - use "e6" instead of "E6".

>  #define SDCKCR         0xE6150074
>  #define SD2CKCR                0xE6150078
> @@ -181,6 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {
>
>  /* MSTP */
>  enum {
> +       MSTP917,
>         MSTP813,
>         MSTP721, MSTP720,
>         MSTP717, MSTP716,
> @@ -192,6 +194,7 @@ enum {
>  };
>
>  static struct clk mstp_clks[MSTP_NR] = {
> +       [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
>         [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
>         [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
>         [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
> @@ -276,6 +279,7 @@ static struct clk_lookup lookups[] = {
>         CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
>         CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
>         CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
> +       CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),

Is "qspi" the name of the driver? If so, where can I find it?

> --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
> +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> @@ -1,5 +1,6 @@
>  #ifndef __ASM_R8A7790_H__
>  #define __ASM_R8A7790_H__
> +#include <linux/spi/rspi.h>
>
>  void r8a7790_add_standard_devices(void);
>  void r8a7790_add_dt_devices(void);
> @@ -7,6 +8,7 @@ void r8a7790_clock_init(void);
>  void r8a7790_pinmux_init(void);
>  void r8a7790_init_delay(void);
>  void r8a7790_timer_init(void);
> +void r8a7790_add_qspi_device(struct rspi_plat_data *pdata);

Please don't add these kind of functions. Do it all inside
board-lager.c instead.

Simon may want you to split the board code and the SoC code as well.

Cheers,

/ magnus

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[Simon Horman]

On Wed, Oct 16, 2013 at 09:46:54AM +0900, Magnus Damm wrote:
> Hi Hiep-san,
> 
> On Tue, Oct 15, 2013 at 6:08 PM, Cao Minh Hiep <cm-hiep@jinso.co.jp> wrote:
> > From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
> >
> > Add platform device and clock for the r8a7790 QSPI.
> >
> > Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
> 
> Thanks for the patch.
> 
> > ---
> >  arch/arm/mach-shmobile/clock-r8a7790.c        |    4 ++++
> >  arch/arm/mach-shmobile/include/mach/r8a7790.h |    2 ++
> >  arch/arm/mach-shmobile/setup-r8a7790.c        |   16 ++++++++++++++++
> >  3 files changed, 22 insertions(+)
> >
> > diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
> > index fc36d3d..baabceb 100644
> > --- a/arch/arm/mach-shmobile/clock-r8a7790.c
> > +++ b/arch/arm/mach-shmobile/clock-r8a7790.c
> > @@ -52,6 +52,7 @@
> >  #define SMSTPCR5 0xe6150144
> >  #define SMSTPCR7 0xe615014c
> >  #define SMSTPCR8 0xe6150990
> > +#define SMSTPCR9 0xE6150994
> 
> Please follow same style as other MSTP registers - use "e6" instead of "E6".
> 
> >  #define SDCKCR         0xE6150074
> >  #define SD2CKCR                0xE6150078
> > @@ -181,6 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {
> >
> >  /* MSTP */
> >  enum {
> > +       MSTP917,
> >         MSTP813,
> >         MSTP721, MSTP720,
> >         MSTP717, MSTP716,
> > @@ -192,6 +194,7 @@ enum {
> >  };
> >
> >  static struct clk mstp_clks[MSTP_NR] = {
> > +       [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
> >         [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
> >         [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
> >         [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
> > @@ -276,6 +279,7 @@ static struct clk_lookup lookups[] = {
> >         CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
> >         CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
> >         CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
> > +       CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
> 
> Is "qspi" the name of the driver? If so, where can I find it?
> 
> > --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
> > +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> > @@ -1,5 +1,6 @@
> >  #ifndef __ASM_R8A7790_H__
> >  #define __ASM_R8A7790_H__
> > +#include <linux/spi/rspi.h>
> >
> >  void r8a7790_add_standard_devices(void);
> >  void r8a7790_add_dt_devices(void);
> > @@ -7,6 +8,7 @@ void r8a7790_clock_init(void);
> >  void r8a7790_pinmux_init(void);
> >  void r8a7790_init_delay(void);
> >  void r8a7790_timer_init(void);
> > +void r8a7790_add_qspi_device(struct rspi_plat_data *pdata);
> 
> Please don't add these kind of functions. Do it all inside
> board-lager.c instead.
> 
>name Simon may want you to split the board code and the SoC code as well.

I think that the best thing would be to move all of the device
initialisation code into patch two of this series and just leave the clock
portion in the first patch. That way Magnus's request above will be
addressed and there will be a board patch and an SoC patch.

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[カオ ミン ヒェップ]

Hi Magnus-san, Simon-san

Thanks for your replying


>>> ---
>>>   arch/arm/mach-shmobile/clock-r8a7790.c        |    4 ++++
>>>   arch/arm/mach-shmobile/include/mach/r8a7790.h |    2 ++
>>>   arch/arm/mach-shmobile/setup-r8a7790.c        |   16 ++++++++++++++++
>>>   3 files changed, 22 insertions(+)
>>>
>>> diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
>>> index fc36d3d..baabceb 100644
>>> --- a/arch/arm/mach-shmobile/clock-r8a7790.c
>>> +++ b/arch/arm/mach-shmobile/clock-r8a7790.c
>>> @@ -52,6 +52,7 @@
>>>   #define SMSTPCR5 0xe6150144
>>>   #define SMSTPCR7 0xe615014c
>>>   #define SMSTPCR8 0xe6150990
>>> +#define SMSTPCR9 0xE6150994
>> Please follow same style as other MSTP registers - use "e6" instead of "E6".
>>
I will do it!
>>>   #define SDCKCR         0xE6150074
>>>   #define SD2CKCR                0xE6150078
>>> @@ -181,6 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {
>>>
>>>   /* MSTP */
>>>   enum {
>>> +       MSTP917,
>>>          MSTP813,
>>>          MSTP721, MSTP720,
>>>          MSTP717, MSTP716,
>>> @@ -192,6 +194,7 @@ enum {
>>>   };
>>>
>>>   static struct clk mstp_clks[MSTP_NR] = {
>>> +       [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
>>>          [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
>>>          [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
>>>          [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
>>> @@ -276,6 +279,7 @@ static struct clk_lookup lookups[] = {
>>>          CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
>>>          CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
>>>          CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
>>> +       CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
>> Is "qspi" the name of the driver? If so, where can I find it?
I porting SPI driver to SPI-Mailing-list and Mark Brown replied that 
they are applied,
I have tried to find them on 
https://patchwork.kernel.org/project/spi-devel-general/list/
but not found. I am asking Mark Brown where he put them on.
>>> --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
>>> +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
>>> @@ -1,5 +1,6 @@
>>>   #ifndef __ASM_R8A7790_H__
>>>   #define __ASM_R8A7790_H__
>>> +#include <linux/spi/rspi.h>
>>>
>>>   void r8a7790_add_standard_devices(void);
>>>   void r8a7790_add_dt_devices(void);
>>> @@ -7,6 +8,7 @@ void r8a7790_clock_init(void);
>>>   void r8a7790_pinmux_init(void);
>>>   void r8a7790_init_delay(void);
>>>   void r8a7790_timer_init(void);
>>> +void r8a7790_add_qspi_device(struct rspi_plat_data *pdata);
>> Please don't add these kind of functions. Do it all inside
>> board-lager.c instead.
>>
>> name Simon may want you to split the board code and the SoC code as well.
> I think that the best thing would be to move all of the device
> initialisation code into patch two of this series and just leave the clock
> portion in the first patch. That way Magnus's request above will be
> addressed and there will be a board patch and an SoC patch.
>
>
OK, I will modify them.

thanks,

Hiep.

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[Kuninori Morimoto]

Hi Hiep

I have one comment

> From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
> 
> Add platform device and clock for the r8a7790 QSPI.
> 
> Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
> ---
(snip)
> @@ -276,6 +279,7 @@ static struct clk_lookup lookups[] = {
>  	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
>  	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
>  	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
> +	CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
>  };
(snip)
> +void __init r8a7790_add_qspi_device(struct rspi_plat_data *pdata)
> +{
> +	platform_device_register_resndata(
> +		&platform_bus, "qspi", 0,
> +		qspi_resources, ARRAY_SIZE(qspi_resources),
> +		pdata, sizeof(*pdata));
> +}

Please use -1 ID, and use just "qspi", instead of "qspi.0"

Best regards
---
Kuninori Morimoto

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[Simon Horman]

On Wed, Oct 16, 2013 at 05:13:51PM -0700, Kuninori Morimoto wrote:
> 
> Hi Hiep
> 
> I have one comment
> 
> > From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
> > 
> > Add platform device and clock for the r8a7790 QSPI.
> > 
> > Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
> > ---
> (snip)
> > @@ -276,6 +279,7 @@ static struct clk_lookup lookups[] = {
> >  	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
> >  	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
> >  	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
> > +	CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
> >  };
> (snip)
> > +void __init r8a7790_add_qspi_device(struct rspi_plat_data *pdata)
> > +{
> > +	platform_device_register_resndata(
> > +		&platform_bus, "qspi", 0,
> > +		qspi_resources, ARRAY_SIZE(qspi_resources),
> > +		pdata, sizeof(*pdata));
> > +}
> 
> Please use -1 ID, and use just "qspi", instead of "qspi.0"

Thanks Morimoto-san.

Hiep-san, could you please update your patches according to
the feedback from Morimoto-san, Magnus and myself. Please also
rebase them on the latest devel tag of the renesas tree.
Then please re-post your patches as v2, noting changes in
the change log and including v2 after PATCH in each subject line.

Thanks

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[Simon Horman]

On Wed, Oct 16, 2013 at 08:03:25PM +0900, カオ ミン ヒェップ wrote:
> Hi Magnus-san, Simon-san
> 
> Thanks for your replying
> 
> 
> >>>---
> >>>  arch/arm/mach-shmobile/clock-r8a7790.c        |    4 ++++
> >>>  arch/arm/mach-shmobile/include/mach/r8a7790.h |    2 ++
> >>>  arch/arm/mach-shmobile/setup-r8a7790.c        |   16 ++++++++++++++++
> >>>  3 files changed, 22 insertions(+)
> >>>
> >>>diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
> >>>index fc36d3d..baabceb 100644
> >>>--- a/arch/arm/mach-shmobile/clock-r8a7790.c
> >>>+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
> >>>@@ -52,6 +52,7 @@
> >>>  #define SMSTPCR5 0xe6150144
> >>>  #define SMSTPCR7 0xe615014c
> >>>  #define SMSTPCR8 0xe6150990
> >>>+#define SMSTPCR9 0xE6150994
> >>Please follow same style as other MSTP registers - use "e6" instead of "E6".
> >>
> I will do it!
> >>>  #define SDCKCR         0xE6150074
> >>>  #define SD2CKCR                0xE6150078
> >>>@@ -181,6 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {
> >>>
> >>>  /* MSTP */
> >>>  enum {
> >>>+       MSTP917,
> >>>         MSTP813,
> >>>         MSTP721, MSTP720,
> >>>         MSTP717, MSTP716,
> >>>@@ -192,6 +194,7 @@ enum {
> >>>  };
> >>>
> >>>  static struct clk mstp_clks[MSTP_NR] = {
> >>>+       [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
> >>>         [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
> >>>         [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
> >>>         [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
> >>>@@ -276,6 +279,7 @@ static struct clk_lookup lookups[] = {
> >>>         CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
> >>>         CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
> >>>         CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
> >>>+       CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
> >>Is "qspi" the name of the driver? If so, where can I find it?
> I porting SPI driver to SPI-Mailing-list and Mark Brown replied that
> they are applied,
> I have tried to find them on
> https://patchwork.kernel.org/project/spi-devel-general/list/
> but not found. I am asking Mark Brown where he put them on.

Thanks, please let us know when you find out.

> >>>--- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >>>+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
> >>>@@ -1,5 +1,6 @@
> >>>  #ifndef __ASM_R8A7790_H__
> >>>  #define __ASM_R8A7790_H__
> >>>+#include <linux/spi/rspi.h>
> >>>
> >>>  void r8a7790_add_standard_devices(void);
> >>>  void r8a7790_add_dt_devices(void);
> >>>@@ -7,6 +8,7 @@ void r8a7790_clock_init(void);
> >>>  void r8a7790_pinmux_init(void);
> >>>  void r8a7790_init_delay(void);
> >>>  void r8a7790_timer_init(void);
> >>>+void r8a7790_add_qspi_device(struct rspi_plat_data *pdata);
> >>Please don't add these kind of functions. Do it all inside
> >>board-lager.c instead.
> >>
> >>name Simon may want you to split the board code and the SoC code as well.
> >I think that the best thing would be to move all of the device
> >initialisation code into patch two of this series and just leave the clock
> >portion in the first patch. That way Magnus's request above will be
> >addressed and there will be a board patch and an SoC patch.
> >
> >
> OK, I will modify them.
> 
> thanks,
> 
> Hiep.
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[カオ ミン ヒェップ]

Hi Morimoto-san

Thanks for your comment!

On 10/17/2013 09:13 AM, Kuninori Morimoto wrote:
> Hi Hiep
>
> I have one comment
>
>> From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
>>
>> Add platform device and clock for the r8a7790 QSPI.
>>
>> Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
>> ---
> (snip)
>> @@ -276,6 +279,7 @@ static struct clk_lookup lookups[] = {
>>   	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
>>   	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
>>   	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
>> +	CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
>>   };
> (snip)
>> +void __init r8a7790_add_qspi_device(struct rspi_plat_data *pdata)
>> +{
>> +	platform_device_register_resndata(
>> +		&platform_bus, "qspi", 0,
>> +		qspi_resources, ARRAY_SIZE(qspi_resources),
>> +		pdata, sizeof(*pdata));
>> +}
> Please use -1 ID, and use just "qspi", instead of "qspi.0"
I have tried to use -1 ID instead of 0, and then I saw that QSPI did not 
contact to Flash Memory.
I found that in QSPI driver, ID is assigned to bus number: 
master->bus_num = pdev->id.
So I wonder how to modify it.

Best Regards!

Hiep.

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[Kuninori Morimoto]

Hi Hiep-san

> >> +void __init r8a7790_add_qspi_device(struct rspi_plat_data *pdata)
> >> +{
> >> +	platform_device_register_resndata(
> >> +		&platform_bus, "qspi", 0,
> >> +		qspi_resources, ARRAY_SIZE(qspi_resources),
> >> +		pdata, sizeof(*pdata));
> >> +}
> > Please use -1 ID, and use just "qspi", instead of "qspi.0"
> I have tried to use -1 ID instead of 0, and then I saw that QSPI did not 
> contact to Flash Memory.
> I found that in QSPI driver, ID is assigned to bus number: 
> master->bus_num = pdev->id.
> So I wonder how to modify it.

According to spi_register_master(), bus_num = -1 seems not problem.
Did you exchanged clock name ?

Best regards
---
Kuninori Morimoto

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[カオ ミン ヒェップ]

Hi Morimoto-san

Thanks for your replying!

>>>> +void __init r8a7790_add_qspi_device(struct rspi_plat_data *pdata)
>>>> +{
>>>> +	platform_device_register_resndata(
>>>> +		&platform_bus, "qspi", 0,
>>>> +		qspi_resources, ARRAY_SIZE(qspi_resources),
>>>> +		pdata, sizeof(*pdata));
>>>> +}
>>> Please use -1 ID, and use just "qspi", instead of "qspi.0"
>> I have tried to use -1 ID instead of 0, and then I saw that QSPI did not
>> contact to Flash Memory.
>> I found that in QSPI driver, ID is assigned to bus number:
>> master->bus_num = pdev->id.
>> So I wonder how to modify it.
> According to spi_register_master(), bus_num = -1 seems not problem.
> Did you exchanged clock name ?
I saw that in "struct spi_board_info" has defined bus_num is u16
so I'm afraid if is -1 ID, master->bus_num did not match to bus_num in 
board_info.

Thanks,

Hiep.

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[Kuninori Morimoto]

Hi

> >>>> +void __init r8a7790_add_qspi_device(struct rspi_plat_data *pdata)
> >>>> +{
> >>>> +	platform_device_register_resndata(
> >>>> +		&platform_bus, "qspi", 0,
> >>>> +		qspi_resources, ARRAY_SIZE(qspi_resources),
> >>>> +		pdata, sizeof(*pdata));
> >>>> +}
> >>> Please use -1 ID, and use just "qspi", instead of "qspi.0"
> >> I have tried to use -1 ID instead of 0, and then I saw that QSPI did not
> >> contact to Flash Memory.
> >> I found that in QSPI driver, ID is assigned to bus number:
> >> master->bus_num = pdev->id.
> >> So I wonder how to modify it.
> > According to spi_register_master(), bus_num = -1 seems not problem.
> > Did you exchanged clock name ?
> I saw that in "struct spi_board_info" has defined bus_num is u16
> so I'm afraid if is -1 ID, master->bus_num did not match to bus_num in 
> board_info.

Hmm...
spi master seems use dynamic value
as bus_num if ID was -1 (in spi_register_master())
So, using ID = 0 seems reasonable here

Best regards
---
Kuninori Morimoto

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support

[カオ ミン ヒェップ]

Good morning Morimoto-san

Thanks for your replying!
>>>>>> +void __init r8a7790_add_qspi_device(struct rspi_plat_data *pdata)
>>>>>> +{
>>>>>> +	platform_device_register_resndata(
>>>>>> +		&platform_bus, "qspi", 0,
>>>>>> +		qspi_resources, ARRAY_SIZE(qspi_resources),
>>>>>> +		pdata, sizeof(*pdata));
>>>>>> +}
>>>>> Please use -1 ID, and use just "qspi", instead of "qspi.0"
>>>> I have tried to use -1 ID instead of 0, and then I saw that QSPI did not
>>>> contact to Flash Memory.
>>>> I found that in QSPI driver, ID is assigned to bus number:
>>>> master->bus_num = pdev->id.
>>>> So I wonder how to modify it.
>>> According to spi_register_master(), bus_num = -1 seems not problem.
>>> Did you exchanged clock name ?
>> I saw that in "struct spi_board_info" has defined bus_num is u16
>> so I'm afraid if is -1 ID, master->bus_num did not match to bus_num in
>> board_info.
> Hmm...
> spi master seems use dynamic value
> as bus_num if ID was -1 (in spi_register_master())
> So, using ID = 0 seems reasonable here
Thanks, so I'll use ID = 0 as you pointed out to me!

Hi Simon-san, Magnus-san

I will update my patch according to the feedback from Morimoto-san, 
Magnus-san and you today.

Best Regards,
Hiep.

[PATCH 1/2] arm: shmobile: r8a7790: Add PCI USB host clock support

[Valentine Barshak]

This adds internal PCI USB host clock support.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
---
 arch/arm/mach-shmobile/clock-r8a7790.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index c5c60ec..3e27200 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -190,7 +190,7 @@ enum {
 	MSTP813,
 	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
 	MSTP717, MSTP716,
-	MSTP704,
+	MSTP704, MSTP703,
 	MSTP522,
 	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
@@ -226,6 +226,7 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
 	[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
 	[MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HSUSB */
+	[MSTP703] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 3, 0), /* EHCI */
 	[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
 	[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
 	[MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
@@ -317,6 +318,9 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
 	CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
 	CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
+	CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]),
+	CLKDEV_DEV_ID("pci-rcar-gen2.1", &mstp_clks[MSTP703]),
+	CLKDEV_DEV_ID("pci-rcar-gen2.2", &mstp_clks[MSTP703]),
 
 	/* ICK */
 	CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
-- 
1.8.3.1

[PATCH 1/2] arm: shmobile: r8a7790: Add SATA clock

[Valentine Barshak]

This adds SATA 0/1 clock support. External 100MHz SATA 0/1
reference clock is supposed to be applied to the following pins:
  CICREFP0_SATA/CICREFP1_SATA;
  CICREFN0_SATA/CICREFN1_SATA.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
---
 arch/arm/mach-shmobile/clock-r8a7790.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index c5c60ec..9d5dabf 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -73,6 +73,18 @@ static struct clk extal_clk = {
 	.mapping	= &cpg_mapping,
 };
 
+/* External SATA0 reference clock: 100MHz fixed */
+static struct clk sata0_clk = {
+	.rate		= 100000000,
+	.mapping	= &cpg_mapping,
+};
+
+/* External SATA1 reference clock: 100MHz fixed */
+static struct clk sata1_clk = {
+	.rate		= 100000000,
+	.mapping	= &cpg_mapping,
+};
+
 static struct sh_clk_ops followparent_clk_ops = {
 	.recalc	= followparent_recalc,
 };
@@ -140,6 +152,8 @@ static struct clk *main_clks[] = {
 	&ddr_clk,
 	&mp_clk,
 	&cp_clk,
+	&sata0_clk,
+	&sata1_clk,
 };
 
 /* SDHI (DIV4) clock */
@@ -187,6 +201,7 @@ enum {
 	MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005,
 	MSTP931, MSTP930, MSTP929, MSTP928,
 	MSTP917,
+	MSTP815, MSTP814,
 	MSTP813,
 	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
 	MSTP717, MSTP716,
@@ -215,6 +230,8 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP929] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 29, 0), /* I2C2 */
 	[MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */
 	[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
+	[MSTP815] = SH_CLK_MSTP32(&sata0_clk, SMSTPCR8, 15, 0), /* SATA0 */
+	[MSTP814] = SH_CLK_MSTP32(&sata1_clk, SMSTPCR8, 14, 0),	/* SATA1 */
 	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
 	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
 	[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
@@ -317,6 +334,8 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
 	CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
 	CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
+	CLKDEV_DEV_ID("sata-r8a7790.0", &mstp_clks[MSTP815]),
+	CLKDEV_DEV_ID("sata-r8a7790.1", &mstp_clks[MSTP814]),
 
 	/* ICK */
 	CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
-- 
1.8.3.1

[PATCH 1/2] arm: shmobile: r8a7790: Add VIN clock support

[Valentine Barshak]

This adds VIN[0-3] clock support to R8A7790 SoC.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
---
 arch/arm/mach-shmobile/clock-r8a7790.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index c5c60ec..81f45a0 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -188,6 +188,7 @@ enum {
 	MSTP931, MSTP930, MSTP929, MSTP928,
 	MSTP917,
 	MSTP813,
+	MSTP811, MSTP810, MSTP809, MSTP808,
 	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
 	MSTP717, MSTP716,
 	MSTP704,
@@ -216,6 +217,10 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */
 	[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
 	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
+	[MSTP811] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 11, 0), /* VIN0 */
+	[MSTP810] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 10, 0), /* VIN1 */
+	[MSTP809] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8,  9, 0), /* VIN2 */
+	[MSTP808] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8,  8, 0), /* VIN3 */
 	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
 	[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
 	[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
@@ -300,6 +305,10 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
 	CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]),
 	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
+	CLKDEV_DEV_ID("r8a7790-vin.0", &mstp_clks[MSTP811]),
+	CLKDEV_DEV_ID("r8a7790-vin.1", &mstp_clks[MSTP810]),
+	CLKDEV_DEV_ID("r8a7790-vin.2", &mstp_clks[MSTP809]),
+	CLKDEV_DEV_ID("r8a7790-vin.3", &mstp_clks[MSTP808]),
 	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
 	CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
-- 
1.8.3.1

[PATCH 1/2] arm: shmobile: r8a7790: Add VIN clock support

[Valentine Barshak]

This adds VIN[0-3] clock support to R8A7790 SoC.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
---
 arch/arm/mach-shmobile/clock-r8a7790.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index c5c60ec..81f45a0 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -188,6 +188,7 @@ enum {
 	MSTP931, MSTP930, MSTP929, MSTP928,
 	MSTP917,
 	MSTP813,
+	MSTP811, MSTP810, MSTP809, MSTP808,
 	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
 	MSTP717, MSTP716,
 	MSTP704,
@@ -216,6 +217,10 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */
 	[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
 	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
+	[MSTP811] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 11, 0), /* VIN0 */
+	[MSTP810] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 10, 0), /* VIN1 */
+	[MSTP809] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8,  9, 0), /* VIN2 */
+	[MSTP808] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8,  8, 0), /* VIN3 */
 	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
 	[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
 	[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
@@ -300,6 +305,10 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
 	CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]),
 	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
+	CLKDEV_DEV_ID("r8a7790-vin.0", &mstp_clks[MSTP811]),
+	CLKDEV_DEV_ID("r8a7790-vin.1", &mstp_clks[MSTP810]),
+	CLKDEV_DEV_ID("r8a7790-vin.2", &mstp_clks[MSTP809]),
+	CLKDEV_DEV_ID("r8a7790-vin.3", &mstp_clks[MSTP808]),
 	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
 	CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
-- 
1.8.3.1

[PATCH 1/2] ARM: shmobile: r8a7790: add Audio DMAC clock

[Kuninori Morimoto]

From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

Audio DMAC can be controlled via sh-dma-engine

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
 arch/arm/mach-shmobile/clock-r8a7790.c |    5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 9dd5499b4..4f23247 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -204,6 +204,7 @@ enum {
 	MSTP717, MSTP716,
 	MSTP704,
 	MSTP522,
+	MSTP502, MSTP501,
 	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
 	MSTP124,
@@ -239,6 +240,8 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
 	[MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HSUSB */
 	[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
+	[MSTP502] = SH_CLK_MSTP32(&zs_clk, SMSTPCR5, 2, 0), /* Audio-DMAC low */
+	[MSTP501] = SH_CLK_MSTP32(&zs_clk, SMSTPCR5, 1, 0), /* Audio-DMAC hi */
 	[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
 	[MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
 	[MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */
@@ -318,6 +321,8 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
 	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
+	CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP502]),
+	CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP501]),
 	CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
 	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
 	CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),
-- 
1.7.9.5

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add Audio DMAC clock

[Simon Horman]

On Mon, Jan 06, 2014 at 12:32:46AM -0800, Kuninori Morimoto wrote:
> From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> 
> Audio DMAC can be controlled via sh-dma-engine
> 
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> ---
>  arch/arm/mach-shmobile/clock-r8a7790.c |    5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
> index 9dd5499b4..4f23247 100644
> --- a/arch/arm/mach-shmobile/clock-r8a7790.c
> +++ b/arch/arm/mach-shmobile/clock-r8a7790.c
> @@ -204,6 +204,7 @@ enum {
>  	MSTP717, MSTP716,
>  	MSTP704,
>  	MSTP522,
> +	MSTP502, MSTP501,
>  	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
>  	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
>  	MSTP124,
> @@ -239,6 +240,8 @@ static struct clk mstp_clks[MSTP_NR] = {
>  	[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
>  	[MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HSUSB */
>  	[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
> +	[MSTP502] = SH_CLK_MSTP32(&zs_clk, SMSTPCR5, 2, 0), /* Audio-DMAC low */
> +	[MSTP501] = SH_CLK_MSTP32(&zs_clk, SMSTPCR5, 1, 0), /* Audio-DMAC hi */
>  	[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
>  	[MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
>  	[MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */
> @@ -318,6 +321,8 @@ static struct clk_lookup lookups[] = {
>  	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
>  	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
>  	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
> +	CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP502]),
> +	CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP501]),
>  	CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
>  	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
>  	CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),

Unfortunately this patch conflicts with "ARM: shmobile: r8a7790: Wait for
status on all MSTP clocks" which I have queued up as a fix for v3.14.

As this patch will be submitted for inclusion on v3.15 it will be in a
branch based on v3.14-rc1 which I expect to include (""ARM: shmobile:
r8a7790: Wait for status on all MSTP clocks").

Rather than risk messing up doing the non-trivial rebase of this
patch myself I have dropped this patch. Could you please rebase it
on top of the latest devel tag of the renesas tree, currently
renesas-devel-v3.13-rc7-20140108.

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add Audio DMAC clock

[Simon Horman]

On Wed, Jan 08, 2014 at 01:17:38PM +0900, Simon Horman wrote:
> On Mon, Jan 06, 2014 at 12:32:46AM -0800, Kuninori Morimoto wrote:
> > From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> > 
> > Audio DMAC can be controlled via sh-dma-engine
> > 
> > Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> > ---
> >  arch/arm/mach-shmobile/clock-r8a7790.c |    5 +++++
> >  1 file changed, 5 insertions(+)
> > 
> > diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
> > index 9dd5499b4..4f23247 100644
> > --- a/arch/arm/mach-shmobile/clock-r8a7790.c
> > +++ b/arch/arm/mach-shmobile/clock-r8a7790.c
> > @@ -204,6 +204,7 @@ enum {
> >  	MSTP717, MSTP716,
> >  	MSTP704,
> >  	MSTP522,
> > +	MSTP502, MSTP501,
> >  	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
> >  	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
> >  	MSTP124,
> > @@ -239,6 +240,8 @@ static struct clk mstp_clks[MSTP_NR] = {
> >  	[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
> >  	[MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HSUSB */
> >  	[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
> > +	[MSTP502] = SH_CLK_MSTP32(&zs_clk, SMSTPCR5, 2, 0), /* Audio-DMAC low */
> > +	[MSTP501] = SH_CLK_MSTP32(&zs_clk, SMSTPCR5, 1, 0), /* Audio-DMAC hi */
> >  	[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
> >  	[MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
> >  	[MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */
> > @@ -318,6 +321,8 @@ static struct clk_lookup lookups[] = {
> >  	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
> >  	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
> >  	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
> > +	CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP502]),
> > +	CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP501]),
> >  	CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
> >  	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
> >  	CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),
> 
> Unfortunately this patch conflicts with "ARM: shmobile: r8a7790: Wait for
> status on all MSTP clocks" which I have queued up as a fix for v3.14.
> 
> As this patch will be submitted for inclusion on v3.15 it will be in a
> branch based on v3.14-rc1 which I expect to include (""ARM: shmobile:
> r8a7790: Wait for status on all MSTP clocks").
> 
> Rather than risk messing up doing the non-trivial rebase of this
> patch myself I have dropped this patch. Could you please rebase it
> on top of the latest devel tag of the renesas tree, currently
> renesas-devel-v3.13-rc7-20140108.

Sorry, cut-and-paste error on my part.

This patch is not queued up but I would like you to rebase it
(so I can queue it up :).

[PATCH 1/2] ARM: shmobile: r8a7790: add Audio DMAC clock

[Kuninori Morimoto]

From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

Audio DMAC can be controlled via sh-dma-engine

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
 arch/arm/mach-shmobile/clock-r8a7790.c |    5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index a028f96..58f3dcf 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -201,6 +201,7 @@ enum {
 	MSTP717, MSTP716,
 	MSTP704,
 	MSTP522,
+	MSTP502, MSTP501,
 	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
 	MSTP124,
@@ -236,6 +237,8 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP716] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR7, 16, MSTPSR7, 0), /* HSCIF1 */
 	[MSTP704] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR7, 4, MSTPSR7, 0), /* HSUSB */
 	[MSTP522] = SH_CLK_MSTP32_STS(&extal_clk, SMSTPCR5, 22, MSTPSR5, 0), /* Thermal */
+	[MSTP502] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR5, 2, MSTPSR5, 0), /* Audio-DMAC low */
+	[MSTP501] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR5, 1, MSTPSR5, 0), /* Audio-DMAC hi */
 	[MSTP315] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, MSTPSR3, 0), /* MMC0 */
 	[MSTP314] = SH_CLK_MSTP32_STS(&div4_clks[DIV4_SD0], SMSTPCR3, 14, MSTPSR3, 0), /* SDHI0 */
 	[MSTP313] = SH_CLK_MSTP32_STS(&div4_clks[DIV4_SD1], SMSTPCR3, 13, MSTPSR3, 0), /* SDHI1 */
@@ -311,6 +314,8 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
 	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
+	CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP502]),
+	CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP501]),
 	CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
 	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
 	CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),
-- 
1.7.9.5

Re: [PATCH 1/2] ARM: shmobile: r8a7790: add Audio DMAC clock

[Simon Horman]

On Tue, Jan 07, 2014 at 10:08:40PM -0800, Kuninori Morimoto wrote:
> From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> 
> Audio DMAC can be controlled via sh-dma-engine
> 
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

Thanks, I will queue this up.

> ---
>  arch/arm/mach-shmobile/clock-r8a7790.c |    5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
> index a028f96..58f3dcf 100644
> --- a/arch/arm/mach-shmobile/clock-r8a7790.c
> +++ b/arch/arm/mach-shmobile/clock-r8a7790.c
> @@ -201,6 +201,7 @@ enum {
>  	MSTP717, MSTP716,
>  	MSTP704,
>  	MSTP522,
> +	MSTP502, MSTP501,
>  	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
>  	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
>  	MSTP124,
> @@ -236,6 +237,8 @@ static struct clk mstp_clks[MSTP_NR] = {
>  	[MSTP716] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR7, 16, MSTPSR7, 0), /* HSCIF1 */
>  	[MSTP704] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR7, 4, MSTPSR7, 0), /* HSUSB */
>  	[MSTP522] = SH_CLK_MSTP32_STS(&extal_clk, SMSTPCR5, 22, MSTPSR5, 0), /* Thermal */
> +	[MSTP502] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR5, 2, MSTPSR5, 0), /* Audio-DMAC low */
> +	[MSTP501] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR5, 1, MSTPSR5, 0), /* Audio-DMAC hi */
>  	[MSTP315] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, MSTPSR3, 0), /* MMC0 */
>  	[MSTP314] = SH_CLK_MSTP32_STS(&div4_clks[DIV4_SD0], SMSTPCR3, 14, MSTPSR3, 0), /* SDHI0 */
>  	[MSTP313] = SH_CLK_MSTP32_STS(&div4_clks[DIV4_SD1], SMSTPCR3, 13, MSTPSR3, 0), /* SDHI1 */
> @@ -311,6 +314,8 @@ static struct clk_lookup lookups[] = {
>  	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
>  	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
>  	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
> +	CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP502]),
> +	CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP501]),
>  	CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
>  	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
>  	CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),
> -- 
> 1.7.9.5
> 

[PATCH 1/2] ARM: shmobile: r8a7790: Add VSP1 devices to DT

[Laurent Pinchart]

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7790.dtsi | 51 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index da665fa..e0c5a5b 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -412,6 +412,57 @@
 		status = "disabled";
 	};
 
+	vsp1@fe920000 {
+		compatible = "renesas,vsp1";
+		reg = <0 0xfe920000 0 0x8000>;
+		interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
+
+		renesas,has-sru;
+		renesas,#rpf = <5>;
+		renesas,#uds = <1>;
+		renesas,#wpf = <4>;
+	};
+
+	vsp1@fe928000 {
+		compatible = "renesas,vsp1";
+		reg = <0 0xfe928000 0 0x8000>;
+		interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
+
+		renesas,has-lut;
+		renesas,has-sru;
+		renesas,#rpf = <5>;
+		renesas,#uds = <3>;
+		renesas,#wpf = <4>;
+	};
+
+	vsp1@fe930000 {
+		compatible = "renesas,vsp1";
+		reg = <0 0xfe930000 0 0x8000>;
+		interrupts = <0 246 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
+
+		renesas,has-lif;
+		renesas,has-lut;
+		renesas,#rpf = <4>;
+		renesas,#uds = <1>;
+		renesas,#wpf = <4>;
+	};
+
+	vsp1@fe938000 {
+		compatible = "renesas,vsp1";
+		reg = <0 0xfe938000 0 0x8000>;
+		interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
+
+		renesas,has-lif;
+		renesas,has-lut;
+		renesas,#rpf = <4>;
+		renesas,#uds = <1>;
+		renesas,#wpf = <4>;
+	};
+
 	clocks {
 		#address-cells = <2>;
 		#size-cells = <2>;
-- 
1.8.3.2

[PATCH 1/2] arm: shmobile: r8a7790: add USB3.0 clocks to device tree

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm/boot/dts/r8a7790.dtsi |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index cd8b7cc..e06c486 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -780,17 +780,17 @@
 			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
 			clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
 				 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
-				 <&hp_clk>, <&hp_clk>, <&rclk_clk>;
+				 <&hp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
 				R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
 				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
-				R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_CMT1
+				R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
 			>;
 			clock-output-names  				"iic2", "tpu0", "mmcif1", "sdhi3",
 				"sdhi2", "sdhi1", "sdhi0", "mmcif0",
-				"iic0", "iic1", "cmt1";
+				"iic0", "iic1", "ssusb", "cmt1";
 		};
 		mstp5_clks: mstp5_clks@e6150144 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
-- 
1.7.9.5

[PATCH 1/2] arm: shmobile: r8a7790: add USB3.0 clocks to device tree

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm/boot/dts/r8a7790.dtsi |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index cd8b7cc..e06c486 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -780,17 +780,17 @@
 			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
 			clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
 				 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
-				 <&hp_clk>, <&hp_clk>, <&rclk_clk>;
+				 <&hp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
 				R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
 				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
-				R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_CMT1
+				R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
 			>;
 			clock-output-names =
 				"iic2", "tpu0", "mmcif1", "sdhi3",
 				"sdhi2", "sdhi1", "sdhi0", "mmcif0",
-				"iic0", "iic1", "cmt1";
+				"iic0", "iic1", "ssusb", "cmt1";
 		};
 		mstp5_clks: mstp5_clks@e6150144 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
-- 
1.7.9.5

[PATCH 1/2] arm: shmobile: r8a7790: add USB3.0 clocks to device tree

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm/boot/dts/r8a7790.dtsi |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index cd8b7cc..e06c486 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -780,17 +780,17 @@
 			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
 			clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
 				 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
-				 <&hp_clk>, <&hp_clk>, <&rclk_clk>;
+				 <&hp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
 				R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
 				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
-				R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_CMT1
+				R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
 			>;
 			clock-output-names =
 				"iic2", "tpu0", "mmcif1", "sdhi3",
 				"sdhi2", "sdhi1", "sdhi0", "mmcif0",
-				"iic0", "iic1", "cmt1";
+				"iic0", "iic1", "ssusb", "cmt1";
 		};
 		mstp5_clks: mstp5_clks at e6150144 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
-- 
1.7.9.5

[PATCH 1/2] ARM: shmobile: r8a7790: add DVC support for sound node on DTSI

[Kuninori Morimoto]

From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
 arch/arm/boot/dts/r8a7790.dtsi |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 994330e..f260f5f 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -974,16 +974,23 @@
 			<&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>,
 			<&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>,
 			<&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>,
+			<&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>,
 			<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
 		clock-names = "ssi-all",
 				"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
 				"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
 				"src.9", "src.8", "src.7", "src.6", "src.5",
 				"src.4", "src.3", "src.2", "src.1", "src.0",
+				"dvc.0", "dvc.1",
 				"clk_a", "clk_b", "clk_c", "clk_i";
 
 		status = "disabled";
 
+		rcar_sound,dvc {
+			dvc0: dvc@0 { };
+			dvc1: dvc@1 { };
+		};
+
 		rcar_sound,src {
 			src0: src@0 { };
 			src1: src@1 { };
-- 
1.7.9.5

[PATCH 1/2] ARM: shmobile: r8a7790: Add VSP1 devices to DT

[Laurent Pinchart]

Add all available VSP1 devices.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7790.dtsi | 51 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index d0e1773..7f00bec 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -600,6 +600,57 @@
 		status = "disabled";
 	};
 
+	vsp1@fe920000 {
+		compatible = "renesas,vsp1";
+		reg = <0 0xfe920000 0 0x8000>;
+		interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
+
+		renesas,has-sru;
+		renesas,#rpf = <5>;
+		renesas,#uds = <1>;
+		renesas,#wpf = <4>;
+	};
+
+	vsp1@fe928000 {
+		compatible = "renesas,vsp1";
+		reg = <0 0xfe928000 0 0x8000>;
+		interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
+
+		renesas,has-lut;
+		renesas,has-sru;
+		renesas,#rpf = <5>;
+		renesas,#uds = <3>;
+		renesas,#wpf = <4>;
+	};
+
+	vsp1@fe930000 {
+		compatible = "renesas,vsp1";
+		reg = <0 0xfe930000 0 0x8000>;
+		interrupts = <0 246 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
+
+		renesas,has-lif;
+		renesas,has-lut;
+		renesas,#rpf = <4>;
+		renesas,#uds = <1>;
+		renesas,#wpf = <4>;
+	};
+
+	vsp1@fe938000 {
+		compatible = "renesas,vsp1";
+		reg = <0 0xfe938000 0 0x8000>;
+		interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
+
+		renesas,has-lif;
+		renesas,has-lut;
+		renesas,#rpf = <4>;
+		renesas,#uds = <1>;
+		renesas,#wpf = <4>;
+	};
+
 	clocks {
 		#address-cells = <2>;
 		#size-cells = <2>;
-- 
1.8.5.5

Re: [PATCH 1/2] ARM: shmobile: r8a7790: Add VSP1 devices to DT

[Sergei Shtylyov]

Hello.

On 09/14/2014 03:36 AM, Laurent Pinchart wrote:

> Add all available VSP1 devices.

> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
>   arch/arm/boot/dts/r8a7790.dtsi | 51 ++++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 51 insertions(+)

> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index d0e1773..7f00bec 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -600,6 +600,57 @@
>   		status = "disabled";
>   	};
>
> +	vsp1@fe920000 {

    Can't we call this node "video" or something alike (to comply with ePAPR)?

> +		compatible = "renesas,vsp1";
> +		reg = <0 0xfe920000 0 0x8000>;
> +		interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;

WBR, Sergei

Re: [PATCH 1/2] ARM: shmobile: r8a7790: Add VSP1 devices to DT

[Laurent Pinchart]

Hi Sergei,

On Sunday 14 September 2014 21:58:47 Sergei Shtylyov wrote:
> On 09/14/2014 03:36 AM, Laurent Pinchart wrote:
> > Add all available VSP1 devices.
> > 
> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> > ---
> >  arch/arm/boot/dts/r8a7790.dtsi | 51 ++++++++++++++++++++++++++++++++++++
> >  1 file changed, 51 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/r8a7790.dtsi
> > b/arch/arm/boot/dts/r8a7790.dtsi index d0e1773..7f00bec 100644
> > --- a/arch/arm/boot/dts/r8a7790.dtsi
> > +++ b/arch/arm/boot/dts/r8a7790.dtsi
> > @@ -600,6 +600,57 @@
> > 
> >   		status = "disabled";
> >   	
> >   	};
> > 
> > +	vsp1@fe920000 {
> 
> Can't we call this node "video" or something alike (to comply with ePAPR)?

I don't mind renaming the node, but "video" sounds too generic to me (and 
possibly misleading, as people might expect a video node to correspond to a 
video output device).

> > +		compatible = "renesas,vsp1";
> > +		reg = <0 0xfe920000 0 0x8000>;
> > +		interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>;
> > +		clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;

-- 
Regards,

Laurent Pinchart

Re: [PATCH 1/2] ARM: shmobile: r8a7790: Add VSP1 devices to DT

[Simon Horman]

On Mon, Sep 15, 2014 at 02:32:07AM +0300, Laurent Pinchart wrote:
> Hi Sergei,
> 
> On Sunday 14 September 2014 21:58:47 Sergei Shtylyov wrote:
> > On 09/14/2014 03:36 AM, Laurent Pinchart wrote:
> > > Add all available VSP1 devices.
> > > 
> > > Signed-off-by: Laurent Pinchart
> > > <laurent.pinchart+renesas@ideasonboard.com>
> > > ---
> > >  arch/arm/boot/dts/r8a7790.dtsi | 51 ++++++++++++++++++++++++++++++++++++
> > >  1 file changed, 51 insertions(+)
> > > 
> > > diff --git a/arch/arm/boot/dts/r8a7790.dtsi
> > > b/arch/arm/boot/dts/r8a7790.dtsi index d0e1773..7f00bec 100644
> > > --- a/arch/arm/boot/dts/r8a7790.dtsi
> > > +++ b/arch/arm/boot/dts/r8a7790.dtsi
> > > @@ -600,6 +600,57 @@
> > > 
> > >   		status = "disabled";
> > >   	
> > >   	};
> > > 
> > > +	vsp1@fe920000 {
> > 
> > Can't we call this node "video" or something alike (to comply with ePAPR)?
> 
> I don't mind renaming the node, but "video" sounds too generic to me (and 
> possibly misleading, as people might expect a video node to correspond to a 
> video output device).

Hi,

I am wondering if there has been a conclusion to this discussion.

> > > +		compatible = "renesas,vsp1";
> > > +		reg = <0 0xfe920000 0 0x8000>;
> > > +		interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>;
> > > +		clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
> 
> -- 
> Regards,
> 
> Laurent Pinchart
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: [PATCH 1/2] ARM: shmobile: r8a7790: Add VSP1 devices to DT

[Laurent Pinchart]

Hello,

On Tuesday 30 September 2014 13:23:53 Simon Horman wrote:
> On Mon, Sep 15, 2014 at 02:32:07AM +0300, Laurent Pinchart wrote:
> > On Sunday 14 September 2014 21:58:47 Sergei Shtylyov wrote:
> >> On 09/14/2014 03:36 AM, Laurent Pinchart wrote:
> >>> Add all available VSP1 devices.
> >>> 
> >>> Signed-off-by: Laurent Pinchart
> >>> <laurent.pinchart+renesas@ideasonboard.com>
> >>> ---
> >>> 
> >>>  arch/arm/boot/dts/r8a7790.dtsi | 51 ++++++++++++++++++++++++++++++++++
> >>>  1 file changed, 51 insertions(+)
> >>> 
> >>> diff --git a/arch/arm/boot/dts/r8a7790.dtsi
> >>> b/arch/arm/boot/dts/r8a7790.dtsi index d0e1773..7f00bec 100644
> >>> --- a/arch/arm/boot/dts/r8a7790.dtsi
> >>> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> >>> @@ -600,6 +600,57 @@
> >>> 
> >>>   		status = "disabled";
> >>>   	
> >>>   	};
> >>> 
> >>> +	vsp1@fe920000 {
> >> 
> >> Can't we call this node "video" or something alike (to comply with
> >> ePAPR)?
> > 
> > I don't mind renaming the node, but "video" sounds too generic to me (and
> > possibly misleading, as people might expect a video node to correspond to
> > a video output device).
> 
> Hi,
> 
> I am wondering if there has been a conclusion to this discussion.

Not that I know of. Unless someone comes up with a better node name, let's 
stick with "vsp1".

> >>> +		compatible = "renesas,vsp1";
> >>> +		reg = <0 0xfe920000 0 0x8000>;
> >>> +		interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>;
> >>> +		clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;

-- 
Regards,

Laurent Pinchart

Re: [PATCH 1/2] ARM: shmobile: r8a7790: Add VSP1 devices to DT

[Simon Horman]

On Tue, Sep 30, 2014 at 11:51:41AM +0300, Laurent Pinchart wrote:
> Hello,
> 
> On Tuesday 30 September 2014 13:23:53 Simon Horman wrote:
> > On Mon, Sep 15, 2014 at 02:32:07AM +0300, Laurent Pinchart wrote:
> > > On Sunday 14 September 2014 21:58:47 Sergei Shtylyov wrote:
> > >> On 09/14/2014 03:36 AM, Laurent Pinchart wrote:
> > >>> Add all available VSP1 devices.
> > >>> 
> > >>> Signed-off-by: Laurent Pinchart
> > >>> <laurent.pinchart+renesas@ideasonboard.com>
> > >>> ---
> > >>> 
> > >>>  arch/arm/boot/dts/r8a7790.dtsi | 51 ++++++++++++++++++++++++++++++++++
> > >>>  1 file changed, 51 insertions(+)
> > >>> 
> > >>> diff --git a/arch/arm/boot/dts/r8a7790.dtsi
> > >>> b/arch/arm/boot/dts/r8a7790.dtsi index d0e1773..7f00bec 100644
> > >>> --- a/arch/arm/boot/dts/r8a7790.dtsi
> > >>> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> > >>> @@ -600,6 +600,57 @@
> > >>> 
> > >>>   		status = "disabled";
> > >>>   	
> > >>>   	};
> > >>> 
> > >>> +	vsp1@fe920000 {
> > >> 
> > >> Can't we call this node "video" or something alike (to comply with
> > >> ePAPR)?
> > > 
> > > I don't mind renaming the node, but "video" sounds too generic to me (and
> > > possibly misleading, as people might expect a video node to correspond to
> > > a video output device).
> > 
> > Hi,
> > 
> > I am wondering if there has been a conclusion to this discussion.
> 
> Not that I know of. Unless someone comes up with a better node name, let's 
> stick with "vsp1".

No name seems to have been forthcoming for two weeks.
Accordingly, I have queued up this patch for v3.19.
Likewise for the similar patch for the r8a7791.

I'm more than happy to consider any name change patches
that subsequently materialise.

[PATCH 1/2] ARM: shmobile: r8a7790: add SRC interrupt number on DTSI

[Kuninori Morimoto]

From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
 arch/arm/boot/dts/r8a7790.dtsi |   20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index af30c24..637e4ee 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1435,16 +1435,16 @@
 		};
 
 		rcar_sound,src {
-			src0: src@0 { };
-			src1: src@1 { };
-			src2: src@2 { };
-			src3: src@3 { };
-			src4: src@4 { };
-			src5: src@5 { };
-			src6: src@6 { };
-			src7: src@7 { };
-			src8: src@8 { };
-			src9: src@9 { };
+			src0: src@0 { interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; };
+			src1: src@1 { interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>; };
+			src2: src@2 { interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>; };
+			src3: src@3 { interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>; };
+			src4: src@4 { interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>; };
+			src5: src@5 { interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>; };
+			src6: src@6 { interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>; };
+			src7: src@7 { interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>; };
+			src8: src@8 { interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>; };
+			src9: src@9 { interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>; };
 		};
 
 		rcar_sound,ssi {
-- 
1.7.9.5