* [PATCH v2 0/6] powerpc: sstep: Extend instruction emulation support
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:53 UTC (permalink / raw)
To: sandipan; +Cc: naveen.n.rao, paulus, linuxppc-dev, ravi.bangoria
This series adds emulation support for some additional ISA 3.0
instructions, most of which are now generated by a recent compiler
(e.g. gcc-8.x) when building the kernel with CONFIG_POWER9_CPU=y.
Changelog:
v1 -> v2:
- Use a conservative approach when using the multiply-add and
darn instructions via inline assembly because older binutils
may not be able to recognize them (as pointed out by Michael).
PrasannaKumar Muralidharan (1):
powerpc sstep: Add support for modsw, moduw instructions
Sandipan Das (5):
powerpc: sstep: Add support for maddhd, maddhdu, maddld instructions
powerpc: sstep: Add support for darn instruction
powerpc sstep: Add support for cnttzw, cnttzd instructions
powerpc sstep: Add support for extswsli instruction
powerpc sstep: Add support for modsd, modud instructions
arch/powerpc/include/asm/ppc-opcode.h | 15 +++-
arch/powerpc/lib/sstep.c | 114 +++++++++++++++++++++++++-
2 files changed, 126 insertions(+), 3 deletions(-)
--
2.19.2
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 1/6] powerpc: sstep: Add support for maddhd, maddhdu, maddld instructions
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:53 UTC (permalink / raw)
To: sandipan; +Cc: naveen.n.rao, paulus, linuxppc-dev, ravi.bangoria
This adds emulation support for the following integer instructions:
* Multiply-Add High Doubleword (maddhd)
* Multiply-Add High Doubleword Unsigned (maddhdu)
* Multiply-Add Low Doubleword (maddld)
As suggested by Michael, this uses a raw .long for specifying the
instruction word when using inline assembly to retain compatibility
with older binutils.
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
arch/powerpc/include/asm/ppc-opcode.h | 15 +++++++++++-
arch/powerpc/lib/sstep.c | 35 ++++++++++++++++++++++++++-
2 files changed, 48 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 19a8834e0398..d0b2d8534a62 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -334,6 +334,9 @@
#define PPC_INST_MULLW 0x7c0001d6
#define PPC_INST_MULHWU 0x7c000016
#define PPC_INST_MULLI 0x1c000000
+#define PPC_INST_MADDHD 0x10000030
+#define PPC_INST_MADDHDU 0x10000031
+#define PPC_INST_MADDLD 0x10000033
#define PPC_INST_DIVWU 0x7c000396
#define PPC_INST_DIVD 0x7c0003d2
#define PPC_INST_RLWINM 0x54000000
@@ -376,6 +379,7 @@
/* macros to insert fields into opcodes */
#define ___PPC_RA(a) (((a) & 0x1f) << 16)
#define ___PPC_RB(b) (((b) & 0x1f) << 11)
+#define ___PPC_RC(c) (((c) & 0x1f) << 6)
#define ___PPC_RS(s) (((s) & 0x1f) << 21)
#define ___PPC_RT(t) ___PPC_RS(t)
#define ___PPC_R(r) (((r) & 0x1) << 16)
@@ -395,7 +399,7 @@
#define __PPC_WS(w) (((w) & 0x1f) << 11)
#define __PPC_SH(s) __PPC_WS(s)
#define __PPC_SH64(s) (__PPC_SH(s) | (((s) & 0x20) >> 4))
-#define __PPC_MB(s) (((s) & 0x1f) << 6)
+#define __PPC_MB(s) ___PPC_RC(s)
#define __PPC_ME(s) (((s) & 0x1f) << 1)
#define __PPC_MB64(s) (__PPC_MB(s) | ((s) & 0x20))
#define __PPC_ME64(s) __PPC_MB64(s)
@@ -437,6 +441,15 @@
#define PPC_STQCX(t, a, b) stringify_in_c(.long PPC_INST_STQCX | \
___PPC_RT(t) | ___PPC_RA(a) | \
___PPC_RB(b))
+#define PPC_MADDHD(t, a, b, c) stringify_in_c(.long PPC_INST_MADDHD | \
+ ___PPC_RT(t) | ___PPC_RA(a) | \
+ ___PPC_RB(b) | ___PPC_RC(c))
+#define PPC_MADDHDU(t, a, b, c) stringify_in_c(.long PPC_INST_MADDHDU | \
+ ___PPC_RT(t) | ___PPC_RA(a) | \
+ ___PPC_RB(b) | ___PPC_RC(c))
+#define PPC_MADDLD(t, a, b, c) stringify_in_c(.long PPC_INST_MADDLD | \
+ ___PPC_RT(t) | ___PPC_RA(a) | \
+ ___PPC_RB(b) | ___PPC_RC(c))
#define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \
___PPC_RB(b))
#define PPC_MSGSYNC stringify_in_c(.long PPC_INST_MSGSYNC)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index d81568f783e5..67e69ebd6c00 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1169,7 +1169,7 @@ static nokprobe_inline int trap_compare(long v1, long v2)
int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
unsigned int instr)
{
- unsigned int opcode, ra, rb, rd, spr, u;
+ unsigned int opcode, ra, rb, rc, rd, spr, u;
unsigned long int imm;
unsigned long int val, val2;
unsigned int mb, me, sh;
@@ -1292,6 +1292,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
rd = (instr >> 21) & 0x1f;
ra = (instr >> 16) & 0x1f;
rb = (instr >> 11) & 0x1f;
+ rc = (instr >> 6) & 0x1f;
switch (opcode) {
#ifdef __powerpc64__
@@ -1305,6 +1306,38 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
goto trap;
return 1;
+#ifdef __powerpc64__
+ case 4:
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+
+ switch (instr & 0x3f) {
+ case 48: /* maddhd */
+ asm volatile(PPC_MADDHD(%0, %1, %2, %3) :
+ "=r" (op->val) : "r" (regs->gpr[ra]),
+ "r" (regs->gpr[rb]), "r" (regs->gpr[rc]));
+ goto compute_done;
+
+ case 49: /* maddhdu */
+ asm volatile(PPC_MADDHDU(%0, %1, %2, %3) :
+ "=r" (op->val) : "r" (regs->gpr[ra]),
+ "r" (regs->gpr[rb]), "r" (regs->gpr[rc]));
+ goto compute_done;
+
+ case 51: /* maddld */
+ asm volatile(PPC_MADDLD(%0, %1, %2, %3) :
+ "=r" (op->val) : "r" (regs->gpr[ra]),
+ "r" (regs->gpr[rb]), "r" (regs->gpr[rc]));
+ goto compute_done;
+ }
+
+ /*
+ * There are other instructions from ISA 3.0 with the same
+ * primary opcode which do not have emulation support yet.
+ */
+ return -1;
+#endif
+
case 7: /* mulli */
op->val = regs->gpr[ra] * (short) instr;
goto compute_done;
--
2.19.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 2/6] powerpc: sstep: Add support for darn instruction
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:53 UTC (permalink / raw)
To: sandipan; +Cc: naveen.n.rao, paulus, linuxppc-dev, ravi.bangoria
This adds emulation support for the following integer instructions:
* Deliver A Random Number (darn)
As suggested by Michael, this uses a raw .long for specifying the
instruction word when using inline assembly to retain compatibility
with older binutils.
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
arch/powerpc/lib/sstep.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 67e69ebd6c00..ab575e02f9b8 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1728,6 +1728,28 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
(int) regs->gpr[rb];
goto arith_done;
+ case 755: /* darn */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ switch (ra & 0x3) {
+ case 0:
+ /* 32-bit conditioned */
+ asm volatile(PPC_DARN(%0, 0) : "=r" (op->val));
+ goto compute_done;
+
+ case 1:
+ /* 64-bit conditioned */
+ asm volatile(PPC_DARN(%0, 1) : "=r" (op->val));
+ goto compute_done;
+
+ case 2:
+ /* 64-bit raw */
+ asm volatile(PPC_DARN(%0, 2) : "=r" (op->val));
+ goto compute_done;
+ }
+
+ return -1;
+
/*
* Logical instructions
--
2.19.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 3/6] powerpc sstep: Add support for cnttzw, cnttzd instructions
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:53 UTC (permalink / raw)
To: sandipan; +Cc: naveen.n.rao, paulus, linuxppc-dev, ravi.bangoria
This adds emulation support for the following integer instructions:
* Count Trailing Zeros Word (cnttzw[.])
* Count Trailing Zeros Doubleword (cnttzd[.])
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
arch/powerpc/lib/sstep.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index ab575e02f9b8..94189da4c159 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1819,6 +1819,20 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
case 506: /* popcntd */
do_popcnt(regs, op, regs->gpr[rd], 64);
goto logical_done_nocc;
+#endif
+ case 538: /* cnttzw */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ val = (unsigned int) regs->gpr[rd];
+ op->val = (val ? __builtin_ctz(val) : 32);
+ goto logical_done;
+#ifdef __powerpc64__
+ case 570: /* cnttzd */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ val = regs->gpr[rd];
+ op->val = (val ? __builtin_ctzl(val) : 64);
+ goto logical_done;
#endif
case 922: /* extsh */
op->val = (signed short) regs->gpr[rd];
--
2.19.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 4/6] powerpc sstep: Add support for extswsli instruction
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:53 UTC (permalink / raw)
To: sandipan; +Cc: naveen.n.rao, paulus, linuxppc-dev, ravi.bangoria
This adds emulation support for the following integer instructions:
* Extend-Sign Word and Shift Left Immediate (extswsli[.])
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
arch/powerpc/lib/sstep.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 94189da4c159..742298bdf30b 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1935,6 +1935,20 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
op->xerval &= ~XER_CA;
set_ca32(op, op->xerval & XER_CA);
goto logical_done;
+
+ case 890: /* extswsli with sh_5 = 0 */
+ case 891: /* extswsli with sh_5 = 1 */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ op->type = COMPUTE + SETREG;
+ sh = rb | ((instr & 2) << 4);
+ val = (signed int) regs->gpr[rd];
+ if (sh)
+ op->val = ROTATE(val, sh) & MASK64(0, 63 - sh);
+ else
+ op->val = val;
+ goto logical_done;
+
#endif /* __powerpc64__ */
/*
--
2.19.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 5/6] powerpc sstep: Add support for modsw, moduw instructions
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:53 UTC (permalink / raw)
To: sandipan
Cc: ravi.bangoria, PrasannaKumar Muralidharan, paulus, naveen.n.rao,
linuxppc-dev
From: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
This adds emulation support for the following integer instructions:
* Modulo Signed Word (modsw)
* Modulo Unsigned Word (moduw)
Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
arch/powerpc/lib/sstep.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 742298bdf30b..9c65fb1da298 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1708,6 +1708,13 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
case 266: /* add */
op->val = regs->gpr[ra] + regs->gpr[rb];
goto arith_done;
+
+ case 267: /* moduw */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ op->val = (unsigned int) regs->gpr[ra] %
+ (unsigned int) regs->gpr[rb];
+ goto compute_done;
#ifdef __powerpc64__
case 457: /* divdu */
op->val = regs->gpr[ra] / regs->gpr[rb];
@@ -1750,6 +1757,13 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
return -1;
+ case 779: /* modsw */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ op->val = (int) regs->gpr[ra] %
+ (int) regs->gpr[rb];
+ goto compute_done;
+
/*
* Logical instructions
--
2.19.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 6/6] powerpc sstep: Add support for modsd, modud instructions
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:53 UTC (permalink / raw)
To: sandipan; +Cc: naveen.n.rao, paulus, linuxppc-dev, ravi.bangoria
This adds emulation support for the following integer instructions:
* Modulo Signed Doubleword (modsd)
* Modulo Unsigned Doubleword (modud)
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
arch/powerpc/lib/sstep.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 9c65fb1da298..3d33fb509ef4 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1704,7 +1704,13 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
(int) regs->gpr[rb];
goto arith_done;
-
+#ifdef __powerpc64__
+ case 265: /* modud */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ op->val = regs->gpr[ra] % regs->gpr[rb];
+ goto compute_done;
+#endif
case 266: /* add */
op->val = regs->gpr[ra] + regs->gpr[rb];
goto arith_done;
@@ -1756,7 +1762,14 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
}
return -1;
-
+#ifdef __powerpc64__
+ case 777: /* modsd */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ op->val = (long int) regs->gpr[ra] %
+ (long int) regs->gpr[rb];
+ goto compute_done;
+#endif
case 779: /* modsw */
if (!cpu_has_feature(CPU_FTR_ARCH_300))
return -1;
--
2.19.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 0/6] powerpc: sstep: Extend instruction emulation support
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:54 UTC (permalink / raw)
To: mpe; +Cc: naveen.n.rao, paulus, linuxppc-dev, ravi.bangoria
This series adds emulation support for some additional ISA 3.0
instructions, most of which are now generated by a recent compiler
(e.g. gcc-8.x) when building the kernel with CONFIG_POWER9_CPU=y.
Changelog:
v1 -> v2:
- Use a conservative approach when using the multiply-add and
darn instructions via inline assembly because older binutils
may not be able to recognize them (as pointed out by Michael).
PrasannaKumar Muralidharan (1):
powerpc sstep: Add support for modsw, moduw instructions
Sandipan Das (5):
powerpc: sstep: Add support for maddhd, maddhdu, maddld instructions
powerpc: sstep: Add support for darn instruction
powerpc sstep: Add support for cnttzw, cnttzd instructions
powerpc sstep: Add support for extswsli instruction
powerpc sstep: Add support for modsd, modud instructions
arch/powerpc/include/asm/ppc-opcode.h | 15 +++-
arch/powerpc/lib/sstep.c | 114 +++++++++++++++++++++++++-
2 files changed, 126 insertions(+), 3 deletions(-)
--
2.19.2
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 1/6] powerpc: sstep: Add support for maddhd, maddhdu, maddld instructions
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:54 UTC (permalink / raw)
To: mpe; +Cc: naveen.n.rao, paulus, linuxppc-dev, ravi.bangoria
This adds emulation support for the following integer instructions:
* Multiply-Add High Doubleword (maddhd)
* Multiply-Add High Doubleword Unsigned (maddhdu)
* Multiply-Add Low Doubleword (maddld)
As suggested by Michael, this uses a raw .long for specifying the
instruction word when using inline assembly to retain compatibility
with older binutils.
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
arch/powerpc/include/asm/ppc-opcode.h | 15 +++++++++++-
arch/powerpc/lib/sstep.c | 35 ++++++++++++++++++++++++++-
2 files changed, 48 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 19a8834e0398..d0b2d8534a62 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -334,6 +334,9 @@
#define PPC_INST_MULLW 0x7c0001d6
#define PPC_INST_MULHWU 0x7c000016
#define PPC_INST_MULLI 0x1c000000
+#define PPC_INST_MADDHD 0x10000030
+#define PPC_INST_MADDHDU 0x10000031
+#define PPC_INST_MADDLD 0x10000033
#define PPC_INST_DIVWU 0x7c000396
#define PPC_INST_DIVD 0x7c0003d2
#define PPC_INST_RLWINM 0x54000000
@@ -376,6 +379,7 @@
/* macros to insert fields into opcodes */
#define ___PPC_RA(a) (((a) & 0x1f) << 16)
#define ___PPC_RB(b) (((b) & 0x1f) << 11)
+#define ___PPC_RC(c) (((c) & 0x1f) << 6)
#define ___PPC_RS(s) (((s) & 0x1f) << 21)
#define ___PPC_RT(t) ___PPC_RS(t)
#define ___PPC_R(r) (((r) & 0x1) << 16)
@@ -395,7 +399,7 @@
#define __PPC_WS(w) (((w) & 0x1f) << 11)
#define __PPC_SH(s) __PPC_WS(s)
#define __PPC_SH64(s) (__PPC_SH(s) | (((s) & 0x20) >> 4))
-#define __PPC_MB(s) (((s) & 0x1f) << 6)
+#define __PPC_MB(s) ___PPC_RC(s)
#define __PPC_ME(s) (((s) & 0x1f) << 1)
#define __PPC_MB64(s) (__PPC_MB(s) | ((s) & 0x20))
#define __PPC_ME64(s) __PPC_MB64(s)
@@ -437,6 +441,15 @@
#define PPC_STQCX(t, a, b) stringify_in_c(.long PPC_INST_STQCX | \
___PPC_RT(t) | ___PPC_RA(a) | \
___PPC_RB(b))
+#define PPC_MADDHD(t, a, b, c) stringify_in_c(.long PPC_INST_MADDHD | \
+ ___PPC_RT(t) | ___PPC_RA(a) | \
+ ___PPC_RB(b) | ___PPC_RC(c))
+#define PPC_MADDHDU(t, a, b, c) stringify_in_c(.long PPC_INST_MADDHDU | \
+ ___PPC_RT(t) | ___PPC_RA(a) | \
+ ___PPC_RB(b) | ___PPC_RC(c))
+#define PPC_MADDLD(t, a, b, c) stringify_in_c(.long PPC_INST_MADDLD | \
+ ___PPC_RT(t) | ___PPC_RA(a) | \
+ ___PPC_RB(b) | ___PPC_RC(c))
#define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \
___PPC_RB(b))
#define PPC_MSGSYNC stringify_in_c(.long PPC_INST_MSGSYNC)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index d81568f783e5..67e69ebd6c00 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1169,7 +1169,7 @@ static nokprobe_inline int trap_compare(long v1, long v2)
int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
unsigned int instr)
{
- unsigned int opcode, ra, rb, rd, spr, u;
+ unsigned int opcode, ra, rb, rc, rd, spr, u;
unsigned long int imm;
unsigned long int val, val2;
unsigned int mb, me, sh;
@@ -1292,6 +1292,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
rd = (instr >> 21) & 0x1f;
ra = (instr >> 16) & 0x1f;
rb = (instr >> 11) & 0x1f;
+ rc = (instr >> 6) & 0x1f;
switch (opcode) {
#ifdef __powerpc64__
@@ -1305,6 +1306,38 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
goto trap;
return 1;
+#ifdef __powerpc64__
+ case 4:
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+
+ switch (instr & 0x3f) {
+ case 48: /* maddhd */
+ asm volatile(PPC_MADDHD(%0, %1, %2, %3) :
+ "=r" (op->val) : "r" (regs->gpr[ra]),
+ "r" (regs->gpr[rb]), "r" (regs->gpr[rc]));
+ goto compute_done;
+
+ case 49: /* maddhdu */
+ asm volatile(PPC_MADDHDU(%0, %1, %2, %3) :
+ "=r" (op->val) : "r" (regs->gpr[ra]),
+ "r" (regs->gpr[rb]), "r" (regs->gpr[rc]));
+ goto compute_done;
+
+ case 51: /* maddld */
+ asm volatile(PPC_MADDLD(%0, %1, %2, %3) :
+ "=r" (op->val) : "r" (regs->gpr[ra]),
+ "r" (regs->gpr[rb]), "r" (regs->gpr[rc]));
+ goto compute_done;
+ }
+
+ /*
+ * There are other instructions from ISA 3.0 with the same
+ * primary opcode which do not have emulation support yet.
+ */
+ return -1;
+#endif
+
case 7: /* mulli */
op->val = regs->gpr[ra] * (short) instr;
goto compute_done;
--
2.19.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 2/6] powerpc: sstep: Add support for darn instruction
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:54 UTC (permalink / raw)
To: mpe; +Cc: naveen.n.rao, paulus, linuxppc-dev, ravi.bangoria
This adds emulation support for the following integer instructions:
* Deliver A Random Number (darn)
As suggested by Michael, this uses a raw .long for specifying the
instruction word when using inline assembly to retain compatibility
with older binutils.
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
arch/powerpc/lib/sstep.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 67e69ebd6c00..ab575e02f9b8 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1728,6 +1728,28 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
(int) regs->gpr[rb];
goto arith_done;
+ case 755: /* darn */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ switch (ra & 0x3) {
+ case 0:
+ /* 32-bit conditioned */
+ asm volatile(PPC_DARN(%0, 0) : "=r" (op->val));
+ goto compute_done;
+
+ case 1:
+ /* 64-bit conditioned */
+ asm volatile(PPC_DARN(%0, 1) : "=r" (op->val));
+ goto compute_done;
+
+ case 2:
+ /* 64-bit raw */
+ asm volatile(PPC_DARN(%0, 2) : "=r" (op->val));
+ goto compute_done;
+ }
+
+ return -1;
+
/*
* Logical instructions
--
2.19.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 3/6] powerpc sstep: Add support for cnttzw, cnttzd instructions
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:54 UTC (permalink / raw)
To: mpe; +Cc: naveen.n.rao, paulus, linuxppc-dev, ravi.bangoria
This adds emulation support for the following integer instructions:
* Count Trailing Zeros Word (cnttzw[.])
* Count Trailing Zeros Doubleword (cnttzd[.])
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
arch/powerpc/lib/sstep.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index ab575e02f9b8..94189da4c159 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1819,6 +1819,20 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
case 506: /* popcntd */
do_popcnt(regs, op, regs->gpr[rd], 64);
goto logical_done_nocc;
+#endif
+ case 538: /* cnttzw */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ val = (unsigned int) regs->gpr[rd];
+ op->val = (val ? __builtin_ctz(val) : 32);
+ goto logical_done;
+#ifdef __powerpc64__
+ case 570: /* cnttzd */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ val = regs->gpr[rd];
+ op->val = (val ? __builtin_ctzl(val) : 64);
+ goto logical_done;
#endif
case 922: /* extsh */
op->val = (signed short) regs->gpr[rd];
--
2.19.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 4/6] powerpc sstep: Add support for extswsli instruction
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:54 UTC (permalink / raw)
To: mpe; +Cc: naveen.n.rao, paulus, linuxppc-dev, ravi.bangoria
This adds emulation support for the following integer instructions:
* Extend-Sign Word and Shift Left Immediate (extswsli[.])
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
arch/powerpc/lib/sstep.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 94189da4c159..742298bdf30b 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1935,6 +1935,20 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
op->xerval &= ~XER_CA;
set_ca32(op, op->xerval & XER_CA);
goto logical_done;
+
+ case 890: /* extswsli with sh_5 = 0 */
+ case 891: /* extswsli with sh_5 = 1 */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ op->type = COMPUTE + SETREG;
+ sh = rb | ((instr & 2) << 4);
+ val = (signed int) regs->gpr[rd];
+ if (sh)
+ op->val = ROTATE(val, sh) & MASK64(0, 63 - sh);
+ else
+ op->val = val;
+ goto logical_done;
+
#endif /* __powerpc64__ */
/*
--
2.19.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 5/6] powerpc sstep: Add support for modsw, moduw instructions
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:54 UTC (permalink / raw)
To: mpe
Cc: ravi.bangoria, PrasannaKumar Muralidharan, paulus, naveen.n.rao,
linuxppc-dev
From: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
This adds emulation support for the following integer instructions:
* Modulo Signed Word (modsw)
* Modulo Unsigned Word (moduw)
Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
arch/powerpc/lib/sstep.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 742298bdf30b..9c65fb1da298 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1708,6 +1708,13 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
case 266: /* add */
op->val = regs->gpr[ra] + regs->gpr[rb];
goto arith_done;
+
+ case 267: /* moduw */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ op->val = (unsigned int) regs->gpr[ra] %
+ (unsigned int) regs->gpr[rb];
+ goto compute_done;
#ifdef __powerpc64__
case 457: /* divdu */
op->val = regs->gpr[ra] / regs->gpr[rb];
@@ -1750,6 +1757,13 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
return -1;
+ case 779: /* modsw */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ op->val = (int) regs->gpr[ra] %
+ (int) regs->gpr[rb];
+ goto compute_done;
+
/*
* Logical instructions
--
2.19.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 6/6] powerpc sstep: Add support for modsd, modud instructions
@ 2019-02-22 6:54 ` Sandipan Das
0 siblings, 0 replies; 15+ messages in thread
From: Sandipan Das @ 2019-02-22 6:54 UTC (permalink / raw)
To: mpe; +Cc: naveen.n.rao, paulus, linuxppc-dev, ravi.bangoria
This adds emulation support for the following integer instructions:
* Modulo Signed Doubleword (modsd)
* Modulo Unsigned Doubleword (modud)
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
arch/powerpc/lib/sstep.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 9c65fb1da298..3d33fb509ef4 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1704,7 +1704,13 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
(int) regs->gpr[rb];
goto arith_done;
-
+#ifdef __powerpc64__
+ case 265: /* modud */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ op->val = regs->gpr[ra] % regs->gpr[rb];
+ goto compute_done;
+#endif
case 266: /* add */
op->val = regs->gpr[ra] + regs->gpr[rb];
goto arith_done;
@@ -1756,7 +1762,14 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
}
return -1;
-
+#ifdef __powerpc64__
+ case 777: /* modsd */
+ if (!cpu_has_feature(CPU_FTR_ARCH_300))
+ return -1;
+ op->val = (long int) regs->gpr[ra] %
+ (long int) regs->gpr[rb];
+ goto compute_done;
+#endif
case 779: /* modsw */
if (!cpu_has_feature(CPU_FTR_ARCH_300))
return -1;
--
2.19.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [v2, 1/6] powerpc: sstep: Add support for maddhd, maddhdu, maddld instructions
2019-02-22 6:54 ` Sandipan Das
(?)
@ 2019-02-28 9:21 ` Michael Ellerman
-1 siblings, 0 replies; 15+ messages in thread
From: Michael Ellerman @ 2019-02-28 9:21 UTC (permalink / raw)
To: Sandipan Das, sandipan; +Cc: naveen.n.rao, linuxppc-dev, paulus, ravi.bangoria
On Fri, 2019-02-22 at 06:53:27 UTC, Sandipan Das wrote:
> This adds emulation support for the following integer instructions:
> * Multiply-Add High Doubleword (maddhd)
> * Multiply-Add High Doubleword Unsigned (maddhdu)
> * Multiply-Add Low Doubleword (maddld)
>
> As suggested by Michael, this uses a raw .long for specifying the
> instruction word when using inline assembly to retain compatibility
> with older binutils.
>
> Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
Series applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/930d6288a26787d2e7f633705434171a
cheers
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2019-02-28 9:24 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-02-22 6:53 [PATCH v2 0/6] powerpc: sstep: Extend instruction emulation support Sandipan Das
2019-02-22 6:54 ` Sandipan Das
2019-02-22 6:53 ` [PATCH v2 1/6] powerpc: sstep: Add support for maddhd, maddhdu, maddld instructions Sandipan Das
2019-02-22 6:54 ` Sandipan Das
2019-02-28 9:21 ` [v2, " Michael Ellerman
2019-02-22 6:53 ` [PATCH v2 2/6] powerpc: sstep: Add support for darn instruction Sandipan Das
2019-02-22 6:54 ` Sandipan Das
2019-02-22 6:53 ` [PATCH v2 3/6] powerpc sstep: Add support for cnttzw, cnttzd instructions Sandipan Das
2019-02-22 6:54 ` Sandipan Das
2019-02-22 6:53 ` [PATCH v2 4/6] powerpc sstep: Add support for extswsli instruction Sandipan Das
2019-02-22 6:54 ` Sandipan Das
2019-02-22 6:53 ` [PATCH v2 5/6] powerpc sstep: Add support for modsw, moduw instructions Sandipan Das
2019-02-22 6:54 ` Sandipan Das
2019-02-22 6:53 ` [PATCH v2 6/6] powerpc sstep: Add support for modsd, modud instructions Sandipan Das
2019-02-22 6:54 ` Sandipan Das
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