RE: [PATCH 2/6] omap iommu: omap2 architecture specific functions

["Kanigeri, Hari" <h-kanigeri2@ti.com>]

Hi,

> +static u32 omap2_iommu_fault_isr(struct iommu *obj, u32 *ra)
> +{
> +	int i;
> +	u32 stat, da;
> +	const char *err_msg[] =	{
> +		"tlb miss",
> +		"translation fault",
> +		"emulation miss",
> +		"table walk fault",
> +		"multi hit fault",
> +	};
> +
> +	stat = iommu_read_reg(obj, MMU_IRQSTATUS);
> +	stat &= MMU_IRQ_MASK;
> +	if (!stat)
> +		return 0;
> +
> +	da = iommu_read_reg(obj, MMU_FAULT_AD);
> +	*ra = da;
> +
> +	dev_err(obj->dev, "%s:\tda:%08x ", __func__, da);
> +
> +	for (i = 0; i < ARRAY_SIZE(err_msg); i++) {
> +		if (stat & (1 << i))
> +			printk("%s ", err_msg[i]);
> +	}
> +	printk("\n");
> +
> +	iommu_write_reg(obj, stat, MMU_IRQSTATUS);
> +	return stat;
> +}
> +

-- I see you are acking the MMU fault in the ISR, but I don't think this will be enough to stop the further generation of MMU faults as the device will again try to access the same fault address. 

In the mean time before the callback mechanism is implemented, we should consider disabling the MMU for the device that caused the MMU fault to stop further generation of MMU faults.

+	printk("\n");
+
+	iommu_write_reg(obj, stat, MMU_IRQSTATUS);
+	omap2_iommu_disable(obj) -----------------------> [HK]
+	return stat;
+}

Thank you,
Best regards,
Hari