From: Auger Eric <eric.auger@redhat.com> To: Jacob Pan <jacob.jun.pan@linux.intel.com>, iommu@lists.linux-foundation.org, LKML <linux-kernel@vger.kernel.org>, Lu Baolu <baolu.lu@linux.intel.com>, Joerg Roedel <joro@8bytes.org>, David Woodhouse <dwmw2@infradead.org> Cc: Yi Liu <yi.l.liu@intel.com>, "Tian, Kevin" <kevin.tian@intel.com>, Raj Ashok <ashok.raj@intel.com> Subject: Re: [PATCH v4 6/7] iommu/vt-d: Warn on out-of-range invalidation address Date: Thu, 16 Jul 2020 10:40:48 +0200 [thread overview] Message-ID: <8a0a2896-74f9-94a9-f401-c46d9d157023@redhat.com> (raw) In-Reply-To: <1594080774-33413-7-git-send-email-jacob.jun.pan@linux.intel.com> Hi Jacob, On 7/7/20 2:12 AM, Jacob Pan wrote: > For guest requested IOTLB invalidation, address and mask are provided as > part of the invalidation data. VT-d HW silently ignores any address bits > below the mask. SW shall also allow such case but give warning if > address does not align with the mask. This patch relax the fault > handling from error to warning and proceed with invalidation request > with the given mask. > > Fixes: 6ee1b77ba3ac0 ("iommu/vt-d: Add svm/sva invalidate function") > Acked-by: Lu Baolu <baolu.lu@linux.intel.com> > Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> following your replies on my v3 comments, Reviewed-by: Eric Auger <eric.auger@redhat.com> Thanks Eric > --- > drivers/iommu/intel/iommu.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index 3bf03c6cd15f..c3a9a85a3c3f 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -5439,13 +5439,12 @@ intel_iommu_sva_invalidate(struct iommu_domain *domain, struct device *dev, > > switch (BIT(cache_type)) { > case IOMMU_CACHE_INV_TYPE_IOTLB: > + /* HW will ignore LSB bits based on address mask */ > if (inv_info->granularity == IOMMU_INV_GRANU_ADDR && > size && > (inv_info->addr_info.addr & ((BIT(VTD_PAGE_SHIFT + size)) - 1))) { > - pr_err_ratelimited("Address out of range, 0x%llx, size order %llu\n", > - inv_info->addr_info.addr, size); > - ret = -ERANGE; > - goto out_unlock; > + pr_err_ratelimited("User address not aligned, 0x%llx, size order %llu\n", > + inv_info->addr_info.addr, size); > } > > /* >
WARNING: multiple messages have this Message-ID (diff)
From: Auger Eric <eric.auger@redhat.com> To: Jacob Pan <jacob.jun.pan@linux.intel.com>, iommu@lists.linux-foundation.org, LKML <linux-kernel@vger.kernel.org>, Lu Baolu <baolu.lu@linux.intel.com>, Joerg Roedel <joro@8bytes.org>, David Woodhouse <dwmw2@infradead.org> Cc: "Tian, Kevin" <kevin.tian@intel.com>, Raj Ashok <ashok.raj@intel.com> Subject: Re: [PATCH v4 6/7] iommu/vt-d: Warn on out-of-range invalidation address Date: Thu, 16 Jul 2020 10:40:48 +0200 [thread overview] Message-ID: <8a0a2896-74f9-94a9-f401-c46d9d157023@redhat.com> (raw) In-Reply-To: <1594080774-33413-7-git-send-email-jacob.jun.pan@linux.intel.com> Hi Jacob, On 7/7/20 2:12 AM, Jacob Pan wrote: > For guest requested IOTLB invalidation, address and mask are provided as > part of the invalidation data. VT-d HW silently ignores any address bits > below the mask. SW shall also allow such case but give warning if > address does not align with the mask. This patch relax the fault > handling from error to warning and proceed with invalidation request > with the given mask. > > Fixes: 6ee1b77ba3ac0 ("iommu/vt-d: Add svm/sva invalidate function") > Acked-by: Lu Baolu <baolu.lu@linux.intel.com> > Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> following your replies on my v3 comments, Reviewed-by: Eric Auger <eric.auger@redhat.com> Thanks Eric > --- > drivers/iommu/intel/iommu.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index 3bf03c6cd15f..c3a9a85a3c3f 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -5439,13 +5439,12 @@ intel_iommu_sva_invalidate(struct iommu_domain *domain, struct device *dev, > > switch (BIT(cache_type)) { > case IOMMU_CACHE_INV_TYPE_IOTLB: > + /* HW will ignore LSB bits based on address mask */ > if (inv_info->granularity == IOMMU_INV_GRANU_ADDR && > size && > (inv_info->addr_info.addr & ((BIT(VTD_PAGE_SHIFT + size)) - 1))) { > - pr_err_ratelimited("Address out of range, 0x%llx, size order %llu\n", > - inv_info->addr_info.addr, size); > - ret = -ERANGE; > - goto out_unlock; > + pr_err_ratelimited("User address not aligned, 0x%llx, size order %llu\n", > + inv_info->addr_info.addr, size); > } > > /* > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2020-07-16 8:41 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-07 0:12 [PATCH v4 0/7] iommu/vt-d: Misc tweaks and fixes for vSVA Jacob Pan 2020-07-07 0:12 ` Jacob Pan 2020-07-07 0:12 ` [PATCH v4 1/7] iommu/vt-d: Enforce PASID devTLB field mask Jacob Pan 2020-07-07 0:12 ` Jacob Pan 2020-07-07 0:12 ` [PATCH v4 2/7] iommu/vt-d: Remove global page support in devTLB flush Jacob Pan 2020-07-07 0:12 ` Jacob Pan 2020-07-07 0:12 ` [PATCH v4 3/7] iommu/vt-d: Fix PASID devTLB invalidation Jacob Pan 2020-07-07 0:12 ` Jacob Pan 2020-07-16 7:52 ` Auger Eric 2020-07-16 7:52 ` Auger Eric 2020-07-07 0:12 ` [PATCH v4 4/7] iommu/vt-d: Handle non-page aligned address Jacob Pan 2020-07-07 0:12 ` Jacob Pan 2020-07-07 13:32 ` kernel test robot 2020-07-07 13:32 ` kernel test robot 2020-07-07 13:32 ` kernel test robot 2020-07-09 1:10 ` [kbuild-all] " Li, Philip 2020-07-09 1:10 ` Li, Philip 2020-07-09 1:10 ` [kbuild-all] " Li, Philip 2020-07-16 7:51 ` Auger Eric 2020-07-16 7:51 ` Auger Eric 2020-07-21 16:50 ` Jacob Pan 2020-07-21 16:50 ` Jacob Pan 2020-07-22 1:01 ` Lu Baolu 2020-07-22 1:01 ` Lu Baolu 2020-07-22 18:20 ` Jacob Pan 2020-07-22 18:20 ` Jacob Pan 2020-07-07 0:12 ` [PATCH v4 5/7] iommu/vt-d: Fix devTLB flush for vSVA Jacob Pan 2020-07-07 0:12 ` Jacob Pan 2020-07-07 0:12 ` [PATCH v4 6/7] iommu/vt-d: Warn on out-of-range invalidation address Jacob Pan 2020-07-07 0:12 ` Jacob Pan 2020-07-16 8:40 ` Auger Eric [this message] 2020-07-16 8:40 ` Auger Eric 2020-07-07 0:12 ` [PATCH v4 7/7] iommu/vt-d: Disable multiple GPASID-dev bind Jacob Pan 2020-07-07 0:12 ` Jacob Pan
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=8a0a2896-74f9-94a9-f401-c46d9d157023@redhat.com \ --to=eric.auger@redhat.com \ --cc=ashok.raj@intel.com \ --cc=baolu.lu@linux.intel.com \ --cc=dwmw2@infradead.org \ --cc=iommu@lists.linux-foundation.org \ --cc=jacob.jun.pan@linux.intel.com \ --cc=joro@8bytes.org \ --cc=kevin.tian@intel.com \ --cc=linux-kernel@vger.kernel.org \ --cc=yi.l.liu@intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.