[PATCH 0/4] board: freescale: T2080RDB: rev D support and

[PATCH 0/4] board: freescale: T2080RDB: rev D support and

[Camelia Groza]

From: Camelia Groza <camelia.groza@nxp.com>

The T2080RDB boards revision D and up have updated Aquantia PHYs on the
two 10Gbps copper ports connected to MAC1 and MAC2 (from AQ1202 to
AQR113C). The second PHY connected to MAC2 is located at a different
address on the MDIO bus compared to revision C boards. Device tree
fixups are required for both Linux and u-boot to set the correct PHY
address for the new board revisions.

While we are here, the first patch cleans up the T2080RDB board files
and removes legacy non-DM_ETH code paths. DM_ETH and DM_PCI are enabled,
so board_eth_init() isn't required anymore.

The second patch in the series implements a callback that detects the
board revision based on the CPLD registers.

The third patch adds the PHY address fix-up for Linux's device tree.

The last patch corrects u-boot's device tree under DM based on a newly
introduced CONFIG_T2080RDB_REV_D build option. We are unable to use the
board_fix_fdt callback to update the device tree before relocation because
the dts is stored in flash at that point and isn't writable. Instead,
this config option is used until a more robust solution is implemented.
Defconfig targets with the config option enabled by default are added for
convenience.

Changes in v2:
- remove legacy non-DM_ETH code paths at Tom's recommendation in 1/4
- patch title and description rewordings in 2/4 and 3/4
- drop "board: freescale: t208xrdb: add rev D support for the non-DM_ETH
  mode"
- move the AQR113C_PHY_ADDR define from the dropped patch to 3/4

Camelia Groza (4):
  board: freescale: t208xrdb: remove the legacy non-DM_ETH code
  board: freescale: t208xrdb: detect the board revision version
  board: freescale: t208xrdb: add Linux fdt fix-ups for rev D
  board: freescale: t208xrdb: add a config option for rev D dts fixups

 arch/powerpc/dts/t2080rdb.dts            |   7 ++
 board/freescale/t208xrdb/Kconfig         |   4 +
 board/freescale/t208xrdb/eth_t208xrdb.c  | 112 +++++++----------------
 board/freescale/t208xrdb/t208xrdb.c      |  24 +++--
 board/freescale/t208xrdb/t208xrdb.h      |   1 +
 configs/T2080RDB_revD_NAND_defconfig     |  93 +++++++++++++++++++
 configs/T2080RDB_revD_SDCARD_defconfig   |  90 ++++++++++++++++++
 configs/T2080RDB_revD_SPIFLASH_defconfig |  92 +++++++++++++++++++
 configs/T2080RDB_revD_defconfig          |  77 ++++++++++++++++
 include/configs/T208xRDB.h               |   8 +-
 10 files changed, 422 insertions(+), 86 deletions(-)
 create mode 100644 configs/T2080RDB_revD_NAND_defconfig
 create mode 100644 configs/T2080RDB_revD_SDCARD_defconfig
 create mode 100644 configs/T2080RDB_revD_SPIFLASH_defconfig
 create mode 100644 configs/T2080RDB_revD_defconfig

--
2.17.1

[PATCH v2 1/4] board: freescale: t208xrdb: remove the legacy non-DM_ETH code

[Camelia Groza]

From: Camelia Groza <camelia.groza@nxp.com>

Both DM_ETH and DM_PCI are enabled for the T2080RDB board. Remove the
board_eth_init() callback and the non-DM_ETH code paths since they are not
needed anymore.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
---
Changes in v2:
- new patch

 board/freescale/t208xrdb/eth_t208xrdb.c | 79 -------------------------
 board/freescale/t208xrdb/t208xrdb.c     |  4 --
 2 files changed, 83 deletions(-)

diff --git a/board/freescale/t208xrdb/eth_t208xrdb.c b/board/freescale/t208xrdb/eth_t208xrdb.c
index b0ff4b1f375a..4b44b1617d6c 100644
--- a/board/freescale/t208xrdb/eth_t208xrdb.c
+++ b/board/freescale/t208xrdb/eth_t208xrdb.c
@@ -26,85 +26,6 @@
 #include <fsl_dtsec.h>
 #include <asm/fsl_serdes.h>

-int board_eth_init(struct bd_info *bis)
-{
-#if defined(CONFIG_FMAN_ENET)
-	int i, interface;
-	struct memac_mdio_info dtsec_mdio_info;
-	struct memac_mdio_info tgec_mdio_info;
-	struct mii_dev *dev;
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-	u32 srds_s1;
-
-	srds_s1 = in_be32(&gur->rcwsr[4]) &
-					FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
-	srds_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT;
-
-	dtsec_mdio_info.regs =
-		(struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR;
-
-	dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
-
-	/* Register the 1G MDIO bus */
-	fm_memac_mdio_init(bis, &dtsec_mdio_info);
-
-	tgec_mdio_info.regs =
-		(struct memac_mdio_controller *)CONFIG_SYS_FM1_TGEC_MDIO_ADDR;
-	tgec_mdio_info.name = DEFAULT_FM_TGEC_MDIO_NAME;
-
-	/* Register the 10G MDIO bus */
-	fm_memac_mdio_init(bis, &tgec_mdio_info);
-
-	/* Set the two on-board RGMII PHY address */
-	fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY1_ADDR);
-	fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY2_ADDR);
-
-	switch (srds_s1) {
-	case 0x66:
-	case 0x6b:
-		fm_info_set_phy_address(FM1_10GEC1, CORTINA_PHY_ADDR1);
-		fm_info_set_phy_address(FM1_10GEC2, CORTINA_PHY_ADDR2);
-		fm_info_set_phy_address(FM1_10GEC3, FM1_10GEC3_PHY_ADDR);
-		fm_info_set_phy_address(FM1_10GEC4, FM1_10GEC4_PHY_ADDR);
-		break;
-	default:
-		printf("SerDes1 protocol 0x%x is not supported on T208xRDB\n",
-		       srds_s1);
-		break;
-	}
-
-	for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) {
-		interface = fm_info_get_enet_if(i);
-		switch (interface) {
-		case PHY_INTERFACE_MODE_RGMII:
-		case PHY_INTERFACE_MODE_RGMII_TXID:
-		case PHY_INTERFACE_MODE_RGMII_RXID:
-		case PHY_INTERFACE_MODE_RGMII_ID:
-			dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
-			fm_info_set_mdio(i, dev);
-			break;
-		default:
-			break;
-		}
-	}
-
-	for (i = FM1_10GEC1; i < FM1_10GEC1 + CONFIG_SYS_NUM_FM1_10GEC; i++) {
-		switch (fm_info_get_enet_if(i)) {
-		case PHY_INTERFACE_MODE_XGMII:
-			dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME);
-			fm_info_set_mdio(i, dev);
-			break;
-		default:
-			break;
-		}
-	}
-
-	cpu_eth_init(bis);
-#endif /* CONFIG_FMAN_ENET */
-
-	return pci_eth_init(bis);
-}
-
 /* Disable the MAC5 and MAC6 "fsl,fman-memac" nodes and the two
  * "fsl,dpa-ethernet" nodes that reference them.
  */
diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c
index 7ccb205c6473..35f5dff46645 100644
--- a/board/freescale/t208xrdb/t208xrdb.c
+++ b/board/freescale/t208xrdb/t208xrdb.c
@@ -136,11 +136,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 	fsl_fdt_fixup_dr_usb(blob, bd);

 #ifdef CONFIG_SYS_DPAA_FMAN
-#ifndef CONFIG_DM_ETH
-	fdt_fixup_fman_ethernet(blob);
-#else
 	fdt_fixup_board_fman_ethernet(blob);
-#endif
 	fdt_fixup_board_enet(blob);
 #endif

--
2.17.1

Re: [PATCH v2 1/4] board: freescale: t208xrdb: remove the legacy non-DM_ETH code

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 431 bytes --]

On Fri, Jun 11, 2021 at 03:28:05PM +0300, Camelia Groza wrote:

> From: Camelia Groza <camelia.groza@nxp.com>
> 
> Both DM_ETH and DM_PCI are enabled for the T2080RDB board. Remove the
> board_eth_init() callback and the non-DM_ETH code paths since they are not
> needed anymore.
> 
> Signed-off-by: Camelia Groza <camelia.groza@nxp.com>

Thanks for doing this.

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 659 bytes --]

[PATCH v2 2/4] board: freescale: t208xrdb: detect the board revision version

[Camelia Groza]

From: Camelia Groza <camelia.groza@nxp.com>

Detect and print the board revision version based on the CPLD registers.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
---
Changes in v2:
- patch title and description rewording

 board/freescale/t208xrdb/t208xrdb.c | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c
index 35f5dff46645..f7fa65d1a166 100644
--- a/board/freescale/t208xrdb/t208xrdb.c
+++ b/board/freescale/t208xrdb/t208xrdb.c
@@ -27,14 +27,29 @@

 DECLARE_GLOBAL_DATA_PTR;

+u8 get_hw_revision(void)
+{
+	u8 ver = CPLD_READ(hw_ver);
+
+	switch (ver) {
+	default:
+	case 0x1:
+		return 'C';
+	case 0x0:
+		return 'D';
+	case 0x2:
+		return 'E';
+	}
+}
+
 int checkboard(void)
 {
 	struct cpu_type *cpu = gd->arch.cpu;
 	static const char *freq[3] = {"100.00MHZ", "125.00MHz", "156.25MHZ"};

 	printf("Board: %sRDB, ", cpu->name);
-	printf("Board rev: 0x%02x CPLD ver: 0x%02x, boot from ",
-	       CPLD_READ(hw_ver), CPLD_READ(sw_ver));
+	printf("Board rev: %c CPLD ver: 0x%02x, boot from ",
+	       get_hw_revision(), CPLD_READ(sw_ver));

 #ifdef CONFIG_SDCARD
 	puts("SD/MMC\n");
--
2.17.1

[PATCH v2 3/4] board: freescale: t208xrdb: add Linux fdt fix-ups for rev D

[Camelia Groza]

From: Camelia Groza <camelia.groza@nxp.com>

The T2080RDB boards revisions D and up have updated 10G Aquantia PHYs
connected to MAC1 and MAC2. The second Aquantia PHY is located at a
different address on the MDIO bus compared to rev C (0x8 instead of 0x1).

Fix-up the Linux device tree to update the PHY address for the second
Aquantia PHY on boards revisions D and up. Also rename the PHY node to
reflect the changes.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
---
Changes in v2:
- patch title and description rewording
- define the AQR113C_PHY_ADDR in this patch since the patch in which it
  was defined previously was dropped.

 board/freescale/t208xrdb/eth_t208xrdb.c | 35 +++++++++++++++++++++++++
 board/freescale/t208xrdb/t208xrdb.c     |  1 +
 board/freescale/t208xrdb/t208xrdb.h     |  1 +
 include/configs/T208xRDB.h              |  8 ++++--
 4 files changed, 43 insertions(+), 2 deletions(-)

diff --git a/board/freescale/t208xrdb/eth_t208xrdb.c b/board/freescale/t208xrdb/eth_t208xrdb.c
index 4b44b1617d6c..e4592eac1530 100644
--- a/board/freescale/t208xrdb/eth_t208xrdb.c
+++ b/board/freescale/t208xrdb/eth_t208xrdb.c
@@ -26,6 +26,8 @@
 #include <fsl_dtsec.h>
 #include <asm/fsl_serdes.h>

+extern u8 get_hw_revision(void);
+
 /* Disable the MAC5 and MAC6 "fsl,fman-memac" nodes and the two
  * "fsl,dpa-ethernet" nodes that reference them.
  */
@@ -60,6 +62,39 @@ void fdt_fixup_board_fman_ethernet(void *fdt)
 	}
 }

+/* Update the address of the second Aquantia PHY on boards revision D and up.
+ * Also rename the PHY node to align with the address change.
+ */
+void fdt_fixup_board_phy(void *fdt)
+{
+	const char phy_path[] =
+		"/soc@ffe000000/fman@400000/mdio@fd000/ethernet-phy@1";
+	int ret, offset, new_addr = AQR113C_PHY_ADDR2;
+	char new_name[] = "ethernet-phy@00";
+
+	if (get_hw_revision() == 'C')
+		return;
+
+	offset = fdt_path_offset(fdt, phy_path);
+	if (offset < 0) {
+		printf("ethernet-phy@1 node not found in the dts\n");
+		return;
+	}
+
+	ret = fdt_setprop(fdt, offset, "reg", &new_addr, sizeof(new_addr));
+	if (ret < 0) {
+		printf("Unable to set 'reg' for node ethernet-phy@1: %s\n",
+		       fdt_strerror(ret));
+		return;
+	}
+
+	sprintf(new_name, "ethernet-phy@%x", new_addr);
+	ret = fdt_set_name(fdt, offset, new_name);
+	if (ret < 0)
+		printf("Unable to rename node ethernet-phy@1: %s\n",
+		       fdt_strerror(ret));
+}
+
 void fdt_fixup_board_enet(void *fdt)
 {
 	return;
diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c
index f7fa65d1a166..1f0cdee0b863 100644
--- a/board/freescale/t208xrdb/t208xrdb.c
+++ b/board/freescale/t208xrdb/t208xrdb.c
@@ -153,6 +153,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 #ifdef CONFIG_SYS_DPAA_FMAN
 	fdt_fixup_board_fman_ethernet(blob);
 	fdt_fixup_board_enet(blob);
+	fdt_fixup_board_phy(blob);
 #endif

 	return 0;
diff --git a/board/freescale/t208xrdb/t208xrdb.h b/board/freescale/t208xrdb/t208xrdb.h
index cd0a9f44da79..edbc860c9d02 100644
--- a/board/freescale/t208xrdb/t208xrdb.h
+++ b/board/freescale/t208xrdb/t208xrdb.h
@@ -10,5 +10,6 @@
 void fdt_fixup_board_enet(void *blob);
 void pci_of_setup(void *blob, struct bd_info *bd);
 void fdt_fixup_board_fman_ethernet(void *blob);
+void fdt_fixup_board_phy(void *blob);

 #endif
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index e467ef453d2f..0c657d76818b 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  */

 /*
@@ -537,8 +537,12 @@ unsigned long get_board_ddr_clk(void);
 #define RGMII_PHY2_ADDR		0x02
 #define CORTINA_PHY_ADDR1	0x0c  /* Cortina CS4315 */
 #define CORTINA_PHY_ADDR2	0x0d
-#define FM1_10GEC3_PHY_ADDR	0x00  /* Aquantia AQ1202 10G Base-T */
+/* Aquantia AQ1202 10G Base-T used by board revisions up to C */
+#define FM1_10GEC3_PHY_ADDR	0x00
 #define FM1_10GEC4_PHY_ADDR	0x01
+/* Aquantia AQR113C 10G Base-T used by board revisions D and up */
+#define AQR113C_PHY_ADDR1	0x00
+#define AQR113C_PHY_ADDR2	0x08
 #endif

 #ifdef CONFIG_FMAN_ENET
--
2.17.1

[PATCH v2 4/4] board: freescale: t208xrdb: add a config option for rev D dts fixups

[Camelia Groza]

From: Camelia Groza <camelia.groza@nxp.com>

Under DM, we rely on u-boot's device tree to provide the correct PHY
addresses. The board_fix_fdt callback is intended to be used for
device tree fixups before relocation. Unfortunately, this isn't an
option when booting from flash since the device tree isn't writable
before relocation.

This patch introduces the CONFIG_T2080RDB_REV_D option to signal that a
board revision D or up is the target. The config option is used to set
the correct Aquantia PHY address in the board's u-boot device tree.

Defconfig files with the option enable explicitly are added for
convenience.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
---
 arch/powerpc/dts/t2080rdb.dts            |  7 ++
 board/freescale/t208xrdb/Kconfig         |  4 +
 configs/T2080RDB_revD_NAND_defconfig     | 93 ++++++++++++++++++++++++
 configs/T2080RDB_revD_SDCARD_defconfig   | 90 +++++++++++++++++++++++
 configs/T2080RDB_revD_SPIFLASH_defconfig | 92 +++++++++++++++++++++++
 configs/T2080RDB_revD_defconfig          | 77 ++++++++++++++++++++
 6 files changed, 363 insertions(+)
 create mode 100644 configs/T2080RDB_revD_NAND_defconfig
 create mode 100644 configs/T2080RDB_revD_SDCARD_defconfig
 create mode 100644 configs/T2080RDB_revD_SPIFLASH_defconfig
 create mode 100644 configs/T2080RDB_revD_defconfig

diff --git a/arch/powerpc/dts/t2080rdb.dts b/arch/powerpc/dts/t2080rdb.dts
index 25f8c978c6d1..4de814ea8d9d 100644
--- a/arch/powerpc/dts/t2080rdb.dts
+++ b/arch/powerpc/dts/t2080rdb.dts
@@ -77,10 +77,17 @@
 				reg = <0x0>;
 			};
 
+#ifdef CONFIG_T2080RDB_REV_D
+			xg_aq1202_phy4: ethernet-phy@8 {
+				compatible = "ethernet-phy-ieee802.3-c45";
+				reg = <0x8>;
+			};
+#else
 			xg_aq1202_phy4: ethernet-phy@1 {
 				compatible = "ethernet-phy-ieee802.3-c45";
 				reg = <0x1>;
 			};
+#endif
 		};
 	};
 };
diff --git a/board/freescale/t208xrdb/Kconfig b/board/freescale/t208xrdb/Kconfig
index 6f0b012baba3..8249c5df967a 100644
--- a/board/freescale/t208xrdb/Kconfig
+++ b/board/freescale/t208xrdb/Kconfig
@@ -9,6 +9,10 @@ config SYS_VENDOR
 config SYS_CONFIG_NAME
 	default "T208xRDB"
 
+config T2080RDB_REV_D
+	bool "Support for T2080RDB revisions D and up"
+	default n
+
 source "board/freescale/common/Kconfig"
 
 endif
diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
new file mode 100644
index 000000000000..3b533a31ad00
--- /dev/null
+++ b/configs/T2080RDB_revD_NAND_defconfig
@@ -0,0 +1,93 @@
+CONFIG_PPC=y
+CONFIG_SYS_TEXT_BASE=0x00201000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0x100000
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
+CONFIG_MPC85xx=y
+CONFIG_TARGET_T2080RDB=y
+CONFIG_T2080RDB_REV_D=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_BOOTDELAY=10
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_MP=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)"
+# CONFIG_CMD_IRQ is not set
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_DM=y
+CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_FLASH_CFI_MTD=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_CORTINA=y
+CONFIG_SYS_CORTINA_FW_IN_NAND=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_E1000=y
+CONFIG_FMAN_ENET=y
+CONFIG_MII=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_DS1307=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_ESPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_ADDR_MAP=y
+CONFIG_SYS_NUM_ADDR_MAP=64
diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
new file mode 100644
index 000000000000..7b9013e5ecf6
--- /dev/null
+++ b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -0,0 +1,90 @@
+CONFIG_PPC=y
+CONFIG_SYS_TEXT_BASE=0x00201000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0x100000
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
+CONFIG_MPC85xx=y
+CONFIG_TARGET_T2080RDB=y
+CONFIG_T2080RDB_REV_D=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
+CONFIG_BOOTDELAY=10
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_MP=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)"
+# CONFIG_CMD_IRQ is not set
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_DM=y
+CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_FLASH_CFI_MTD=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_CORTINA=y
+CONFIG_SYS_CORTINA_FW_IN_MMC=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_E1000=y
+CONFIG_FMAN_ENET=y
+CONFIG_MII=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_DS1307=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_ESPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_ADDR_MAP=y
+CONFIG_SYS_NUM_ADDR_MAP=64
diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
new file mode 100644
index 000000000000..af85fa6cdf78
--- /dev/null
+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -0,0 +1,92 @@
+CONFIG_PPC=y
+CONFIG_SYS_TEXT_BASE=0x00201000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
+CONFIG_MPC85xx=y
+CONFIG_TARGET_T2080RDB=y
+CONFIG_T2080RDB_REV_D=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
+CONFIG_BOOTDELAY=10
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_FSL_PBL=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_MP=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)"
+# CONFIG_CMD_IRQ is not set
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_DM=y
+CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_FLASH_CFI_MTD=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_CORTINA=y
+CONFIG_SYS_CORTINA_FW_IN_SPIFLASH=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_E1000=y
+CONFIG_FMAN_ENET=y
+CONFIG_MII=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_DS1307=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_ESPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_ADDR_MAP=y
+CONFIG_SYS_NUM_ADDR_MAP=64
diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig
new file mode 100644
index 000000000000..79397ab30a8a
--- /dev/null
+++ b/configs/T2080RDB_revD_defconfig
@@ -0,0 +1,77 @@
+CONFIG_PPC=y
+CONFIG_SYS_TEXT_BASE=0xEFF40000
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
+CONFIG_MPC85xx=y
+CONFIG_TARGET_T2080RDB=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_T2080RDB_REV_D=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_MP=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)"
+# CONFIG_CMD_IRQ is not set
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_ENV_ADDR=0xEFF20000
+CONFIG_DM=y
+CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_FLASH_CFI_MTD=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_CORTINA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_E1000=y
+CONFIG_FMAN_ENET=y
+CONFIG_MII=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_DS1307=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_ESPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_ADDR_MAP=y
+CONFIG_SYS_NUM_ADDR_MAP=64
-- 
2.17.1