* [PATCH] target/arm/translate.c: Delete/amend incorrect comments
@ 2020-08-03 13:28 Peter Maydell
2020-08-04 3:54 ` Richard Henderson
0 siblings, 1 reply; 2+ messages in thread
From: Peter Maydell @ 2020-08-03 13:28 UTC (permalink / raw)
To: qemu-arm, qemu-devel
In arm_tr_init_disas_context() we have a FIXME comment that suggests
"cpu_M0 can probably be the same as cpu_V0". This isn't in fact
possible: cpu_V0 is used as a temporary inside gen_iwmmxt_shift(),
and that function is called in various places where cpu_M0 contains a
live value (i.e. between gen_op_iwmmxt_movq_M0_wRn() and
gen_op_iwmmxt_movq_wRn_M0() calls). Remove the comment.
We also have a comment on the declarations of cpu_V0/V1/M0 which
claims they're "for efficiency". This isn't true with modern TCG, so
replace this comment with one which notes that they're only used with
the iwmmxt decode.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
In an ideal world we would clean up the iwmmxt decode to remove
cpu_V0, cpu_v1 and cpu_M0 entirely -- they're only used as
temporaries, and in a modern coding style we would just create and
dispose of more carefully scoped TCG temps as we needed them.
---
target/arm/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 27bf6cd8b51..87235db4640 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -59,8 +59,9 @@
#define IS_USER(s) (s->user)
#endif
-/* We reuse the same 64-bit temporaries for efficiency. */
+/* These are TCG temporaries used only by the legacy iwMMXt decoder */
static TCGv_i64 cpu_V0, cpu_V1, cpu_M0;
+/* These are TCG globals which alias CPUARMState fields */
static TCGv_i32 cpu_R[16];
TCGv_i32 cpu_CF, cpu_NF, cpu_VF, cpu_ZF;
TCGv_i64 cpu_exclusive_addr;
@@ -8552,7 +8553,6 @@ static void arm_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
cpu_V0 = tcg_temp_new_i64();
cpu_V1 = tcg_temp_new_i64();
- /* FIXME: cpu_M0 can probably be the same as cpu_V0. */
cpu_M0 = tcg_temp_new_i64();
}
--
2.20.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] target/arm/translate.c: Delete/amend incorrect comments
2020-08-03 13:28 [PATCH] target/arm/translate.c: Delete/amend incorrect comments Peter Maydell
@ 2020-08-04 3:54 ` Richard Henderson
0 siblings, 0 replies; 2+ messages in thread
From: Richard Henderson @ 2020-08-04 3:54 UTC (permalink / raw)
To: Peter Maydell, qemu-arm, qemu-devel
On 8/3/20 6:28 AM, Peter Maydell wrote:
> In arm_tr_init_disas_context() we have a FIXME comment that suggests
> "cpu_M0 can probably be the same as cpu_V0". This isn't in fact
> possible: cpu_V0 is used as a temporary inside gen_iwmmxt_shift(),
> and that function is called in various places where cpu_M0 contains a
> live value (i.e. between gen_op_iwmmxt_movq_M0_wRn() and
> gen_op_iwmmxt_movq_wRn_M0() calls). Remove the comment.
>
> We also have a comment on the declarations of cpu_V0/V1/M0 which
> claims they're "for efficiency". This isn't true with modern TCG, so
> replace this comment with one which notes that they're only used with
> the iwmmxt decode.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
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2020-08-03 13:28 [PATCH] target/arm/translate.c: Delete/amend incorrect comments Peter Maydell
2020-08-04 3:54 ` Richard Henderson
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