* [PATCH] VT-d: fix caching mode IOTLB flushing
@ 2021-08-19 8:05 Jan Beulich
2021-08-19 18:52 ` Paul Durrant
2021-08-27 3:43 ` Tian, Kevin
0 siblings, 2 replies; 3+ messages in thread
From: Jan Beulich @ 2021-08-19 8:05 UTC (permalink / raw)
To: xen-devel; +Cc: Kevin Tian, Paul Durrant
While for context cache entry flushing use of did 0 is indeed correct
(after all upon reading the context entry the IOMMU wouldn't know any
domain ID if the entry is not present, and hence a surrogate one needs
to be used), for IOTLB entries the normal domain ID (from the [present]
context entry) gets used. See sub-section "IOTLB" of section "Address
Translation Caches" in the VT-d spec.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
Luckily this is supposed to be an issue only when running on emulated
IOMMUs; hardware implementations are expected to have CAP.CM=0.
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -474,17 +474,10 @@ int vtd_flush_iotlb_reg(struct vtd_iommu
/*
* In the non-present entry flush case, if hardware doesn't cache
- * non-present entry we do nothing and if hardware cache non-present
- * entry, we flush entries of domain 0 (the domain id is used to cache
- * any non-present entries)
+ * non-present entries we do nothing.
*/
- if ( flush_non_present_entry )
- {
- if ( !cap_caching_mode(iommu->cap) )
- return 1;
- else
- did = 0;
- }
+ if ( flush_non_present_entry && !cap_caching_mode(iommu->cap) )
+ return 1;
/* use register invalidation */
switch ( type )
--- a/xen/drivers/passthrough/vtd/qinval.c
+++ b/xen/drivers/passthrough/vtd/qinval.c
@@ -362,17 +362,10 @@ static int __must_check flush_iotlb_qi(s
/*
* In the non-present entry flush case, if hardware doesn't cache
- * non-present entry we do nothing and if hardware cache non-present
- * entry, we flush entries of domain 0 (the domain id is used to cache
- * any non-present entries)
+ * non-present entries we do nothing.
*/
- if ( flush_non_present_entry )
- {
- if ( !cap_caching_mode(iommu->cap) )
- return 1;
- else
- did = 0;
- }
+ if ( flush_non_present_entry && !cap_caching_mode(iommu->cap) )
+ return 1;
/* use queued invalidation */
if (cap_write_drain(iommu->cap))
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] VT-d: fix caching mode IOTLB flushing
2021-08-19 8:05 [PATCH] VT-d: fix caching mode IOTLB flushing Jan Beulich
@ 2021-08-19 18:52 ` Paul Durrant
2021-08-27 3:43 ` Tian, Kevin
1 sibling, 0 replies; 3+ messages in thread
From: Paul Durrant @ 2021-08-19 18:52 UTC (permalink / raw)
To: Jan Beulich, xen-devel; +Cc: Kevin Tian
On 19/08/2021 09:05, Jan Beulich wrote:
> While for context cache entry flushing use of did 0 is indeed correct
> (after all upon reading the context entry the IOMMU wouldn't know any
> domain ID if the entry is not present, and hence a surrogate one needs
> to be used), for IOTLB entries the normal domain ID (from the [present]
> context entry) gets used. See sub-section "IOTLB" of section "Address
> Translation Caches" in the VT-d spec.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Paul Durrant <paul@xen.org>
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH] VT-d: fix caching mode IOTLB flushing
2021-08-19 8:05 [PATCH] VT-d: fix caching mode IOTLB flushing Jan Beulich
2021-08-19 18:52 ` Paul Durrant
@ 2021-08-27 3:43 ` Tian, Kevin
1 sibling, 0 replies; 3+ messages in thread
From: Tian, Kevin @ 2021-08-27 3:43 UTC (permalink / raw)
To: Jan Beulich, xen-devel; +Cc: Paul Durrant
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Thursday, August 19, 2021 4:06 PM
>
> While for context cache entry flushing use of did 0 is indeed correct
> (after all upon reading the context entry the IOMMU wouldn't know any
> domain ID if the entry is not present, and hence a surrogate one needs
> to be used), for IOTLB entries the normal domain ID (from the [present]
> context entry) gets used. See sub-section "IOTLB" of section "Address
> Translation Caches" in the VT-d spec.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
> ---
> Luckily this is supposed to be an issue only when running on emulated
> IOMMUs; hardware implementations are expected to have CAP.CM=0.
>
> --- a/xen/drivers/passthrough/vtd/iommu.c
> +++ b/xen/drivers/passthrough/vtd/iommu.c
> @@ -474,17 +474,10 @@ int vtd_flush_iotlb_reg(struct vtd_iommu
>
> /*
> * In the non-present entry flush case, if hardware doesn't cache
> - * non-present entry we do nothing and if hardware cache non-present
> - * entry, we flush entries of domain 0 (the domain id is used to cache
> - * any non-present entries)
> + * non-present entries we do nothing.
> */
> - if ( flush_non_present_entry )
> - {
> - if ( !cap_caching_mode(iommu->cap) )
> - return 1;
> - else
> - did = 0;
> - }
> + if ( flush_non_present_entry && !cap_caching_mode(iommu->cap) )
> + return 1;
>
> /* use register invalidation */
> switch ( type )
> --- a/xen/drivers/passthrough/vtd/qinval.c
> +++ b/xen/drivers/passthrough/vtd/qinval.c
> @@ -362,17 +362,10 @@ static int __must_check flush_iotlb_qi(s
>
> /*
> * In the non-present entry flush case, if hardware doesn't cache
> - * non-present entry we do nothing and if hardware cache non-present
> - * entry, we flush entries of domain 0 (the domain id is used to cache
> - * any non-present entries)
> + * non-present entries we do nothing.
> */
> - if ( flush_non_present_entry )
> - {
> - if ( !cap_caching_mode(iommu->cap) )
> - return 1;
> - else
> - did = 0;
> - }
> + if ( flush_non_present_entry && !cap_caching_mode(iommu->cap) )
> + return 1;
>
> /* use queued invalidation */
> if (cap_write_drain(iommu->cap))
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-08-27 3:44 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2021-08-19 8:05 [PATCH] VT-d: fix caching mode IOTLB flushing Jan Beulich
2021-08-19 18:52 ` Paul Durrant
2021-08-27 3:43 ` Tian, Kevin
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