From: <Tudor.Ambarus@microchip.com> To: <michael@walle.cc>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org> Cc: <miquel.raynal@bootlin.com>, <richard@nod.at>, <vigneshr@ti.com>, <boris.brezillon@collabora.com> Subject: Re: [PATCH v6 3/5] mtd: spi-nor: intel: remove global protection flag Date: Fri, 27 Nov 2020 09:07:35 +0000 [thread overview] Message-ID: <8c908200-9350-ec54-d301-e95c7eedeb0b@microchip.com> (raw) In-Reply-To: <20201126202614.5710-4-michael@walle.cc> On 11/26/20 10:26 PM, Michael Walle wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > For the Atmel and SST parts this flag was already moved to individual > flash parts because it is considered bad esp. because newer flash chips > will automatically inherit the "has locking" support. While this won't > likely be the case for the Intel parts, we do it for consistency > reasons. > > Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > changes since v5 > - new patch > > drivers/mtd/spi-nor/intel.c | 16 +++------------- > 1 file changed, 3 insertions(+), 13 deletions(-) > > diff --git a/drivers/mtd/spi-nor/intel.c b/drivers/mtd/spi-nor/intel.c > index d8196f101368..6c31bef3fc60 100644 > --- a/drivers/mtd/spi-nor/intel.c > +++ b/drivers/mtd/spi-nor/intel.c > @@ -10,23 +10,13 @@ > > static const struct flash_info intel_parts[] = { > /* Intel/Numonyx -- xxxs33b */ > - { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, > - { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) }, > - { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) }, > -}; > - > -static void intel_default_init(struct spi_nor *nor) > -{ > - nor->flags |= SNOR_F_HAS_LOCK; > -} > - > -static const struct spi_nor_fixups intel_fixups = { > - .default_init = intel_default_init, > + { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, SPI_NOR_HAS_LOCK) }, > + { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, SPI_NOR_HAS_LOCK) }, > + { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, SPI_NOR_HAS_LOCK) }, > }; > > const struct spi_nor_manufacturer spi_nor_intel = { > .name = "intel", > .parts = intel_parts, > .nparts = ARRAY_SIZE(intel_parts), > - .fixups = &intel_fixups, > }; > -- > 2.20.1 >
WARNING: multiple messages have this Message-ID (diff)
From: <Tudor.Ambarus@microchip.com> To: <michael@walle.cc>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org> Cc: richard@nod.at, boris.brezillon@collabora.com, vigneshr@ti.com, miquel.raynal@bootlin.com Subject: Re: [PATCH v6 3/5] mtd: spi-nor: intel: remove global protection flag Date: Fri, 27 Nov 2020 09:07:35 +0000 [thread overview] Message-ID: <8c908200-9350-ec54-d301-e95c7eedeb0b@microchip.com> (raw) In-Reply-To: <20201126202614.5710-4-michael@walle.cc> On 11/26/20 10:26 PM, Michael Walle wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > For the Atmel and SST parts this flag was already moved to individual > flash parts because it is considered bad esp. because newer flash chips > will automatically inherit the "has locking" support. While this won't > likely be the case for the Intel parts, we do it for consistency > reasons. > > Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > changes since v5 > - new patch > > drivers/mtd/spi-nor/intel.c | 16 +++------------- > 1 file changed, 3 insertions(+), 13 deletions(-) > > diff --git a/drivers/mtd/spi-nor/intel.c b/drivers/mtd/spi-nor/intel.c > index d8196f101368..6c31bef3fc60 100644 > --- a/drivers/mtd/spi-nor/intel.c > +++ b/drivers/mtd/spi-nor/intel.c > @@ -10,23 +10,13 @@ > > static const struct flash_info intel_parts[] = { > /* Intel/Numonyx -- xxxs33b */ > - { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, > - { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) }, > - { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) }, > -}; > - > -static void intel_default_init(struct spi_nor *nor) > -{ > - nor->flags |= SNOR_F_HAS_LOCK; > -} > - > -static const struct spi_nor_fixups intel_fixups = { > - .default_init = intel_default_init, > + { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, SPI_NOR_HAS_LOCK) }, > + { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, SPI_NOR_HAS_LOCK) }, > + { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, SPI_NOR_HAS_LOCK) }, > }; > > const struct spi_nor_manufacturer spi_nor_intel = { > .name = "intel", > .parts = intel_parts, > .nparts = ARRAY_SIZE(intel_parts), > - .fixups = &intel_fixups, > }; > -- > 2.20.1 > ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-11-27 9:07 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-11-26 20:26 [PATCH v6 0/5] mtd: spi-nor: keep lock bits if they are non-volatile Michael Walle 2020-11-26 20:26 ` Michael Walle 2020-11-26 20:26 ` [PATCH v6 1/5] mtd: spi-nor: atmel: remove global protection flag Michael Walle 2020-11-26 20:26 ` Michael Walle 2020-11-26 20:26 ` [PATCH v6 2/5] mtd: spi-nor: sst: " Michael Walle 2020-11-26 20:26 ` Michael Walle 2020-11-26 20:26 ` [PATCH v6 3/5] mtd: spi-nor: intel: " Michael Walle 2020-11-26 20:26 ` Michael Walle 2020-11-27 9:07 ` Tudor.Ambarus [this message] 2020-11-27 9:07 ` Tudor.Ambarus 2020-11-26 20:26 ` [PATCH v6 4/5] mtd: spi-nor: atmel: Fix unlock_all() for AT25FS010/040 Michael Walle 2020-11-26 20:26 ` Michael Walle 2020-11-28 8:25 ` Tudor.Ambarus 2020-11-28 8:25 ` Tudor.Ambarus 2020-11-30 14:16 ` Michael Walle 2020-11-30 14:16 ` Michael Walle 2020-12-02 10:32 ` Tudor.Ambarus 2020-12-02 10:32 ` Tudor.Ambarus 2020-11-26 20:26 ` [PATCH v6 5/5] mtd: spi-nor: keep lock bits if they are non-volatile Michael Walle 2020-11-26 20:26 ` Michael Walle 2020-11-28 10:17 ` Tudor.Ambarus 2020-11-28 10:17 ` Tudor.Ambarus 2020-11-30 14:38 ` Michael Walle 2020-11-30 14:38 ` Michael Walle 2020-12-02 11:10 ` Tudor.Ambarus 2020-12-02 11:10 ` Tudor.Ambarus 2020-12-02 11:25 ` Michael Walle 2020-12-02 11:25 ` Michael Walle 2020-12-02 14:09 ` Tudor.Ambarus 2020-12-02 14:09 ` Tudor.Ambarus
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