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From: Nancy.Lin <nancy.lin@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	<wim@linux-watchdog.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>, <linux@roeck-us.net>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	"Nathan Chancellor" <nathan@kernel.org>,
	Nick Desaulniers <ndesaulniers@google.com>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<dri-devel@lists.freedesktop.org>, <llvm@lists.linux.dev>,
	<singo.chang@mediatek.com>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [PATCH v17 06/21] soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1
Date: Wed, 27 Apr 2022 15:22:43 +0800	[thread overview]
Message-ID: <9053a481cbe752b458997cff5f0fe7d3040fc22b.camel@mediatek.com> (raw)
In-Reply-To: <eca7f22a-9a04-dd67-aaad-3cf64a909090@gmail.com>

Hi Matthias,

Thanks for the review.

On Fri, 2022-04-22 at 13:37 +0200, Matthias Brugger wrote:
> 
> On 16/04/2022 04:07, Nancy.Lin wrote:
> > Add cmdq support for mtk-mmsys config API.
> > The mmsys config register settings need to take effect with the
> > other
> > HW settings(like OVL_ADAPTOR...) at the same vblanking time.
> > 
> > If we use CPU to write the mmsys reg, we can't guarantee all the
> > settings can be written in the same vblanking time.
> > Cmdq is used for this purpose. We prepare all the related HW
> > settings
> > in one cmdq packet. The first command in the packet is "wait stream
> > done",
> > and then following with all the HW settings. After the cmdq packet
> > is
> > flush to GCE HW. The GCE waits for the "stream done event" to
> > coming
> > and then starts flushing all the HW settings. This can guarantee
> > all
> > the settings flush in the same vblanking.
> > 
> > Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@collabora.com>
> > ---
> >   drivers/soc/mediatek/mtk-mmsys.c       | 50 ++++++++++++++++++---
> > -----
> >   include/linux/soc/mediatek/mtk-mmsys.h | 15 +++++---
> >   2 files changed, 47 insertions(+), 18 deletions(-)
> > 
> > diff --git a/drivers/soc/mediatek/mtk-mmsys.c
> > b/drivers/soc/mediatek/mtk-mmsys.c
> > index 7b262cefef85..ea04aa2c3840 100644
> > --- a/drivers/soc/mediatek/mtk-mmsys.c
> > +++ b/drivers/soc/mediatek/mtk-mmsys.c
> > @@ -177,6 +177,7 @@ struct mtk_mmsys {
> >   	spinlock_t lock; /* protects mmsys_sw_rst_b reg */
> >   	struct reset_controller_dev rcdev;
> >   	phys_addr_t io_start;
> > +	struct cmdq_client_reg cmdq_base;
> >   };
> >   
> >   static int mtk_mmsys_find_match_drvdata(struct mtk_mmsys *mmsys,
> > @@ -280,46 +281,61 @@ static const struct reset_control_ops
> > mtk_mmsys_reset_ops = {
> >   	.reset = mtk_mmsys_reset,
> >   };
> >   
> > -static void mtk_mmsys_write_reg(struct device *dev, u32 offset,
> > u32 mask, u32 val)
> > +static void mtk_mmsys_write_reg(struct device *dev, u32 offset,
> > u32 mask, u32 val,
> > +				struct cmdq_pkt *cmdq_pkt)
> >   {
> >   	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
> >   	u32 tmp;
> >   
> > -	tmp = readl(mmsys->regs + offset);
> > -	tmp = (tmp & ~mask) | val;
> > -	writel(tmp, mmsys->regs + offset);
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > +	if (cmdq_pkt && mmsys->cmdq_base.size) {
> > +		cmdq_pkt_write_mask(cmdq_pkt, mmsys->cmdq_base.subsys,
> > +				    mmsys->cmdq_base.offset + offset,
> > val,
> > +				    mask);
> 
> If we put here:
> 
>     return;
> }
> #endif
> 
> > +	} else {
> > +#endif
> > +		tmp = readl(mmsys->regs + offset);
> > +		tmp = (tmp & ~mask) | val;
> > +		writel(tmp, mmsys->regs + offset);
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > +	}
> > +#endif
> 
> Then we can get rid of this IS_REACHABLE. Other then that patch looks
> good.
> 
> Matthias
> 

Thanks for your suggestion. I will refine it in the next revision.

Regards,
Nancy

> >   }
> >   
> > -void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width, int height)
> > +void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width,
> > +				  int height, struct cmdq_pkt
> > *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MERGE0_ASYNC_CFG_WD + 0x10
> > * idx,
> > -			    ~0, height << 16 | width);
> > +			    ~0, height << 16 | width, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_merge_async_config);
> >   
> > -void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height)
> > +void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height,
> > +			   struct cmdq_pkt *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_HDRBE_ASYNC_CFG_WD, ~0,
> > -			    be_height << 16 | be_width);
> > +			    be_height << 16 | be_width, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_hdr_confing);
> >   
> >   void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool
> > alpha_sel, u16 alpha,
> > -			       u8 mode, u32 biwidth)
> > +			       u8 mode, u32 biwidth, struct cmdq_pkt
> > *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MIXER_IN1_ALPHA + (idx -
> > 1) * 4, ~0,
> > -			    alpha << 16 | alpha);
> > +			    alpha << 16 | alpha, cmdq_pkt);
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_HDR_TOP_CFG, BIT(19 +
> > idx),
> > -			    alpha_sel << (19 + idx));
> > +			    alpha_sel << (19 + idx), cmdq_pkt);
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1)
> > * 4,
> > -			    GENMASK(31, 16) | GENMASK(1, 0), biwidth <<
> > 16 | mode);
> > +			    GENMASK(31, 16) | GENMASK(1, 0),
> > +			    biwidth << 16 | mode, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_mixer_in_config);
> >   
> > -void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap)
> > +void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap,
> > +				     struct cmdq_pkt *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1)
> > * 4, BIT(4),
> > -			    channel_swap << 4);
> > +			    channel_swap << 4, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_mixer_in_channel_swap);
> >   
> > @@ -377,6 +393,12 @@ static int mtk_mmsys_probe(struct
> > platform_device *pdev)
> >   		mmsys->data = match_data->drv_data[0];
> >   	}
> >   
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > +	ret = cmdq_dev_get_client_reg(dev, &mmsys->cmdq_base, 0);
> > +	if (ret)
> > +		dev_dbg(dev, "No mediatek,gce-client-reg!\n");
> > +#endif
> > +
> >   	platform_set_drvdata(pdev, mmsys);
> >   
> >   	clks = platform_device_register_data(&pdev->dev, mmsys->data-
> > >clk_driver,
> > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h
> > b/include/linux/soc/mediatek/mtk-mmsys.h
> > index fe620929b0f9..7a73305390ba 100644
> > --- a/include/linux/soc/mediatek/mtk-mmsys.h
> > +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> > @@ -6,6 +6,10 @@
> >   #ifndef __MTK_MMSYS_H
> >   #define __MTK_MMSYS_H
> >   
> > +#include <linux/mailbox_controller.h>
> > +#include <linux/mailbox/mtk-cmdq-mailbox.h>
> > +#include <linux/soc/mediatek/mtk-cmdq.h>
> > +
> >   enum mtk_ddp_comp_id;
> >   struct device;
> >   
> > @@ -73,13 +77,16 @@ void mtk_mmsys_ddp_disconnect(struct device
> > *dev,
> >   			      enum mtk_ddp_comp_id cur,
> >   			      enum mtk_ddp_comp_id next);
> >   
> > -void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width, int height);
> > +void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width,
> > +				  int height, struct cmdq_pkt
> > *cmdq_pkt);
> >   
> > -void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height);
> > +void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height,
> > +			   struct cmdq_pkt *cmdq_pkt);
> >   
> >   void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool
> > alpha_sel, u16 alpha,
> > -			       u8 mode, u32 biwidth);
> > +			       u8 mode, u32 biwidth, struct cmdq_pkt
> > *cmdq_pkt);
> >   
> > -void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap);
> > +void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap,
> > +				     struct cmdq_pkt *cmdq_pkt);
> >   
> >   #endif /* __MTK_MMSYS_H */
> 
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> 
https://urldefense.com/v3/__http://lists.infradead.org/mailman/listinfo/linux-mediatek__;!!CTRNKA9wMg0ARbw!0pXxTj2b3mnxU4EoC9pD9oDKrMfP94xbd8LbZmH458oNOSzit_MOSnjS6RhGvUhR$
>  


WARNING: multiple messages have this Message-ID (diff)
From: Nancy.Lin <nancy.lin@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	<wim@linux-watchdog.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>, <linux@roeck-us.net>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	"Nathan Chancellor" <nathan@kernel.org>,
	Nick Desaulniers <ndesaulniers@google.com>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<dri-devel@lists.freedesktop.org>, <llvm@lists.linux.dev>,
	<singo.chang@mediatek.com>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [PATCH v17 06/21] soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1
Date: Wed, 27 Apr 2022 15:22:43 +0800	[thread overview]
Message-ID: <9053a481cbe752b458997cff5f0fe7d3040fc22b.camel@mediatek.com> (raw)
In-Reply-To: <eca7f22a-9a04-dd67-aaad-3cf64a909090@gmail.com>

Hi Matthias,

Thanks for the review.

On Fri, 2022-04-22 at 13:37 +0200, Matthias Brugger wrote:
> 
> On 16/04/2022 04:07, Nancy.Lin wrote:
> > Add cmdq support for mtk-mmsys config API.
> > The mmsys config register settings need to take effect with the
> > other
> > HW settings(like OVL_ADAPTOR...) at the same vblanking time.
> > 
> > If we use CPU to write the mmsys reg, we can't guarantee all the
> > settings can be written in the same vblanking time.
> > Cmdq is used for this purpose. We prepare all the related HW
> > settings
> > in one cmdq packet. The first command in the packet is "wait stream
> > done",
> > and then following with all the HW settings. After the cmdq packet
> > is
> > flush to GCE HW. The GCE waits for the "stream done event" to
> > coming
> > and then starts flushing all the HW settings. This can guarantee
> > all
> > the settings flush in the same vblanking.
> > 
> > Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@collabora.com>
> > ---
> >   drivers/soc/mediatek/mtk-mmsys.c       | 50 ++++++++++++++++++---
> > -----
> >   include/linux/soc/mediatek/mtk-mmsys.h | 15 +++++---
> >   2 files changed, 47 insertions(+), 18 deletions(-)
> > 
> > diff --git a/drivers/soc/mediatek/mtk-mmsys.c
> > b/drivers/soc/mediatek/mtk-mmsys.c
> > index 7b262cefef85..ea04aa2c3840 100644
> > --- a/drivers/soc/mediatek/mtk-mmsys.c
> > +++ b/drivers/soc/mediatek/mtk-mmsys.c
> > @@ -177,6 +177,7 @@ struct mtk_mmsys {
> >   	spinlock_t lock; /* protects mmsys_sw_rst_b reg */
> >   	struct reset_controller_dev rcdev;
> >   	phys_addr_t io_start;
> > +	struct cmdq_client_reg cmdq_base;
> >   };
> >   
> >   static int mtk_mmsys_find_match_drvdata(struct mtk_mmsys *mmsys,
> > @@ -280,46 +281,61 @@ static const struct reset_control_ops
> > mtk_mmsys_reset_ops = {
> >   	.reset = mtk_mmsys_reset,
> >   };
> >   
> > -static void mtk_mmsys_write_reg(struct device *dev, u32 offset,
> > u32 mask, u32 val)
> > +static void mtk_mmsys_write_reg(struct device *dev, u32 offset,
> > u32 mask, u32 val,
> > +				struct cmdq_pkt *cmdq_pkt)
> >   {
> >   	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
> >   	u32 tmp;
> >   
> > -	tmp = readl(mmsys->regs + offset);
> > -	tmp = (tmp & ~mask) | val;
> > -	writel(tmp, mmsys->regs + offset);
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > +	if (cmdq_pkt && mmsys->cmdq_base.size) {
> > +		cmdq_pkt_write_mask(cmdq_pkt, mmsys->cmdq_base.subsys,
> > +				    mmsys->cmdq_base.offset + offset,
> > val,
> > +				    mask);
> 
> If we put here:
> 
>     return;
> }
> #endif
> 
> > +	} else {
> > +#endif
> > +		tmp = readl(mmsys->regs + offset);
> > +		tmp = (tmp & ~mask) | val;
> > +		writel(tmp, mmsys->regs + offset);
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > +	}
> > +#endif
> 
> Then we can get rid of this IS_REACHABLE. Other then that patch looks
> good.
> 
> Matthias
> 

Thanks for your suggestion. I will refine it in the next revision.

Regards,
Nancy

> >   }
> >   
> > -void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width, int height)
> > +void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width,
> > +				  int height, struct cmdq_pkt
> > *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MERGE0_ASYNC_CFG_WD + 0x10
> > * idx,
> > -			    ~0, height << 16 | width);
> > +			    ~0, height << 16 | width, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_merge_async_config);
> >   
> > -void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height)
> > +void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height,
> > +			   struct cmdq_pkt *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_HDRBE_ASYNC_CFG_WD, ~0,
> > -			    be_height << 16 | be_width);
> > +			    be_height << 16 | be_width, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_hdr_confing);
> >   
> >   void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool
> > alpha_sel, u16 alpha,
> > -			       u8 mode, u32 biwidth)
> > +			       u8 mode, u32 biwidth, struct cmdq_pkt
> > *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MIXER_IN1_ALPHA + (idx -
> > 1) * 4, ~0,
> > -			    alpha << 16 | alpha);
> > +			    alpha << 16 | alpha, cmdq_pkt);
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_HDR_TOP_CFG, BIT(19 +
> > idx),
> > -			    alpha_sel << (19 + idx));
> > +			    alpha_sel << (19 + idx), cmdq_pkt);
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1)
> > * 4,
> > -			    GENMASK(31, 16) | GENMASK(1, 0), biwidth <<
> > 16 | mode);
> > +			    GENMASK(31, 16) | GENMASK(1, 0),
> > +			    biwidth << 16 | mode, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_mixer_in_config);
> >   
> > -void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap)
> > +void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap,
> > +				     struct cmdq_pkt *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1)
> > * 4, BIT(4),
> > -			    channel_swap << 4);
> > +			    channel_swap << 4, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_mixer_in_channel_swap);
> >   
> > @@ -377,6 +393,12 @@ static int mtk_mmsys_probe(struct
> > platform_device *pdev)
> >   		mmsys->data = match_data->drv_data[0];
> >   	}
> >   
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > +	ret = cmdq_dev_get_client_reg(dev, &mmsys->cmdq_base, 0);
> > +	if (ret)
> > +		dev_dbg(dev, "No mediatek,gce-client-reg!\n");
> > +#endif
> > +
> >   	platform_set_drvdata(pdev, mmsys);
> >   
> >   	clks = platform_device_register_data(&pdev->dev, mmsys->data-
> > >clk_driver,
> > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h
> > b/include/linux/soc/mediatek/mtk-mmsys.h
> > index fe620929b0f9..7a73305390ba 100644
> > --- a/include/linux/soc/mediatek/mtk-mmsys.h
> > +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> > @@ -6,6 +6,10 @@
> >   #ifndef __MTK_MMSYS_H
> >   #define __MTK_MMSYS_H
> >   
> > +#include <linux/mailbox_controller.h>
> > +#include <linux/mailbox/mtk-cmdq-mailbox.h>
> > +#include <linux/soc/mediatek/mtk-cmdq.h>
> > +
> >   enum mtk_ddp_comp_id;
> >   struct device;
> >   
> > @@ -73,13 +77,16 @@ void mtk_mmsys_ddp_disconnect(struct device
> > *dev,
> >   			      enum mtk_ddp_comp_id cur,
> >   			      enum mtk_ddp_comp_id next);
> >   
> > -void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width, int height);
> > +void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width,
> > +				  int height, struct cmdq_pkt
> > *cmdq_pkt);
> >   
> > -void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height);
> > +void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height,
> > +			   struct cmdq_pkt *cmdq_pkt);
> >   
> >   void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool
> > alpha_sel, u16 alpha,
> > -			       u8 mode, u32 biwidth);
> > +			       u8 mode, u32 biwidth, struct cmdq_pkt
> > *cmdq_pkt);
> >   
> > -void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap);
> > +void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap,
> > +				     struct cmdq_pkt *cmdq_pkt);
> >   
> >   #endif /* __MTK_MMSYS_H */
> 
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> 
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WARNING: multiple messages have this Message-ID (diff)
From: Nancy.Lin <nancy.lin@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	<wim@linux-watchdog.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>, <linux@roeck-us.net>
Cc: devicetree@vger.kernel.org,
	Project_Global_Chrome_Upstream_Group@mediatek.com,
	David Airlie <airlied@linux.ie>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	singo.chang@mediatek.com, llvm@lists.linux.dev,
	Nick Desaulniers <ndesaulniers@google.com>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Nathan Chancellor <nathan@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v17 06/21] soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1
Date: Wed, 27 Apr 2022 15:22:43 +0800	[thread overview]
Message-ID: <9053a481cbe752b458997cff5f0fe7d3040fc22b.camel@mediatek.com> (raw)
In-Reply-To: <eca7f22a-9a04-dd67-aaad-3cf64a909090@gmail.com>

Hi Matthias,

Thanks for the review.

On Fri, 2022-04-22 at 13:37 +0200, Matthias Brugger wrote:
> 
> On 16/04/2022 04:07, Nancy.Lin wrote:
> > Add cmdq support for mtk-mmsys config API.
> > The mmsys config register settings need to take effect with the
> > other
> > HW settings(like OVL_ADAPTOR...) at the same vblanking time.
> > 
> > If we use CPU to write the mmsys reg, we can't guarantee all the
> > settings can be written in the same vblanking time.
> > Cmdq is used for this purpose. We prepare all the related HW
> > settings
> > in one cmdq packet. The first command in the packet is "wait stream
> > done",
> > and then following with all the HW settings. After the cmdq packet
> > is
> > flush to GCE HW. The GCE waits for the "stream done event" to
> > coming
> > and then starts flushing all the HW settings. This can guarantee
> > all
> > the settings flush in the same vblanking.
> > 
> > Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@collabora.com>
> > ---
> >   drivers/soc/mediatek/mtk-mmsys.c       | 50 ++++++++++++++++++---
> > -----
> >   include/linux/soc/mediatek/mtk-mmsys.h | 15 +++++---
> >   2 files changed, 47 insertions(+), 18 deletions(-)
> > 
> > diff --git a/drivers/soc/mediatek/mtk-mmsys.c
> > b/drivers/soc/mediatek/mtk-mmsys.c
> > index 7b262cefef85..ea04aa2c3840 100644
> > --- a/drivers/soc/mediatek/mtk-mmsys.c
> > +++ b/drivers/soc/mediatek/mtk-mmsys.c
> > @@ -177,6 +177,7 @@ struct mtk_mmsys {
> >   	spinlock_t lock; /* protects mmsys_sw_rst_b reg */
> >   	struct reset_controller_dev rcdev;
> >   	phys_addr_t io_start;
> > +	struct cmdq_client_reg cmdq_base;
> >   };
> >   
> >   static int mtk_mmsys_find_match_drvdata(struct mtk_mmsys *mmsys,
> > @@ -280,46 +281,61 @@ static const struct reset_control_ops
> > mtk_mmsys_reset_ops = {
> >   	.reset = mtk_mmsys_reset,
> >   };
> >   
> > -static void mtk_mmsys_write_reg(struct device *dev, u32 offset,
> > u32 mask, u32 val)
> > +static void mtk_mmsys_write_reg(struct device *dev, u32 offset,
> > u32 mask, u32 val,
> > +				struct cmdq_pkt *cmdq_pkt)
> >   {
> >   	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
> >   	u32 tmp;
> >   
> > -	tmp = readl(mmsys->regs + offset);
> > -	tmp = (tmp & ~mask) | val;
> > -	writel(tmp, mmsys->regs + offset);
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > +	if (cmdq_pkt && mmsys->cmdq_base.size) {
> > +		cmdq_pkt_write_mask(cmdq_pkt, mmsys->cmdq_base.subsys,
> > +				    mmsys->cmdq_base.offset + offset,
> > val,
> > +				    mask);
> 
> If we put here:
> 
>     return;
> }
> #endif
> 
> > +	} else {
> > +#endif
> > +		tmp = readl(mmsys->regs + offset);
> > +		tmp = (tmp & ~mask) | val;
> > +		writel(tmp, mmsys->regs + offset);
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > +	}
> > +#endif
> 
> Then we can get rid of this IS_REACHABLE. Other then that patch looks
> good.
> 
> Matthias
> 

Thanks for your suggestion. I will refine it in the next revision.

Regards,
Nancy

> >   }
> >   
> > -void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width, int height)
> > +void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width,
> > +				  int height, struct cmdq_pkt
> > *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MERGE0_ASYNC_CFG_WD + 0x10
> > * idx,
> > -			    ~0, height << 16 | width);
> > +			    ~0, height << 16 | width, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_merge_async_config);
> >   
> > -void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height)
> > +void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height,
> > +			   struct cmdq_pkt *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_HDRBE_ASYNC_CFG_WD, ~0,
> > -			    be_height << 16 | be_width);
> > +			    be_height << 16 | be_width, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_hdr_confing);
> >   
> >   void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool
> > alpha_sel, u16 alpha,
> > -			       u8 mode, u32 biwidth)
> > +			       u8 mode, u32 biwidth, struct cmdq_pkt
> > *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MIXER_IN1_ALPHA + (idx -
> > 1) * 4, ~0,
> > -			    alpha << 16 | alpha);
> > +			    alpha << 16 | alpha, cmdq_pkt);
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_HDR_TOP_CFG, BIT(19 +
> > idx),
> > -			    alpha_sel << (19 + idx));
> > +			    alpha_sel << (19 + idx), cmdq_pkt);
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1)
> > * 4,
> > -			    GENMASK(31, 16) | GENMASK(1, 0), biwidth <<
> > 16 | mode);
> > +			    GENMASK(31, 16) | GENMASK(1, 0),
> > +			    biwidth << 16 | mode, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_mixer_in_config);
> >   
> > -void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap)
> > +void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap,
> > +				     struct cmdq_pkt *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1)
> > * 4, BIT(4),
> > -			    channel_swap << 4);
> > +			    channel_swap << 4, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_mixer_in_channel_swap);
> >   
> > @@ -377,6 +393,12 @@ static int mtk_mmsys_probe(struct
> > platform_device *pdev)
> >   		mmsys->data = match_data->drv_data[0];
> >   	}
> >   
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > +	ret = cmdq_dev_get_client_reg(dev, &mmsys->cmdq_base, 0);
> > +	if (ret)
> > +		dev_dbg(dev, "No mediatek,gce-client-reg!\n");
> > +#endif
> > +
> >   	platform_set_drvdata(pdev, mmsys);
> >   
> >   	clks = platform_device_register_data(&pdev->dev, mmsys->data-
> > >clk_driver,
> > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h
> > b/include/linux/soc/mediatek/mtk-mmsys.h
> > index fe620929b0f9..7a73305390ba 100644
> > --- a/include/linux/soc/mediatek/mtk-mmsys.h
> > +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> > @@ -6,6 +6,10 @@
> >   #ifndef __MTK_MMSYS_H
> >   #define __MTK_MMSYS_H
> >   
> > +#include <linux/mailbox_controller.h>
> > +#include <linux/mailbox/mtk-cmdq-mailbox.h>
> > +#include <linux/soc/mediatek/mtk-cmdq.h>
> > +
> >   enum mtk_ddp_comp_id;
> >   struct device;
> >   
> > @@ -73,13 +77,16 @@ void mtk_mmsys_ddp_disconnect(struct device
> > *dev,
> >   			      enum mtk_ddp_comp_id cur,
> >   			      enum mtk_ddp_comp_id next);
> >   
> > -void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width, int height);
> > +void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width,
> > +				  int height, struct cmdq_pkt
> > *cmdq_pkt);
> >   
> > -void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height);
> > +void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height,
> > +			   struct cmdq_pkt *cmdq_pkt);
> >   
> >   void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool
> > alpha_sel, u16 alpha,
> > -			       u8 mode, u32 biwidth);
> > +			       u8 mode, u32 biwidth, struct cmdq_pkt
> > *cmdq_pkt);
> >   
> > -void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap);
> > +void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap,
> > +				     struct cmdq_pkt *cmdq_pkt);
> >   
> >   #endif /* __MTK_MMSYS_H */
> 
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> 
https://urldefense.com/v3/__http://lists.infradead.org/mailman/listinfo/linux-mediatek__;!!CTRNKA9wMg0ARbw!0pXxTj2b3mnxU4EoC9pD9oDKrMfP94xbd8LbZmH458oNOSzit_MOSnjS6RhGvUhR$
>  


WARNING: multiple messages have this Message-ID (diff)
From: Nancy.Lin <nancy.lin@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	<wim@linux-watchdog.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>, <linux@roeck-us.net>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	"Nathan Chancellor" <nathan@kernel.org>,
	Nick Desaulniers <ndesaulniers@google.com>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<dri-devel@lists.freedesktop.org>, <llvm@lists.linux.dev>,
	<singo.chang@mediatek.com>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [PATCH v17 06/21] soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1
Date: Wed, 27 Apr 2022 15:22:43 +0800	[thread overview]
Message-ID: <9053a481cbe752b458997cff5f0fe7d3040fc22b.camel@mediatek.com> (raw)
In-Reply-To: <eca7f22a-9a04-dd67-aaad-3cf64a909090@gmail.com>

Hi Matthias,

Thanks for the review.

On Fri, 2022-04-22 at 13:37 +0200, Matthias Brugger wrote:
> 
> On 16/04/2022 04:07, Nancy.Lin wrote:
> > Add cmdq support for mtk-mmsys config API.
> > The mmsys config register settings need to take effect with the
> > other
> > HW settings(like OVL_ADAPTOR...) at the same vblanking time.
> > 
> > If we use CPU to write the mmsys reg, we can't guarantee all the
> > settings can be written in the same vblanking time.
> > Cmdq is used for this purpose. We prepare all the related HW
> > settings
> > in one cmdq packet. The first command in the packet is "wait stream
> > done",
> > and then following with all the HW settings. After the cmdq packet
> > is
> > flush to GCE HW. The GCE waits for the "stream done event" to
> > coming
> > and then starts flushing all the HW settings. This can guarantee
> > all
> > the settings flush in the same vblanking.
> > 
> > Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@collabora.com>
> > ---
> >   drivers/soc/mediatek/mtk-mmsys.c       | 50 ++++++++++++++++++---
> > -----
> >   include/linux/soc/mediatek/mtk-mmsys.h | 15 +++++---
> >   2 files changed, 47 insertions(+), 18 deletions(-)
> > 
> > diff --git a/drivers/soc/mediatek/mtk-mmsys.c
> > b/drivers/soc/mediatek/mtk-mmsys.c
> > index 7b262cefef85..ea04aa2c3840 100644
> > --- a/drivers/soc/mediatek/mtk-mmsys.c
> > +++ b/drivers/soc/mediatek/mtk-mmsys.c
> > @@ -177,6 +177,7 @@ struct mtk_mmsys {
> >   	spinlock_t lock; /* protects mmsys_sw_rst_b reg */
> >   	struct reset_controller_dev rcdev;
> >   	phys_addr_t io_start;
> > +	struct cmdq_client_reg cmdq_base;
> >   };
> >   
> >   static int mtk_mmsys_find_match_drvdata(struct mtk_mmsys *mmsys,
> > @@ -280,46 +281,61 @@ static const struct reset_control_ops
> > mtk_mmsys_reset_ops = {
> >   	.reset = mtk_mmsys_reset,
> >   };
> >   
> > -static void mtk_mmsys_write_reg(struct device *dev, u32 offset,
> > u32 mask, u32 val)
> > +static void mtk_mmsys_write_reg(struct device *dev, u32 offset,
> > u32 mask, u32 val,
> > +				struct cmdq_pkt *cmdq_pkt)
> >   {
> >   	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
> >   	u32 tmp;
> >   
> > -	tmp = readl(mmsys->regs + offset);
> > -	tmp = (tmp & ~mask) | val;
> > -	writel(tmp, mmsys->regs + offset);
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > +	if (cmdq_pkt && mmsys->cmdq_base.size) {
> > +		cmdq_pkt_write_mask(cmdq_pkt, mmsys->cmdq_base.subsys,
> > +				    mmsys->cmdq_base.offset + offset,
> > val,
> > +				    mask);
> 
> If we put here:
> 
>     return;
> }
> #endif
> 
> > +	} else {
> > +#endif
> > +		tmp = readl(mmsys->regs + offset);
> > +		tmp = (tmp & ~mask) | val;
> > +		writel(tmp, mmsys->regs + offset);
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > +	}
> > +#endif
> 
> Then we can get rid of this IS_REACHABLE. Other then that patch looks
> good.
> 
> Matthias
> 

Thanks for your suggestion. I will refine it in the next revision.

Regards,
Nancy

> >   }
> >   
> > -void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width, int height)
> > +void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width,
> > +				  int height, struct cmdq_pkt
> > *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MERGE0_ASYNC_CFG_WD + 0x10
> > * idx,
> > -			    ~0, height << 16 | width);
> > +			    ~0, height << 16 | width, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_merge_async_config);
> >   
> > -void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height)
> > +void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height,
> > +			   struct cmdq_pkt *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_HDRBE_ASYNC_CFG_WD, ~0,
> > -			    be_height << 16 | be_width);
> > +			    be_height << 16 | be_width, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_hdr_confing);
> >   
> >   void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool
> > alpha_sel, u16 alpha,
> > -			       u8 mode, u32 biwidth)
> > +			       u8 mode, u32 biwidth, struct cmdq_pkt
> > *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MIXER_IN1_ALPHA + (idx -
> > 1) * 4, ~0,
> > -			    alpha << 16 | alpha);
> > +			    alpha << 16 | alpha, cmdq_pkt);
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_HDR_TOP_CFG, BIT(19 +
> > idx),
> > -			    alpha_sel << (19 + idx));
> > +			    alpha_sel << (19 + idx), cmdq_pkt);
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1)
> > * 4,
> > -			    GENMASK(31, 16) | GENMASK(1, 0), biwidth <<
> > 16 | mode);
> > +			    GENMASK(31, 16) | GENMASK(1, 0),
> > +			    biwidth << 16 | mode, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_mixer_in_config);
> >   
> > -void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap)
> > +void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap,
> > +				     struct cmdq_pkt *cmdq_pkt)
> >   {
> >   	mtk_mmsys_write_reg(dev, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1)
> > * 4, BIT(4),
> > -			    channel_swap << 4);
> > +			    channel_swap << 4, cmdq_pkt);
> >   }
> >   EXPORT_SYMBOL_GPL(mtk_mmsys_mixer_in_channel_swap);
> >   
> > @@ -377,6 +393,12 @@ static int mtk_mmsys_probe(struct
> > platform_device *pdev)
> >   		mmsys->data = match_data->drv_data[0];
> >   	}
> >   
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > +	ret = cmdq_dev_get_client_reg(dev, &mmsys->cmdq_base, 0);
> > +	if (ret)
> > +		dev_dbg(dev, "No mediatek,gce-client-reg!\n");
> > +#endif
> > +
> >   	platform_set_drvdata(pdev, mmsys);
> >   
> >   	clks = platform_device_register_data(&pdev->dev, mmsys->data-
> > >clk_driver,
> > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h
> > b/include/linux/soc/mediatek/mtk-mmsys.h
> > index fe620929b0f9..7a73305390ba 100644
> > --- a/include/linux/soc/mediatek/mtk-mmsys.h
> > +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> > @@ -6,6 +6,10 @@
> >   #ifndef __MTK_MMSYS_H
> >   #define __MTK_MMSYS_H
> >   
> > +#include <linux/mailbox_controller.h>
> > +#include <linux/mailbox/mtk-cmdq-mailbox.h>
> > +#include <linux/soc/mediatek/mtk-cmdq.h>
> > +
> >   enum mtk_ddp_comp_id;
> >   struct device;
> >   
> > @@ -73,13 +77,16 @@ void mtk_mmsys_ddp_disconnect(struct device
> > *dev,
> >   			      enum mtk_ddp_comp_id cur,
> >   			      enum mtk_ddp_comp_id next);
> >   
> > -void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width, int height);
> > +void mtk_mmsys_merge_async_config(struct device *dev, int idx, int
> > width,
> > +				  int height, struct cmdq_pkt
> > *cmdq_pkt);
> >   
> > -void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height);
> > +void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height,
> > +			   struct cmdq_pkt *cmdq_pkt);
> >   
> >   void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool
> > alpha_sel, u16 alpha,
> > -			       u8 mode, u32 biwidth);
> > +			       u8 mode, u32 biwidth, struct cmdq_pkt
> > *cmdq_pkt);
> >   
> > -void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap);
> > +void mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx,
> > bool channel_swap,
> > +				     struct cmdq_pkt *cmdq_pkt);
> >   
> >   #endif /* __MTK_MMSYS_H */
> 
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> 
https://urldefense.com/v3/__http://lists.infradead.org/mailman/listinfo/linux-mediatek__;!!CTRNKA9wMg0ARbw!0pXxTj2b3mnxU4EoC9pD9oDKrMfP94xbd8LbZmH458oNOSzit_MOSnjS6RhGvUhR$
>  


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  reply	other threads:[~2022-04-27  7:22 UTC|newest]

Thread overview: 156+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-16  2:07 [PATCH v17 00/21] Add MediaTek SoC DRM (vdosys1) support for mt8195 Nancy.Lin
2022-04-16  2:07 ` Nancy.Lin
2022-04-16  2:07 ` Nancy.Lin
2022-04-16  2:07 ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 01/21] dt-bindings: mediatek: add vdosys1 RDMA definition " Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 02/21] dt-bindings: reset: mt8195: add vdosys1 reset control bit Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 03/21] dt-bindings: mediatek: add ethdr definition for mt8195 Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-25  9:54   ` Philipp Zabel
2022-04-25  9:54     ` Philipp Zabel
2022-04-25  9:54     ` Philipp Zabel
2022-04-25  9:54     ` Philipp Zabel
2022-04-28  2:25     ` Nancy.Lin
2022-04-28  2:25       ` Nancy.Lin
2022-04-28  2:25       ` Nancy.Lin
2022-04-28  2:25       ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 04/21] soc: mediatek: add mtk-mmsys support for mt8195 vdosys1 Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 05/21] soc: mediatek: add mtk-mmsys config API " Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-21  1:53   ` Rex-BC Chen
2022-04-21  1:53     ` Rex-BC Chen
2022-04-21  1:53     ` Rex-BC Chen
2022-04-21  1:53     ` Rex-BC Chen
2022-04-16  2:07 ` [PATCH v17 06/21] soc: mediatek: add cmdq support of " Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-21  1:55   ` Rex-BC Chen
2022-04-21  1:55     ` Rex-BC Chen
2022-04-21  1:55     ` Rex-BC Chen
2022-04-21  1:55     ` Rex-BC Chen
2022-04-22 11:37   ` Matthias Brugger
2022-04-22 11:37     ` Matthias Brugger
2022-04-22 11:37     ` Matthias Brugger
2022-04-22 11:37     ` Matthias Brugger
2022-04-27  7:22     ` Nancy.Lin [this message]
2022-04-27  7:22       ` Nancy.Lin
2022-04-27  7:22       ` Nancy.Lin
2022-04-27  7:22       ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 07/21] soc: mediatek: mmsys: modify reset controller for MT8195 vdosys1 Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-21  1:56   ` Rex-BC Chen
2022-04-21  1:56     ` Rex-BC Chen
2022-04-21  1:56     ` Rex-BC Chen
2022-04-21  1:56     ` Rex-BC Chen
2022-04-22 11:37   ` Matthias Brugger
2022-04-22 11:37     ` Matthias Brugger
2022-04-22 11:37     ` Matthias Brugger
2022-04-22 11:37     ` Matthias Brugger
2022-04-26  8:56     ` Nancy.Lin
2022-04-26  8:56       ` Nancy.Lin
2022-04-26  8:56       ` Nancy.Lin
2022-04-26  8:56       ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 08/21] soc: mediatek: add mtk-mutex support for mt8195 vdosys1 Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-21  1:58   ` Rex-BC Chen
2022-04-21  1:58     ` Rex-BC Chen
2022-04-21  1:58     ` Rex-BC Chen
2022-04-21  1:58     ` Rex-BC Chen
2022-04-16  2:07 ` [PATCH v17 09/21] drm/mediatek: add display MDP RDMA support for MT8195 Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 10/21] drm/mediatek: add display merge advance config API " Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 11/21] drm/mediatek: add display merge start/stop API for cmdq support Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-22 11:48   ` Matthias Brugger
2022-04-22 11:48     ` Matthias Brugger
2022-04-22 11:48     ` Matthias Brugger
2022-04-22 11:48     ` Matthias Brugger
2022-04-25 13:32     ` Chun-Kuang Hu
2022-04-25 13:32       ` Chun-Kuang Hu
2022-04-25 13:32       ` Chun-Kuang Hu
2022-04-25 13:32       ` Chun-Kuang Hu
2022-04-25 15:27       ` Matthias Brugger
2022-04-25 15:27         ` Matthias Brugger
2022-04-25 15:27         ` Matthias Brugger
2022-04-25 15:27         ` Matthias Brugger
2022-04-16  2:07 ` [PATCH v17 12/21] drm/mediatek: add display merge mute/unmute support for MT8195 Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 13/21] drm/mediatek: add display merge async reset control Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-25  9:58   ` Philipp Zabel
2022-04-25  9:58     ` Philipp Zabel
2022-04-25  9:58     ` Philipp Zabel
2022-04-25  9:58     ` Philipp Zabel
2022-04-26 10:28     ` Nancy.Lin
2022-04-26 10:28       ` Nancy.Lin
2022-04-26 10:28       ` Nancy.Lin
2022-04-26 10:28       ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 14/21] drm/mediatek: add ETHDR support for MT8195 Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-25 10:00   ` Philipp Zabel
2022-04-25 10:00     ` Philipp Zabel
2022-04-25 10:00     ` Philipp Zabel
2022-04-25 10:00     ` Philipp Zabel
2022-04-26 10:57     ` Nancy.Lin
2022-04-26 10:57       ` Nancy.Lin
2022-04-26 10:57       ` Nancy.Lin
2022-04-26 10:57       ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 15/21] drm/mediatek: add mediatek-drm plane color encoding info Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 16/21] drm/mediatek: add ovl_adaptor support for MT8195 Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 17/21] drm/mediatek: add dma dev get function Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 18/21] drm/mediatek: modify mediatek-drm for mt8195 multi mmsys support Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 19/21] drm/mediatek: add drm ovl_adaptor sub driver for MT8195 Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 20/21] drm/mediatek: add mediatek-drm of vdosys1 support " Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07 ` [PATCH v17 21/21] arm64: dts: mt8195: add display node for vdosys1 Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin
2022-04-16  2:07   ` Nancy.Lin

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