[igt-dev] [PATCH i-g-t v3 0/8] Update gem_blits for newer generations

[igt-dev] [PATCH i-g-t v3 0/8] Update gem_blits for newer generations

[Karolina Stolarek]

gem_blits test utilizes XY_SRC_COPY_BLT, a legacy blitter command
that is not available on newer generations such as MTL. To make
sure the test covers such platforms, update it to switch to
XY_FAST_COPY_BLT for blit copy operations.

In addition to this change, the series:
  1) Adds helpers to i915_blt library that check support for
     XY_SRC_COPY_BLT command and its capabilities
  2) Updates the definitions of older platforms to properly list
     all available commands and tilings
  3) Updates gem_blits to use aforementioned helpers to detect
     tiling formats supported by the platform

v3:
  - Rebase the changes, as they stopped applying cleanly
  - Add static asserts on tiling enums, to make sure that changing
    defines or blt_tiling_type results in a compiler error
  - Reorder T_YFMAJOR value to it directly follows Tile4. Thanks to
    __block_tiling() and __fast_tiling() switches, this change
    shouldn't break gem_ccs/gem_exercise_blt tests

v2:
  - Remove libdrm include in "tests/i915/gem_blits: Add XY_FAST_COPY_BLT
    support for gem_blits". It's not needed and causes compile errors
    on some targets

Arjun Melkaveri (2):
  tests/i915/gem_blits: Use new copy instruction
  tests/i915/gem_blits: Add XY_FAST_COPY_BLT support for gem_blits

Karolina Stolarek (5):
  lib/i915_blt: Add helpers to check XY_SRC_COPY support
  lib/intel_cmds_info: Correct tiling formats for XY_SRC_COPY
  lib/intel_device_info: Add tiling information for early gens
  lib/intel_cmds_info: Reorder blt_tiling_type enum
  tests/gem_blits: Use intel_cmds_info library

Vikas Srivastava (1):
  lib/intel_batchbuffer: Add wrapper API to use
    XY_FAST_COPY_BLT/XY_SRC_BLT

 lib/i915/i915_blt.c        |  39 ++++++++++
 lib/i915/i915_blt.h        |   2 +
 lib/i915/intel_cmds_info.c |  24 ++++--
 lib/i915/intel_cmds_info.h |   5 +-
 lib/intel_batchbuffer.c    |  82 +++++++++++++++++--
 lib/intel_batchbuffer.h    |  28 +++++++
 lib/intel_device_info.c    |  29 +++++--
 tests/i915/gem_blits.c     | 156 ++++++++++++++++++++++++-------------
 8 files changed, 289 insertions(+), 76 deletions(-)

-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 1/8] lib/i915_blt: Add helpers to check XY_SRC_COPY support

[Karolina Stolarek]

Add predicates that check if the command with a specific
tiling format is supported on the current platform.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/i915/i915_blt.c | 33 +++++++++++++++++++++++++++++++++
 lib/i915/i915_blt.h |  2 ++
 2 files changed, 35 insertions(+)

diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index 63eba4ac..13105820 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -295,6 +295,22 @@ bool blt_has_fast_copy(int i915)
 	return blt_supports_command(cmds_info, XY_FAST_COPY);
 }
 
+/**
+ * blt_has_xy_src_copy
+ * @i915: drm fd
+ *
+ * Check if XY src copy is supported by @i915 device
+ *
+ * Returns:
+ * true if it does, false otherwise.
+ */
+bool blt_has_xy_src_copy(int i915)
+{
+	const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
+
+	return blt_supports_command(cmds_info, XY_SRC_COPY);
+}
+
 /**
  * blt_fast_copy_supports_tiling
  * @i915: drm fd
@@ -329,6 +345,23 @@ bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
 	return blt_cmd_supports_tiling(cmds_info, XY_BLOCK_COPY, tiling);
 }
 
+/**
+ * blt_xy_src_copy_supports_tiling
+ * @i915: drm fd
+ * @tiling: tiling format
+ *
+ * Check if XY src copy provided by @i915 device supports @tiling format
+ *
+ * Returns:
+ * true if it does, false otherwise.
+ */
+bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
+{
+	const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
+
+	return blt_cmd_supports_tiling(cmds_info, XY_SRC_COPY, tiling);
+}
+
 /**
  * blt_block_copy_supports_compression
  * @i915: drm fd
diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
index 63951db7..a5f0edd1 100644
--- a/lib/i915/i915_blt.h
+++ b/lib/i915/i915_blt.h
@@ -168,9 +168,11 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
 
 bool blt_has_block_copy(int i915);
 bool blt_has_fast_copy(int i915);
+bool blt_has_xy_src_copy(int i915);
 
 bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
 bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
+bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
 bool blt_block_copy_supports_compression(int i915);
 bool blt_uses_extended_block_copy(int i915);
 
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 2/8] lib/intel_cmds_info: Correct tiling formats for XY_SRC_COPY

[Karolina Stolarek]

Both TileX and TileY are supported since SNB. Update definitions
for pre-SNB and pre-BDW platforms.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/i915/intel_cmds_info.c | 24 ++++++++++++++++--------
 lib/i915/intel_cmds_info.h |  3 ++-
 lib/intel_device_info.c    | 12 ++++++------
 3 files changed, 24 insertions(+), 15 deletions(-)

diff --git a/lib/i915/intel_cmds_info.c b/lib/i915/intel_cmds_info.c
index 2ac6bc2a..08fc981a 100644
--- a/lib/i915/intel_cmds_info.c
+++ b/lib/i915/intel_cmds_info.c
@@ -22,11 +22,11 @@
 
 static const struct blt_cmd_info src_copy = BLT_INFO(SRC_COPY, BIT(T_LINEAR));
 static const struct blt_cmd_info
-		pre_gen8_xy_src_copy = BLT_INFO(XY_SRC_COPY,
+		pre_gen6_xy_src_copy = BLT_INFO(XY_SRC_COPY,
 						BIT(T_LINEAR) |
 						BIT(T_XMAJOR));
 static const struct blt_cmd_info
-		gen8_xy_src_copy = BLT_INFO(XY_SRC_COPY,
+		gen6_xy_src_copy = BLT_INFO(XY_SRC_COPY,
 					    BIT(T_LINEAR) |
 					    BIT(T_XMAJOR) |
 					    BIT(T_YMAJOR));
@@ -69,29 +69,37 @@ static const struct blt_cmd_info
 						 BIT(T_TILE64),
 						 BLT_CMD_EXTENDED);
 
-const struct intel_cmds_info pre_gen8_cmds_info = {
+const struct intel_cmds_info pre_gen6_cmds_info = {
 	.blt_cmds = {
 		[SRC_COPY] = &src_copy,
-		[XY_SRC_COPY] = &pre_gen8_xy_src_copy
+		[XY_SRC_COPY] = &pre_gen6_xy_src_copy
 	}
 };
 
+const struct intel_cmds_info gen6_cmds_info =  {
+	.blt_cmds = {
+		[SRC_COPY] = &src_copy,
+		[XY_SRC_COPY] = &gen6_xy_src_copy
+	}
+
+};
+
 const struct intel_cmds_info gen8_cmds_info = {
 	.blt_cmds = {
-		[XY_SRC_COPY] = &gen8_xy_src_copy,
+		[XY_SRC_COPY] = &gen6_xy_src_copy,
 	}
 };
 
 const struct intel_cmds_info gen11_cmds_info = {
 	.blt_cmds = {
-		[XY_SRC_COPY] = &gen8_xy_src_copy,
+		[XY_SRC_COPY] = &gen6_xy_src_copy,
 		[XY_FAST_COPY] = &gen11_xy_fast_copy,
 	}
 };
 
 const struct intel_cmds_info gen12_cmds_info = {
 	.blt_cmds = {
-		[XY_SRC_COPY] = &gen8_xy_src_copy,
+		[XY_SRC_COPY] = &gen6_xy_src_copy,
 		[XY_FAST_COPY] = &gen12_xy_fast_copy,
 		[XY_BLOCK_COPY] = &gen12_xy_block_copy,
 	}
@@ -99,7 +107,7 @@ const struct intel_cmds_info gen12_cmds_info = {
 
 const struct intel_cmds_info gen12_dg2_cmds_info = {
 	.blt_cmds = {
-		[XY_SRC_COPY] = &gen8_xy_src_copy,
+		[XY_SRC_COPY] = &gen6_xy_src_copy,
 		[XY_FAST_COPY] = &dg2_xy_fast_copy,
 		[XY_BLOCK_COPY] = &dg2_xy_block_copy,
 	}
diff --git a/lib/i915/intel_cmds_info.h b/lib/i915/intel_cmds_info.h
index 9bf6ecd5..57e34c4b 100644
--- a/lib/i915/intel_cmds_info.h
+++ b/lib/i915/intel_cmds_info.h
@@ -39,7 +39,8 @@ struct intel_cmds_info {
 	struct blt_cmd_info const *blt_cmds[__BLT_MAX_CMD];
 };
 
-extern const struct intel_cmds_info pre_gen8_cmds_info;
+extern const struct intel_cmds_info pre_gen6_cmds_info;
+extern const struct intel_cmds_info gen6_cmds_info;
 extern const struct intel_cmds_info gen8_cmds_info;
 extern const struct intel_cmds_info gen11_cmds_info;
 extern const struct intel_cmds_info gen12_cmds_info;
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 12b81d48..0baad721 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -145,7 +145,7 @@ static const struct intel_device_info intel_sandybridge_info = {
 	.graphics_ver = 6,
 	.display_ver = 6,
 	.is_sandybridge = true,
-	.cmds_info = &pre_gen8_cmds_info,
+	.cmds_info = &gen6_cmds_info,
 	.codename = "sandybridge"
 };
 static const struct intel_device_info intel_sandybridge_m_info = {
@@ -153,7 +153,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 	.display_ver = 6,
 	.is_mobile = true,
 	.is_sandybridge = true,
-	.cmds_info = &pre_gen8_cmds_info,
+	.cmds_info = &gen6_cmds_info,
 	.codename = "sandybridge"
 };
 
@@ -161,7 +161,7 @@ static const struct intel_device_info intel_ivybridge_info = {
 	.graphics_ver = 7,
 	.display_ver = 7,
 	.is_ivybridge = true,
-	.cmds_info = &pre_gen8_cmds_info,
+	.cmds_info = &gen6_cmds_info,
 	.codename = "ivybridge"
 };
 static const struct intel_device_info intel_ivybridge_m_info = {
@@ -169,7 +169,7 @@ static const struct intel_device_info intel_ivybridge_m_info = {
 	.display_ver = 7,
 	.is_mobile = true,
 	.is_ivybridge = true,
-	.cmds_info = &pre_gen8_cmds_info,
+	.cmds_info = &gen6_cmds_info,
 	.codename = "ivybridge"
 };
 
@@ -177,7 +177,7 @@ static const struct intel_device_info intel_valleyview_info = {
 	.graphics_ver = 7,
 	.display_ver = 7,
 	.is_valleyview = true,
-	.cmds_info = &pre_gen8_cmds_info,
+	.cmds_info = &gen6_cmds_info,
 	.codename = "valleyview"
 };
 
@@ -185,7 +185,7 @@ static const struct intel_device_info intel_valleyview_info = {
 	.graphics_ver = 7, \
 	.display_ver = 7, \
 	.is_haswell = true, \
-	.cmds_info = &pre_gen8_cmds_info, \
+	.cmds_info = &gen6_cmds_info, \
 	.codename = "haswell"
 
 static const struct intel_device_info intel_haswell_gt1_info = {
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 3/8] lib/intel_device_info: Add tiling information for early gens

[Karolina Stolarek]

Update relevant intel_device_info entries to store information
on supported tiling formats.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/intel_device_info.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 0baad721..bda4fb63 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -27,12 +27,14 @@ static const struct intel_device_info intel_i830_info = {
 	.graphics_ver = 2,
 	.display_ver = 2,
 	.is_almador = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "almador"
 };
 static const struct intel_device_info intel_i845_info = {
 	.graphics_ver = 2,
 	.display_ver = 2,
 	.is_brookdale = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "brookdale"
 };
 static const struct intel_device_info intel_i855_info = {
@@ -40,12 +42,14 @@ static const struct intel_device_info intel_i855_info = {
 	.display_ver = 2,
 	.is_mobile = true,
 	.is_montara = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "montara"
 };
 static const struct intel_device_info intel_i865_info = {
 	.graphics_ver = 2,
 	.display_ver = 2,
 	.is_springdale = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "spingdale"
 };
 
@@ -53,6 +57,7 @@ static const struct intel_device_info intel_i915_info = {
 	.graphics_ver = 3,
 	.display_ver = 3,
 	.is_grantsdale = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "grantsdale"
 };
 static const struct intel_device_info intel_i915m_info = {
@@ -60,12 +65,14 @@ static const struct intel_device_info intel_i915m_info = {
 	.display_ver = 3,
 	.is_mobile = true,
 	.is_alviso = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "alviso"
 };
 static const struct intel_device_info intel_i945_info = {
 	.graphics_ver = 3,
 	.display_ver = 3,
 	.is_lakeport = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "lakeport"
 };
 static const struct intel_device_info intel_i945m_info = {
@@ -73,6 +80,7 @@ static const struct intel_device_info intel_i945m_info = {
 	.display_ver = 3,
 	.is_mobile = true,
 	.is_calistoga = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "calistoga"
 };
 
@@ -80,6 +88,7 @@ static const struct intel_device_info intel_g33_info = {
 	.graphics_ver = 3,
 	.display_ver = 3,
 	.is_bearlake = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "bearlake"
 };
 
@@ -87,6 +96,7 @@ static const struct intel_device_info intel_pineview_g_info = {
 	.graphics_ver = 3,
 	.display_ver = 3,
 	.is_pineview = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "pineview"
 };
 
@@ -95,6 +105,7 @@ static const struct intel_device_info intel_pineview_m_info = {
 	.display_ver = 3,
 	.is_mobile = true,
 	.is_pineview = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "pineview"
 };
 
@@ -102,6 +113,7 @@ static const struct intel_device_info intel_i965_info = {
 	.graphics_ver = 4,
 	.display_ver = 4,
 	.is_broadwater = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "broadwater"
 };
 
@@ -110,6 +122,7 @@ static const struct intel_device_info intel_i965m_info = {
 	.display_ver = 4,
 	.is_mobile = true,
 	.is_crestline = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "crestline"
 };
 
@@ -117,6 +130,7 @@ static const struct intel_device_info intel_g45_info = {
 	.graphics_ver = 4,
 	.display_ver = 4,
 	.is_eaglelake = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "eaglelake"
 };
 static const struct intel_device_info intel_gm45_info = {
@@ -124,6 +138,7 @@ static const struct intel_device_info intel_gm45_info = {
 	.display_ver = 4,
 	.is_mobile = true,
 	.is_cantiga = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "cantiga"
 };
 
@@ -131,6 +146,7 @@ static const struct intel_device_info intel_ironlake_info = {
 	.graphics_ver = 5,
 	.display_ver = 5,
 	.is_ironlake = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "ironlake" /* clarkdale? */
 };
 static const struct intel_device_info intel_ironlake_m_info = {
@@ -138,6 +154,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.display_ver = 5,
 	.is_mobile = true,
 	.is_arrandale = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "arrandale"
 };
 
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 4/8] tests/i915/gem_blits: Use new copy instruction

[Karolina Stolarek]

From: Arjun Melkaveri <arjun.melkaveri@intel.com>

The test uses legacy command which is not supported on
newer GPU generations. Use XY_FAST_COPY_BLT on newer GPU generations.

Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
Co-developed-by: Nirmoy Das <nirmoy.das@intel.com>
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Signed-off-by: Fei Yang <fei.yang@intel.com>
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
---
 lib/intel_batchbuffer.c | 10 ++---
 lib/intel_batchbuffer.h |  6 +++
 tests/i915/gem_blits.c  | 87 +++++++++++++++++++++++++----------------
 3 files changed, 64 insertions(+), 39 deletions(-)

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 7bb24c8f..a2bf5d2e 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -92,8 +92,8 @@ static uint32_t fast_copy_pitch(unsigned int stride, unsigned int tiling)
 		return stride;
 }
 
-static uint32_t fast_copy_dword0(unsigned int src_tiling,
-				 unsigned int dst_tiling)
+uint32_t fast_copy_dword0(unsigned int src_tiling,
+			  unsigned int dst_tiling)
 {
 	uint32_t dword0 = 0;
 
@@ -136,9 +136,9 @@ static uint32_t fast_copy_dword0(unsigned int src_tiling,
 	return dword0;
 }
 
-static uint32_t fast_copy_dword1(unsigned int src_tiling,
-				 unsigned int dst_tiling,
-				 int bpp)
+uint32_t fast_copy_dword1(unsigned int src_tiling,
+			  unsigned int dst_tiling,
+			  int bpp)
 {
 	uint32_t dword1 = 0;
 
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 37db0ffa..81830d77 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -31,6 +31,12 @@ enum i915_compression {
 	I915_COMPRESSION_MEDIA,
 };
 
+uint32_t fast_copy_dword0(unsigned int src_tiling,
+			  unsigned int dst_tiling);
+uint32_t fast_copy_dword1(unsigned int src_tiling,
+			  unsigned int dst_tiling,
+			  int bpp);
+
 void igt_blitter_src_copy(int fd,
 			  uint64_t ahnd,
 			  uint32_t ctx,
diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
index 9ea3925c..e5ef3662 100644
--- a/tests/i915/gem_blits.c
+++ b/tests/i915/gem_blits.c
@@ -22,15 +22,19 @@
  *
  */
 
+#include "intel_batchbuffer.h"
 #include "i915/gem.h"
 #include "i915/gem_create.h"
 #include "igt.h"
 #include "igt_x86.h"
+#include "i915/i915_blt.h"
 
 #define BCS_SWCTRL 0x22200
 #define BCS_SRC_Y (1 << 0)
 #define BCS_DST_Y (1 << 1)
 
+static uint32_t devid;
+
 struct device {
 	int fd;
 	int gen;
@@ -145,8 +149,7 @@ static void buffer_set_tiling(const struct device *device,
 	struct drm_i915_gem_relocation_entry reloc[2];
 	struct drm_i915_gem_execbuffer2 execbuf;
 	const bool has_64b_reloc = device->gen >= 8;
-	uint32_t stride, size, pitch;
-	uint32_t *batch;
+	uint32_t stride, size, pitch, *batch, dword1;
 	int i;
 
 	if (buffer->tiling == tiling)
@@ -207,19 +210,25 @@ static void buffer_set_tiling(const struct device *device,
 		batch[i++] = mask;
 	}
 
-	batch[i] = (XY_SRC_COPY_BLT_CMD |
-		    XY_SRC_COPY_BLT_WRITE_ALPHA |
-		    XY_SRC_COPY_BLT_WRITE_RGB);
-	if (device->gen >= 4 && buffer->tiling)
-		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
-	if (device->gen >= 4 && tiling)
-		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
-	batch[i++] |= 6 + 2 * has_64b_reloc;
-
 	pitch = stride;
 	if (device->gen >= 4 && tiling)
 		pitch /= 4;
-	batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
+
+	if (!blt_has_xy_src_copy(device->fd)) {
+		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
+		dword1 = fast_copy_dword1(buffer->tiling, tiling, 32);
+		batch[i++] = dword1 | pitch;
+	} else {
+		batch[i] = (XY_SRC_COPY_BLT_CMD |
+			    XY_SRC_COPY_BLT_WRITE_ALPHA |
+			    XY_SRC_COPY_BLT_WRITE_RGB);
+		if (device->gen >= 4 && buffer->tiling)
+			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
+		if (device->gen >= 4 && tiling)
+			batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
+		batch[i++] |= 6 + 2 * has_64b_reloc;
+		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
+	}
 	batch[i++] = 0;
 	batch[i++] = buffer->height << 16 | buffer->width;
 	reloc[0].target_handle = obj[0].handle;
@@ -296,8 +305,7 @@ static bool blit_to_linear(const struct device *device,
 	struct drm_i915_gem_relocation_entry reloc[2];
 	struct drm_i915_gem_execbuffer2 execbuf;
 	const bool has_64b_reloc = device->gen >= 8;
-	uint32_t *batch;
-	uint32_t pitch;
+	uint32_t *batch, pitch, dword1;
 	int i = 0;
 
 	igt_assert(buffer->tiling);
@@ -352,14 +360,19 @@ static bool blit_to_linear(const struct device *device,
 		batch[i++] = mask;
 	}
 
-	batch[i] = (XY_SRC_COPY_BLT_CMD |
-		    XY_SRC_COPY_BLT_WRITE_ALPHA |
-		    XY_SRC_COPY_BLT_WRITE_RGB);
-	if (device->gen >= 4 && buffer->tiling)
-		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
-	batch[i++] |= 6 + 2 * has_64b_reloc;
-
-	batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
+	if (!blt_has_xy_src_copy(device->fd)) {
+		batch[i++] = fast_copy_dword0(buffer->tiling, I915_TILING_NONE);
+		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE, 32);
+		batch[i++] = dword1 | buffer->stride;
+	} else {
+		batch[i] = (XY_SRC_COPY_BLT_CMD |
+			    XY_SRC_COPY_BLT_WRITE_ALPHA |
+			    XY_SRC_COPY_BLT_WRITE_RGB);
+		if (device->gen >= 4 && buffer->tiling)
+			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
+		batch[i++] |= 6 + 2 * has_64b_reloc;
+		batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
+	}
 	batch[i++] = 0;
 	batch[i++] = buffer->height << 16 | buffer->width;
 	reloc[0].target_handle = obj[0].handle;
@@ -598,8 +611,7 @@ blit(const struct device *device,
 	struct drm_i915_gem_relocation_entry reloc[2];
 	struct drm_i915_gem_execbuffer2 execbuf;
 	const bool has_64b_reloc = device->gen >= 8;
-	uint32_t *batch;
-	uint32_t pitch;
+	uint32_t *batch, dword1, pitch;
 	int i = 0;
 
 	if (src_x < 0) {
@@ -687,20 +699,25 @@ blit(const struct device *device,
 		batch[i++] = mask;
 	}
 
-	batch[i] = (XY_SRC_COPY_BLT_CMD |
-		    XY_SRC_COPY_BLT_WRITE_ALPHA |
-		    XY_SRC_COPY_BLT_WRITE_RGB);
-	if (device->gen >= 4 && src->tiling)
-		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
-	if (device->gen >= 4 && dst->tiling)
-		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
-	batch[i++] |= 6 + 2 * has_64b_reloc;
-
 	pitch = dst->stride;
 	if (device->gen >= 4 && dst->tiling)
 		pitch /= 4;
-	batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
 
+	if (!blt_has_xy_src_copy(device->fd)) {
+		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
+		dword1 = fast_copy_dword1(src->tiling, dst->tiling, 32);
+		batch[i++] = dword1 | pitch;
+	} else {
+		batch[i] = (XY_SRC_COPY_BLT_CMD |
+			    XY_SRC_COPY_BLT_WRITE_ALPHA |
+			    XY_SRC_COPY_BLT_WRITE_RGB);
+		if (device->gen >= 4 && src->tiling)
+			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
+		if (device->gen >= 4 && dst->tiling)
+			batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
+		batch[i++] |= 6 + 2 * has_64b_reloc;
+		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
+	}
 	batch[i++] = dst_y << 16 | dst_x;
 	batch[i++] = (height + dst_y) << 16 | (width + dst_x);
 	reloc[0].target_handle = obj[0].handle;
@@ -792,6 +809,8 @@ igt_main
 		struct buffer *src, *dst;
 		unsigned int x, y;
 
+		devid = intel_get_drm_devid(device.fd);
+
 		for (unsigned int height = 1; height <= 16; height <<= 2) {
 			for (unsigned int y0 = ZERO; y0 <= (height > 2 ? BELOW : ZERO); y0++) {
 				for (unsigned int width = 1; width <= 64; width <<= 2) {
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 5/8] lib/intel_batchbuffer: Add wrapper API to use XY_FAST_COPY_BLT/XY_SRC_BLT

[Karolina Stolarek]

From: Vikas Srivastava <vikas.srivastava@intel.com>

Add wrapper API in intel_batchbuffer to call respective copy functions
for XY_FAST_COPY_BLT or XY_SRC_BLT based on platform on which its
supported.

Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
---
 lib/intel_batchbuffer.c | 72 +++++++++++++++++++++++++++++++++++++++++
 lib/intel_batchbuffer.h | 22 +++++++++++++
 2 files changed, 94 insertions(+)

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index a2bf5d2e..a5157194 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -277,6 +277,78 @@ static uint32_t src_copy_dword1(uint32_t dst_pitch, uint32_t bpp)
 	return dword1;
 }
 
+/**
+ * igt_blitter_copy:
+ * @fd: file descriptor of the i915 driver
+ * @ahnd: handle to an allocator
+ * @ctx: context within which execute copy blit
+ * @src_handle: GEM handle of the source buffer
+ * @src_delta: offset into the source GEM bo, in bytes
+ * @src_stride: Stride (in bytes) of the source buffer
+ * @src_tiling: Tiling mode of the source buffer
+ * @src_x: X coordinate of the source region to copy
+ * @src_y: Y coordinate of the source region to copy
+ * @src_size: size of the src bo required for allocator and softpin
+ * @width: Width of the region to copy
+ * @height: Height of the region to copy
+ * @bpp: source and destination bits per pixel
+ * @dst_handle: GEM handle of the destination buffer
+ * @dst_delta: offset into the destination GEM bo, in bytes
+ * @dst_stride: Stride (in bytes) of the destination buffer
+ * @dst_tiling: Tiling mode of the destination buffer
+ * @dst_x: X coordinate of destination
+ * @dst_y: Y coordinate of destination
+ * @dst_size: size of the dst bo required for allocator and softpin
+ *
+ * Wrapper API to call appropriate blitter copy function.
+ */
+
+void igt_blitter_copy(int fd,
+		      uint64_t ahnd,
+		      uint32_t ctx,
+		      const intel_ctx_cfg_t *cfg,
+		      /* src */
+		      uint32_t src_handle,
+		      uint32_t src_delta,
+		      uint32_t src_stride,
+		      uint32_t src_tiling,
+		      uint32_t src_x, uint32_t src_y,
+		      uint64_t src_size,
+		      /* size */
+		      uint32_t width, uint32_t height,
+		      /* bpp */
+		      uint32_t bpp,
+		      /* dst */
+		      uint32_t dst_handle,
+		      uint32_t dst_delta,
+		      uint32_t dst_stride,
+		      uint32_t dst_tiling,
+		      uint32_t dst_x, uint32_t dst_y,
+		      uint64_t dst_size)
+{
+	uint32_t devid;
+
+	devid = intel_get_drm_devid(fd);
+
+	if (intel_graphics_ver(devid) >= IP_VER(12, 60))
+		igt_blitter_fast_copy__raw(fd, ahnd, ctx, NULL,
+					   src_handle, src_delta,
+					   src_stride, src_tiling,
+					   src_x, src_y, src_size,
+					   width, height, bpp,
+					   dst_handle, dst_delta,
+					   dst_stride, dst_tiling,
+					   dst_x, dst_y, dst_size);
+	else
+		igt_blitter_src_copy(fd, ahnd, ctx, NULL,
+				     src_handle, src_delta,
+				     src_stride, src_tiling,
+				     src_x, src_y, src_size,
+				     width, height, bpp,
+				     dst_handle, dst_delta,
+				     dst_stride, dst_tiling,
+				     dst_x, dst_y, dst_size);
+}
 /**
  * igt_blitter_src_copy:
  * @fd: file descriptor of the i915 driver
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 81830d77..aed1d575 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -36,6 +36,28 @@ uint32_t fast_copy_dword0(unsigned int src_tiling,
 uint32_t fast_copy_dword1(unsigned int src_tiling,
 			  unsigned int dst_tiling,
 			  int bpp);
+void igt_blitter_copy(int fd,
+		      uint64_t ahnd,
+		      uint32_t ctx,
+		      const intel_ctx_cfg_t *cfg,
+		      /* src */
+		      uint32_t src_handle,
+		      uint32_t src_delta,
+		      uint32_t src_stride,
+		      uint32_t src_tiling,
+		      uint32_t src_x, uint32_t src_y,
+		      uint64_t src_size,
+		      /* size */
+		      uint32_t width, uint32_t height,
+		      /* bpp */
+		      uint32_t bpp,
+		      /* dst */
+		      uint32_t dst_handle,
+		      uint32_t dst_delta,
+		      uint32_t dst_stride,
+		      uint32_t dst_tiling,
+		      uint32_t dst_x, uint32_t dst_y,
+		      uint64_t dst_size);
 
 void igt_blitter_src_copy(int fd,
 			  uint64_t ahnd,
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 6/8] tests/i915/gem_blits: Add XY_FAST_COPY_BLT support for gem_blits

[Karolina Stolarek]

From: Arjun Melkaveri <arjun.melkaveri@intel.com>

Test case uses legacy command XY_SRC_COPY_BLT_CMD which is not supported
on newer generations. Modify test to use XY_FAST_COPY_BLT.

Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
---
 tests/i915/gem_blits.c | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
index e5ef3662..b38d6c7e 100644
--- a/tests/i915/gem_blits.c
+++ b/tests/i915/gem_blits.c
@@ -216,7 +216,12 @@ static void buffer_set_tiling(const struct device *device,
 
 	if (!blt_has_xy_src_copy(device->fd)) {
 		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
-		dword1 = fast_copy_dword1(buffer->tiling, tiling, 32);
+		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
+		dword1 = fast_copy_dword1(buffer->tiling ?
+					  I915_TILING_Yf : I915_TILING_NONE,
+					  tiling ?
+					  I915_TILING_Yf : I915_TILING_NONE,
+					  32);
 		batch[i++] = dword1 | pitch;
 	} else {
 		batch[i] = (XY_SRC_COPY_BLT_CMD |
@@ -361,8 +366,11 @@ static bool blit_to_linear(const struct device *device,
 	}
 
 	if (!blt_has_xy_src_copy(device->fd)) {
-		batch[i++] = fast_copy_dword0(buffer->tiling, I915_TILING_NONE);
-		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE, 32);
+		batch[i++] = fast_copy_dword0(buffer->tiling, 0);
+		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
+		dword1 = fast_copy_dword1(buffer->tiling ?
+					  I915_TILING_Yf : I915_TILING_NONE,
+					  0, 32);
 		batch[i++] = dword1 | buffer->stride;
 	} else {
 		batch[i] = (XY_SRC_COPY_BLT_CMD |
@@ -705,7 +713,12 @@ blit(const struct device *device,
 
 	if (!blt_has_xy_src_copy(device->fd)) {
 		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
-		dword1 = fast_copy_dword1(src->tiling, dst->tiling, 32);
+		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
+		dword1 = fast_copy_dword1(src->tiling ?
+					  I915_TILING_Yf : I915_TILING_NONE,
+					  dst->tiling ?
+					  I915_TILING_Yf : I915_TILING_NONE,
+					  32);
 		batch[i++] = dword1 | pitch;
 	} else {
 		batch[i] = (XY_SRC_COPY_BLT_CMD |
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 7/8] lib/intel_cmds_info: Reorder blt_tiling_type enum

[Karolina Stolarek]

Move Yf Major up so it follows the order of tiling definitions
in intel_batchbuffer.h

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/i915/intel_cmds_info.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/i915/intel_cmds_info.h b/lib/i915/intel_cmds_info.h
index 57e34c4b..9af2f2d9 100644
--- a/lib/i915/intel_cmds_info.h
+++ b/lib/i915/intel_cmds_info.h
@@ -13,8 +13,8 @@ enum blt_tiling_type {
 	T_XMAJOR,
 	T_YMAJOR,
 	T_TILE4,
-	T_TILE64,
 	T_YFMAJOR,
+	T_TILE64,
 	__BLT_MAX_TILING
 };
 
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 8/8] tests/gem_blits: Use intel_cmds_info library

[Karolina Stolarek]

Update the test to use blt_tiling_type values. Make it skip
if a copy command doesn't support a specific tiling format.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/i915/i915_blt.c    |  6 ++++
 tests/i915/gem_blits.c | 66 +++++++++++++++++++++++++-----------------
 2 files changed, 46 insertions(+), 26 deletions(-)

diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index 13105820..ef67fe26 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -16,6 +16,12 @@
 #define BITRANGE(start, end) (end - start + 1)
 #define GET_CMDS_INFO(__fd) intel_get_cmds_info(intel_get_drm_devid(__fd))
 
+/* Blitter tiling definitions sanity checks */
+static_assert(T_LINEAR == I915_TILING_NONE, "Linear definitions have to match");
+static_assert(T_XMAJOR == I915_TILING_X, "TileX definitions have to match");
+static_assert(T_YMAJOR == I915_TILING_Y, "TileY definitions have to match");
+static_assert(T_YFMAJOR == I915_TILING_Yf, "TileYf definitions have to match");
+
 enum blt_special_mode {
 	SM_NONE,
 	SM_FULL_RESOLVE,
diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
index b38d6c7e..4aa8624c 100644
--- a/tests/i915/gem_blits.c
+++ b/tests/i915/gem_blits.c
@@ -72,7 +72,7 @@ get_tiling_stride(const struct device *device,
 	if (tiling) {
 		if (device->gen < 3)
 			stride = ALIGN(stride, 128);
-		else if (device->gen < 4 || tiling == I915_TILING_X)
+		else if (device->gen < 4 || tiling == T_XMAJOR)
 			stride = ALIGN(stride, 512);
 		else
 			stride = ALIGN(stride, 128);
@@ -96,7 +96,7 @@ get_tiling_height(const struct device *device,
 
 	if (device->gen < 3)
 		return ALIGN(height, 16);
-	else if (device->gen < 4 || tiling == I915_TILING_X)
+	else if (device->gen < 4 || tiling == T_XMAJOR)
 		return ALIGN(height, 8);
 	else
 		return ALIGN(height, 32);
@@ -117,8 +117,8 @@ static struct buffer *buffer_create(const struct device *device,
 	buffer->width = width;
 	buffer->height = height;
 
-	buffer->tiling = I915_TILING_NONE;
-	buffer->stride = get_tiling_stride(device, width, I915_TILING_NONE);
+	buffer->tiling = T_LINEAR;
+	buffer->stride = get_tiling_stride(device, width, T_LINEAR);
 	buffer->size = ALIGN(buffer->stride * height, 4096);
 	buffer->handle = gem_create(device->fd, buffer->size);
 	buffer->caching = device->llc;
@@ -196,16 +196,16 @@ static void buffer_set_tiling(const struct device *device,
 
 	i = 0;
 
-	if ((tiling | buffer->tiling) >= I915_TILING_Y) {
+	if ((tiling | buffer->tiling) >= T_YMAJOR) {
 		unsigned int mask;
 
 		batch[i++] = MI_LOAD_REGISTER_IMM(1);
 		batch[i++] = BCS_SWCTRL;
 
 		mask = (BCS_SRC_Y | BCS_DST_Y) << 16;
-		if (buffer->tiling == I915_TILING_Y)
+		if (buffer->tiling == T_YMAJOR)
 			mask |= BCS_SRC_Y;
-		if (tiling == I915_TILING_Y)
+		if (tiling == T_YMAJOR)
 			mask |= BCS_DST_Y;
 		batch[i++] = mask;
 	}
@@ -218,9 +218,9 @@ static void buffer_set_tiling(const struct device *device,
 		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
 		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
 		dword1 = fast_copy_dword1(buffer->tiling ?
-					  I915_TILING_Yf : I915_TILING_NONE,
+					  T_YFMAJOR : T_LINEAR,
 					  tiling ?
-					  I915_TILING_Yf : I915_TILING_NONE,
+					  T_YFMAJOR : T_LINEAR,
 					  32);
 		batch[i++] = dword1 | pitch;
 	} else {
@@ -258,7 +258,7 @@ static void buffer_set_tiling(const struct device *device,
 	if (has_64b_reloc)
 		batch[i++] = obj[1].offset >> 32;
 
-	if ((tiling | buffer->tiling) >= I915_TILING_Y) {
+	if ((tiling | buffer->tiling) >= T_YMAJOR) {
 		igt_assert(device->gen >= 6);
 		batch[i++] = MI_FLUSH_DW_CMD | 2;
 		batch[i++] = 0;
@@ -353,14 +353,14 @@ static bool blit_to_linear(const struct device *device,
 
 	batch = gem_mmap__cpu(device->fd, obj[2].handle, 0, 4096, PROT_WRITE);
 
-	if (buffer->tiling >= I915_TILING_Y) {
+	if (buffer->tiling >= T_YMAJOR) {
 		unsigned int mask;
 
 		batch[i++] = MI_LOAD_REGISTER_IMM(1);
 		batch[i++] = BCS_SWCTRL;
 
 		mask = (BCS_SRC_Y | BCS_DST_Y) << 16;
-		if (buffer->tiling == I915_TILING_Y)
+		if (buffer->tiling == T_YMAJOR)
 			mask |= BCS_SRC_Y;
 		batch[i++] = mask;
 	}
@@ -369,7 +369,7 @@ static bool blit_to_linear(const struct device *device,
 		batch[i++] = fast_copy_dword0(buffer->tiling, 0);
 		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
 		dword1 = fast_copy_dword1(buffer->tiling ?
-					  I915_TILING_Yf : I915_TILING_NONE,
+					  T_YFMAJOR : T_LINEAR,
 					  0, 32);
 		batch[i++] = dword1 | buffer->stride;
 	} else {
@@ -405,7 +405,7 @@ static bool blit_to_linear(const struct device *device,
 	if (has_64b_reloc)
 		batch[i++] = obj[1].offset >> 32;
 
-	if (buffer->tiling >= I915_TILING_Y) {
+	if (buffer->tiling >= T_YMAJOR) {
 		igt_assert(device->gen >= 6);
 		batch[i++] = MI_FLUSH_DW_CMD | 2;
 		batch[i++] = 0;
@@ -693,16 +693,16 @@ blit(const struct device *device,
 	}
 	batch = gem_mmap__cpu(device->fd, obj[2].handle, 0, 4096, PROT_WRITE);
 
-	if ((src->tiling | dst->tiling) >= I915_TILING_Y) {
+	if ((src->tiling | dst->tiling) >= T_YMAJOR) {
 		unsigned int mask;
 
 		batch[i++] = MI_LOAD_REGISTER_IMM(1);
 		batch[i++] = BCS_SWCTRL;
 
 		mask = (BCS_SRC_Y | BCS_DST_Y) << 16;
-		if (src->tiling == I915_TILING_Y)
+		if (src->tiling == T_YMAJOR)
 			mask |= BCS_SRC_Y;
-		if (dst->tiling == I915_TILING_Y)
+		if (dst->tiling == T_YMAJOR)
 			mask |= BCS_DST_Y;
 		batch[i++] = mask;
 	}
@@ -715,9 +715,9 @@ blit(const struct device *device,
 		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
 		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
 		dword1 = fast_copy_dword1(src->tiling ?
-					  I915_TILING_Yf : I915_TILING_NONE,
+					  T_YFMAJOR : T_LINEAR,
 					  dst->tiling ?
-					  I915_TILING_Yf : I915_TILING_NONE,
+					  T_YFMAJOR : T_LINEAR,
 					  32);
 		batch[i++] = dword1 | pitch;
 	} else {
@@ -755,7 +755,7 @@ blit(const struct device *device,
 	if (has_64b_reloc)
 		batch[i++] = obj[1].offset >> 32;
 
-	if ((src->tiling | dst->tiling) >= I915_TILING_Y) {
+	if ((src->tiling | dst->tiling) >= T_YMAJOR) {
 		igt_assert(device->gen >= 6);
 		batch[i++] = MI_FLUSH_DW_CMD | 2;
 		batch[i++] = 0;
@@ -803,6 +803,15 @@ static int start_at(int x, enum start s)
 	}
 }
 
+static bool blit_supports_tiling(int fd, enum blt_tiling_type tiling)
+{
+	if (blt_has_xy_src_copy(fd))
+		return blt_xy_src_copy_supports_tiling(fd, tiling);
+
+	/* Test is run on newer platform, so check fast-copy support instead */
+	return blt_fast_copy_supports_tiling(fd, tiling);
+}
+
 igt_main
 {
 	struct device device;
@@ -835,15 +844,20 @@ igt_main
 								    width * 16, height * 4);
 
 						y = start_at(height, y0);
-						for (unsigned int src_tiling = I915_TILING_NONE;
-						     src_tiling <= (device.gen >= 6 ? I915_TILING_Y : I915_TILING_X);
-						     src_tiling++) {
+
+						for (unsigned int src_tiling = T_LINEAR;
+						     src_tiling <= T_YMAJOR; src_tiling++) {
+							if (!blit_supports_tiling(device.fd, src_tiling))
+								continue;
+
 							buffer_set_tiling(&device, src, src_tiling);
 
 							x = start_at(width, x0);
-							for (unsigned int dst_tiling = I915_TILING_NONE;
-							     dst_tiling <= (device.gen >= 6 ? I915_TILING_Y : I915_TILING_X);
-							     dst_tiling++) {
+							for (unsigned int dst_tiling = T_LINEAR;
+							     dst_tiling <= T_YMAJOR; dst_tiling++) {
+								if (!blit_supports_tiling(device.fd, dst_tiling))
+									continue;
+
 								buffer_set_tiling(&device, dst, dst_tiling);
 
 								for (enum mode down = CPU; down <= WC; down++) {
-- 
2.25.1

[igt-dev] ✓ Fi.CI.BAT: success for Update gem_blits for newer generations (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 5418 bytes --]

== Series Details ==

Series: Update gem_blits for newer generations (rev3)
URL   : https://patchwork.freedesktop.org/series/114776/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12857 -> IGTPW_8605
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/index.html

Participating hosts (36 -> 36)
------------------------------

  Additional (1): bat-atsm-1 
  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in IGTPW_8605 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@eof:
    - bat-atsm-1:         NOTRUN -> [SKIP][1] ([i915#2582]) +4 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/bat-atsm-1/igt@fbdev@eof.html

  * igt@gem_mmap@basic:
    - bat-atsm-1:         NOTRUN -> [SKIP][2] ([i915#4083])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/bat-atsm-1/igt@gem_mmap@basic.html

  * igt@gem_sync@basic-each:
    - bat-atsm-1:         NOTRUN -> [FAIL][3] ([i915#8062]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/bat-atsm-1/igt@gem_sync@basic-each.html

  * igt@gem_tiled_fence_blits@basic:
    - bat-atsm-1:         NOTRUN -> [SKIP][4] ([i915#4077]) +2 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/bat-atsm-1/igt@gem_tiled_fence_blits@basic.html

  * igt@gem_tiled_pread_basic:
    - bat-atsm-1:         NOTRUN -> [SKIP][5] ([i915#4079]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/bat-atsm-1/igt@gem_tiled_pread_basic.html

  * igt@i915_hangman@error-state-basic:
    - bat-atsm-1:         NOTRUN -> [ABORT][6] ([i915#8060])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/bat-atsm-1/igt@i915_hangman@error-state-basic.html

  * igt@i915_selftest@live@migrate:
    - bat-dg2-11:         [PASS][7] -> [DMESG-WARN][8] ([i915#7699])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/bat-dg2-11/igt@i915_selftest@live@migrate.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/bat-dg2-11/igt@i915_selftest@live@migrate.html

  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
    - bat-adlp-9:         NOTRUN -> [SKIP][9] ([i915#7828])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/bat-adlp-9/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
    - bat-rpls-1:         NOTRUN -> [SKIP][10] ([i915#7828])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/bat-rpls-1/igt@kms_chamelium_hpd@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - bat-rpls-1:         NOTRUN -> [SKIP][11] ([i915#1845])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/bat-rpls-1/igt@kms_pipe_crc_basic@suspend-read-crc.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-cfl-8109u:       [DMESG-FAIL][12] ([i915#5334]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/fi-cfl-8109u/igt@i915_selftest@live@gt_heartbeat.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/fi-cfl-8109u/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@requests:
    - bat-rpls-1:         [ABORT][14] ([i915#4983] / [i915#7694] / [i915#7911] / [i915#7981]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/bat-rpls-1/igt@i915_selftest@live@requests.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/bat-rpls-1/igt@i915_selftest@live@requests.html
    - bat-adlp-9:         [ABORT][16] ([i915#7982]) -> [PASS][17]
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/bat-adlp-9/igt@i915_selftest@live@requests.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/bat-adlp-9/igt@i915_selftest@live@requests.html

  
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#7694]: https://gitlab.freedesktop.org/drm/intel/issues/7694
  [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
  [i915#7981]: https://gitlab.freedesktop.org/drm/intel/issues/7981
  [i915#7982]: https://gitlab.freedesktop.org/drm/intel/issues/7982
  [i915#8060]: https://gitlab.freedesktop.org/drm/intel/issues/8060
  [i915#8062]: https://gitlab.freedesktop.org/drm/intel/issues/8062


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7194 -> IGTPW_8605

  CI-20190529: 20190529
  CI_DRM_12857: 004fefbbf160569f80946d1e516d538b7ecb04f2 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8605: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/index.html
  IGT_7194: d22d66efd6211a22d301649b63d58c8c293e0817 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/index.html

[-- Attachment #2: Type: text/html, Size: 6395 bytes --]

Re: [igt-dev] [PATCH i-g-t v3 1/8] lib/i915_blt: Add helpers to check XY_SRC_COPY support

[Zbigniew Kempczyński]

On Tue, Mar 14, 2023 at 03:44:33PM +0100, Karolina Stolarek wrote:
> Add predicates that check if the command with a specific
> tiling format is supported on the current platform.
> 
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>  lib/i915/i915_blt.c | 33 +++++++++++++++++++++++++++++++++
>  lib/i915/i915_blt.h |  2 ++
>  2 files changed, 35 insertions(+)
> 
> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
> index 63eba4ac..13105820 100644
> --- a/lib/i915/i915_blt.c
> +++ b/lib/i915/i915_blt.c
> @@ -295,6 +295,22 @@ bool blt_has_fast_copy(int i915)
>  	return blt_supports_command(cmds_info, XY_FAST_COPY);
>  }
>  
> +/**
> + * blt_has_xy_src_copy
> + * @i915: drm fd
> + *
> + * Check if XY src copy is supported by @i915 device
> + *
> + * Returns:
> + * true if it does, false otherwise.
> + */
> +bool blt_has_xy_src_copy(int i915)
> +{
> +	const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> +
> +	return blt_supports_command(cmds_info, XY_SRC_COPY);
> +}
> +
>  /**
>   * blt_fast_copy_supports_tiling
>   * @i915: drm fd
> @@ -329,6 +345,23 @@ bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
>  	return blt_cmd_supports_tiling(cmds_info, XY_BLOCK_COPY, tiling);
>  }
>  
> +/**
> + * blt_xy_src_copy_supports_tiling
> + * @i915: drm fd
> + * @tiling: tiling format
> + *
> + * Check if XY src copy provided by @i915 device supports @tiling format
> + *
> + * Returns:
> + * true if it does, false otherwise.
> + */
> +bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> +{
> +	const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> +
> +	return blt_cmd_supports_tiling(cmds_info, XY_SRC_COPY, tiling);
> +}
> +
>  /**
>   * blt_block_copy_supports_compression
>   * @i915: drm fd
> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
> index 63951db7..a5f0edd1 100644
> --- a/lib/i915/i915_blt.h
> +++ b/lib/i915/i915_blt.h
> @@ -168,9 +168,11 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
>  
>  bool blt_has_block_copy(int i915);
>  bool blt_has_fast_copy(int i915);
> +bool blt_has_xy_src_copy(int i915);
>  
>  bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
>  bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> +bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
>  bool blt_block_copy_supports_compression(int i915);
>  bool blt_uses_extended_block_copy(int i915);
>  
> -- 
> 2.25.1
>

LGTM,

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew 

Re: [igt-dev] [PATCH i-g-t v3 2/8] lib/intel_cmds_info: Correct tiling formats for XY_SRC_COPY

[Zbigniew Kempczyński]

On Tue, Mar 14, 2023 at 03:44:34PM +0100, Karolina Stolarek wrote:
> Both TileX and TileY are supported since SNB. Update definitions
> for pre-SNB and pre-BDW platforms.
> 
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>  lib/i915/intel_cmds_info.c | 24 ++++++++++++++++--------
>  lib/i915/intel_cmds_info.h |  3 ++-
>  lib/intel_device_info.c    | 12 ++++++------
>  3 files changed, 24 insertions(+), 15 deletions(-)
> 
> diff --git a/lib/i915/intel_cmds_info.c b/lib/i915/intel_cmds_info.c
> index 2ac6bc2a..08fc981a 100644
> --- a/lib/i915/intel_cmds_info.c
> +++ b/lib/i915/intel_cmds_info.c
> @@ -22,11 +22,11 @@
>  
>  static const struct blt_cmd_info src_copy = BLT_INFO(SRC_COPY, BIT(T_LINEAR));
>  static const struct blt_cmd_info
> -		pre_gen8_xy_src_copy = BLT_INFO(XY_SRC_COPY,
> +		pre_gen6_xy_src_copy = BLT_INFO(XY_SRC_COPY,
>  						BIT(T_LINEAR) |
>  						BIT(T_XMAJOR));

I started wondering did we support Y on pre-gen6 but I've seen
this exclusion on other code. So:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

>  static const struct blt_cmd_info
> -		gen8_xy_src_copy = BLT_INFO(XY_SRC_COPY,
> +		gen6_xy_src_copy = BLT_INFO(XY_SRC_COPY,
>  					    BIT(T_LINEAR) |
>  					    BIT(T_XMAJOR) |
>  					    BIT(T_YMAJOR));
> @@ -69,29 +69,37 @@ static const struct blt_cmd_info
>  						 BIT(T_TILE64),
>  						 BLT_CMD_EXTENDED);
>  
> -const struct intel_cmds_info pre_gen8_cmds_info = {
> +const struct intel_cmds_info pre_gen6_cmds_info = {
>  	.blt_cmds = {
>  		[SRC_COPY] = &src_copy,
> -		[XY_SRC_COPY] = &pre_gen8_xy_src_copy
> +		[XY_SRC_COPY] = &pre_gen6_xy_src_copy
>  	}
>  };
>  
> +const struct intel_cmds_info gen6_cmds_info =  {
> +	.blt_cmds = {
> +		[SRC_COPY] = &src_copy,
> +		[XY_SRC_COPY] = &gen6_xy_src_copy
> +	}
> +
> +};
> +
>  const struct intel_cmds_info gen8_cmds_info = {
>  	.blt_cmds = {
> -		[XY_SRC_COPY] = &gen8_xy_src_copy,
> +		[XY_SRC_COPY] = &gen6_xy_src_copy,
>  	}
>  };
>  
>  const struct intel_cmds_info gen11_cmds_info = {
>  	.blt_cmds = {
> -		[XY_SRC_COPY] = &gen8_xy_src_copy,
> +		[XY_SRC_COPY] = &gen6_xy_src_copy,
>  		[XY_FAST_COPY] = &gen11_xy_fast_copy,
>  	}
>  };
>  
>  const struct intel_cmds_info gen12_cmds_info = {
>  	.blt_cmds = {
> -		[XY_SRC_COPY] = &gen8_xy_src_copy,
> +		[XY_SRC_COPY] = &gen6_xy_src_copy,
>  		[XY_FAST_COPY] = &gen12_xy_fast_copy,
>  		[XY_BLOCK_COPY] = &gen12_xy_block_copy,
>  	}
> @@ -99,7 +107,7 @@ const struct intel_cmds_info gen12_cmds_info = {
>  
>  const struct intel_cmds_info gen12_dg2_cmds_info = {
>  	.blt_cmds = {
> -		[XY_SRC_COPY] = &gen8_xy_src_copy,
> +		[XY_SRC_COPY] = &gen6_xy_src_copy,
>  		[XY_FAST_COPY] = &dg2_xy_fast_copy,
>  		[XY_BLOCK_COPY] = &dg2_xy_block_copy,
>  	}
> diff --git a/lib/i915/intel_cmds_info.h b/lib/i915/intel_cmds_info.h
> index 9bf6ecd5..57e34c4b 100644
> --- a/lib/i915/intel_cmds_info.h
> +++ b/lib/i915/intel_cmds_info.h
> @@ -39,7 +39,8 @@ struct intel_cmds_info {
>  	struct blt_cmd_info const *blt_cmds[__BLT_MAX_CMD];
>  };
>  
> -extern const struct intel_cmds_info pre_gen8_cmds_info;
> +extern const struct intel_cmds_info pre_gen6_cmds_info;
> +extern const struct intel_cmds_info gen6_cmds_info;
>  extern const struct intel_cmds_info gen8_cmds_info;
>  extern const struct intel_cmds_info gen11_cmds_info;
>  extern const struct intel_cmds_info gen12_cmds_info;
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 12b81d48..0baad721 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -145,7 +145,7 @@ static const struct intel_device_info intel_sandybridge_info = {
>  	.graphics_ver = 6,
>  	.display_ver = 6,
>  	.is_sandybridge = true,
> -	.cmds_info = &pre_gen8_cmds_info,
> +	.cmds_info = &gen6_cmds_info,
>  	.codename = "sandybridge"
>  };
>  static const struct intel_device_info intel_sandybridge_m_info = {
> @@ -153,7 +153,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
>  	.display_ver = 6,
>  	.is_mobile = true,
>  	.is_sandybridge = true,
> -	.cmds_info = &pre_gen8_cmds_info,
> +	.cmds_info = &gen6_cmds_info,
>  	.codename = "sandybridge"
>  };
>  
> @@ -161,7 +161,7 @@ static const struct intel_device_info intel_ivybridge_info = {
>  	.graphics_ver = 7,
>  	.display_ver = 7,
>  	.is_ivybridge = true,
> -	.cmds_info = &pre_gen8_cmds_info,
> +	.cmds_info = &gen6_cmds_info,
>  	.codename = "ivybridge"
>  };
>  static const struct intel_device_info intel_ivybridge_m_info = {
> @@ -169,7 +169,7 @@ static const struct intel_device_info intel_ivybridge_m_info = {
>  	.display_ver = 7,
>  	.is_mobile = true,
>  	.is_ivybridge = true,
> -	.cmds_info = &pre_gen8_cmds_info,
> +	.cmds_info = &gen6_cmds_info,
>  	.codename = "ivybridge"
>  };
>  
> @@ -177,7 +177,7 @@ static const struct intel_device_info intel_valleyview_info = {
>  	.graphics_ver = 7,
>  	.display_ver = 7,
>  	.is_valleyview = true,
> -	.cmds_info = &pre_gen8_cmds_info,
> +	.cmds_info = &gen6_cmds_info,
>  	.codename = "valleyview"
>  };
>  
> @@ -185,7 +185,7 @@ static const struct intel_device_info intel_valleyview_info = {
>  	.graphics_ver = 7, \
>  	.display_ver = 7, \
>  	.is_haswell = true, \
> -	.cmds_info = &pre_gen8_cmds_info, \
> +	.cmds_info = &gen6_cmds_info, \
>  	.codename = "haswell"
>  
>  static const struct intel_device_info intel_haswell_gt1_info = {
> -- 
> 2.25.1
> 

Re: [igt-dev] [PATCH i-g-t v3 3/8] lib/intel_device_info: Add tiling information for early gens

[Zbigniew Kempczyński]

On Tue, Mar 14, 2023 at 03:44:35PM +0100, Karolina Stolarek wrote:
> Update relevant intel_device_info entries to store information
> on supported tiling formats.
> 
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>  lib/intel_device_info.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 0baad721..bda4fb63 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -27,12 +27,14 @@ static const struct intel_device_info intel_i830_info = {
>  	.graphics_ver = 2,
>  	.display_ver = 2,
>  	.is_almador = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "almador"
>  };
>  static const struct intel_device_info intel_i845_info = {
>  	.graphics_ver = 2,
>  	.display_ver = 2,
>  	.is_brookdale = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "brookdale"
>  };
>  static const struct intel_device_info intel_i855_info = {
> @@ -40,12 +42,14 @@ static const struct intel_device_info intel_i855_info = {
>  	.display_ver = 2,
>  	.is_mobile = true,
>  	.is_montara = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "montara"
>  };
>  static const struct intel_device_info intel_i865_info = {
>  	.graphics_ver = 2,
>  	.display_ver = 2,
>  	.is_springdale = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "spingdale"
>  };
>  
> @@ -53,6 +57,7 @@ static const struct intel_device_info intel_i915_info = {
>  	.graphics_ver = 3,
>  	.display_ver = 3,
>  	.is_grantsdale = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "grantsdale"
>  };
>  static const struct intel_device_info intel_i915m_info = {
> @@ -60,12 +65,14 @@ static const struct intel_device_info intel_i915m_info = {
>  	.display_ver = 3,
>  	.is_mobile = true,
>  	.is_alviso = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "alviso"
>  };
>  static const struct intel_device_info intel_i945_info = {
>  	.graphics_ver = 3,
>  	.display_ver = 3,
>  	.is_lakeport = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "lakeport"
>  };
>  static const struct intel_device_info intel_i945m_info = {
> @@ -73,6 +80,7 @@ static const struct intel_device_info intel_i945m_info = {
>  	.display_ver = 3,
>  	.is_mobile = true,
>  	.is_calistoga = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "calistoga"
>  };
>  
> @@ -80,6 +88,7 @@ static const struct intel_device_info intel_g33_info = {
>  	.graphics_ver = 3,
>  	.display_ver = 3,
>  	.is_bearlake = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "bearlake"
>  };
>  
> @@ -87,6 +96,7 @@ static const struct intel_device_info intel_pineview_g_info = {
>  	.graphics_ver = 3,
>  	.display_ver = 3,
>  	.is_pineview = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "pineview"
>  };
>  
> @@ -95,6 +105,7 @@ static const struct intel_device_info intel_pineview_m_info = {
>  	.display_ver = 3,
>  	.is_mobile = true,
>  	.is_pineview = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "pineview"
>  };
>  
> @@ -102,6 +113,7 @@ static const struct intel_device_info intel_i965_info = {
>  	.graphics_ver = 4,
>  	.display_ver = 4,
>  	.is_broadwater = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "broadwater"
>  };
>  
> @@ -110,6 +122,7 @@ static const struct intel_device_info intel_i965m_info = {
>  	.display_ver = 4,
>  	.is_mobile = true,
>  	.is_crestline = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "crestline"
>  };
>  
> @@ -117,6 +130,7 @@ static const struct intel_device_info intel_g45_info = {
>  	.graphics_ver = 4,
>  	.display_ver = 4,
>  	.is_eaglelake = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "eaglelake"
>  };
>  static const struct intel_device_info intel_gm45_info = {
> @@ -124,6 +138,7 @@ static const struct intel_device_info intel_gm45_info = {
>  	.display_ver = 4,
>  	.is_mobile = true,
>  	.is_cantiga = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "cantiga"
>  };
>  
> @@ -131,6 +146,7 @@ static const struct intel_device_info intel_ironlake_info = {
>  	.graphics_ver = 5,
>  	.display_ver = 5,
>  	.is_ironlake = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "ironlake" /* clarkdale? */
>  };
>  static const struct intel_device_info intel_ironlake_m_info = {
> @@ -138,6 +154,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
>  	.display_ver = 5,
>  	.is_mobile = true,
>  	.is_arrandale = true,
> +	.cmds_info = &pre_gen6_cmds_info,
>  	.codename = "arrandale"
>  };
>  
> -- 
> 2.25.1
>

Looks ok,

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew 

Re: [igt-dev] [PATCH i-g-t v3 4/8] tests/i915/gem_blits: Use new copy instruction

[Zbigniew Kempczyński]

On Tue, Mar 14, 2023 at 03:44:36PM +0100, Karolina Stolarek wrote:
> From: Arjun Melkaveri <arjun.melkaveri@intel.com>
> 
> The test uses legacy command which is not supported on
> newer GPU generations. Use XY_FAST_COPY_BLT on newer GPU generations.
> 
> Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
> Co-developed-by: Nirmoy Das <nirmoy.das@intel.com>
> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
> Signed-off-by: Fei Yang <fei.yang@intel.com>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> ---
>  lib/intel_batchbuffer.c | 10 ++---
>  lib/intel_batchbuffer.h |  6 +++
>  tests/i915/gem_blits.c  | 87 +++++++++++++++++++++++++----------------
>  3 files changed, 64 insertions(+), 39 deletions(-)
> 
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 7bb24c8f..a2bf5d2e 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -92,8 +92,8 @@ static uint32_t fast_copy_pitch(unsigned int stride, unsigned int tiling)
>  		return stride;
>  }
>  
> -static uint32_t fast_copy_dword0(unsigned int src_tiling,
> -				 unsigned int dst_tiling)
> +uint32_t fast_copy_dword0(unsigned int src_tiling,
> +			  unsigned int dst_tiling)
>  {
>  	uint32_t dword0 = 0;
>  
> @@ -136,9 +136,9 @@ static uint32_t fast_copy_dword0(unsigned int src_tiling,
>  	return dword0;
>  }
>  
> -static uint32_t fast_copy_dword1(unsigned int src_tiling,
> -				 unsigned int dst_tiling,
> -				 int bpp)
> +uint32_t fast_copy_dword1(unsigned int src_tiling,
> +			  unsigned int dst_tiling,
> +			  int bpp)
>  {
>  	uint32_t dword1 = 0;
>  
> diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
> index 37db0ffa..81830d77 100644
> --- a/lib/intel_batchbuffer.h
> +++ b/lib/intel_batchbuffer.h
> @@ -31,6 +31,12 @@ enum i915_compression {
>  	I915_COMPRESSION_MEDIA,
>  };
>  
> +uint32_t fast_copy_dword0(unsigned int src_tiling,
> +			  unsigned int dst_tiling);
> +uint32_t fast_copy_dword1(unsigned int src_tiling,
> +			  unsigned int dst_tiling,
> +			  int bpp);
> +
>  void igt_blitter_src_copy(int fd,
>  			  uint64_t ahnd,
>  			  uint32_t ctx,
> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
> index 9ea3925c..e5ef3662 100644
> --- a/tests/i915/gem_blits.c
> +++ b/tests/i915/gem_blits.c
> @@ -22,15 +22,19 @@
>   *
>   */
>  
> +#include "intel_batchbuffer.h"
>  #include "i915/gem.h"
>  #include "i915/gem_create.h"
>  #include "igt.h"
>  #include "igt_x86.h"
> +#include "i915/i915_blt.h"
>  
>  #define BCS_SWCTRL 0x22200
>  #define BCS_SRC_Y (1 << 0)
>  #define BCS_DST_Y (1 << 1)
>  
> +static uint32_t devid;
> +
>  struct device {
>  	int fd;
>  	int gen;
> @@ -145,8 +149,7 @@ static void buffer_set_tiling(const struct device *device,
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_execbuffer2 execbuf;
>  	const bool has_64b_reloc = device->gen >= 8;
> -	uint32_t stride, size, pitch;
> -	uint32_t *batch;
> +	uint32_t stride, size, pitch, *batch, dword1;
>  	int i;
>  
>  	if (buffer->tiling == tiling)
> @@ -207,19 +210,25 @@ static void buffer_set_tiling(const struct device *device,
>  		batch[i++] = mask;
>  	}
>  
> -	batch[i] = (XY_SRC_COPY_BLT_CMD |
> -		    XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		    XY_SRC_COPY_BLT_WRITE_RGB);
> -	if (device->gen >= 4 && buffer->tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> -	if (device->gen >= 4 && tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> -	batch[i++] |= 6 + 2 * has_64b_reloc;
> -
>  	pitch = stride;
>  	if (device->gen >= 4 && tiling)
>  		pitch /= 4;
> -	batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
> +
> +	if (!blt_has_xy_src_copy(device->fd)) {
> +		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
> +		dword1 = fast_copy_dword1(buffer->tiling, tiling, 32);
> +		batch[i++] = dword1 | pitch;
> +	} else {
> +		batch[i] = (XY_SRC_COPY_BLT_CMD |
> +			    XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			    XY_SRC_COPY_BLT_WRITE_RGB);
> +		if (device->gen >= 4 && buffer->tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> +		if (device->gen >= 4 && tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> +		batch[i++] |= 6 + 2 * has_64b_reloc;
> +		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
> +	}
>  	batch[i++] = 0;
>  	batch[i++] = buffer->height << 16 | buffer->width;
>  	reloc[0].target_handle = obj[0].handle;
> @@ -296,8 +305,7 @@ static bool blit_to_linear(const struct device *device,
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_execbuffer2 execbuf;
>  	const bool has_64b_reloc = device->gen >= 8;
> -	uint32_t *batch;
> -	uint32_t pitch;
> +	uint32_t *batch, pitch, dword1;
>  	int i = 0;
>  
>  	igt_assert(buffer->tiling);
> @@ -352,14 +360,19 @@ static bool blit_to_linear(const struct device *device,
>  		batch[i++] = mask;
>  	}
>  
> -	batch[i] = (XY_SRC_COPY_BLT_CMD |
> -		    XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		    XY_SRC_COPY_BLT_WRITE_RGB);
> -	if (device->gen >= 4 && buffer->tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> -	batch[i++] |= 6 + 2 * has_64b_reloc;
> -
> -	batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
> +	if (!blt_has_xy_src_copy(device->fd)) {
> +		batch[i++] = fast_copy_dword0(buffer->tiling, I915_TILING_NONE);
> +		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE, 32);
> +		batch[i++] = dword1 | buffer->stride;
> +	} else {
> +		batch[i] = (XY_SRC_COPY_BLT_CMD |
> +			    XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			    XY_SRC_COPY_BLT_WRITE_RGB);
> +		if (device->gen >= 4 && buffer->tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> +		batch[i++] |= 6 + 2 * has_64b_reloc;
> +		batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
> +	}
>  	batch[i++] = 0;
>  	batch[i++] = buffer->height << 16 | buffer->width;
>  	reloc[0].target_handle = obj[0].handle;
> @@ -598,8 +611,7 @@ blit(const struct device *device,
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_execbuffer2 execbuf;
>  	const bool has_64b_reloc = device->gen >= 8;
> -	uint32_t *batch;
> -	uint32_t pitch;
> +	uint32_t *batch, dword1, pitch;
>  	int i = 0;
>  
>  	if (src_x < 0) {
> @@ -687,20 +699,25 @@ blit(const struct device *device,
>  		batch[i++] = mask;
>  	}
>  
> -	batch[i] = (XY_SRC_COPY_BLT_CMD |
> -		    XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		    XY_SRC_COPY_BLT_WRITE_RGB);
> -	if (device->gen >= 4 && src->tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> -	if (device->gen >= 4 && dst->tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> -	batch[i++] |= 6 + 2 * has_64b_reloc;
> -
>  	pitch = dst->stride;
>  	if (device->gen >= 4 && dst->tiling)
>  		pitch /= 4;
> -	batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
>  
> +	if (!blt_has_xy_src_copy(device->fd)) {
> +		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
> +		dword1 = fast_copy_dword1(src->tiling, dst->tiling, 32);
> +		batch[i++] = dword1 | pitch;
> +	} else {
> +		batch[i] = (XY_SRC_COPY_BLT_CMD |
> +			    XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			    XY_SRC_COPY_BLT_WRITE_RGB);
> +		if (device->gen >= 4 && src->tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> +		if (device->gen >= 4 && dst->tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> +		batch[i++] |= 6 + 2 * has_64b_reloc;
> +		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
> +	}
>  	batch[i++] = dst_y << 16 | dst_x;
>  	batch[i++] = (height + dst_y) << 16 | (width + dst_x);
>  	reloc[0].target_handle = obj[0].handle;
> @@ -792,6 +809,8 @@ igt_main
>  		struct buffer *src, *dst;
>  		unsigned int x, y;
>  
> +		devid = intel_get_drm_devid(device.fd);

Seems unused (+static on top).

With this fixed:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew
> +
>  		for (unsigned int height = 1; height <= 16; height <<= 2) {
>  			for (unsigned int y0 = ZERO; y0 <= (height > 2 ? BELOW : ZERO); y0++) {
>  				for (unsigned int width = 1; width <= 64; width <<= 2) {
> -- 
> 2.25.1
> 

Re: [igt-dev] [PATCH i-g-t v3 5/8] lib/intel_batchbuffer: Add wrapper API to use XY_FAST_COPY_BLT/XY_SRC_BLT

[Zbigniew Kempczyński]

On Tue, Mar 14, 2023 at 03:44:37PM +0100, Karolina Stolarek wrote:
> From: Vikas Srivastava <vikas.srivastava@intel.com>
> 
> Add wrapper API in intel_batchbuffer to call respective copy functions
> for XY_FAST_COPY_BLT or XY_SRC_BLT based on platform on which its
> supported.
> 
> Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> Cc: Nirmoy Das <nirmoy.das@intel.com>
> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> ---
>  lib/intel_batchbuffer.c | 72 +++++++++++++++++++++++++++++++++++++++++
>  lib/intel_batchbuffer.h | 22 +++++++++++++
>  2 files changed, 94 insertions(+)
> 
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index a2bf5d2e..a5157194 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -277,6 +277,78 @@ static uint32_t src_copy_dword1(uint32_t dst_pitch, uint32_t bpp)
>  	return dword1;
>  }
>  
> +/**
> + * igt_blitter_copy:
> + * @fd: file descriptor of the i915 driver
> + * @ahnd: handle to an allocator
> + * @ctx: context within which execute copy blit
> + * @src_handle: GEM handle of the source buffer
> + * @src_delta: offset into the source GEM bo, in bytes
> + * @src_stride: Stride (in bytes) of the source buffer
> + * @src_tiling: Tiling mode of the source buffer
> + * @src_x: X coordinate of the source region to copy
> + * @src_y: Y coordinate of the source region to copy
> + * @src_size: size of the src bo required for allocator and softpin
> + * @width: Width of the region to copy
> + * @height: Height of the region to copy
> + * @bpp: source and destination bits per pixel
> + * @dst_handle: GEM handle of the destination buffer
> + * @dst_delta: offset into the destination GEM bo, in bytes
> + * @dst_stride: Stride (in bytes) of the destination buffer
> + * @dst_tiling: Tiling mode of the destination buffer
> + * @dst_x: X coordinate of destination
> + * @dst_y: Y coordinate of destination
> + * @dst_size: size of the dst bo required for allocator and softpin
> + *
> + * Wrapper API to call appropriate blitter copy function.
> + */
> +
> +void igt_blitter_copy(int fd,
> +		      uint64_t ahnd,
> +		      uint32_t ctx,
> +		      const intel_ctx_cfg_t *cfg,
> +		      /* src */
> +		      uint32_t src_handle,
> +		      uint32_t src_delta,
> +		      uint32_t src_stride,
> +		      uint32_t src_tiling,
> +		      uint32_t src_x, uint32_t src_y,
> +		      uint64_t src_size,
> +		      /* size */
> +		      uint32_t width, uint32_t height,
> +		      /* bpp */
> +		      uint32_t bpp,
> +		      /* dst */
> +		      uint32_t dst_handle,
> +		      uint32_t dst_delta,
> +		      uint32_t dst_stride,
> +		      uint32_t dst_tiling,
> +		      uint32_t dst_x, uint32_t dst_y,
> +		      uint64_t dst_size)
> +{
> +	uint32_t devid;
> +
> +	devid = intel_get_drm_devid(fd);
> +
> +	if (intel_graphics_ver(devid) >= IP_VER(12, 60))
> +		igt_blitter_fast_copy__raw(fd, ahnd, ctx, NULL,
> +					   src_handle, src_delta,
> +					   src_stride, src_tiling,
> +					   src_x, src_y, src_size,
> +					   width, height, bpp,
> +					   dst_handle, dst_delta,
> +					   dst_stride, dst_tiling,
> +					   dst_x, dst_y, dst_size);
> +	else
> +		igt_blitter_src_copy(fd, ahnd, ctx, NULL,
> +				     src_handle, src_delta,
> +				     src_stride, src_tiling,
> +				     src_x, src_y, src_size,
> +				     width, height, bpp,
> +				     dst_handle, dst_delta,
> +				     dst_stride, dst_tiling,
> +				     dst_x, dst_y, dst_size);
> +}
>  /**
>   * igt_blitter_src_copy:
>   * @fd: file descriptor of the i915 driver
> diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
> index 81830d77..aed1d575 100644
> --- a/lib/intel_batchbuffer.h
> +++ b/lib/intel_batchbuffer.h
> @@ -36,6 +36,28 @@ uint32_t fast_copy_dword0(unsigned int src_tiling,
>  uint32_t fast_copy_dword1(unsigned int src_tiling,
>  			  unsigned int dst_tiling,
>  			  int bpp);
> +void igt_blitter_copy(int fd,
> +		      uint64_t ahnd,
> +		      uint32_t ctx,
> +		      const intel_ctx_cfg_t *cfg,
> +		      /* src */
> +		      uint32_t src_handle,
> +		      uint32_t src_delta,
> +		      uint32_t src_stride,
> +		      uint32_t src_tiling,
> +		      uint32_t src_x, uint32_t src_y,
> +		      uint64_t src_size,
> +		      /* size */
> +		      uint32_t width, uint32_t height,
> +		      /* bpp */
> +		      uint32_t bpp,
> +		      /* dst */
> +		      uint32_t dst_handle,
> +		      uint32_t dst_delta,
> +		      uint32_t dst_stride,
> +		      uint32_t dst_tiling,
> +		      uint32_t dst_x, uint32_t dst_y,
> +		      uint64_t dst_size);
>  
>  void igt_blitter_src_copy(int fd,
>  			  uint64_t ahnd,
> -- 
> 2.25.1
>

Good idea, we can decrease conditional code where we just need
to blit.

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew
 

Re: [igt-dev] [PATCH i-g-t v3 6/8] tests/i915/gem_blits: Add XY_FAST_COPY_BLT support for gem_blits

[Zbigniew Kempczyński]

On Tue, Mar 14, 2023 at 03:44:38PM +0100, Karolina Stolarek wrote:
> From: Arjun Melkaveri <arjun.melkaveri@intel.com>
> 
> Test case uses legacy command XY_SRC_COPY_BLT_CMD which is not supported
> on newer generations. Modify test to use XY_FAST_COPY_BLT.

Description doesn't match the patch.

> 
> Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
> Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> Cc: Nirmoy Das <nirmoy.das@intel.com>
> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> ---
>  tests/i915/gem_blits.c | 21 +++++++++++++++++----
>  1 file changed, 17 insertions(+), 4 deletions(-)
> 
> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
> index e5ef3662..b38d6c7e 100644
> --- a/tests/i915/gem_blits.c
> +++ b/tests/i915/gem_blits.c
> @@ -216,7 +216,12 @@ static void buffer_set_tiling(const struct device *device,
>  
>  	if (!blt_has_xy_src_copy(device->fd)) {
>  		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
> -		dword1 = fast_copy_dword1(buffer->tiling, tiling, 32);
> +		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
> +		dword1 = fast_copy_dword1(buffer->tiling ?
> +					  I915_TILING_Yf : I915_TILING_NONE,
> +					  tiling ?
> +					  I915_TILING_Yf : I915_TILING_NONE,
> +					  32);
>  		batch[i++] = dword1 | pitch;
>  	} else {
>  		batch[i] = (XY_SRC_COPY_BLT_CMD |
> @@ -361,8 +366,11 @@ static bool blit_to_linear(const struct device *device,
>  	}
>  
>  	if (!blt_has_xy_src_copy(device->fd)) {
> -		batch[i++] = fast_copy_dword0(buffer->tiling, I915_TILING_NONE);
> -		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE, 32);
> +		batch[i++] = fast_copy_dword0(buffer->tiling, 0);
> +		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
> +		dword1 = fast_copy_dword1(buffer->tiling ?
> +					  I915_TILING_Yf : I915_TILING_NONE,
> +					  0, 32);

Is that comment adequate to fast_copy_dword1()? Where's tile4 bit set in this patch?

--
Zbigniew


>  		batch[i++] = dword1 | buffer->stride;
>  	} else {
>  		batch[i] = (XY_SRC_COPY_BLT_CMD |
> @@ -705,7 +713,12 @@ blit(const struct device *device,
>  
>  	if (!blt_has_xy_src_copy(device->fd)) {
>  		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
> -		dword1 = fast_copy_dword1(src->tiling, dst->tiling, 32);
> +		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
> +		dword1 = fast_copy_dword1(src->tiling ?
> +					  I915_TILING_Yf : I915_TILING_NONE,
> +					  dst->tiling ?
> +					  I915_TILING_Yf : I915_TILING_NONE,
> +					  32);
>  		batch[i++] = dword1 | pitch;
>  	} else {
>  		batch[i] = (XY_SRC_COPY_BLT_CMD |
> -- 
> 2.25.1
> 

Re: [igt-dev] [PATCH i-g-t v3 7/8] lib/intel_cmds_info: Reorder blt_tiling_type enum

[Zbigniew Kempczyński]

On Tue, Mar 14, 2023 at 03:44:39PM +0100, Karolina Stolarek wrote:
> Move Yf Major up so it follows the order of tiling definitions
> in intel_batchbuffer.h
> 
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>  lib/i915/intel_cmds_info.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/lib/i915/intel_cmds_info.h b/lib/i915/intel_cmds_info.h
> index 57e34c4b..9af2f2d9 100644
> --- a/lib/i915/intel_cmds_info.h
> +++ b/lib/i915/intel_cmds_info.h
> @@ -13,8 +13,8 @@ enum blt_tiling_type {
>  	T_XMAJOR,
>  	T_YMAJOR,
>  	T_TILE4,
> -	T_TILE64,
>  	T_YFMAJOR,
> +	T_TILE64,
>  	__BLT_MAX_TILING
>  };
>  
> -- 
> 2.25.1
> 

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

Re: [igt-dev] [PATCH i-g-t v3 8/8] tests/gem_blits: Use intel_cmds_info library

[Zbigniew Kempczyński]

On Tue, Mar 14, 2023 at 03:44:40PM +0100, Karolina Stolarek wrote:
> Update the test to use blt_tiling_type values. Make it skip
> if a copy command doesn't support a specific tiling format.
> 
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>  lib/i915/i915_blt.c    |  6 ++++
>  tests/i915/gem_blits.c | 66 +++++++++++++++++++++++++-----------------
>  2 files changed, 46 insertions(+), 26 deletions(-)
> 
> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
> index 13105820..ef67fe26 100644
> --- a/lib/i915/i915_blt.c
> +++ b/lib/i915/i915_blt.c
> @@ -16,6 +16,12 @@
>  #define BITRANGE(start, end) (end - start + 1)
>  #define GET_CMDS_INFO(__fd) intel_get_cmds_info(intel_get_drm_devid(__fd))
>  
> +/* Blitter tiling definitions sanity checks */
> +static_assert(T_LINEAR == I915_TILING_NONE, "Linear definitions have to match");
> +static_assert(T_XMAJOR == I915_TILING_X, "TileX definitions have to match");
> +static_assert(T_YMAJOR == I915_TILING_Y, "TileY definitions have to match");
> +static_assert(T_YFMAJOR == I915_TILING_Yf, "TileYf definitions have to match");
> +
>  enum blt_special_mode {
>  	SM_NONE,
>  	SM_FULL_RESOLVE,
> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
> index b38d6c7e..4aa8624c 100644
> --- a/tests/i915/gem_blits.c
> +++ b/tests/i915/gem_blits.c
> @@ -72,7 +72,7 @@ get_tiling_stride(const struct device *device,
>  	if (tiling) {
>  		if (device->gen < 3)
>  			stride = ALIGN(stride, 128);
> -		else if (device->gen < 4 || tiling == I915_TILING_X)
> +		else if (device->gen < 4 || tiling == T_XMAJOR)
>  			stride = ALIGN(stride, 512);
>  		else
>  			stride = ALIGN(stride, 128);
> @@ -96,7 +96,7 @@ get_tiling_height(const struct device *device,
>  
>  	if (device->gen < 3)
>  		return ALIGN(height, 16);
> -	else if (device->gen < 4 || tiling == I915_TILING_X)
> +	else if (device->gen < 4 || tiling == T_XMAJOR)
>  		return ALIGN(height, 8);
>  	else
>  		return ALIGN(height, 32);
> @@ -117,8 +117,8 @@ static struct buffer *buffer_create(const struct device *device,
>  	buffer->width = width;
>  	buffer->height = height;
>  
> -	buffer->tiling = I915_TILING_NONE;
> -	buffer->stride = get_tiling_stride(device, width, I915_TILING_NONE);
> +	buffer->tiling = T_LINEAR;
> +	buffer->stride = get_tiling_stride(device, width, T_LINEAR);
>  	buffer->size = ALIGN(buffer->stride * height, 4096);
>  	buffer->handle = gem_create(device->fd, buffer->size);
>  	buffer->caching = device->llc;
> @@ -196,16 +196,16 @@ static void buffer_set_tiling(const struct device *device,
>  
>  	i = 0;
>  
> -	if ((tiling | buffer->tiling) >= I915_TILING_Y) {
> +	if ((tiling | buffer->tiling) >= T_YMAJOR) {
>  		unsigned int mask;
>  
>  		batch[i++] = MI_LOAD_REGISTER_IMM(1);
>  		batch[i++] = BCS_SWCTRL;
>  
>  		mask = (BCS_SRC_Y | BCS_DST_Y) << 16;
> -		if (buffer->tiling == I915_TILING_Y)
> +		if (buffer->tiling == T_YMAJOR)
>  			mask |= BCS_SRC_Y;
> -		if (tiling == I915_TILING_Y)
> +		if (tiling == T_YMAJOR)
>  			mask |= BCS_DST_Y;
>  		batch[i++] = mask;
>  	}
> @@ -218,9 +218,9 @@ static void buffer_set_tiling(const struct device *device,
>  		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
>  		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
>  		dword1 = fast_copy_dword1(buffer->tiling ?
> -					  I915_TILING_Yf : I915_TILING_NONE,
> +					  T_YFMAJOR : T_LINEAR,
>  					  tiling ?
> -					  I915_TILING_Yf : I915_TILING_NONE,
> +					  T_YFMAJOR : T_LINEAR,
>  					  32);
>  		batch[i++] = dword1 | pitch;
>  	} else {
> @@ -258,7 +258,7 @@ static void buffer_set_tiling(const struct device *device,
>  	if (has_64b_reloc)
>  		batch[i++] = obj[1].offset >> 32;
>  
> -	if ((tiling | buffer->tiling) >= I915_TILING_Y) {
> +	if ((tiling | buffer->tiling) >= T_YMAJOR) {
>  		igt_assert(device->gen >= 6);
>  		batch[i++] = MI_FLUSH_DW_CMD | 2;
>  		batch[i++] = 0;
> @@ -353,14 +353,14 @@ static bool blit_to_linear(const struct device *device,
>  
>  	batch = gem_mmap__cpu(device->fd, obj[2].handle, 0, 4096, PROT_WRITE);
>  
> -	if (buffer->tiling >= I915_TILING_Y) {
> +	if (buffer->tiling >= T_YMAJOR) {
>  		unsigned int mask;
>  
>  		batch[i++] = MI_LOAD_REGISTER_IMM(1);
>  		batch[i++] = BCS_SWCTRL;
>  
>  		mask = (BCS_SRC_Y | BCS_DST_Y) << 16;
> -		if (buffer->tiling == I915_TILING_Y)
> +		if (buffer->tiling == T_YMAJOR)
>  			mask |= BCS_SRC_Y;
>  		batch[i++] = mask;
>  	}
> @@ -369,7 +369,7 @@ static bool blit_to_linear(const struct device *device,
>  		batch[i++] = fast_copy_dword0(buffer->tiling, 0);
>  		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
>  		dword1 = fast_copy_dword1(buffer->tiling ?
> -					  I915_TILING_Yf : I915_TILING_NONE,
> +					  T_YFMAJOR : T_LINEAR,
>  					  0, 32);
>  		batch[i++] = dword1 | buffer->stride;
>  	} else {
> @@ -405,7 +405,7 @@ static bool blit_to_linear(const struct device *device,
>  	if (has_64b_reloc)
>  		batch[i++] = obj[1].offset >> 32;
>  
> -	if (buffer->tiling >= I915_TILING_Y) {
> +	if (buffer->tiling >= T_YMAJOR) {
>  		igt_assert(device->gen >= 6);
>  		batch[i++] = MI_FLUSH_DW_CMD | 2;
>  		batch[i++] = 0;
> @@ -693,16 +693,16 @@ blit(const struct device *device,
>  	}
>  	batch = gem_mmap__cpu(device->fd, obj[2].handle, 0, 4096, PROT_WRITE);
>  
> -	if ((src->tiling | dst->tiling) >= I915_TILING_Y) {
> +	if ((src->tiling | dst->tiling) >= T_YMAJOR) {
>  		unsigned int mask;
>  
>  		batch[i++] = MI_LOAD_REGISTER_IMM(1);
>  		batch[i++] = BCS_SWCTRL;
>  
>  		mask = (BCS_SRC_Y | BCS_DST_Y) << 16;
> -		if (src->tiling == I915_TILING_Y)
> +		if (src->tiling == T_YMAJOR)
>  			mask |= BCS_SRC_Y;
> -		if (dst->tiling == I915_TILING_Y)
> +		if (dst->tiling == T_YMAJOR)
>  			mask |= BCS_DST_Y;
>  		batch[i++] = mask;
>  	}
> @@ -715,9 +715,9 @@ blit(const struct device *device,
>  		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
>  		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
>  		dword1 = fast_copy_dword1(src->tiling ?
> -					  I915_TILING_Yf : I915_TILING_NONE,
> +					  T_YFMAJOR : T_LINEAR,
>  					  dst->tiling ?
> -					  I915_TILING_Yf : I915_TILING_NONE,
> +					  T_YFMAJOR : T_LINEAR,
>  					  32);
>  		batch[i++] = dword1 | pitch;
>  	} else {
> @@ -755,7 +755,7 @@ blit(const struct device *device,
>  	if (has_64b_reloc)
>  		batch[i++] = obj[1].offset >> 32;
>  
> -	if ((src->tiling | dst->tiling) >= I915_TILING_Y) {
> +	if ((src->tiling | dst->tiling) >= T_YMAJOR) {
>  		igt_assert(device->gen >= 6);
>  		batch[i++] = MI_FLUSH_DW_CMD | 2;
>  		batch[i++] = 0;
> @@ -803,6 +803,15 @@ static int start_at(int x, enum start s)
>  	}
>  }
>  
> +static bool blit_supports_tiling(int fd, enum blt_tiling_type tiling)
> +{
> +	if (blt_has_xy_src_copy(fd))
> +		return blt_xy_src_copy_supports_tiling(fd, tiling);
> +
> +	/* Test is run on newer platform, so check fast-copy support instead */
> +	return blt_fast_copy_supports_tiling(fd, tiling);
> +}
> +
>  igt_main
>  {
>  	struct device device;
> @@ -835,15 +844,20 @@ igt_main
>  								    width * 16, height * 4);
>  
>  						y = start_at(height, y0);
> -						for (unsigned int src_tiling = I915_TILING_NONE;
> -						     src_tiling <= (device.gen >= 6 ? I915_TILING_Y : I915_TILING_X);
> -						     src_tiling++) {
> +
> +						for (unsigned int src_tiling = T_LINEAR;
> +						     src_tiling <= T_YMAJOR; src_tiling++) {
> +							if (!blit_supports_tiling(device.fd, src_tiling))
> +								continue;
> +
>  							buffer_set_tiling(&device, src, src_tiling);
>  
>  							x = start_at(width, x0);
> -							for (unsigned int dst_tiling = I915_TILING_NONE;
> -							     dst_tiling <= (device.gen >= 6 ? I915_TILING_Y : I915_TILING_X);
> -							     dst_tiling++) {
> +							for (unsigned int dst_tiling = T_LINEAR;
> +							     dst_tiling <= T_YMAJOR; dst_tiling++) {
> +								if (!blit_supports_tiling(device.fd, dst_tiling))
> +									continue;
> +
>  								buffer_set_tiling(&device, dst, dst_tiling);
>  
>  								for (enum mode down = CPU; down <= WC; down++) {
> -- 
> 2.25.1
> 

Ok, this looks good:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

Re: [igt-dev] [PATCH i-g-t v3 6/8] tests/i915/gem_blits: Add XY_FAST_COPY_BLT support for gem_blits

[Karolina Stolarek]

On 15.03.2023 11:49, Zbigniew Kempczyński wrote:
> On Tue, Mar 14, 2023 at 03:44:38PM +0100, Karolina Stolarek wrote:
>> From: Arjun Melkaveri <arjun.melkaveri@intel.com>
>>
>> Test case uses legacy command XY_SRC_COPY_BLT_CMD which is not supported
>> on newer generations. Modify test to use XY_FAST_COPY_BLT.
> 
> Description doesn't match the patch.

Huh, you're right, that's an oversight on my part. Will correct it in 
the next version.

> 
>>
>> Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
>> Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
>> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
>> Cc: Nirmoy Das <nirmoy.das@intel.com>
>> Cc: Andi Shyti <andi.shyti@linux.intel.com>
>> ---
>>   tests/i915/gem_blits.c | 21 +++++++++++++++++----
>>   1 file changed, 17 insertions(+), 4 deletions(-)
>>
>> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
>> index e5ef3662..b38d6c7e 100644
>> --- a/tests/i915/gem_blits.c
>> +++ b/tests/i915/gem_blits.c
>> @@ -216,7 +216,12 @@ static void buffer_set_tiling(const struct device *device,
>>   
>>   	if (!blt_has_xy_src_copy(device->fd)) {
>>   		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
>> -		dword1 = fast_copy_dword1(buffer->tiling, tiling, 32);
>> +		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
>> +		dword1 = fast_copy_dword1(buffer->tiling ?
>> +					  I915_TILING_Yf : I915_TILING_NONE,
>> +					  tiling ?
>> +					  I915_TILING_Yf : I915_TILING_NONE,
>> +					  32);
>>   		batch[i++] = dword1 | pitch;
>>   	} else {
>>   		batch[i] = (XY_SRC_COPY_BLT_CMD |
>> @@ -361,8 +366,11 @@ static bool blit_to_linear(const struct device *device,
>>   	}
>>   
>>   	if (!blt_has_xy_src_copy(device->fd)) {
>> -		batch[i++] = fast_copy_dword0(buffer->tiling, I915_TILING_NONE);
>> -		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE, 32);
>> +		batch[i++] = fast_copy_dword0(buffer->tiling, 0);
>> +		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
>> +		dword1 = fast_copy_dword1(buffer->tiling ?
>> +					  I915_TILING_Yf : I915_TILING_NONE,
>> +					  0, 32);
> 
> Is that comment adequate to fast_copy_dword1()? Where's tile4 bit set in this patch?

In dw1, we set bits 31 and 30 to specify if we're using new TileY format 
(i.e. Tile4). MTL doesn't support the legacy format, so we have to 
override it here. Come to think of it, we could write something like:

dword1 = fast_copy_dword1(src->tiling == T_YMAJOR,
			  dst->tiling == T_YMAJOR, 32);

to set the required bits.

Thoughts?


All the best,
Karolina
> 
> --
> Zbigniew
> 
> 
>>   		batch[i++] = dword1 | buffer->stride;
>>   	} else {
>>   		batch[i] = (XY_SRC_COPY_BLT_CMD |
>> @@ -705,7 +713,12 @@ blit(const struct device *device,
>>   
>>   	if (!blt_has_xy_src_copy(device->fd)) {
>>   		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
>> -		dword1 = fast_copy_dword1(src->tiling, dst->tiling, 32);
>> +		/* Post ATS-M platforms require tile4 bit to be set for YMAJOR mode */
>> +		dword1 = fast_copy_dword1(src->tiling ?
>> +					  I915_TILING_Yf : I915_TILING_NONE,
>> +					  dst->tiling ?
>> +					  I915_TILING_Yf : I915_TILING_NONE,
>> +					  32);
>>   		batch[i++] = dword1 | pitch;
>>   	} else {
>>   		batch[i] = (XY_SRC_COPY_BLT_CMD |
>> -- 
>> 2.25.1
>>

[igt-dev] ✓ Fi.CI.IGT: success for Update gem_blits for newer generations (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 28061 bytes --]

== Series Details ==

Series: Update gem_blits for newer generations (rev3)
URL   : https://patchwork.freedesktop.org/series/114776/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12857_full -> IGTPW_8605_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/index.html

Participating hosts (8 -> 7)
------------------------------

  Missing    (1): shard-tglu0 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_8605_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_suspend@basic-s3-without-i915:
    - {shard-tglu}:       NOTRUN -> [INCOMPLETE][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-tglu-7/igt@i915_suspend@basic-s3-without-i915.html

  * {igt@kms_plane@invalid-pixel-format-settings}:
    - {shard-tglu}:       [PASS][2] -> [SKIP][3]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-tglu-3/igt@kms_plane@invalid-pixel-format-settings.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-tglu-10/igt@kms_plane@invalid-pixel-format-settings.html

  * {igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-0-25}:
    - {shard-tglu}:       NOTRUN -> [SKIP][4] +1 similar issue
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-tglu-10/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-0-25.html

  
Known issues
------------

  Here are the changes found in IGTPW_8605_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-glk:          [PASS][5] -> [FAIL][6] ([i915#2842])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-glk6/igt@gem_exec_fair@basic-throttle@rcs0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-glk8/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_exec_reloc@basic-wc-gtt-active:
    - shard-apl:          [PASS][7] -> [DMESG-WARN][8] ([i915#62]) +24 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-apl3/igt@gem_exec_reloc@basic-wc-gtt-active.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-apl6/igt@gem_exec_reloc@basic-wc-gtt-active.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-apl:          [PASS][9] -> [FAIL][10] ([i915#2346])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-glk:          [PASS][11] -> [FAIL][12] ([i915#2346])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][13] -> [FAIL][14] ([i915#79]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
    - shard-apl:          [PASS][15] -> [DMESG-WARN][16] ([i915#1982] / [i915#62])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-apl6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-apl6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite.html

  
#### Possible fixes ####

  * igt@device_reset@unbind-reset-rebind:
    - {shard-rkl}:        [FAIL][17] ([i915#4778]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-5/igt@device_reset@unbind-reset-rebind.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-2/igt@device_reset@unbind-reset-rebind.html

  * igt@drm_fdinfo@idle@rcs0:
    - {shard-rkl}:        [FAIL][19] ([i915#7742]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-1/igt@drm_fdinfo@idle@rcs0.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-6/igt@drm_fdinfo@idle@rcs0.html

  * igt@fbdev@nullptr:
    - {shard-rkl}:        [SKIP][21] ([i915#2582]) -> [PASS][22] +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-2/igt@fbdev@nullptr.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-6/igt@fbdev@nullptr.html

  * igt@feature_discovery@psr2:
    - {shard-rkl}:        [SKIP][23] ([i915#658]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-4/igt@feature_discovery@psr2.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-6/igt@feature_discovery@psr2.html

  * igt@gem_ctx_exec@basic-nohangcheck:
    - {shard-rkl}:        [FAIL][25] ([i915#6268]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-4/igt@gem_ctx_exec@basic-nohangcheck.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-2/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_ctx_persistence@engines-hang@bcs0:
    - {shard-rkl}:        [SKIP][27] ([i915#6252]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-5/igt@gem_ctx_persistence@engines-hang@bcs0.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-1/igt@gem_ctx_persistence@engines-hang@bcs0.html

  * igt@gem_eio@kms:
    - {shard-dg1}:        [FAIL][29] ([i915#5784]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-dg1-15/igt@gem_eio@kms.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-dg1-14/igt@gem_eio@kms.html

  * igt@gem_exec_fair@basic-deadline:
    - {shard-rkl}:        [FAIL][31] ([i915#2846]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-2/igt@gem_exec_fair@basic-deadline.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - {shard-tglu}:       [FAIL][33] ([i915#2842]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-tglu-3/igt@gem_exec_fair@basic-none-share@rcs0.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-tglu-3/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [FAIL][35] ([i915#2842]) -> [PASS][36] +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-glk3/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - {shard-rkl}:        [FAIL][37] ([i915#2842]) -> [PASS][38] +5 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-4/igt@gem_exec_fair@basic-pace@rcs0.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-5/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_reloc@basic-write-read-active:
    - {shard-rkl}:        [SKIP][39] ([i915#3281]) -> [PASS][40] +6 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-1/igt@gem_exec_reloc@basic-write-read-active.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-5/igt@gem_exec_reloc@basic-write-read-active.html

  * igt@gem_userptr_blits@forbidden-operations:
    - {shard-rkl}:        [SKIP][41] ([i915#3282]) -> [PASS][42] +5 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-6/igt@gem_userptr_blits@forbidden-operations.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-5/igt@gem_userptr_blits@forbidden-operations.html

  * igt@gen9_exec_parse@bb-chained:
    - {shard-rkl}:        [SKIP][43] ([i915#2527]) -> [PASS][44] +2 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-1/igt@gen9_exec_parse@bb-chained.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-5/igt@gen9_exec_parse@bb-chained.html

  * igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
    - {shard-rkl}:        [SKIP][45] ([i915#1397]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-2/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-6/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@i915_selftest@live@dmabuf:
    - shard-apl:          [DMESG-FAIL][47] ([i915#7562]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-apl2/igt@i915_selftest@live@dmabuf.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-apl6/igt@i915_selftest@live@dmabuf.html

  * igt@kms_atomic@atomic_plane_damage:
    - {shard-rkl}:        [SKIP][49] ([i915#4098]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-2/igt@kms_atomic@atomic_plane_damage.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-6/igt@kms_atomic@atomic_plane_damage.html

  * igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs:
    - {shard-rkl}:        [SKIP][51] ([i915#1845] / [i915#4098]) -> [PASS][52] +17 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-1/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-6/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs.html

  * igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs:
    - {shard-tglu}:       [SKIP][53] ([i915#1845] / [i915#7651]) -> [PASS][54] +27 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-tglu-9/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-tglu-3/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-apl:          [FAIL][55] ([i915#2346]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-apl:          [FAIL][57] ([i915#4767]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-apl6/igt@kms_fbcon_fbt@fbc-suspend.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_fence_pin_leak:
    - {shard-tglu}:       [SKIP][59] ([fdo#109274] / [i915#1845]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-tglu-9/igt@kms_fence_pin_leak.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-tglu-8/igt@kms_fence_pin_leak.html

  * igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
    - {shard-rkl}:        [SKIP][61] ([i915#1849] / [i915#4098]) -> [PASS][62] +14 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-linear:
    - {shard-tglu}:       [SKIP][63] ([i915#1849]) -> [PASS][64] +6 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-tglu-9/igt@kms_frontbuffer_tracking@fbc-tiling-linear.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-tglu-8/igt@kms_frontbuffer_tracking@fbc-tiling-linear.html

  * igt@kms_plane@plane-panning-bottom-right@pipe-a-planes:
    - {shard-rkl}:        [SKIP][65] ([i915#1849]) -> [PASS][66] +3 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-1/igt@kms_plane@plane-panning-bottom-right@pipe-a-planes.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-6/igt@kms_plane@plane-panning-bottom-right@pipe-a-planes.html

  * igt@kms_psr@cursor_render:
    - {shard-rkl}:        [SKIP][67] ([i915#1072]) -> [PASS][68] +1 similar issue
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-1/igt@kms_psr@cursor_render.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-6/igt@kms_psr@cursor_render.html

  * igt@kms_rotation_crc@cursor-rotation-180:
    - {shard-tglu}:       [SKIP][69] ([i915#1845]) -> [PASS][70] +1 similar issue
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-tglu-9/igt@kms_rotation_crc@cursor-rotation-180.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-tglu-4/igt@kms_rotation_crc@cursor-rotation-180.html

  * igt@kms_universal_plane@cursor-fb-leak-pipe-a:
    - {shard-rkl}:        [SKIP][71] ([i915#1845] / [i915#4070] / [i915#4098]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-2/igt@kms_universal_plane@cursor-fb-leak-pipe-a.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-6/igt@kms_universal_plane@cursor-fb-leak-pipe-a.html

  * igt@kms_universal_plane@universal-plane-pipe-d-functional:
    - {shard-tglu}:       [SKIP][73] ([fdo#109274]) -> [PASS][74] +1 similar issue
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-tglu-9/igt@kms_universal_plane@universal-plane-pipe-d-functional.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-tglu-8/igt@kms_universal_plane@universal-plane-pipe-d-functional.html

  * igt@prime_self_import@basic-with_one_bo:
    - {shard-rkl}:        [SKIP][75] ([fdo#109315]) -> [PASS][76] +3 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-5/igt@prime_self_import@basic-with_one_bo.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-2/igt@prime_self_import@basic-with_one_bo.html

  * igt@prime_vgem@basic-read:
    - {shard-rkl}:        [SKIP][77] ([fdo#109295] / [i915#3291] / [i915#3708]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-4/igt@prime_vgem@basic-read.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-5/igt@prime_vgem@basic-read.html

  * igt@prime_vgem@coherency-gtt:
    - {shard-rkl}:        [SKIP][79] ([fdo#109295] / [fdo#111656] / [i915#3708]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-2/igt@prime_vgem@coherency-gtt.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-5/igt@prime_vgem@coherency-gtt.html

  * igt@syncobj_timeline@wait-all-for-submit-delayed-submit:
    - {shard-rkl}:        [SKIP][81] ([i915#2575]) -> [PASS][82] +2 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-rkl-5/igt@syncobj_timeline@wait-all-for-submit-delayed-submit.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-rkl-3/igt@syncobj_timeline@wait-all-for-submit-delayed-submit.html

  * igt@sysfs_heartbeat_interval@precise@vcs0:
    - {shard-dg1}:        [FAIL][83] ([i915#1755]) -> [PASS][84] +2 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12857/shard-dg1-15/igt@sysfs_heartbeat_interval@precise@vcs0.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/shard-dg1-14/igt@sysfs_heartbeat_interval@precise@vcs0.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
  [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
  [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
  [i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
  [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
  [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
  [i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
  [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
  [i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
  [i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
  [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
  [i915#4036]: https://gitlab.freedesktop.org/drm/intel/issues/4036
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
  [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4778]: https://gitlab.freedesktop.org/drm/intel/issues/4778
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879
  [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
  [i915#4936]: https://gitlab.freedesktop.org/drm/intel/issues/4936
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
  [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
  [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
  [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
  [i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
  [i915#6355]: https://gitlab.freedesktop.org/drm/intel/issues/6355
  [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
  [i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
  [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
  [i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
  [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
  [i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
  [i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128
  [i915#7294]: https://gitlab.freedesktop.org/drm/intel/issues/7294
  [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
  [i915#7562]: https://gitlab.freedesktop.org/drm/intel/issues/7562
  [i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
  [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
  [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
  [i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#7949]: https://gitlab.freedesktop.org/drm/intel/issues/7949
  [i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957
  [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
  [i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
  [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
  [i915#8273]: https://gitlab.freedesktop.org/drm/intel/issues/8273
  [i915#8282]: https://gitlab.freedesktop.org/drm/intel/issues/8282


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7194 -> IGTPW_8605
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_12857: 004fefbbf160569f80946d1e516d538b7ecb04f2 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8605: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/index.html
  IGT_7194: d22d66efd6211a22d301649b63d58c8c293e0817 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8605/index.html

[-- Attachment #2: Type: text/html, Size: 22333 bytes --]