[RFC PATCH 00/15] eMMC support

[RFC PATCH 00/15] eMMC support

[Sai Pavan Boddu]

Hi,

This patch series add support for eMMC cards. This work was previosly
submitted by Vincent, rebased few changes on top.

Cedric & Joel has helped to added boot partition access support. I
expect them to make a follow-up series to use it with aspeed machines.

Present series adds eMMC support to Versal SOC.

Regards,
Sai Pavan

Cédric Le Goater (1):
  sd: emmc: Add Extended CSD register definitions

Joel Stanley (2):
  sd: emmc: Support boot area in emmc image
  sd: emmc: Subtract bootarea size from blk

Sai Pavan Boddu (10):
  sd: emmc: Dont not update CARD_CAPACITY for eMMC cards
  sd: emmc: Update CMD1 definition for eMMC
  sd: emmc: support idle state in CMD2
  sd: emmc: Add mmc switch function support
  sd: emmc: add CMD21 tuning sequence
  sd: emmc: Make ACMD41 illegal for mmc
  sd: emmc: Add support for emmc erase
  sd: emmc: Update CID structure for eMMC
  sd: sdhci: Support eMMC devices
  arm: xlnx-versal: Add emmc to versal

Vincent Palatin (2):
  block: add eMMC block device type
  sd: add eMMC support

 blockdev.c                |   1 +
 hw/arm/xlnx-versal-virt.c |  16 +-
 hw/arm/xlnx-versal.c      |  14 +-
 hw/sd/sd.c                | 369 ++++++++++++++++++++++++++++++++++++++++------
 hw/sd/sdhci.c             |   4 -
 hw/sd/sdmmc-internal.c    |   2 +-
 hw/sd/sdmmc-internal.h    |  97 ++++++++++++
 include/sysemu/blockdev.h |   1 +
 8 files changed, 445 insertions(+), 59 deletions(-)

-- 
2.7.4

[RFC PATCH 01/15] block: add eMMC block device type

[Sai Pavan Boddu]

From: Vincent Palatin <vpalatin@chromium.org>

Add new block device type.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
[SPB: Rebased over 5.1 version]
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 blockdev.c                | 1 +
 include/sysemu/blockdev.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/blockdev.c b/blockdev.c
index b250b9b..593ce44 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -83,6 +83,7 @@ static const char *const if_name[IF_COUNT] = {
     [IF_SD] = "sd",
     [IF_VIRTIO] = "virtio",
     [IF_XEN] = "xen",
+    [IF_EMMC] = "emmc",
 };
 
 static int if_max_devs[IF_COUNT] = {
diff --git a/include/sysemu/blockdev.h b/include/sysemu/blockdev.h
index 3b5fcda..eefae9f 100644
--- a/include/sysemu/blockdev.h
+++ b/include/sysemu/blockdev.h
@@ -24,6 +24,7 @@ typedef enum {
      */
     IF_NONE = 0,
     IF_IDE, IF_SCSI, IF_FLOPPY, IF_PFLASH, IF_MTD, IF_SD, IF_VIRTIO, IF_XEN,
+    IF_EMMC,
     IF_COUNT
 } BlockInterfaceType;
 
-- 
2.7.4

[RFC PATCH 02/15] sd: add eMMC support

[Sai Pavan Boddu]

From: Vincent Palatin <vpalatin@chromium.org>

The parameters mimick a real 4GB eMMC, but it can be set to various
sizes.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
[SPB: Rebased the patch over qemu 5.1,
      Mark eMMC to support all timing modes]
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 hw/sd/sd.c             | 143 +++++++++++++++++++++++++++++++++++++++++--------
 hw/sd/sdmmc-internal.c |   2 +-
 2 files changed, 122 insertions(+), 23 deletions(-)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 8517dbc..a75fa1c 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -108,6 +108,7 @@ struct SDState {
     uint8_t spec_version;
     BlockBackend *blk;
     bool spi;
+    bool emmc;
 
     /* Runtime changeables */
 
@@ -134,6 +135,7 @@ struct SDState {
     uint64_t data_start;
     uint32_t data_offset;
     uint8_t data[512];
+    uint8_t ext_csd[512];
     qemu_irq readonly_cb;
     qemu_irq inserted_cb;
     QEMUTimer *ocr_power_timer;
@@ -287,7 +289,8 @@ FIELD(OCR, CARD_POWER_UP,              31,  1)
                                | R_OCR_ACCEPT_SWITCH_1V8_MASK \
                                | R_OCR_UHS_II_CARD_MASK \
                                | R_OCR_CARD_CAPACITY_MASK \
-                               | R_OCR_CARD_POWER_UP_MASK)
+                               | R_OCR_CARD_POWER_UP_MASK \
+                               | R_OCR_DUAL_VOLTAGE_CARD_MASK)
 
 static void sd_set_ocr(SDState *sd)
 {
@@ -371,6 +374,51 @@ static const uint8_t sd_csd_rw_mask[16] = {
     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfe,
 };
 
+static void mmc_set_ext_csd(SDState *sd, uint64_t size)
+{
+    uint32_t sectcount = size >> HWBLOCK_SHIFT;
+
+    memset(sd->ext_csd, 0, 512);
+    sd->ext_csd[504] = 0x1; /* supported command sets */
+    sd->ext_csd[503] = 0x1; /* HPI features  */
+    sd->ext_csd[502] = 0x1; /* Background operations support */
+    sd->ext_csd[241] = 0xA; /* 1st initialization time after partitioning */
+    sd->ext_csd[232] = 0x1; /* Trim multiplier */
+    sd->ext_csd[231] = 0x15; /* Secure feature support */
+    sd->ext_csd[230] = 0x96; /* Secure erase support */
+    sd->ext_csd[229] = 0x96; /* Secure TRIM multiplier */
+    sd->ext_csd[228] = 0x7; /* Boot information */
+    sd->ext_csd[226] = 0x8; /* Boot partition size */
+    sd->ext_csd[225] = 0x6; /* Access size */
+    sd->ext_csd[224] = 0x4; /* HC Erase unit size */
+    sd->ext_csd[223] = 0x1; /* HC erase timeout */
+    sd->ext_csd[222] = 0x1; /* Reliable write sector count */
+    sd->ext_csd[221] = 0x4; /* HC write protect group size */
+    sd->ext_csd[220] = 0x8; /* Sleep current VCC  */
+    sd->ext_csd[219] = 0x7; /* Sleep current VCCQ */
+    sd->ext_csd[217] = 0x11; /* Sleep/Awake timeout */
+    sd->ext_csd[215] = (sectcount >> 24) & 0xff; /* Sector count */
+    sd->ext_csd[214] = (sectcount >> 16) & 0xff; /* ... */
+    sd->ext_csd[213] = (sectcount >> 8) & 0xff;  /* ... */
+    sd->ext_csd[212] = (sectcount & 0xff);       /* ... */
+    sd->ext_csd[210] = 0xa; /* Min write perf for 8bit@52Mhz */
+    sd->ext_csd[209] = 0xa; /* Min read perf for 8bit@52Mhz  */
+    sd->ext_csd[208] = 0xa; /* Min write perf for 4bit@52Mhz */
+    sd->ext_csd[207] = 0xa; /* Min read perf for 4bit@52Mhz */
+    sd->ext_csd[206] = 0xa; /* Min write perf for 4bit@26Mhz */
+    sd->ext_csd[205] = 0xa; /* Min read perf for 4bit@26Mhz */
+    sd->ext_csd[199] = 0x1; /* Partition switching timing */
+    sd->ext_csd[198] = 0x1; /* Out-of-interrupt busy timing */
+    sd->ext_csd[196] = 0xFF; /* Card type */
+    sd->ext_csd[194] = 0x2; /* CSD Structure version */
+    sd->ext_csd[192] = 0x5; /* Extended CSD revision */
+    sd->ext_csd[168] = 0x1; /* RPMB size */
+    sd->ext_csd[160] = 0x3; /* Partinioning support */
+    sd->ext_csd[159] = 0x00; /* Max enhanced area size */
+    sd->ext_csd[158] = 0x00; /* ... */
+    sd->ext_csd[157] = 0xEC; /* ... */
+}
+
 static void sd_set_csd(SDState *sd, uint64_t size)
 {
     int hwblock_shift = HWBLOCK_SHIFT;
@@ -384,7 +432,34 @@ static void sd_set_csd(SDState *sd, uint64_t size)
     }
     csize = (size >> (CMULT_SHIFT + hwblock_shift)) - 1;
 
-    if (size <= SDSC_MAX_CAPACITY) { /* Standard Capacity SD */
+    if (sd->emmc) { /* eMMC */
+        sd->csd[0] = 0xd0;
+        sd->csd[1] = 0x0f;
+        sd->csd[2] = 0x00;
+        sd->csd[3] = 0x32;
+        sd->csd[4] = 0x0f;
+        if (size <= 0x80000000ULL) {
+            /* use 1k blocks */
+            uint32_t csize1k = (size >> (CMULT_SHIFT + 10)) - 1;
+            sd->csd[5] = 0x5a;
+            sd->csd[6] = 0x80 | ((csize1k >> 10) & 0xf);
+            sd->csd[7] = (csize1k >> 2) & 0xff;
+        } else { /* >= 2GB : size stored in ext CSD, block addressing */
+            sd->csd[5] = 0x59;
+            sd->csd[6] = 0x8f;
+            sd->csd[7] = 0xff;
+            sd->ocr |= 1 << 30;
+        }
+        sd->csd[8] = 0xff;
+        sd->csd[9] = 0xff;
+        sd->csd[10] = 0xf7;
+        sd->csd[11] = 0xfe;
+        sd->csd[12] = 0x49;
+        sd->csd[13] = 0x10;
+        sd->csd[14] = 0x00;
+        sd->csd[15] = (sd_crc7(sd->csd, 15) << 1) | 1;
+        mmc_set_ext_csd(sd, size);
+    } else if (size <= SDSC_MAX_CAPACITY) { /* Standard Capacity SD */
         sd->csd[0] = 0x00;	/* CSD structure */
         sd->csd[1] = 0x26;	/* Data read access-time-1 */
         sd->csd[2] = 0x00;	/* Data read access-time-2 */
@@ -431,9 +506,13 @@ static void sd_set_csd(SDState *sd, uint64_t size)
     sd->csd[15] = (sd_crc7(sd->csd, 15) << 1) | 1;
 }
 
-static void sd_set_rca(SDState *sd)
+static void sd_set_rca(SDState *sd, uint16_t value)
 {
-    sd->rca += 0x4567;
+    if (sd->emmc) {
+        sd->rca = value;
+    } else {
+        sd->rca += 0x4567;
+    }
 }
 
 FIELD(CSR, AKE_SEQ_ERROR,               3,  1)
@@ -979,8 +1058,8 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
         case sd_identification_state:
         case sd_standby_state:
             sd->state = sd_standby_state;
-            sd_set_rca(sd);
-            return sd_r6;
+            sd_set_rca(sd, req.arg >> 16);
+            return sd->emmc ? sd_r1 : sd_r6;
 
         default:
             break;
@@ -1054,24 +1133,37 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
         }
         break;
 
-    case 8:	/* CMD8:   SEND_IF_COND */
-        if (sd->spec_version < SD_PHY_SPECv2_00_VERS) {
-            break;
-        }
-        if (sd->state != sd_idle_state) {
-            break;
-        }
-        sd->vhs = 0;
-
-        /* No response if not exactly one VHS bit is set.  */
-        if (!(req.arg >> 8) || (req.arg >> (ctz32(req.arg & ~0xff) + 1))) {
-            return sd->spi ? sd_r7 : sd_r0;
-        }
+    case 8:    /* CMD8:   SEND_IF_COND / SEND_EXT_CSD */
+        if (sd->emmc) {
+            switch (sd->state) {
+            case sd_transfer_state:
+                /* MMC : Sends the EXT_CSD register as a Block of data */
+                sd->state = sd_sendingdata_state;
+                memcpy(sd->data, sd->ext_csd, 512);
+                sd->data_start = addr;
+                sd->data_offset = 0;
+                return sd_r1;
+            default:
+                break;
+            }
+        } else {
+            if (sd->spec_version < SD_PHY_SPECv2_00_VERS) {
+                break;
+            }
+            if (sd->state != sd_idle_state) {
+                break;
+            }
+            sd->vhs = 0;
 
-        /* Accept.  */
-        sd->vhs = req.arg;
-        return sd_r7;
+            /* No response if not exactly one VHS bit is set.  */
+            if (!(req.arg >> 8) || (req.arg >> (ctz32(req.arg & ~0xff) + 1))) {
+                return sd->spi ? sd_r7 : sd_r0;
+            }
 
+            /* Accept.  */
+            sd->vhs = req.arg;
+            return sd_r7;
+        }
     case 9:	/* CMD9:   SEND_CSD */
         switch (sd->state) {
         case sd_standby_state:
@@ -1993,7 +2085,13 @@ uint8_t sd_read_byte(SDState *sd)
         if (sd->data_offset >= 64)
             sd->state = sd_transfer_state;
         break;
+    case 8:     /* CMD8: SEND_EXT_CSD on MMC */
+        ret = sd->data[sd->data_offset++];
 
+        if (sd->data_offset >= 512) {
+            sd->state = sd_transfer_state;
+        }
+        break;
     case 9:	/* CMD9:   SEND_CSD */
     case 10:	/* CMD10:  SEND_CID */
         ret = sd->data[sd->data_offset ++];
@@ -2176,6 +2274,7 @@ static Property sd_properties[] = {
      * board to ensure that ssi transfers only occur when the chip select
      * is asserted.  */
     DEFINE_PROP_BOOL("spi", SDState, spi, false),
+    DEFINE_PROP_BOOL("emmc", SDState, emmc, false),
     DEFINE_PROP_END_OF_LIST()
 };
 
diff --git a/hw/sd/sdmmc-internal.c b/hw/sd/sdmmc-internal.c
index 2053def..8648a78 100644
--- a/hw/sd/sdmmc-internal.c
+++ b/hw/sd/sdmmc-internal.c
@@ -14,7 +14,7 @@
 const char *sd_cmd_name(uint8_t cmd)
 {
     static const char *cmd_abbrev[SDMMC_CMD_MAX] = {
-         [0]    = "GO_IDLE_STATE",
+         [0]    = "GO_IDLE_STATE",           [1]    = "SEND_OP_CMD",
          [2]    = "ALL_SEND_CID",            [3]    = "SEND_RELATIVE_ADDR",
          [4]    = "SET_DSR",                 [5]    = "IO_SEND_OP_COND",
          [6]    = "SWITCH_FUNC",             [7]    = "SELECT/DESELECT_CARD",
-- 
2.7.4

[RFC PATCH 03/15] sd: emmc: Dont not update CARD_CAPACITY for eMMC cards

[Sai Pavan Boddu]

OCR.CARD_CAPACITY field is only valid for sd cards, So skip it for eMMC.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 hw/sd/sd.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index a75fa1c..57fff89 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -308,7 +308,8 @@ static void sd_ocr_powerup(void *opaque)
     /* card power-up OK */
     sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_POWER_UP, 1);
 
-    if (sd->size > SDSC_MAX_CAPACITY) {
+    /* eMMC supports only Byte mode */
+    if (!sd->emmc && sd->size > SDSC_MAX_CAPACITY) {
         sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_CAPACITY, 1);
     }
 }
-- 
2.7.4

[RFC PATCH 04/15] sd: emmc: Update CMD1 definition for eMMC

[Sai Pavan Boddu]

Add support to Power up the card and send response r3 in case of eMMC.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 hw/sd/sd.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 57fff89..e3738b2 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1033,8 +1033,16 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
         break;
 
     case 1:	/* CMD1:   SEND_OP_CMD */
-        if (!sd->spi)
+        /* MMC: Powerup & send r3
+         * SD: send r1 in spi mode
+         */
+        if (sd->emmc) {
+            sd_ocr_powerup(sd);
+            return sd->state == sd_idle_state ?
+                   sd_r3 : sd_r0;
+        } else if (!sd->spi) {
             goto bad_cmd;
+        }
 
         sd->state = sd_transfer_state;
         return sd_r1;
-- 
2.7.4

[RFC PATCH 05/15] sd: emmc: support idle state in CMD2

[Sai Pavan Boddu]

eMMC is expected to be in idle-state post CMD1. Ready state is an
intermediate stage which we don't come across in Device identification
mode.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 hw/sd/sd.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index e3738b2..69289e0 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1051,6 +1051,10 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
         if (sd->spi)
             goto bad_cmd;
         switch (sd->state) {
+        case sd_idle_state:
+            if (!sd->emmc) {
+                break;
+            }
         case sd_ready_state:
             sd->state = sd_identification_state;
             return sd_r2_i;
-- 
2.7.4

[RFC PATCH 06/15] sd: emmc: Add mmc switch function support

[Sai Pavan Boddu]

switch operation in eMMC card updates the ext_csd register to
request changes in card operations. Here we implement similar
sequence but requests are mostly dummy and make no change.

Implement SWITCH_ERROR if the write operation extends goes beyond length
of ext_csd.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 hw/sd/sd.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 50 insertions(+), 6 deletions(-)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 69289e0..7925174 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -519,6 +519,7 @@ static void sd_set_rca(SDState *sd, uint16_t value)
 FIELD(CSR, AKE_SEQ_ERROR,               3,  1)
 FIELD(CSR, APP_CMD,                     5,  1)
 FIELD(CSR, FX_EVENT,                    6,  1)
+FIELD(CSR, SWITCH_ERROR,                7,  1)
 FIELD(CSR, READY_FOR_DATA,              8,  1)
 FIELD(CSR, CURRENT_STATE,               9,  4)
 FIELD(CSR, ERASE_RESET,                13,  1)
@@ -878,6 +879,43 @@ static uint32_t sd_wpbits(SDState *sd, uint64_t addr)
     return ret;
 }
 
+enum {
+    MMC_CMD6_ACCESS_COMMAND_SET = 0,
+    MMC_CMD6_ACCESS_SET_BITS,
+    MMC_CMD6_ACCESS_CLEAR_BITS,
+    MMC_CMD6_ACCESS_WRITE_BYTE,
+};
+
+static void mmc_function_switch(SDState *sd, uint32_t arg)
+{
+    uint32_t access = extract32(arg, 24, 2);
+    uint32_t index = extract32(arg, 16, 8);
+    uint32_t value = extract32(arg, 8, 8);
+    uint8_t b = sd->ext_csd[index];
+
+    switch (access) {
+    case MMC_CMD6_ACCESS_COMMAND_SET:
+        qemu_log_mask(LOG_UNIMP, "MMC Command set switching not supported\n");
+        return;
+    case MMC_CMD6_ACCESS_SET_BITS:
+        b |= value;
+        break;
+    case MMC_CMD6_ACCESS_CLEAR_BITS:
+        b &= ~value;
+        break;
+    case MMC_CMD6_ACCESS_WRITE_BYTE:
+        b = value;
+        break;
+    }
+
+    if (index >= 192) {
+        sd->card_status |= R_CSR_SWITCH_ERROR_MASK;
+        return;
+    }
+
+    sd->ext_csd[index] = b;
+}
+
 static void sd_function_switch(SDState *sd, uint32_t arg)
 {
     int i, mode, new_func;
@@ -1097,12 +1135,18 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
     case 6:	/* CMD6:   SWITCH_FUNCTION */
         switch (sd->mode) {
         case sd_data_transfer_mode:
-            sd_function_switch(sd, req.arg);
-            sd->state = sd_sendingdata_state;
-            sd->data_start = 0;
-            sd->data_offset = 0;
-            return sd_r1;
-
+            if (sd->emmc) {
+                sd->state = sd_programming_state;
+                mmc_function_switch(sd, req.arg);
+                sd->state = sd_transfer_state;
+                return sd_r1b;
+            } else {
+                sd_function_switch(sd, req.arg);
+                sd->state = sd_sendingdata_state;
+                sd->data_start = 0;
+                sd->data_offset = 0;
+                return sd_r1;
+            }
         default:
             break;
         }
-- 
2.7.4

[RFC PATCH 07/15] sd: emmc: add CMD21 tuning sequence

[Sai Pavan Boddu]

eMMC cards support tuning sequence for entering HS200 mode.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 hw/sd/sd.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 7925174..90359f6 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1378,6 +1378,14 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
         }
         break;
 
+    case 21:    /* CMD21: mmc SEND TUNING_BLOCK */
+        if (sd->emmc && (sd->state == sd_transfer_state)) {
+            sd->state = sd_sendingdata_state;
+            sd->data_offset = 0;
+            return sd_r1;
+        }
+        break;
+
     case 23:    /* CMD23: SET_BLOCK_COUNT */
         if (sd->spec_version < SD_PHY_SPECv3_01_VERS) {
             break;
@@ -2112,6 +2120,30 @@ static const uint8_t sd_tuning_block_pattern[SD_TUNING_BLOCK_SIZE] = {
     0xbb, 0xff, 0xf7, 0xff,         0xf7, 0x7f, 0x7b, 0xde,
 };
 
+#define EXCSD_BUS_WIDTH_OFFSET 183
+#define BUS_WIDTH_8_MASK    0x4
+#define BUS_WIDTH_4_MASK    0x2
+#define MMC_TUNING_BLOCK_SIZE   128
+
+static const uint8_t mmc_tunning_block_pattern[128] = {
+       0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
+       0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
+       0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
+       0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
+       0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
+       0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
+       0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
+       0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
+       0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
+       0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
+       0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
+       0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
+       0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
+       0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
+       0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
+       0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
+};
+
 uint8_t sd_read_byte(SDState *sd)
 {
     /* TODO: Append CRCs */
@@ -2204,6 +2236,21 @@ uint8_t sd_read_byte(SDState *sd)
         ret = sd_tuning_block_pattern[sd->data_offset++];
         break;
 
+    case 21:    /* CMD21: SEND_TUNNING_BLOCK (MMC) */
+        if (sd->data_offset >= MMC_TUNING_BLOCK_SIZE - 1) {
+            sd->state = sd_transfer_state;
+        }
+        if (sd->ext_csd[EXCSD_BUS_WIDTH_OFFSET] & BUS_WIDTH_8_MASK) {
+            ret = mmc_tunning_block_pattern[sd->data_offset++];
+        } else {
+            /* Return LSB Nibbles of two byte from the 8bit tuning block
+             * for 4bit mode
+             */
+            ret = mmc_tunning_block_pattern[sd->data_offset++] & 0x0F;
+            ret |= (mmc_tunning_block_pattern[sd->data_offset++] & 0x0F) << 4;
+        }
+        break;
+
     case 22:	/* ACMD22: SEND_NUM_WR_BLOCKS */
         ret = sd->data[sd->data_offset ++];
 
-- 
2.7.4

[RFC PATCH 08/15] sd: emmc: Make ACMD41 illegal for mmc

[Sai Pavan Boddu]

ACMD41 is not applicable for eMMC.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 hw/sd/sd.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 90359f6..236f2b8 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1729,6 +1729,9 @@ static sd_rsp_type_t sd_app_command(SDState *sd,
         break;
 
     case 41:	/* ACMD41: SD_APP_OP_COND */
+        if (sd->emmc) {
+            break;
+        }
         if (sd->spi) {
             /* SEND_OP_CMD */
             sd->state = sd_transfer_state;
-- 
2.7.4

[RFC PATCH 09/15] sd: emmc: Add support for emmc erase

[Sai Pavan Boddu]

Add CMD35 and CMD36 which sets the erase start and end.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 hw/sd/sd.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 236f2b8..7aab647 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1544,6 +1544,7 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
 
     /* Erase commands (Class 5) */
     case 32:	/* CMD32:  ERASE_WR_BLK_START */
+    case 35:
         switch (sd->state) {
         case sd_transfer_state:
             sd->erase_start = req.arg;
@@ -1555,6 +1556,7 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
         break;
 
     case 33:	/* CMD33:  ERASE_WR_BLK_END */
+    case 36:
         switch (sd->state) {
         case sd_transfer_state:
             sd->erase_end = req.arg;
-- 
2.7.4

[RFC PATCH 10/15] sd: emmc: Update CID structure for eMMC

[Sai Pavan Boddu]

CID structure is little different for eMMC, w.r.t to product name and
manufacturing date.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 hw/sd/sd.c | 52 +++++++++++++++++++++++++++++++++++-----------------
 1 file changed, 35 insertions(+), 17 deletions(-)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 7aab647..45311fa 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -345,23 +345,41 @@ static void sd_set_scr(SDState *sd)
 
 static void sd_set_cid(SDState *sd)
 {
-    sd->cid[0] = MID;		/* Fake card manufacturer ID (MID) */
-    sd->cid[1] = OID[0];	/* OEM/Application ID (OID) */
-    sd->cid[2] = OID[1];
-    sd->cid[3] = PNM[0];	/* Fake product name (PNM) */
-    sd->cid[4] = PNM[1];
-    sd->cid[5] = PNM[2];
-    sd->cid[6] = PNM[3];
-    sd->cid[7] = PNM[4];
-    sd->cid[8] = PRV;		/* Fake product revision (PRV) */
-    sd->cid[9] = 0xde;		/* Fake serial number (PSN) */
-    sd->cid[10] = 0xad;
-    sd->cid[11] = 0xbe;
-    sd->cid[12] = 0xef;
-    sd->cid[13] = 0x00 |	/* Manufacture date (MDT) */
-        ((MDT_YR - 2000) / 10);
-    sd->cid[14] = ((MDT_YR % 10) << 4) | MDT_MON;
-    sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
+    if (sd->emmc) {
+        sd->cid[0] = MID;
+        sd->cid[1] = 0x1;       /* CBX */
+        sd->cid[2] = OID[0];    /* OEM/Application ID (OID) */
+        sd->cid[3] = PNM[0];    /* Fake product name (PNM) 48bit */
+        sd->cid[4] = PNM[1];
+        sd->cid[5] = PNM[2];
+        sd->cid[6] = PNM[3];
+        sd->cid[7] = PNM[4];
+        sd->cid[8] = 0x0;
+        sd->cid[9] = PRV;        /* Fake product revision (PRV) */
+        sd->cid[10] = 0xde;      /* Fake serial number (PSN) */
+        sd->cid[11] = 0xad;
+        sd->cid[12] = 0xbe;
+        sd->cid[13] = 0xef;
+        sd->cid[14] = ((MDT_YR - 1997) % 0x10); /* MDT */
+    } else {
+        sd->cid[0] = MID;       /* Fake card manufacturer ID (MID) */
+        sd->cid[1] = OID[0];    /* OEM/Application ID (OID) */
+        sd->cid[2] = OID[1];
+        sd->cid[3] = PNM[0];    /* Fake product name (PNM) 40bit */
+        sd->cid[4] = PNM[1];
+        sd->cid[5] = PNM[2];
+        sd->cid[6] = PNM[3];
+        sd->cid[7] = PNM[4];
+        sd->cid[8] = PRV;       /* Fake product revision (PRV) */
+        sd->cid[9] = 0xde;      /* Fake serial number (PSN) */
+        sd->cid[10] = 0xad;
+        sd->cid[11] = 0xbe;
+        sd->cid[12] = 0xef;
+        sd->cid[13] = 0x00 |    /* Manufacture date (MDT) */
+            ((MDT_YR - 2000) / 10);
+        sd->cid[14] = ((MDT_YR % 10) << 4) | MDT_MON;
+   }
+   sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
 }
 
 #define HWBLOCK_SHIFT	9			/* 512 bytes */
-- 
2.7.4

[RFC PATCH 11/15] sd: emmc: Add Extended CSD register definitions

[Sai Pavan Boddu]

From: Cédric Le Goater <clg@kaod.org>

Add user friendly macros for EXT_CSD register.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
[spb: Rebased over versal emmc series,
      updated commit message]
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
---
 hw/sd/sd.c             | 54 +++++++++++++++-------------
 hw/sd/sdmmc-internal.h | 97 ++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 126 insertions(+), 25 deletions(-)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 45311fa..54fba7b 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -398,41 +398,45 @@ static void mmc_set_ext_csd(SDState *sd, uint64_t size)
     uint32_t sectcount = size >> HWBLOCK_SHIFT;
 
     memset(sd->ext_csd, 0, 512);
-    sd->ext_csd[504] = 0x1; /* supported command sets */
-    sd->ext_csd[503] = 0x1; /* HPI features  */
-    sd->ext_csd[502] = 0x1; /* Background operations support */
+    sd->ext_csd[EXT_CSD_S_CMD_SET] = 0x1; /* supported command sets */
+    sd->ext_csd[EXT_CSD_HPI_FEATURES] = 0x3; /* HPI features  */
+    sd->ext_csd[EXT_CSD_BKOPS_SUPPORT] = 0x1; /* Background operations
+                                                 support */
     sd->ext_csd[241] = 0xA; /* 1st initialization time after partitioning */
-    sd->ext_csd[232] = 0x1; /* Trim multiplier */
-    sd->ext_csd[231] = 0x15; /* Secure feature support */
-    sd->ext_csd[230] = 0x96; /* Secure erase support */
-    sd->ext_csd[229] = 0x96; /* Secure TRIM multiplier */
-    sd->ext_csd[228] = 0x7; /* Boot information */
-    sd->ext_csd[226] = 0x8; /* Boot partition size */
-    sd->ext_csd[225] = 0x6; /* Access size */
-    sd->ext_csd[224] = 0x4; /* HC Erase unit size */
-    sd->ext_csd[223] = 0x1; /* HC erase timeout */
-    sd->ext_csd[222] = 0x1; /* Reliable write sector count */
-    sd->ext_csd[221] = 0x4; /* HC write protect group size */
-    sd->ext_csd[220] = 0x8; /* Sleep current VCC  */
-    sd->ext_csd[219] = 0x7; /* Sleep current VCCQ */
-    sd->ext_csd[217] = 0x11; /* Sleep/Awake timeout */
+    sd->ext_csd[EXT_CSD_TRIM_MULT] = 0x1; /* Trim multiplier */
+    sd->ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT] = 0x15; /* Secure feature
+                                                        support */
+    sd->ext_csd[EXT_CSD_SEC_ERASE_MULT] = 0x96; /* Secure erase support */
+    sd->ext_csd[EXT_CSD_SEC_TRIM_MULT] = 0x96; /* Secure TRIM multiplier */
+    sd->ext_csd[EXT_CSD_BOOT_INFO] = 0x7; /* Boot information */
+    sd->ext_csd[EXT_CSD_BOOT_MULT] = 0x8; /* Boot partition size. 128KB unit */
+    sd->ext_csd[EXT_CSD_ACC_SIZE] = 0x6; /* Access size */
+    sd->ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] = 0x4; /* HC Erase unit size */
+    sd->ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT] = 0x1; /* HC erase timeout */
+    sd->ext_csd[EXT_CSD_REL_WR_SEC_C] = 0x1; /* Reliable write sector count */
+    sd->ext_csd[EXT_CSD_HC_WP_GRP_SIZE] = 0x4; /* HC write protect group size */
+    sd->ext_csd[EXT_CSD_S_C_VCC] = 0x8; /* Sleep current VCC  */
+    sd->ext_csd[EXT_CSD_S_C_VCCQ] = 0x7; /* Sleep current VCCQ */
+    sd->ext_csd[EXT_CSD_S_A_TIMEOUT] = 0x11; /* Sleep/Awake timeout */
     sd->ext_csd[215] = (sectcount >> 24) & 0xff; /* Sector count */
     sd->ext_csd[214] = (sectcount >> 16) & 0xff; /* ... */
     sd->ext_csd[213] = (sectcount >> 8) & 0xff;  /* ... */
-    sd->ext_csd[212] = (sectcount & 0xff);       /* ... */
+    sd->ext_csd[EXT_CSD_SEC_CNT] = (sectcount & 0xff);       /* ... */
     sd->ext_csd[210] = 0xa; /* Min write perf for 8bit@52Mhz */
     sd->ext_csd[209] = 0xa; /* Min read perf for 8bit@52Mhz  */
     sd->ext_csd[208] = 0xa; /* Min write perf for 4bit@52Mhz */
     sd->ext_csd[207] = 0xa; /* Min read perf for 4bit@52Mhz */
     sd->ext_csd[206] = 0xa; /* Min write perf for 4bit@26Mhz */
     sd->ext_csd[205] = 0xa; /* Min read perf for 4bit@26Mhz */
-    sd->ext_csd[199] = 0x1; /* Partition switching timing */
-    sd->ext_csd[198] = 0x1; /* Out-of-interrupt busy timing */
-    sd->ext_csd[196] = 0xFF; /* Card type */
-    sd->ext_csd[194] = 0x2; /* CSD Structure version */
-    sd->ext_csd[192] = 0x5; /* Extended CSD revision */
-    sd->ext_csd[168] = 0x1; /* RPMB size */
-    sd->ext_csd[160] = 0x3; /* Partinioning support */
+    sd->ext_csd[EXT_CSD_PART_SWITCH_TIME] = 0x1; /* Partition switching
+                                                    timing */
+    sd->ext_csd[EXT_CSD_OUT_OF_INTERRUPT_TIME] = 0x1; /* Out-of-interrupt busy
+                                                         timing */
+    sd->ext_csd[EXT_CSD_CARD_TYPE] = 0xFF; /* Card type */
+    sd->ext_csd[EXT_CSD_STRUCTURE] = 0x2; /* CSD Structure version */
+    sd->ext_csd[EXT_CSD_REV] = 0x5; /* Extended CSD revision */
+    sd->ext_csd[EXT_CSD_RPMB_MULT] = 0x1; /* RPMB size */
+    sd->ext_csd[EXT_CSD_PARTITION_SUPPORT] = 0x3; /* Partinioning support */
     sd->ext_csd[159] = 0x00; /* Max enhanced area size */
     sd->ext_csd[158] = 0x00; /* ... */
     sd->ext_csd[157] = 0xEC; /* ... */
diff --git a/hw/sd/sdmmc-internal.h b/hw/sd/sdmmc-internal.h
index d8bf17d..7ab7b4d 100644
--- a/hw/sd/sdmmc-internal.h
+++ b/hw/sd/sdmmc-internal.h
@@ -37,4 +37,101 @@ const char *sd_cmd_name(uint8_t cmd);
  */
 const char *sd_acmd_name(uint8_t cmd);
 
+/*
+ * EXT_CSD fields
+ */
+
+#define EXT_CSD_CMDQ_MODE_EN    15  /* R/W */
+#define EXT_CSD_FLUSH_CACHE   32      /* W */
+#define EXT_CSD_CACHE_CTRL    33      /* R/W */
+#define EXT_CSD_POWER_OFF_NOTIFICATION  34  /* R/W */
+#define EXT_CSD_PACKED_FAILURE_INDEX  35  /* RO */
+#define EXT_CSD_PACKED_CMD_STATUS 36  /* RO */
+#define EXT_CSD_EXP_EVENTS_STATUS 54  /* RO, 2 bytes */
+#define EXT_CSD_EXP_EVENTS_CTRL   56  /* R/W, 2 bytes */
+#define EXT_CSD_DATA_SECTOR_SIZE  61  /* R */
+#define EXT_CSD_GP_SIZE_MULT    143 /* R/W */
+#define EXT_CSD_PARTITION_SETTING_COMPLETED 155 /* R/W */
+#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */
+#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */
+#define EXT_CSD_HPI_MGMT    161 /* R/W */
+#define EXT_CSD_RST_N_FUNCTION    162 /* R/W */
+#define EXT_CSD_BKOPS_EN    163 /* R/W */
+#define EXT_CSD_BKOPS_START   164 /* W */
+#define EXT_CSD_SANITIZE_START    165     /* W */
+#define EXT_CSD_WR_REL_PARAM    166 /* RO */
+#define EXT_CSD_RPMB_MULT   168 /* RO */
+#define EXT_CSD_FW_CONFIG   169 /* R/W */
+#define EXT_CSD_BOOT_WP     173 /* R/W */
+#define EXT_CSD_ERASE_GROUP_DEF   175 /* R/W */
+#define EXT_CSD_PART_CONFIG   179 /* R/W */
+#define EXT_CSD_ERASED_MEM_CONT   181 /* RO */
+#define EXT_CSD_BUS_WIDTH   183 /* R/W */
+#define EXT_CSD_STROBE_SUPPORT    184 /* RO */
+#define EXT_CSD_HS_TIMING   185 /* R/W */
+#define EXT_CSD_POWER_CLASS   187 /* R/W */
+#define EXT_CSD_REV     192 /* RO */
+#define EXT_CSD_STRUCTURE   194 /* RO */
+#define EXT_CSD_CARD_TYPE   196 /* RO */
+#define EXT_CSD_DRIVER_STRENGTH   197 /* RO */
+#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */
+#define EXT_CSD_PART_SWITCH_TIME        199     /* RO */
+#define EXT_CSD_PWR_CL_52_195   200 /* RO */
+#define EXT_CSD_PWR_CL_26_195   201 /* RO */
+#define EXT_CSD_PWR_CL_52_360   202 /* RO */
+#define EXT_CSD_PWR_CL_26_360   203 /* RO */
+#define EXT_CSD_SEC_CNT     212 /* RO, 4 bytes */
+#define EXT_CSD_S_A_TIMEOUT   217 /* RO */
+#define EXT_CSD_S_C_VCCQ          219     /* RO */
+#define EXT_CSD_S_C_VCC                 220     /* RO */
+#define EXT_CSD_REL_WR_SEC_C    222 /* RO */
+#define EXT_CSD_HC_WP_GRP_SIZE    221 /* RO */
+#define EXT_CSD_ERASE_TIMEOUT_MULT  223 /* RO */
+#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
+#define EXT_CSD_ACC_SIZE    225 /* RO */
+#define EXT_CSD_BOOT_MULT   226 /* RO */
+#define EXT_CSD_BOOT_INFO   228 /* RO */
+#define EXT_CSD_SEC_TRIM_MULT   229 /* RO */
+#define EXT_CSD_SEC_ERASE_MULT    230 /* RO */
+#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */
+#define EXT_CSD_TRIM_MULT   232 /* RO */
+#define EXT_CSD_PWR_CL_200_195    236 /* RO */
+#define EXT_CSD_PWR_CL_200_360    237 /* RO */
+#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */
+#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */
+#define EXT_CSD_BKOPS_STATUS    246 /* RO */
+#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */
+#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
+#define EXT_CSD_CACHE_SIZE    249 /* RO, 4 bytes */
+#define EXT_CSD_PWR_CL_DDR_200_360  253 /* RO */
+#define EXT_CSD_FIRMWARE_VERSION  254 /* RO, 8 bytes */
+#define EXT_CSD_PRE_EOL_INFO    267 /* RO */
+#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A  268 /* RO */
+#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B  269 /* RO */
+#define EXT_CSD_CMDQ_DEPTH    307 /* RO */
+#define EXT_CSD_CMDQ_SUPPORT    308 /* RO */
+#define EXT_CSD_SUPPORTED_MODE    493 /* RO */
+#define EXT_CSD_TAG_UNIT_SIZE   498 /* RO */
+#define EXT_CSD_DATA_TAG_SUPPORT  499 /* RO */
+#define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */
+#define EXT_CSD_MAX_PACKED_READS  501 /* RO */
+#define EXT_CSD_BKOPS_SUPPORT   502 /* RO */
+#define EXT_CSD_HPI_FEATURES    503 /* RO */
+#define EXT_CSD_S_CMD_SET   504 /* RO */
+
+/*
+ * EXT_CSD field definitions
+ */
+
+#define EXT_CSD_WR_REL_PARAM_EN   (1 << 2)
+#define EXT_CSD_WR_REL_PARAM_EN_RPMB_REL_WR (1 << 4)
+
+#define EXT_CSD_PART_CONFIG_ACC_MASK  (0x7)
+#define EXT_CSD_PART_CONFIG_ACC_DEFAULT (0x0)
+#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
+
+#define EXT_CSD_PART_CONFIG_EN_MASK (0x7 << 3)
+#define EXT_CSD_PART_CONFIG_EN_BOOT0  (0x1 << 3)
+#define EXT_CSD_PART_CONFIG_EN_USER (0x7 << 3)
+
 #endif
-- 
2.7.4

[RFC PATCH 12/15] sd: emmc: Support boot area in emmc image

[Sai Pavan Boddu]

From: Joel Stanley <joel@jms.id.au>

This assumes a specially constructued image:

  dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M
  dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc
  dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc count=64 bs=1K
  cat mmc-bootarea.img obmc-phosphor-image.wic > mmc.img
  truncate --size 16GB mmc.img
  truncate --size 128MB mmc-bootarea.img

Signed-off-by: Joel Stanley <joel@jms.id.au>
[clg: - changes on the definition names ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[spb: use data_start property to access right emmc partition,
      Clean up PARTITION_ENABLE support as incomplete,
      Fix commit message to be generic.]
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
---
 hw/sd/sd.c | 40 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 54fba7b..55c1104 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1045,6 +1045,34 @@ static void sd_lock_command(SDState *sd)
         sd->card_status &= ~CARD_IS_LOCKED;
 }
 
+/*
+ * This requires a disk image that has two boot partitions inserted at the
+ * beginning of it. The size of the boot partitions are configured in the
+ * ext_csd structure, which is hardcoded in qemu. They are currently set to
+ * 1MB each.
+ */
+static uint32_t sd_bootpart_offset(SDState *sd)
+{
+    unsigned int access = sd->ext_csd[EXT_CSD_PART_CONFIG] &
+        EXT_CSD_PART_CONFIG_ACC_MASK;
+    unsigned int boot_capacity = sd->ext_csd[EXT_CSD_BOOT_MULT] << 17;
+
+    if (!sd->emmc) {
+        return 0;
+    }
+
+    switch (access) {
+    case EXT_CSD_PART_CONFIG_ACC_DEFAULT:
+        return boot_capacity * 2;
+    case EXT_CSD_PART_CONFIG_ACC_BOOT0:
+        return 0;
+    case EXT_CSD_PART_CONFIG_ACC_BOOT0 + 1:
+        return boot_capacity * 1;
+    default:
+         g_assert_not_reached();
+    }
+}
+
 static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
 {
     uint32_t rca = 0x0000;
@@ -1360,6 +1388,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
                 return sd_r1;
             }
 
+            if (sd->emmc) {
+                addr += sd_bootpart_offset(sd);
+            }
             sd->state = sd_sendingdata_state;
             sd->data_start = addr;
             sd->data_offset = 0;
@@ -1379,6 +1410,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
                 return sd_r1;
             }
 
+            if (sd->emmc) {
+                addr += sd_bootpart_offset(sd);
+            }
             sd->state = sd_sendingdata_state;
             sd->data_start = addr;
             sd->data_offset = 0;
@@ -1435,6 +1469,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
                 return sd_r1;
             }
 
+            if (sd->emmc) {
+                addr += sd_bootpart_offset(sd);
+            }
             sd->state = sd_receivingdata_state;
             sd->data_start = addr;
             sd->data_offset = 0;
@@ -1465,6 +1502,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
                 return sd_r1;
             }
 
+            if (sd->emmc) {
+                addr += sd_bootpart_offset(sd);
+            }
             sd->state = sd_receivingdata_state;
             sd->data_start = addr;
             sd->data_offset = 0;
-- 
2.7.4

[RFC PATCH 13/15] sd: emmc: Subtract bootarea size from blk

[Sai Pavan Boddu]

From: Joel Stanley <joel@jms.id.au>

The userdata size is derived from the file the user passes on the
command line, but we must take into account the boot areas.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 hw/sd/sd.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 55c1104..a2f39c9 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -658,6 +658,11 @@ static void sd_reset(DeviceState *dev)
     }
     size = sect << 9;
 
+    if (sd->emmc) {
+        unsigned int boot_capacity = sd->ext_csd[EXT_CSD_BOOT_MULT] << 17;
+        size -= boot_capacity * 2;
+    }
+
     sect = sd_addr_to_wpnum(size) + 1;
 
     sd->state = sd_idle_state;
-- 
2.7.4

[RFC PATCH 14/15] sd: sdhci: Support eMMC devices

[Sai Pavan Boddu]

Embedded device slots should be allowed as support of eMMC is available.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
---
 hw/sd/sdhci.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 8ffa539..771212a 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -99,10 +99,6 @@ static void sdhci_check_capareg(SDHCIState *s, Error **errp)
         msk = FIELD_DP64(msk, SDHC_CAPAB, ASYNC_INT, 0);
 
         val = FIELD_EX64(s->capareg, SDHC_CAPAB, SLOT_TYPE);
-        if (val) {
-            error_setg(errp, "slot-type not supported");
-            return;
-        }
         trace_sdhci_capareg("slot type", val);
         msk = FIELD_DP64(msk, SDHC_CAPAB, SLOT_TYPE, 0);
 
-- 
2.7.4

[RFC PATCH 15/15] arm: xlnx-versal: Add emmc to versal

[Sai Pavan Boddu]

Configuring SDHCI-0 to act as eMMC controller.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
---
 hw/arm/xlnx-versal-virt.c | 16 +++++++++++-----
 hw/arm/xlnx-versal.c      | 14 ++++++++++++--
 2 files changed, 23 insertions(+), 7 deletions(-)

diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 8482cd6..18489e4 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -333,6 +333,13 @@ static void fdt_add_sd_nodes(VersalVirt *s)
         qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
                                      2, addr, 2, MM_PMC_SD0_SIZE);
         qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
+        /*
+         * eMMC specific properties
+         */
+        if (i == 0) {
+            qemu_fdt_setprop(s->fdt, name, "non-removable", NULL, 0);
+            qemu_fdt_setprop_sized_cells(s->fdt, name, "bus-width", 1, 8);
+        }
         g_free(name);
     }
 }
@@ -512,7 +519,7 @@ static void create_virtio_regions(VersalVirt *s)
     }
 }
 
-static void sd_plugin_card(SDHCIState *sd, DriveInfo *di)
+static void sd_plugin_card(SDHCIState *sd, DriveInfo *di, bool emmc)
 {
     BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
     DeviceState *card;
@@ -520,6 +527,7 @@ static void sd_plugin_card(SDHCIState *sd, DriveInfo *di)
     card = qdev_new(TYPE_SD_CARD);
     object_property_add_child(OBJECT(sd), "card[*]", OBJECT(card));
     qdev_prop_set_drive_err(card, "drive", blk, &error_fatal);
+    object_property_set_bool(OBJECT(card), "emmc", emmc, &error_fatal);
     qdev_realize_and_unref(card, qdev_get_child_bus(DEVICE(sd), "sd-bus"),
                            &error_fatal);
 }
@@ -528,7 +536,6 @@ static void versal_virt_init(MachineState *machine)
 {
     VersalVirt *s = XLNX_VERSAL_VIRT_MACHINE(machine);
     int psci_conduit = QEMU_PSCI_CONDUIT_DISABLED;
-    int i;
 
     /*
      * If the user provides an Operating System to be loaded, we expect them
@@ -581,10 +588,9 @@ static void versal_virt_init(MachineState *machine)
     memory_region_add_subregion_overlap(get_system_memory(),
                                         0, &s->soc.fpd.apu.mr, 0);
 
+    sd_plugin_card(&s->soc.pmc.iou.sd[0], drive_get_next(IF_EMMC), true);
     /* Plugin SD cards.  */
-    for (i = 0; i < ARRAY_SIZE(s->soc.pmc.iou.sd); i++) {
-        sd_plugin_card(&s->soc.pmc.iou.sd[i], drive_get_next(IF_SD));
-    }
+    sd_plugin_card(&s->soc.pmc.iou.sd[1], drive_get_next(IF_SD), false);
 
     s->binfo.ram_size = machine->ram_size;
     s->binfo.loader_start = 0x0;
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index b077716..3498dd9 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -230,9 +230,14 @@ static void versal_create_admas(Versal *s, qemu_irq *pic)
 }
 
 #define SDHCI_CAPABILITIES  0x280737ec6481 /* Same as on ZynqMP.  */
+#define SDHCI0_CAPS ((SDHCI_CAPABILITIES & ~(3 << 30)) | \
+                     (1 << 30))
+#define SDHCI1_CAPS SDHCI_CAPABILITIES
+
 static void versal_create_sds(Versal *s, qemu_irq *pic)
 {
     int i;
+    uint64_t caps[] = {SDHCI0_CAPS, SDHCI1_CAPS};
 
     for (i = 0; i < ARRAY_SIZE(s->pmc.iou.sd); i++) {
         DeviceState *dev;
@@ -244,9 +249,14 @@ static void versal_create_sds(Versal *s, qemu_irq *pic)
 
         object_property_set_uint(OBJECT(dev), "sd-spec-version", 3,
                                  &error_fatal);
-        object_property_set_uint(OBJECT(dev), "capareg", SDHCI_CAPABILITIES,
+        object_property_set_uint(OBJECT(dev), "capareg", caps[i],
                                  &error_fatal);
-        object_property_set_uint(OBJECT(dev), "uhs", UHS_I, &error_fatal);
+        /*
+         * UHS is not applicable for eMMC
+         */
+        if (i == 1) {
+            object_property_set_uint(OBJECT(dev), "uhs", UHS_I, &error_fatal);
+        }
         sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
 
         mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
-- 
2.7.4

Re: [RFC PATCH 01/15] block: add eMMC block device type

[Alistair Francis]

On Thu, Feb 11, 2021 at 12:15 AM Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
>
> From: Vincent Palatin <vpalatin@chromium.org>
>
> Add new block device type.
>
> Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
> [SPB: Rebased over 5.1 version]
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  blockdev.c                | 1 +
>  include/sysemu/blockdev.h | 1 +
>  2 files changed, 2 insertions(+)
>
> diff --git a/blockdev.c b/blockdev.c
> index b250b9b..593ce44 100644
> --- a/blockdev.c
> +++ b/blockdev.c
> @@ -83,6 +83,7 @@ static const char *const if_name[IF_COUNT] = {
>      [IF_SD] = "sd",
>      [IF_VIRTIO] = "virtio",
>      [IF_XEN] = "xen",
> +    [IF_EMMC] = "emmc",
>  };
>
>  static int if_max_devs[IF_COUNT] = {
> diff --git a/include/sysemu/blockdev.h b/include/sysemu/blockdev.h
> index 3b5fcda..eefae9f 100644
> --- a/include/sysemu/blockdev.h
> +++ b/include/sysemu/blockdev.h
> @@ -24,6 +24,7 @@ typedef enum {
>       */
>      IF_NONE = 0,
>      IF_IDE, IF_SCSI, IF_FLOPPY, IF_PFLASH, IF_MTD, IF_SD, IF_VIRTIO, IF_XEN,
> +    IF_EMMC,
>      IF_COUNT
>  } BlockInterfaceType;
>
> --
> 2.7.4
>
>

Re: [RFC PATCH 03/15] sd: emmc: Dont not update CARD_CAPACITY for eMMC cards

[Alistair Francis]

On Thu, Feb 11, 2021 at 12:22 AM Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
>
> OCR.CARD_CAPACITY field is only valid for sd cards, So skip it for eMMC.
>
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/sd/sd.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index a75fa1c..57fff89 100644
> --- a/hw/sd/sd.c
> +++ b/hw/sd/sd.c
> @@ -308,7 +308,8 @@ static void sd_ocr_powerup(void *opaque)
>      /* card power-up OK */
>      sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_POWER_UP, 1);
>
> -    if (sd->size > SDSC_MAX_CAPACITY) {
> +    /* eMMC supports only Byte mode */
> +    if (!sd->emmc && sd->size > SDSC_MAX_CAPACITY) {
>          sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_CAPACITY, 1);
>      }
>  }
> --
> 2.7.4
>
>

Re: [RFC PATCH 15/15] arm: xlnx-versal: Add emmc to versal

[Alistair Francis]

On Thu, Feb 11, 2021 at 12:36 AM Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
>
> Configuring SDHCI-0 to act as eMMC controller.
>
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/arm/xlnx-versal-virt.c | 16 +++++++++++-----
>  hw/arm/xlnx-versal.c      | 14 ++++++++++++--
>  2 files changed, 23 insertions(+), 7 deletions(-)
>
> diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
> index 8482cd6..18489e4 100644
> --- a/hw/arm/xlnx-versal-virt.c
> +++ b/hw/arm/xlnx-versal-virt.c
> @@ -333,6 +333,13 @@ static void fdt_add_sd_nodes(VersalVirt *s)
>          qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
>                                       2, addr, 2, MM_PMC_SD0_SIZE);
>          qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
> +        /*
> +         * eMMC specific properties
> +         */
> +        if (i == 0) {
> +            qemu_fdt_setprop(s->fdt, name, "non-removable", NULL, 0);
> +            qemu_fdt_setprop_sized_cells(s->fdt, name, "bus-width", 1, 8);
> +        }
>          g_free(name);
>      }
>  }
> @@ -512,7 +519,7 @@ static void create_virtio_regions(VersalVirt *s)
>      }
>  }
>
> -static void sd_plugin_card(SDHCIState *sd, DriveInfo *di)
> +static void sd_plugin_card(SDHCIState *sd, DriveInfo *di, bool emmc)
>  {
>      BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
>      DeviceState *card;
> @@ -520,6 +527,7 @@ static void sd_plugin_card(SDHCIState *sd, DriveInfo *di)
>      card = qdev_new(TYPE_SD_CARD);
>      object_property_add_child(OBJECT(sd), "card[*]", OBJECT(card));
>      qdev_prop_set_drive_err(card, "drive", blk, &error_fatal);
> +    object_property_set_bool(OBJECT(card), "emmc", emmc, &error_fatal);
>      qdev_realize_and_unref(card, qdev_get_child_bus(DEVICE(sd), "sd-bus"),
>                             &error_fatal);
>  }
> @@ -528,7 +536,6 @@ static void versal_virt_init(MachineState *machine)
>  {
>      VersalVirt *s = XLNX_VERSAL_VIRT_MACHINE(machine);
>      int psci_conduit = QEMU_PSCI_CONDUIT_DISABLED;
> -    int i;
>
>      /*
>       * If the user provides an Operating System to be loaded, we expect them
> @@ -581,10 +588,9 @@ static void versal_virt_init(MachineState *machine)
>      memory_region_add_subregion_overlap(get_system_memory(),
>                                          0, &s->soc.fpd.apu.mr, 0);
>
> +    sd_plugin_card(&s->soc.pmc.iou.sd[0], drive_get_next(IF_EMMC), true);
>      /* Plugin SD cards.  */
> -    for (i = 0; i < ARRAY_SIZE(s->soc.pmc.iou.sd); i++) {
> -        sd_plugin_card(&s->soc.pmc.iou.sd[i], drive_get_next(IF_SD));
> -    }
> +    sd_plugin_card(&s->soc.pmc.iou.sd[1], drive_get_next(IF_SD), false);
>
>      s->binfo.ram_size = machine->ram_size;
>      s->binfo.loader_start = 0x0;
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index b077716..3498dd9 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -230,9 +230,14 @@ static void versal_create_admas(Versal *s, qemu_irq *pic)
>  }
>
>  #define SDHCI_CAPABILITIES  0x280737ec6481 /* Same as on ZynqMP.  */
> +#define SDHCI0_CAPS ((SDHCI_CAPABILITIES & ~(3 << 30)) | \
> +                     (1 << 30))
> +#define SDHCI1_CAPS SDHCI_CAPABILITIES
> +
>  static void versal_create_sds(Versal *s, qemu_irq *pic)
>  {
>      int i;
> +    uint64_t caps[] = {SDHCI0_CAPS, SDHCI1_CAPS};
>
>      for (i = 0; i < ARRAY_SIZE(s->pmc.iou.sd); i++) {
>          DeviceState *dev;
> @@ -244,9 +249,14 @@ static void versal_create_sds(Versal *s, qemu_irq *pic)
>
>          object_property_set_uint(OBJECT(dev), "sd-spec-version", 3,
>                                   &error_fatal);
> -        object_property_set_uint(OBJECT(dev), "capareg", SDHCI_CAPABILITIES,
> +        object_property_set_uint(OBJECT(dev), "capareg", caps[i],
>                                   &error_fatal);
> -        object_property_set_uint(OBJECT(dev), "uhs", UHS_I, &error_fatal);
> +        /*
> +         * UHS is not applicable for eMMC
> +         */
> +        if (i == 1) {
> +            object_property_set_uint(OBJECT(dev), "uhs", UHS_I, &error_fatal);
> +        }
>          sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
>
>          mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
> --
> 2.7.4
>
>

Re: [RFC PATCH 04/15] sd: emmc: Update CMD1 definition for eMMC

[Alistair Francis]

On Thu, Feb 11, 2021 at 12:17 AM Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
>
> Add support to Power up the card and send response r3 in case of eMMC.
>
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/sd/sd.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index 57fff89..e3738b2 100644
> --- a/hw/sd/sd.c
> +++ b/hw/sd/sd.c
> @@ -1033,8 +1033,16 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
>          break;
>
>      case 1:    /* CMD1:   SEND_OP_CMD */
> -        if (!sd->spi)
> +        /* MMC: Powerup & send r3
> +         * SD: send r1 in spi mode
> +         */
> +        if (sd->emmc) {
> +            sd_ocr_powerup(sd);
> +            return sd->state == sd_idle_state ?
> +                   sd_r3 : sd_r0;
> +        } else if (!sd->spi) {
>              goto bad_cmd;
> +        }
>
>          sd->state = sd_transfer_state;
>          return sd_r1;
> --
> 2.7.4
>
>

Re: [RFC PATCH 05/15] sd: emmc: support idle state in CMD2

[Alistair Francis]

On Thu, Feb 11, 2021 at 12:18 AM Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
>
> eMMC is expected to be in idle-state post CMD1. Ready state is an
> intermediate stage which we don't come across in Device identification
> mode.
>
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/sd/sd.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index e3738b2..69289e0 100644
> --- a/hw/sd/sd.c
> +++ b/hw/sd/sd.c
> @@ -1051,6 +1051,10 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
>          if (sd->spi)
>              goto bad_cmd;
>          switch (sd->state) {
> +        case sd_idle_state:
> +            if (!sd->emmc) {
> +                break;
> +            }
>          case sd_ready_state:
>              sd->state = sd_identification_state;
>              return sd_r2_i;
> --
> 2.7.4
>
>

Re: [RFC PATCH 09/15] sd: emmc: Add support for emmc erase

[Alistair Francis]

On Thu, Feb 11, 2021 at 12:19 AM Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
>
> Add CMD35 and CMD36 which sets the erase start and end.
>
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  hw/sd/sd.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index 236f2b8..7aab647 100644
> --- a/hw/sd/sd.c
> +++ b/hw/sd/sd.c
> @@ -1544,6 +1544,7 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
>
>      /* Erase commands (Class 5) */
>      case 32:   /* CMD32:  ERASE_WR_BLK_START */
> +    case 35:

Can you comment the CMD here?

>          switch (sd->state) {
>          case sd_transfer_state:
>              sd->erase_start = req.arg;
> @@ -1555,6 +1556,7 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
>          break;
>
>      case 33:   /* CMD33:  ERASE_WR_BLK_END */
> +    case 36:

and here?

Alistair

>          switch (sd->state) {
>          case sd_transfer_state:
>              sd->erase_end = req.arg;
> --
> 2.7.4
>
>

Re: [RFC PATCH 10/15] sd: emmc: Update CID structure for eMMC

[Alistair Francis]

On Thu, Feb 11, 2021 at 12:30 AM Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
>
> CID structure is little different for eMMC, w.r.t to product name and
> manufacturing date.
>
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  hw/sd/sd.c | 52 +++++++++++++++++++++++++++++++++++-----------------
>  1 file changed, 35 insertions(+), 17 deletions(-)
>
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index 7aab647..45311fa 100644
> --- a/hw/sd/sd.c
> +++ b/hw/sd/sd.c
> @@ -345,23 +345,41 @@ static void sd_set_scr(SDState *sd)
>
>  static void sd_set_cid(SDState *sd)
>  {
> -    sd->cid[0] = MID;          /* Fake card manufacturer ID (MID) */
> -    sd->cid[1] = OID[0];       /* OEM/Application ID (OID) */
> -    sd->cid[2] = OID[1];
> -    sd->cid[3] = PNM[0];       /* Fake product name (PNM) */
> -    sd->cid[4] = PNM[1];
> -    sd->cid[5] = PNM[2];
> -    sd->cid[6] = PNM[3];
> -    sd->cid[7] = PNM[4];
> -    sd->cid[8] = PRV;          /* Fake product revision (PRV) */
> -    sd->cid[9] = 0xde;         /* Fake serial number (PSN) */
> -    sd->cid[10] = 0xad;
> -    sd->cid[11] = 0xbe;
> -    sd->cid[12] = 0xef;
> -    sd->cid[13] = 0x00 |       /* Manufacture date (MDT) */
> -        ((MDT_YR - 2000) / 10);
> -    sd->cid[14] = ((MDT_YR % 10) << 4) | MDT_MON;
> -    sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
> +    if (sd->emmc) {
> +        sd->cid[0] = MID;
> +        sd->cid[1] = 0x1;       /* CBX */
> +        sd->cid[2] = OID[0];    /* OEM/Application ID (OID) */
> +        sd->cid[3] = PNM[0];    /* Fake product name (PNM) 48bit */
> +        sd->cid[4] = PNM[1];
> +        sd->cid[5] = PNM[2];
> +        sd->cid[6] = PNM[3];
> +        sd->cid[7] = PNM[4];

Aren't the majority of these the same between the two cases? It's
probably cleaner to split them out then.

Alistair

> +        sd->cid[8] = 0x0;
> +        sd->cid[9] = PRV;        /* Fake product revision (PRV) */
> +        sd->cid[10] = 0xde;      /* Fake serial number (PSN) */
> +        sd->cid[11] = 0xad;
> +        sd->cid[12] = 0xbe;
> +        sd->cid[13] = 0xef;
> +        sd->cid[14] = ((MDT_YR - 1997) % 0x10); /* MDT */
> +    } else {
> +        sd->cid[0] = MID;       /* Fake card manufacturer ID (MID) */
> +        sd->cid[1] = OID[0];    /* OEM/Application ID (OID) */
> +        sd->cid[2] = OID[1];
> +        sd->cid[3] = PNM[0];    /* Fake product name (PNM) 40bit */
> +        sd->cid[4] = PNM[1];
> +        sd->cid[5] = PNM[2];
> +        sd->cid[6] = PNM[3];
> +        sd->cid[7] = PNM[4];
> +        sd->cid[8] = PRV;       /* Fake product revision (PRV) */
> +        sd->cid[9] = 0xde;      /* Fake serial number (PSN) */
> +        sd->cid[10] = 0xad;
> +        sd->cid[11] = 0xbe;
> +        sd->cid[12] = 0xef;
> +        sd->cid[13] = 0x00 |    /* Manufacture date (MDT) */
> +            ((MDT_YR - 2000) / 10);
> +        sd->cid[14] = ((MDT_YR % 10) << 4) | MDT_MON;
> +   }
> +   sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
>  }
>
>  #define HWBLOCK_SHIFT  9                       /* 512 bytes */
> --
> 2.7.4
>
>

Re: [RFC PATCH 13/15] sd: emmc: Subtract bootarea size from blk

[Alistair Francis]

On Thu, Feb 11, 2021 at 12:25 AM Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
>
> From: Joel Stanley <joel@jms.id.au>
>
> The userdata size is derived from the file the user passes on the
> command line, but we must take into account the boot areas.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/sd/sd.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index 55c1104..a2f39c9 100644
> --- a/hw/sd/sd.c
> +++ b/hw/sd/sd.c
> @@ -658,6 +658,11 @@ static void sd_reset(DeviceState *dev)
>      }
>      size = sect << 9;
>
> +    if (sd->emmc) {
> +        unsigned int boot_capacity = sd->ext_csd[EXT_CSD_BOOT_MULT] << 17;
> +        size -= boot_capacity * 2;
> +    }
> +
>      sect = sd_addr_to_wpnum(size) + 1;
>
>      sd->state = sd_idle_state;
> --
> 2.7.4
>
>

Re: [RFC PATCH 14/15] sd: sdhci: Support eMMC devices

[Alistair Francis]

On Thu, Feb 11, 2021 at 12:34 AM Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
>
> Embedded device slots should be allowed as support of eMMC is available.
>
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/sd/sdhci.c | 4 ----
>  1 file changed, 4 deletions(-)
>
> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
> index 8ffa539..771212a 100644
> --- a/hw/sd/sdhci.c
> +++ b/hw/sd/sdhci.c
> @@ -99,10 +99,6 @@ static void sdhci_check_capareg(SDHCIState *s, Error **errp)
>          msk = FIELD_DP64(msk, SDHC_CAPAB, ASYNC_INT, 0);
>
>          val = FIELD_EX64(s->capareg, SDHC_CAPAB, SLOT_TYPE);
> -        if (val) {
> -            error_setg(errp, "slot-type not supported");
> -            return;
> -        }
>          trace_sdhci_capareg("slot type", val);
>          msk = FIELD_DP64(msk, SDHC_CAPAB, SLOT_TYPE, 0);
>
> --
> 2.7.4
>
>

Re: [RFC PATCH 12/15] sd: emmc: Support boot area in emmc image

[Alistair Francis]

On Thu, Feb 11, 2021 at 12:15 AM Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
>
> From: Joel Stanley <joel@jms.id.au>
>
> This assumes a specially constructued image:
>
>   dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M
>   dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc
>   dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc count=64 bs=1K
>   cat mmc-bootarea.img obmc-phosphor-image.wic > mmc.img
>   truncate --size 16GB mmc.img
>   truncate --size 128MB mmc-bootarea.img

Could we document this somewhere user accessible?

Alistair

>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> [clg: - changes on the definition names ]
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> [spb: use data_start property to access right emmc partition,
>       Clean up PARTITION_ENABLE support as incomplete,
>       Fix commit message to be generic.]
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> ---
>  hw/sd/sd.c | 40 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 40 insertions(+)
>
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index 54fba7b..55c1104 100644
> --- a/hw/sd/sd.c
> +++ b/hw/sd/sd.c
> @@ -1045,6 +1045,34 @@ static void sd_lock_command(SDState *sd)
>          sd->card_status &= ~CARD_IS_LOCKED;
>  }
>
> +/*
> + * This requires a disk image that has two boot partitions inserted at the
> + * beginning of it. The size of the boot partitions are configured in the
> + * ext_csd structure, which is hardcoded in qemu. They are currently set to
> + * 1MB each.
> + */
> +static uint32_t sd_bootpart_offset(SDState *sd)
> +{
> +    unsigned int access = sd->ext_csd[EXT_CSD_PART_CONFIG] &
> +        EXT_CSD_PART_CONFIG_ACC_MASK;
> +    unsigned int boot_capacity = sd->ext_csd[EXT_CSD_BOOT_MULT] << 17;
> +
> +    if (!sd->emmc) {
> +        return 0;
> +    }
> +
> +    switch (access) {
> +    case EXT_CSD_PART_CONFIG_ACC_DEFAULT:
> +        return boot_capacity * 2;
> +    case EXT_CSD_PART_CONFIG_ACC_BOOT0:
> +        return 0;
> +    case EXT_CSD_PART_CONFIG_ACC_BOOT0 + 1:
> +        return boot_capacity * 1;
> +    default:
> +         g_assert_not_reached();
> +    }
> +}
> +
>  static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
>  {
>      uint32_t rca = 0x0000;
> @@ -1360,6 +1388,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
>                  return sd_r1;
>              }
>
> +            if (sd->emmc) {
> +                addr += sd_bootpart_offset(sd);
> +            }
>              sd->state = sd_sendingdata_state;
>              sd->data_start = addr;
>              sd->data_offset = 0;
> @@ -1379,6 +1410,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
>                  return sd_r1;
>              }
>
> +            if (sd->emmc) {
> +                addr += sd_bootpart_offset(sd);
> +            }
>              sd->state = sd_sendingdata_state;
>              sd->data_start = addr;
>              sd->data_offset = 0;
> @@ -1435,6 +1469,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
>                  return sd_r1;
>              }
>
> +            if (sd->emmc) {
> +                addr += sd_bootpart_offset(sd);
> +            }
>              sd->state = sd_receivingdata_state;
>              sd->data_start = addr;
>              sd->data_offset = 0;
> @@ -1465,6 +1502,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
>                  return sd_r1;
>              }
>
> +            if (sd->emmc) {
> +                addr += sd_bootpart_offset(sd);
> +            }
>              sd->state = sd_receivingdata_state;
>              sd->data_start = addr;
>              sd->data_offset = 0;
> --
> 2.7.4
>
>

Re: [RFC PATCH 15/15] arm: xlnx-versal: Add emmc to versal

[Edgar E. Iglesias]

On Fri, Feb 12, 2021 at 01:37:18PM -0800, Alistair Francis wrote:
> On Thu, Feb 11, 2021 at 12:36 AM Sai Pavan Boddu
> <sai.pavan.boddu@xilinx.com> wrote:
> >
> > Configuring SDHCI-0 to act as eMMC controller.
> >
> > Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> 
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> 
> Alistair



Hi Sai,

It would be great, if EMMC somehow could be made optional.
In any case, I think this is OK!

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Could you please also add an example command-line in docs/system/arm/xlnx-versal-virt.rst?

Thanks,
Edgar



> 
> > ---
> >  hw/arm/xlnx-versal-virt.c | 16 +++++++++++-----
> >  hw/arm/xlnx-versal.c      | 14 ++++++++++++--
> >  2 files changed, 23 insertions(+), 7 deletions(-)
> >
> > diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
> > index 8482cd6..18489e4 100644
> > --- a/hw/arm/xlnx-versal-virt.c
> > +++ b/hw/arm/xlnx-versal-virt.c
> > @@ -333,6 +333,13 @@ static void fdt_add_sd_nodes(VersalVirt *s)
> >          qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
> >                                       2, addr, 2, MM_PMC_SD0_SIZE);
> >          qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
> > +        /*
> > +         * eMMC specific properties
> > +         */
> > +        if (i == 0) {
> > +            qemu_fdt_setprop(s->fdt, name, "non-removable", NULL, 0);
> > +            qemu_fdt_setprop_sized_cells(s->fdt, name, "bus-width", 1, 8);
> > +        }
> >          g_free(name);
> >      }
> >  }
> > @@ -512,7 +519,7 @@ static void create_virtio_regions(VersalVirt *s)
> >      }
> >  }
> >
> > -static void sd_plugin_card(SDHCIState *sd, DriveInfo *di)
> > +static void sd_plugin_card(SDHCIState *sd, DriveInfo *di, bool emmc)
> >  {
> >      BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
> >      DeviceState *card;
> > @@ -520,6 +527,7 @@ static void sd_plugin_card(SDHCIState *sd, DriveInfo *di)
> >      card = qdev_new(TYPE_SD_CARD);
> >      object_property_add_child(OBJECT(sd), "card[*]", OBJECT(card));
> >      qdev_prop_set_drive_err(card, "drive", blk, &error_fatal);
> > +    object_property_set_bool(OBJECT(card), "emmc", emmc, &error_fatal);
> >      qdev_realize_and_unref(card, qdev_get_child_bus(DEVICE(sd), "sd-bus"),
> >                             &error_fatal);
> >  }
> > @@ -528,7 +536,6 @@ static void versal_virt_init(MachineState *machine)
> >  {
> >      VersalVirt *s = XLNX_VERSAL_VIRT_MACHINE(machine);
> >      int psci_conduit = QEMU_PSCI_CONDUIT_DISABLED;
> > -    int i;
> >
> >      /*
> >       * If the user provides an Operating System to be loaded, we expect them
> > @@ -581,10 +588,9 @@ static void versal_virt_init(MachineState *machine)
> >      memory_region_add_subregion_overlap(get_system_memory(),
> >                                          0, &s->soc.fpd.apu.mr, 0);
> >
> > +    sd_plugin_card(&s->soc.pmc.iou.sd[0], drive_get_next(IF_EMMC), true);
> >      /* Plugin SD cards.  */
> > -    for (i = 0; i < ARRAY_SIZE(s->soc.pmc.iou.sd); i++) {
> > -        sd_plugin_card(&s->soc.pmc.iou.sd[i], drive_get_next(IF_SD));
> > -    }
> > +    sd_plugin_card(&s->soc.pmc.iou.sd[1], drive_get_next(IF_SD), false);
> >
> >      s->binfo.ram_size = machine->ram_size;
> >      s->binfo.loader_start = 0x0;
> > diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> > index b077716..3498dd9 100644
> > --- a/hw/arm/xlnx-versal.c
> > +++ b/hw/arm/xlnx-versal.c
> > @@ -230,9 +230,14 @@ static void versal_create_admas(Versal *s, qemu_irq *pic)
> >  }
> >
> >  #define SDHCI_CAPABILITIES  0x280737ec6481 /* Same as on ZynqMP.  */
> > +#define SDHCI0_CAPS ((SDHCI_CAPABILITIES & ~(3 << 30)) | \
> > +                     (1 << 30))
> > +#define SDHCI1_CAPS SDHCI_CAPABILITIES
> > +
> >  static void versal_create_sds(Versal *s, qemu_irq *pic)
> >  {
> >      int i;
> > +    uint64_t caps[] = {SDHCI0_CAPS, SDHCI1_CAPS};
> >
> >      for (i = 0; i < ARRAY_SIZE(s->pmc.iou.sd); i++) {
> >          DeviceState *dev;
> > @@ -244,9 +249,14 @@ static void versal_create_sds(Versal *s, qemu_irq *pic)
> >
> >          object_property_set_uint(OBJECT(dev), "sd-spec-version", 3,
> >                                   &error_fatal);
> > -        object_property_set_uint(OBJECT(dev), "capareg", SDHCI_CAPABILITIES,
> > +        object_property_set_uint(OBJECT(dev), "capareg", caps[i],
> >                                   &error_fatal);
> > -        object_property_set_uint(OBJECT(dev), "uhs", UHS_I, &error_fatal);
> > +        /*
> > +         * UHS is not applicable for eMMC
> > +         */
> > +        if (i == 1) {
> > +            object_property_set_uint(OBJECT(dev), "uhs", UHS_I, &error_fatal);
> > +        }
> >          sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
> >
> >          mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
> > --
> > 2.7.4
> >
> >

Re: [RFC PATCH 11/15] sd: emmc: Add Extended CSD register definitions

[Luc Michel]

On 2/11/21 9:17 AM, Sai Pavan Boddu wrote:
> From: Cédric Le Goater <clg@kaod.org>
> 
> Add user friendly macros for EXT_CSD register. >
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> [spb: Rebased over versal emmc series,
>        updated commit message]
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>

Hi,

If Cédric agrees, maybe you can squash this commit into patch 2, and add 
the missing register definitions?

Also, can you set diff.orderFile = script/git.orderfile in your git 
config for your QEMU repo? It makes the review process a bit easier.

Thanks!

-- 
Luc

> ---
>   hw/sd/sd.c             | 54 +++++++++++++++-------------
>   hw/sd/sdmmc-internal.h | 97 ++++++++++++++++++++++++++++++++++++++++++++++++++
>   2 files changed, 126 insertions(+), 25 deletions(-)
> 
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index 45311fa..54fba7b 100644
> --- a/hw/sd/sd.c
> +++ b/hw/sd/sd.c
> @@ -398,41 +398,45 @@ static void mmc_set_ext_csd(SDState *sd, uint64_t size)
>       uint32_t sectcount = size >> HWBLOCK_SHIFT;
>   
>       memset(sd->ext_csd, 0, 512);
> -    sd->ext_csd[504] = 0x1; /* supported command sets */
> -    sd->ext_csd[503] = 0x1; /* HPI features  */
> -    sd->ext_csd[502] = 0x1; /* Background operations support */
> +    sd->ext_csd[EXT_CSD_S_CMD_SET] = 0x1; /* supported command sets */
> +    sd->ext_csd[EXT_CSD_HPI_FEATURES] = 0x3; /* HPI features  */
> +    sd->ext_csd[EXT_CSD_BKOPS_SUPPORT] = 0x1; /* Background operations
> +                                                 support */
>       sd->ext_csd[241] = 0xA; /* 1st initialization time after partitioning */
> -    sd->ext_csd[232] = 0x1; /* Trim multiplier */
> -    sd->ext_csd[231] = 0x15; /* Secure feature support */
> -    sd->ext_csd[230] = 0x96; /* Secure erase support */
> -    sd->ext_csd[229] = 0x96; /* Secure TRIM multiplier */
> -    sd->ext_csd[228] = 0x7; /* Boot information */
> -    sd->ext_csd[226] = 0x8; /* Boot partition size */
> -    sd->ext_csd[225] = 0x6; /* Access size */
> -    sd->ext_csd[224] = 0x4; /* HC Erase unit size */
> -    sd->ext_csd[223] = 0x1; /* HC erase timeout */
> -    sd->ext_csd[222] = 0x1; /* Reliable write sector count */
> -    sd->ext_csd[221] = 0x4; /* HC write protect group size */
> -    sd->ext_csd[220] = 0x8; /* Sleep current VCC  */
> -    sd->ext_csd[219] = 0x7; /* Sleep current VCCQ */
> -    sd->ext_csd[217] = 0x11; /* Sleep/Awake timeout */
> +    sd->ext_csd[EXT_CSD_TRIM_MULT] = 0x1; /* Trim multiplier */
> +    sd->ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT] = 0x15; /* Secure feature
> +                                                        support */
> +    sd->ext_csd[EXT_CSD_SEC_ERASE_MULT] = 0x96; /* Secure erase support */
> +    sd->ext_csd[EXT_CSD_SEC_TRIM_MULT] = 0x96; /* Secure TRIM multiplier */
> +    sd->ext_csd[EXT_CSD_BOOT_INFO] = 0x7; /* Boot information */
> +    sd->ext_csd[EXT_CSD_BOOT_MULT] = 0x8; /* Boot partition size. 128KB unit */
> +    sd->ext_csd[EXT_CSD_ACC_SIZE] = 0x6; /* Access size */
> +    sd->ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] = 0x4; /* HC Erase unit size */
> +    sd->ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT] = 0x1; /* HC erase timeout */
> +    sd->ext_csd[EXT_CSD_REL_WR_SEC_C] = 0x1; /* Reliable write sector count */
> +    sd->ext_csd[EXT_CSD_HC_WP_GRP_SIZE] = 0x4; /* HC write protect group size */
> +    sd->ext_csd[EXT_CSD_S_C_VCC] = 0x8; /* Sleep current VCC  */
> +    sd->ext_csd[EXT_CSD_S_C_VCCQ] = 0x7; /* Sleep current VCCQ */
> +    sd->ext_csd[EXT_CSD_S_A_TIMEOUT] = 0x11; /* Sleep/Awake timeout */
>       sd->ext_csd[215] = (sectcount >> 24) & 0xff; /* Sector count */
>       sd->ext_csd[214] = (sectcount >> 16) & 0xff; /* ... */
>       sd->ext_csd[213] = (sectcount >> 8) & 0xff;  /* ... */
> -    sd->ext_csd[212] = (sectcount & 0xff);       /* ... */
> +    sd->ext_csd[EXT_CSD_SEC_CNT] = (sectcount & 0xff);       /* ... */
>       sd->ext_csd[210] = 0xa; /* Min write perf for 8bit@52Mhz */
>       sd->ext_csd[209] = 0xa; /* Min read perf for 8bit@52Mhz  */
>       sd->ext_csd[208] = 0xa; /* Min write perf for 4bit@52Mhz */
>       sd->ext_csd[207] = 0xa; /* Min read perf for 4bit@52Mhz */
>       sd->ext_csd[206] = 0xa; /* Min write perf for 4bit@26Mhz */
>       sd->ext_csd[205] = 0xa; /* Min read perf for 4bit@26Mhz */
> -    sd->ext_csd[199] = 0x1; /* Partition switching timing */
> -    sd->ext_csd[198] = 0x1; /* Out-of-interrupt busy timing */
> -    sd->ext_csd[196] = 0xFF; /* Card type */
> -    sd->ext_csd[194] = 0x2; /* CSD Structure version */
> -    sd->ext_csd[192] = 0x5; /* Extended CSD revision */
> -    sd->ext_csd[168] = 0x1; /* RPMB size */
> -    sd->ext_csd[160] = 0x3; /* Partinioning support */
> +    sd->ext_csd[EXT_CSD_PART_SWITCH_TIME] = 0x1; /* Partition switching
> +                                                    timing */
> +    sd->ext_csd[EXT_CSD_OUT_OF_INTERRUPT_TIME] = 0x1; /* Out-of-interrupt busy
> +                                                         timing */
> +    sd->ext_csd[EXT_CSD_CARD_TYPE] = 0xFF; /* Card type */
> +    sd->ext_csd[EXT_CSD_STRUCTURE] = 0x2; /* CSD Structure version */
> +    sd->ext_csd[EXT_CSD_REV] = 0x5; /* Extended CSD revision */
> +    sd->ext_csd[EXT_CSD_RPMB_MULT] = 0x1; /* RPMB size */
> +    sd->ext_csd[EXT_CSD_PARTITION_SUPPORT] = 0x3; /* Partinioning support */

typo: Partitioning

>       sd->ext_csd[159] = 0x00; /* Max enhanced area size */
>       sd->ext_csd[158] = 0x00; /* ... */
>       sd->ext_csd[157] = 0xEC; /* ... */
> diff --git a/hw/sd/sdmmc-internal.h b/hw/sd/sdmmc-internal.h
> index d8bf17d..7ab7b4d 100644
> --- a/hw/sd/sdmmc-internal.h
> +++ b/hw/sd/sdmmc-internal.h
> @@ -37,4 +37,101 @@ const char *sd_cmd_name(uint8_t cmd);
>    */
>   const char *sd_acmd_name(uint8_t cmd);
>   
> +/*
> + * EXT_CSD fields
> + */
> +
> +#define EXT_CSD_CMDQ_MODE_EN    15  /* R/W */
> +#define EXT_CSD_FLUSH_CACHE   32      /* W */
> +#define EXT_CSD_CACHE_CTRL    33      /* R/W */
> +#define EXT_CSD_POWER_OFF_NOTIFICATION  34  /* R/W */
> +#define EXT_CSD_PACKED_FAILURE_INDEX  35  /* RO */
> +#define EXT_CSD_PACKED_CMD_STATUS 36  /* RO */
> +#define EXT_CSD_EXP_EVENTS_STATUS 54  /* RO, 2 bytes */
> +#define EXT_CSD_EXP_EVENTS_CTRL   56  /* R/W, 2 bytes */
> +#define EXT_CSD_DATA_SECTOR_SIZE  61  /* R */
> +#define EXT_CSD_GP_SIZE_MULT    143 /* R/W */
> +#define EXT_CSD_PARTITION_SETTING_COMPLETED 155 /* R/W */
> +#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */
> +#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */
> +#define EXT_CSD_HPI_MGMT    161 /* R/W */
> +#define EXT_CSD_RST_N_FUNCTION    162 /* R/W */
> +#define EXT_CSD_BKOPS_EN    163 /* R/W */
> +#define EXT_CSD_BKOPS_START   164 /* W */
> +#define EXT_CSD_SANITIZE_START    165     /* W */
> +#define EXT_CSD_WR_REL_PARAM    166 /* RO */
> +#define EXT_CSD_RPMB_MULT   168 /* RO */
> +#define EXT_CSD_FW_CONFIG   169 /* R/W */
> +#define EXT_CSD_BOOT_WP     173 /* R/W */
> +#define EXT_CSD_ERASE_GROUP_DEF   175 /* R/W */
> +#define EXT_CSD_PART_CONFIG   179 /* R/W */
> +#define EXT_CSD_ERASED_MEM_CONT   181 /* RO */
> +#define EXT_CSD_BUS_WIDTH   183 /* R/W */
> +#define EXT_CSD_STROBE_SUPPORT    184 /* RO */
> +#define EXT_CSD_HS_TIMING   185 /* R/W */
> +#define EXT_CSD_POWER_CLASS   187 /* R/W */
> +#define EXT_CSD_REV     192 /* RO */
> +#define EXT_CSD_STRUCTURE   194 /* RO */
> +#define EXT_CSD_CARD_TYPE   196 /* RO */
> +#define EXT_CSD_DRIVER_STRENGTH   197 /* RO */
> +#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */
> +#define EXT_CSD_PART_SWITCH_TIME        199     /* RO */
> +#define EXT_CSD_PWR_CL_52_195   200 /* RO */
> +#define EXT_CSD_PWR_CL_26_195   201 /* RO */
> +#define EXT_CSD_PWR_CL_52_360   202 /* RO */
> +#define EXT_CSD_PWR_CL_26_360   203 /* RO */
> +#define EXT_CSD_SEC_CNT     212 /* RO, 4 bytes */
> +#define EXT_CSD_S_A_TIMEOUT   217 /* RO */
> +#define EXT_CSD_S_C_VCCQ          219     /* RO */
> +#define EXT_CSD_S_C_VCC                 220     /* RO */
> +#define EXT_CSD_REL_WR_SEC_C    222 /* RO */
> +#define EXT_CSD_HC_WP_GRP_SIZE    221 /* RO */
> +#define EXT_CSD_ERASE_TIMEOUT_MULT  223 /* RO */
> +#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
> +#define EXT_CSD_ACC_SIZE    225 /* RO */
> +#define EXT_CSD_BOOT_MULT   226 /* RO */
> +#define EXT_CSD_BOOT_INFO   228 /* RO */
> +#define EXT_CSD_SEC_TRIM_MULT   229 /* RO */
> +#define EXT_CSD_SEC_ERASE_MULT    230 /* RO */
> +#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */
> +#define EXT_CSD_TRIM_MULT   232 /* RO */
> +#define EXT_CSD_PWR_CL_200_195    236 /* RO */
> +#define EXT_CSD_PWR_CL_200_360    237 /* RO */
> +#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */
> +#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */
> +#define EXT_CSD_BKOPS_STATUS    246 /* RO */
> +#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */
> +#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
> +#define EXT_CSD_CACHE_SIZE    249 /* RO, 4 bytes */
> +#define EXT_CSD_PWR_CL_DDR_200_360  253 /* RO */
> +#define EXT_CSD_FIRMWARE_VERSION  254 /* RO, 8 bytes */
> +#define EXT_CSD_PRE_EOL_INFO    267 /* RO */
> +#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A  268 /* RO */
> +#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B  269 /* RO */
> +#define EXT_CSD_CMDQ_DEPTH    307 /* RO */
> +#define EXT_CSD_CMDQ_SUPPORT    308 /* RO */
> +#define EXT_CSD_SUPPORTED_MODE    493 /* RO */
> +#define EXT_CSD_TAG_UNIT_SIZE   498 /* RO */
> +#define EXT_CSD_DATA_TAG_SUPPORT  499 /* RO */
> +#define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */
> +#define EXT_CSD_MAX_PACKED_READS  501 /* RO */
> +#define EXT_CSD_BKOPS_SUPPORT   502 /* RO */
> +#define EXT_CSD_HPI_FEATURES    503 /* RO */
> +#define EXT_CSD_S_CMD_SET   504 /* RO */
> +
> +/*
> + * EXT_CSD field definitions
> + */
> +
> +#define EXT_CSD_WR_REL_PARAM_EN   (1 << 2)
> +#define EXT_CSD_WR_REL_PARAM_EN_RPMB_REL_WR (1 << 4)
> +
> +#define EXT_CSD_PART_CONFIG_ACC_MASK  (0x7)
> +#define EXT_CSD_PART_CONFIG_ACC_DEFAULT (0x0)
> +#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
> +
> +#define EXT_CSD_PART_CONFIG_EN_MASK (0x7 << 3)
> +#define EXT_CSD_PART_CONFIG_EN_BOOT0  (0x1 << 3)
> +#define EXT_CSD_PART_CONFIG_EN_USER (0x7 << 3)
> +
>   #endif
> 

Re: [RFC PATCH 02/15] sd: add eMMC support

[Luc Michel]

On 2/11/21 9:17 AM, Sai Pavan Boddu wrote:
> From: Vincent Palatin <vpalatin@chromium.org>
> 
> The parameters mimick a real 4GB eMMC, but it can be set to various
> sizes.
> 
> Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
> [SPB: Rebased the patch over qemu 5.1,
>        Mark eMMC to support all timing modes]
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

I find this commit hard to review in its current state. Maybe by 
splitting it into smaller commits with a small description in the commit 
message would make things easier. Eg. one patch to set the ext_csd 
fields, one for the csd, and one per command you modify.

I also noted one small thing bellow.

> ---
>   hw/sd/sd.c             | 143 +++++++++++++++++++++++++++++++++++++++++--------
>   hw/sd/sdmmc-internal.c |   2 +-
>   2 files changed, 122 insertions(+), 23 deletions(-)
> 
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index 8517dbc..a75fa1c 100644
> --- a/hw/sd/sd.c
> +++ b/hw/sd/sd.c

[snip]

> @@ -371,6 +374,51 @@ static const uint8_t sd_csd_rw_mask[16] = {
>       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfe,
>   };
>   
> +static void mmc_set_ext_csd(SDState *sd, uint64_t size)
> +{
> +    uint32_t sectcount = size >> HWBLOCK_SHIFT;
> +
> +    memset(sd->ext_csd, 0, 512);
memset(sd->ext_csd, 0, sizeof(sd->ext_csd));

-- 
Luc

> +    sd->ext_csd[504] = 0x1; /* supported command sets */
> +    sd->ext_csd[503] = 0x1; /* HPI features  */
> +    sd->ext_csd[502] = 0x1; /* Background operations support */
> +    sd->ext_csd[241] = 0xA; /* 1st initialization time after partitioning */
> +    sd->ext_csd[232] = 0x1; /* Trim multiplier */
> +    sd->ext_csd[231] = 0x15; /* Secure feature support */
> +    sd->ext_csd[230] = 0x96; /* Secure erase support */
> +    sd->ext_csd[229] = 0x96; /* Secure TRIM multiplier */
> +    sd->ext_csd[228] = 0x7; /* Boot information */
> +    sd->ext_csd[226] = 0x8; /* Boot partition size */
> +    sd->ext_csd[225] = 0x6; /* Access size */
> +    sd->ext_csd[224] = 0x4; /* HC Erase unit size */
> +    sd->ext_csd[223] = 0x1; /* HC erase timeout */
> +    sd->ext_csd[222] = 0x1; /* Reliable write sector count */
> +    sd->ext_csd[221] = 0x4; /* HC write protect group size */
> +    sd->ext_csd[220] = 0x8; /* Sleep current VCC  */
> +    sd->ext_csd[219] = 0x7; /* Sleep current VCCQ */
> +    sd->ext_csd[217] = 0x11; /* Sleep/Awake timeout */
> +    sd->ext_csd[215] = (sectcount >> 24) & 0xff; /* Sector count */
> +    sd->ext_csd[214] = (sectcount >> 16) & 0xff; /* ... */
> +    sd->ext_csd[213] = (sectcount >> 8) & 0xff;  /* ... */
> +    sd->ext_csd[212] = (sectcount & 0xff);       /* ... */
> +    sd->ext_csd[210] = 0xa; /* Min write perf for 8bit@52Mhz */
> +    sd->ext_csd[209] = 0xa; /* Min read perf for 8bit@52Mhz  */
> +    sd->ext_csd[208] = 0xa; /* Min write perf for 4bit@52Mhz */
> +    sd->ext_csd[207] = 0xa; /* Min read perf for 4bit@52Mhz */
> +    sd->ext_csd[206] = 0xa; /* Min write perf for 4bit@26Mhz */
> +    sd->ext_csd[205] = 0xa; /* Min read perf for 4bit@26Mhz */
> +    sd->ext_csd[199] = 0x1; /* Partition switching timing */
> +    sd->ext_csd[198] = 0x1; /* Out-of-interrupt busy timing */
> +    sd->ext_csd[196] = 0xFF; /* Card type */
> +    sd->ext_csd[194] = 0x2; /* CSD Structure version */
> +    sd->ext_csd[192] = 0x5; /* Extended CSD revision */
> +    sd->ext_csd[168] = 0x1; /* RPMB size */
> +    sd->ext_csd[160] = 0x3; /* Partinioning support */
> +    sd->ext_csd[159] = 0x00; /* Max enhanced area size */
> +    sd->ext_csd[158] = 0x00; /* ... */
> +    sd->ext_csd[157] = 0xEC; /* ... */
> +}
> +
>   static void sd_set_csd(SDState *sd, uint64_t size)
>   {
>       int hwblock_shift = HWBLOCK_SHIFT;
> @@ -384,7 +432,34 @@ static void sd_set_csd(SDState *sd, uint64_t size)
>       }
>       csize = (size >> (CMULT_SHIFT + hwblock_shift)) - 1;
>   
> -    if (size <= SDSC_MAX_CAPACITY) { /* Standard Capacity SD */
> +    if (sd->emmc) { /* eMMC */
> +        sd->csd[0] = 0xd0;
> +        sd->csd[1] = 0x0f;
> +        sd->csd[2] = 0x00;
> +        sd->csd[3] = 0x32;
> +        sd->csd[4] = 0x0f;
> +        if (size <= 0x80000000ULL) {
> +            /* use 1k blocks */
> +            uint32_t csize1k = (size >> (CMULT_SHIFT + 10)) - 1;
> +            sd->csd[5] = 0x5a;
> +            sd->csd[6] = 0x80 | ((csize1k >> 10) & 0xf);
> +            sd->csd[7] = (csize1k >> 2) & 0xff;
> +        } else { /* >= 2GB : size stored in ext CSD, block addressing */
> +            sd->csd[5] = 0x59;
> +            sd->csd[6] = 0x8f;
> +            sd->csd[7] = 0xff;
> +            sd->ocr |= 1 << 30;
> +        }
> +        sd->csd[8] = 0xff;
> +        sd->csd[9] = 0xff;
> +        sd->csd[10] = 0xf7;
> +        sd->csd[11] = 0xfe;
> +        sd->csd[12] = 0x49;
> +        sd->csd[13] = 0x10;
> +        sd->csd[14] = 0x00;
> +        sd->csd[15] = (sd_crc7(sd->csd, 15) << 1) | 1;
> +        mmc_set_ext_csd(sd, size);
> +    } else if (size <= SDSC_MAX_CAPACITY) { /* Standard Capacity SD */
>           sd->csd[0] = 0x00;	/* CSD structure */
>           sd->csd[1] = 0x26;	/* Data read access-time-1 */
>           sd->csd[2] = 0x00;	/* Data read access-time-2 */
> @@ -431,9 +506,13 @@ static void sd_set_csd(SDState *sd, uint64_t size)
>       sd->csd[15] = (sd_crc7(sd->csd, 15) << 1) | 1;
>   }
>   
> -static void sd_set_rca(SDState *sd)
> +static void sd_set_rca(SDState *sd, uint16_t value)
>   {
> -    sd->rca += 0x4567;
> +    if (sd->emmc) {
> +        sd->rca = value;
> +    } else {
> +        sd->rca += 0x4567;
> +    }
>   }
>   
>   FIELD(CSR, AKE_SEQ_ERROR,               3,  1)
> @@ -979,8 +1058,8 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
>           case sd_identification_state:
>           case sd_standby_state:
>               sd->state = sd_standby_state;
> -            sd_set_rca(sd);
> -            return sd_r6;
> +            sd_set_rca(sd, req.arg >> 16);
> +            return sd->emmc ? sd_r1 : sd_r6;
>   
>           default:
>               break;
> @@ -1054,24 +1133,37 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
>           }
>           break;
>   
> -    case 8:	/* CMD8:   SEND_IF_COND */
> -        if (sd->spec_version < SD_PHY_SPECv2_00_VERS) {
> -            break;
> -        }
> -        if (sd->state != sd_idle_state) {
> -            break;
> -        }
> -        sd->vhs = 0;
> -
> -        /* No response if not exactly one VHS bit is set.  */
> -        if (!(req.arg >> 8) || (req.arg >> (ctz32(req.arg & ~0xff) + 1))) {
> -            return sd->spi ? sd_r7 : sd_r0;
> -        }
> +    case 8:    /* CMD8:   SEND_IF_COND / SEND_EXT_CSD */
> +        if (sd->emmc) {
> +            switch (sd->state) {
> +            case sd_transfer_state:
> +                /* MMC : Sends the EXT_CSD register as a Block of data */
> +                sd->state = sd_sendingdata_state;
> +                memcpy(sd->data, sd->ext_csd, 512);
> +                sd->data_start = addr;
> +                sd->data_offset = 0;
> +                return sd_r1;
> +            default:
> +                break;
> +            }
> +        } else {
> +            if (sd->spec_version < SD_PHY_SPECv2_00_VERS) {
> +                break;
> +            }
> +            if (sd->state != sd_idle_state) {
> +                break;
> +            }
> +            sd->vhs = 0;
>   
> -        /* Accept.  */
> -        sd->vhs = req.arg;
> -        return sd_r7;
> +            /* No response if not exactly one VHS bit is set.  */
> +            if (!(req.arg >> 8) || (req.arg >> (ctz32(req.arg & ~0xff) + 1))) {
> +                return sd->spi ? sd_r7 : sd_r0;
> +            }
>   
> +            /* Accept.  */
> +            sd->vhs = req.arg;
> +            return sd_r7;
> +        }
>       case 9:	/* CMD9:   SEND_CSD */
>           switch (sd->state) {
>           case sd_standby_state:
> @@ -1993,7 +2085,13 @@ uint8_t sd_read_byte(SDState *sd)
>           if (sd->data_offset >= 64)
>               sd->state = sd_transfer_state;
>           break;
> +    case 8:     /* CMD8: SEND_EXT_CSD on MMC */
> +        ret = sd->data[sd->data_offset++];
>   
> +        if (sd->data_offset >= 512) {
> +            sd->state = sd_transfer_state;
> +        }
> +        break;
>       case 9:	/* CMD9:   SEND_CSD */
>       case 10:	/* CMD10:  SEND_CID */
>           ret = sd->data[sd->data_offset ++];
> @@ -2176,6 +2274,7 @@ static Property sd_properties[] = {
>        * board to ensure that ssi transfers only occur when the chip select
>        * is asserted.  */
>       DEFINE_PROP_BOOL("spi", SDState, spi, false),
> +    DEFINE_PROP_BOOL("emmc", SDState, emmc, false),
>       DEFINE_PROP_END_OF_LIST()
>   };
>   
> diff --git a/hw/sd/sdmmc-internal.c b/hw/sd/sdmmc-internal.c
> index 2053def..8648a78 100644
> --- a/hw/sd/sdmmc-internal.c
> +++ b/hw/sd/sdmmc-internal.c
> @@ -14,7 +14,7 @@
>   const char *sd_cmd_name(uint8_t cmd)
>   {
>       static const char *cmd_abbrev[SDMMC_CMD_MAX] = {
> -         [0]    = "GO_IDLE_STATE",
> +         [0]    = "GO_IDLE_STATE",           [1]    = "SEND_OP_CMD",
>            [2]    = "ALL_SEND_CID",            [3]    = "SEND_RELATIVE_ADDR",
>            [4]    = "SET_DSR",                 [5]    = "IO_SEND_OP_COND",
>            [6]    = "SWITCH_FUNC",             [7]    = "SELECT/DESELECT_CARD",
> 

RE: [RFC PATCH 09/15] sd: emmc: Add support for emmc erase

[Sai Pavan Boddu]

Hi Alistair,
> -----Original Message-----
> From: Alistair Francis <alistair23@gmail.com>
> Sent: Saturday, February 13, 2021 3:38 AM
> To: Sai Pavan Boddu <saipava@xilinx.com>
> Cc: Markus Armbruster <armbru@redhat.com>; Kevin Wolf
> <kwolf@redhat.com>; Max Reitz <mreitz@redhat.com>; Vladimir Sementsov-
> Ogievskiy <vsementsov@virtuozzo.com>; Eric Blake <eblake@redhat.com>;
> Joel Stanley <joel@jms.id.au>; Cédric Le Goater <clg@kaod.org>; Vincent
> Palatin <vpalatin@chromium.org>; Dr. David Alan Gilbert
> <dgilbert@redhat.com>; Thomas Huth <thuth@redhat.com>; Stefan Hajnoczi
> <stefanha@redhat.com>; Peter Maydell <peter.maydell@linaro.org>; Alistair
> Francis <alistair.francis@wdc.com>; Edgar Iglesias <edgari@xilinx.com>; Luc
> Michel <luc.michel@greensocs.com>; Paolo Bonzini <pbonzini@redhat.com>;
> Sai Pavan Boddu <saipava@xilinx.com>; qemu-devel@nongnu.org Developers
> <qemu-devel@nongnu.org>; Qemu-block <qemu-block@nongnu.org>
> Subject: Re: [RFC PATCH 09/15] sd: emmc: Add support for emmc erase
> 
> On Thu, Feb 11, 2021 at 12:19 AM Sai Pavan Boddu
> <sai.pavan.boddu@xilinx.com> wrote:
> >
> > Add CMD35 and CMD36 which sets the erase start and end.
> >
> > Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> > ---
> >  hw/sd/sd.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> > index 236f2b8..7aab647 100644
> > --- a/hw/sd/sd.c
> > +++ b/hw/sd/sd.c
> > @@ -1544,6 +1544,7 @@ static sd_rsp_type_t sd_normal_command(SDState
> > *sd, SDRequest req)
> >
> >      /* Erase commands (Class 5) */
> >      case 32:   /* CMD32:  ERASE_WR_BLK_START */
> > +    case 35:
> 
> Can you comment the CMD here?
[Sai Pavan Boddu] Sure I will update this.

Regards,
Sai Pavan
> 
> >          switch (sd->state) {
> >          case sd_transfer_state:
> >              sd->erase_start = req.arg; @@ -1555,6 +1556,7 @@ static
> > sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
> >          break;
> >
> >      case 33:   /* CMD33:  ERASE_WR_BLK_END */
> > +    case 36:
> 
> and here?
> 
> Alistair
> 
> >          switch (sd->state) {
> >          case sd_transfer_state:
> >              sd->erase_end = req.arg;
> > --
> > 2.7.4
> >
> >

RE: [RFC PATCH 10/15] sd: emmc: Update CID structure for eMMC

[Sai Pavan Boddu]

Hi Alistair
> -----Original Message-----
> From: Alistair Francis <alistair23@gmail.com>
> Sent: Saturday, February 13, 2021 3:41 AM
> To: Sai Pavan Boddu <saipava@xilinx.com>
> Cc: Markus Armbruster <armbru@redhat.com>; Kevin Wolf
> <kwolf@redhat.com>; Max Reitz <mreitz@redhat.com>; Vladimir Sementsov-
> Ogievskiy <vsementsov@virtuozzo.com>; Eric Blake <eblake@redhat.com>;
> Joel Stanley <joel@jms.id.au>; Cédric Le Goater <clg@kaod.org>; Vincent
> Palatin <vpalatin@chromium.org>; Dr. David Alan Gilbert
> <dgilbert@redhat.com>; Thomas Huth <thuth@redhat.com>; Stefan Hajnoczi
> <stefanha@redhat.com>; Peter Maydell <peter.maydell@linaro.org>; Alistair
> Francis <alistair.francis@wdc.com>; Edgar Iglesias <edgari@xilinx.com>; Luc
> Michel <luc.michel@greensocs.com>; Paolo Bonzini <pbonzini@redhat.com>;
> Sai Pavan Boddu <saipava@xilinx.com>; qemu-devel@nongnu.org Developers
> <qemu-devel@nongnu.org>; Qemu-block <qemu-block@nongnu.org>
> Subject: Re: [RFC PATCH 10/15] sd: emmc: Update CID structure for eMMC
> 
> On Thu, Feb 11, 2021 at 12:30 AM Sai Pavan Boddu
> <sai.pavan.boddu@xilinx.com> wrote:
> >
> > CID structure is little different for eMMC, w.r.t to product name and
> > manufacturing date.
> >
> > Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> > ---
> >  hw/sd/sd.c | 52 +++++++++++++++++++++++++++++++++++-----------------
> >  1 file changed, 35 insertions(+), 17 deletions(-)
> >
> > diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> > index 7aab647..45311fa 100644
> > --- a/hw/sd/sd.c
> > +++ b/hw/sd/sd.c
> > @@ -345,23 +345,41 @@ static void sd_set_scr(SDState *sd)
> >
> >  static void sd_set_cid(SDState *sd)
> >  {
> > -    sd->cid[0] = MID;          /* Fake card manufacturer ID (MID) */
> > -    sd->cid[1] = OID[0];       /* OEM/Application ID (OID) */
> > -    sd->cid[2] = OID[1];
> > -    sd->cid[3] = PNM[0];       /* Fake product name (PNM) */
> > -    sd->cid[4] = PNM[1];
> > -    sd->cid[5] = PNM[2];
> > -    sd->cid[6] = PNM[3];
> > -    sd->cid[7] = PNM[4];
> > -    sd->cid[8] = PRV;          /* Fake product revision (PRV) */
> > -    sd->cid[9] = 0xde;         /* Fake serial number (PSN) */
> > -    sd->cid[10] = 0xad;
> > -    sd->cid[11] = 0xbe;
> > -    sd->cid[12] = 0xef;
> > -    sd->cid[13] = 0x00 |       /* Manufacture date (MDT) */
> > -        ((MDT_YR - 2000) / 10);
> > -    sd->cid[14] = ((MDT_YR % 10) << 4) | MDT_MON;
> > -    sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
> > +    if (sd->emmc) {
> > +        sd->cid[0] = MID;
> > +        sd->cid[1] = 0x1;       /* CBX */
> > +        sd->cid[2] = OID[0];    /* OEM/Application ID (OID) */
> > +        sd->cid[3] = PNM[0];    /* Fake product name (PNM) 48bit */
> > +        sd->cid[4] = PNM[1];
> > +        sd->cid[5] = PNM[2];
> > +        sd->cid[6] = PNM[3];
> > +        sd->cid[7] = PNM[4];
> 
> Aren't the majority of these the same between the two cases? It's probably
> cleaner to split them out then.
[Sai Pavan Boddu] Yes, I would try to re-order. If I see only the PNM fields are same, rest all fields kind of moved a byte below.

Regards,
Sai Pavan
> 
> Alistair
> 
> > +        sd->cid[8] = 0x0;
> > +        sd->cid[9] = PRV;        /* Fake product revision (PRV) */
> > +        sd->cid[10] = 0xde;      /* Fake serial number (PSN) */
> > +        sd->cid[11] = 0xad;
> > +        sd->cid[12] = 0xbe;
> > +        sd->cid[13] = 0xef;
> > +        sd->cid[14] = ((MDT_YR - 1997) % 0x10); /* MDT */
> > +    } else {
> > +        sd->cid[0] = MID;       /* Fake card manufacturer ID (MID) */
> > +        sd->cid[1] = OID[0];    /* OEM/Application ID (OID) */
> > +        sd->cid[2] = OID[1];
> > +        sd->cid[3] = PNM[0];    /* Fake product name (PNM) 40bit */
> > +        sd->cid[4] = PNM[1];
> > +        sd->cid[5] = PNM[2];
> > +        sd->cid[6] = PNM[3];
> > +        sd->cid[7] = PNM[4];
> > +        sd->cid[8] = PRV;       /* Fake product revision (PRV) */
> > +        sd->cid[9] = 0xde;      /* Fake serial number (PSN) */
> > +        sd->cid[10] = 0xad;
> > +        sd->cid[11] = 0xbe;
> > +        sd->cid[12] = 0xef;
> > +        sd->cid[13] = 0x00 |    /* Manufacture date (MDT) */
> > +            ((MDT_YR - 2000) / 10);
> > +        sd->cid[14] = ((MDT_YR % 10) << 4) | MDT_MON;
> > +   }
> > +   sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
> >  }
> >
> >  #define HWBLOCK_SHIFT  9                       /* 512 bytes */
> > --
> > 2.7.4
> >
> >

RE: [RFC PATCH 11/15] sd: emmc: Add Extended CSD register definitions

[Sai Pavan Boddu]

Hi Luc,
> -----Original Message-----
> From: Luc Michel <luc.michel@greensocs.com>
> Sent: Saturday, February 13, 2021 6:26 PM
> To: Sai Pavan Boddu <saipava@xilinx.com>; Markus Armbruster
> <armbru@redhat.com>; Kevin Wolf <kwolf@redhat.com>; Max Reitz
> <mreitz@redhat.com>; Vladimir Sementsov-Ogievskiy
> <vsementsov@virtuozzo.com>; Eric Blake <eblake@redhat.com>; Joel Stanley
> <joel@jms.id.au>; Cédric Le Goater <clg@kaod.org>; Vincent Palatin
> <vpalatin@chromium.org>; Dr. David Alan Gilbert <dgilbert@redhat.com>;
> Thomas Huth <thuth@redhat.com>; Stefan Hajnoczi <stefanha@redhat.com>;
> Peter Maydell <peter.maydell@linaro.org>; Alistair Francis
> <alistair.francis@wdc.com>; Edgar Iglesias <edgari@xilinx.com>; Paolo Bonzini
> <pbonzini@redhat.com>
> Cc: qemu-block@nongnu.org; qemu-devel@nongnu.org; Sai Pavan Boddu
> <saipava@xilinx.com>
> Subject: Re: [RFC PATCH 11/15] sd: emmc: Add Extended CSD register
> definitions
> 
> On 2/11/21 9:17 AM, Sai Pavan Boddu wrote:
> > From: Cédric Le Goater <clg@kaod.org>
> >
> > Add user friendly macros for EXT_CSD register. >
> > Signed-off-by: Cédric Le Goater <clg@kaod.org>
> > [spb: Rebased over versal emmc series,
> >        updated commit message]
> > Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> 
> Hi,
> 
> If Cédric agrees, maybe you can squash this commit into patch 2, and add the
> missing register definitions?
[Sai Pavan Boddu] Yeah, that would be nice. I will leave @Cédric Le Goater comment here.
> 
> Also, can you set diff.orderFile = script/git.orderfile in your git config for your
> QEMU repo? It makes the review process a bit easier.
[Sai Pavan Boddu] Ok, I would configure this. Thanks !

Regards,
Sai Pavan
> 
> Thanks!
> 
> --
> Luc
> 
> > ---
> >   hw/sd/sd.c             | 54 +++++++++++++++-------------
> >   hw/sd/sdmmc-internal.h | 97
> ++++++++++++++++++++++++++++++++++++++++++++++++++
> >   2 files changed, 126 insertions(+), 25 deletions(-)
> >
> > diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> > index 45311fa..54fba7b 100644
> > --- a/hw/sd/sd.c
> > +++ b/hw/sd/sd.c
> > @@ -398,41 +398,45 @@ static void mmc_set_ext_csd(SDState *sd, uint64_t
> size)
> >       uint32_t sectcount = size >> HWBLOCK_SHIFT;
> >
> >       memset(sd->ext_csd, 0, 512);
> > -    sd->ext_csd[504] = 0x1; /* supported command sets */
> > -    sd->ext_csd[503] = 0x1; /* HPI features  */
> > -    sd->ext_csd[502] = 0x1; /* Background operations support */
> > +    sd->ext_csd[EXT_CSD_S_CMD_SET] = 0x1; /* supported command sets */
> > +    sd->ext_csd[EXT_CSD_HPI_FEATURES] = 0x3; /* HPI features  */
> > +    sd->ext_csd[EXT_CSD_BKOPS_SUPPORT] = 0x1; /* Background operations
> > +                                                 support */
> >       sd->ext_csd[241] = 0xA; /* 1st initialization time after partitioning */
> > -    sd->ext_csd[232] = 0x1; /* Trim multiplier */
> > -    sd->ext_csd[231] = 0x15; /* Secure feature support */
> > -    sd->ext_csd[230] = 0x96; /* Secure erase support */
> > -    sd->ext_csd[229] = 0x96; /* Secure TRIM multiplier */
> > -    sd->ext_csd[228] = 0x7; /* Boot information */
> > -    sd->ext_csd[226] = 0x8; /* Boot partition size */
> > -    sd->ext_csd[225] = 0x6; /* Access size */
> > -    sd->ext_csd[224] = 0x4; /* HC Erase unit size */
> > -    sd->ext_csd[223] = 0x1; /* HC erase timeout */
> > -    sd->ext_csd[222] = 0x1; /* Reliable write sector count */
> > -    sd->ext_csd[221] = 0x4; /* HC write protect group size */
> > -    sd->ext_csd[220] = 0x8; /* Sleep current VCC  */
> > -    sd->ext_csd[219] = 0x7; /* Sleep current VCCQ */
> > -    sd->ext_csd[217] = 0x11; /* Sleep/Awake timeout */
> > +    sd->ext_csd[EXT_CSD_TRIM_MULT] = 0x1; /* Trim multiplier */
> > +    sd->ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT] = 0x15; /* Secure feature
> > +                                                        support */
> > +    sd->ext_csd[EXT_CSD_SEC_ERASE_MULT] = 0x96; /* Secure erase support
> */
> > +    sd->ext_csd[EXT_CSD_SEC_TRIM_MULT] = 0x96; /* Secure TRIM
> multiplier */
> > +    sd->ext_csd[EXT_CSD_BOOT_INFO] = 0x7; /* Boot information */
> > +    sd->ext_csd[EXT_CSD_BOOT_MULT] = 0x8; /* Boot partition size. 128KB
> unit */
> > +    sd->ext_csd[EXT_CSD_ACC_SIZE] = 0x6; /* Access size */
> > +    sd->ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] = 0x4; /* HC Erase unit size
> */
> > +    sd->ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT] = 0x1; /* HC erase
> timeout */
> > +    sd->ext_csd[EXT_CSD_REL_WR_SEC_C] = 0x1; /* Reliable write sector
> count */
> > +    sd->ext_csd[EXT_CSD_HC_WP_GRP_SIZE] = 0x4; /* HC write protect
> group size */
> > +    sd->ext_csd[EXT_CSD_S_C_VCC] = 0x8; /* Sleep current VCC  */
> > +    sd->ext_csd[EXT_CSD_S_C_VCCQ] = 0x7; /* Sleep current VCCQ */
> > +    sd->ext_csd[EXT_CSD_S_A_TIMEOUT] = 0x11; /* Sleep/Awake timeout
> > + */
> >       sd->ext_csd[215] = (sectcount >> 24) & 0xff; /* Sector count */
> >       sd->ext_csd[214] = (sectcount >> 16) & 0xff; /* ... */
> >       sd->ext_csd[213] = (sectcount >> 8) & 0xff;  /* ... */
> > -    sd->ext_csd[212] = (sectcount & 0xff);       /* ... */
> > +    sd->ext_csd[EXT_CSD_SEC_CNT] = (sectcount & 0xff);       /* ... */
> >       sd->ext_csd[210] = 0xa; /* Min write perf for 8bit@52Mhz */
> >       sd->ext_csd[209] = 0xa; /* Min read perf for 8bit@52Mhz  */
> >       sd->ext_csd[208] = 0xa; /* Min write perf for 4bit@52Mhz */
> >       sd->ext_csd[207] = 0xa; /* Min read perf for 4bit@52Mhz */
> >       sd->ext_csd[206] = 0xa; /* Min write perf for 4bit@26Mhz */
> >       sd->ext_csd[205] = 0xa; /* Min read perf for 4bit@26Mhz */
> > -    sd->ext_csd[199] = 0x1; /* Partition switching timing */
> > -    sd->ext_csd[198] = 0x1; /* Out-of-interrupt busy timing */
> > -    sd->ext_csd[196] = 0xFF; /* Card type */
> > -    sd->ext_csd[194] = 0x2; /* CSD Structure version */
> > -    sd->ext_csd[192] = 0x5; /* Extended CSD revision */
> > -    sd->ext_csd[168] = 0x1; /* RPMB size */
> > -    sd->ext_csd[160] = 0x3; /* Partinioning support */
> > +    sd->ext_csd[EXT_CSD_PART_SWITCH_TIME] = 0x1; /* Partition switching
> > +                                                    timing */
> > +    sd->ext_csd[EXT_CSD_OUT_OF_INTERRUPT_TIME] = 0x1; /* Out-of-
> interrupt busy
> > +                                                         timing */
> > +    sd->ext_csd[EXT_CSD_CARD_TYPE] = 0xFF; /* Card type */
> > +    sd->ext_csd[EXT_CSD_STRUCTURE] = 0x2; /* CSD Structure version */
> > +    sd->ext_csd[EXT_CSD_REV] = 0x5; /* Extended CSD revision */
> > +    sd->ext_csd[EXT_CSD_RPMB_MULT] = 0x1; /* RPMB size */
> > +    sd->ext_csd[EXT_CSD_PARTITION_SUPPORT] = 0x3; /* Partinioning
> > + support */
> 
> typo: Partitioning
> 
> >       sd->ext_csd[159] = 0x00; /* Max enhanced area size */
> >       sd->ext_csd[158] = 0x00; /* ... */
> >       sd->ext_csd[157] = 0xEC; /* ... */ diff --git
> > a/hw/sd/sdmmc-internal.h b/hw/sd/sdmmc-internal.h index
> > d8bf17d..7ab7b4d 100644
> > --- a/hw/sd/sdmmc-internal.h
> > +++ b/hw/sd/sdmmc-internal.h
> > @@ -37,4 +37,101 @@ const char *sd_cmd_name(uint8_t cmd);
> >    */
> >   const char *sd_acmd_name(uint8_t cmd);
> >
> > +/*
> > + * EXT_CSD fields
> > + */
> > +
> > +#define EXT_CSD_CMDQ_MODE_EN    15  /* R/W */
> > +#define EXT_CSD_FLUSH_CACHE   32      /* W */
> > +#define EXT_CSD_CACHE_CTRL    33      /* R/W */
> > +#define EXT_CSD_POWER_OFF_NOTIFICATION  34  /* R/W */ #define
> > +EXT_CSD_PACKED_FAILURE_INDEX  35  /* RO */ #define
> > +EXT_CSD_PACKED_CMD_STATUS 36  /* RO */ #define
> > +EXT_CSD_EXP_EVENTS_STATUS 54  /* RO, 2 bytes */
> > +#define EXT_CSD_EXP_EVENTS_CTRL   56  /* R/W, 2 bytes */
> > +#define EXT_CSD_DATA_SECTOR_SIZE  61  /* R */
> > +#define EXT_CSD_GP_SIZE_MULT    143 /* R/W */
> > +#define EXT_CSD_PARTITION_SETTING_COMPLETED 155 /* R/W */ #define
> > +EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */ #define
> > +EXT_CSD_PARTITION_SUPPORT 160 /* RO */
> > +#define EXT_CSD_HPI_MGMT    161 /* R/W */
> > +#define EXT_CSD_RST_N_FUNCTION    162 /* R/W */
> > +#define EXT_CSD_BKOPS_EN    163 /* R/W */
> > +#define EXT_CSD_BKOPS_START   164 /* W */
> > +#define EXT_CSD_SANITIZE_START    165     /* W */
> > +#define EXT_CSD_WR_REL_PARAM    166 /* RO */
> > +#define EXT_CSD_RPMB_MULT   168 /* RO */
> > +#define EXT_CSD_FW_CONFIG   169 /* R/W */
> > +#define EXT_CSD_BOOT_WP     173 /* R/W */
> > +#define EXT_CSD_ERASE_GROUP_DEF   175 /* R/W */
> > +#define EXT_CSD_PART_CONFIG   179 /* R/W */
> > +#define EXT_CSD_ERASED_MEM_CONT   181 /* RO */
> > +#define EXT_CSD_BUS_WIDTH   183 /* R/W */
> > +#define EXT_CSD_STROBE_SUPPORT    184 /* RO */
> > +#define EXT_CSD_HS_TIMING   185 /* R/W */
> > +#define EXT_CSD_POWER_CLASS   187 /* R/W */
> > +#define EXT_CSD_REV     192 /* RO */
> > +#define EXT_CSD_STRUCTURE   194 /* RO */
> > +#define EXT_CSD_CARD_TYPE   196 /* RO */
> > +#define EXT_CSD_DRIVER_STRENGTH   197 /* RO */
> > +#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */
> > +#define EXT_CSD_PART_SWITCH_TIME        199     /* RO */
> > +#define EXT_CSD_PWR_CL_52_195   200 /* RO */
> > +#define EXT_CSD_PWR_CL_26_195   201 /* RO */
> > +#define EXT_CSD_PWR_CL_52_360   202 /* RO */
> > +#define EXT_CSD_PWR_CL_26_360   203 /* RO */
> > +#define EXT_CSD_SEC_CNT     212 /* RO, 4 bytes */
> > +#define EXT_CSD_S_A_TIMEOUT   217 /* RO */
> > +#define EXT_CSD_S_C_VCCQ          219     /* RO */
> > +#define EXT_CSD_S_C_VCC                 220     /* RO */
> > +#define EXT_CSD_REL_WR_SEC_C    222 /* RO */
> > +#define EXT_CSD_HC_WP_GRP_SIZE    221 /* RO */
> > +#define EXT_CSD_ERASE_TIMEOUT_MULT  223 /* RO */ #define
> > +EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
> > +#define EXT_CSD_ACC_SIZE    225 /* RO */
> > +#define EXT_CSD_BOOT_MULT   226 /* RO */
> > +#define EXT_CSD_BOOT_INFO   228 /* RO */
> > +#define EXT_CSD_SEC_TRIM_MULT   229 /* RO */
> > +#define EXT_CSD_SEC_ERASE_MULT    230 /* RO */
> > +#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */
> > +#define EXT_CSD_TRIM_MULT   232 /* RO */
> > +#define EXT_CSD_PWR_CL_200_195    236 /* RO */
> > +#define EXT_CSD_PWR_CL_200_360    237 /* RO */
> > +#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */ #define
> > +EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */
> > +#define EXT_CSD_BKOPS_STATUS    246 /* RO */
> > +#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */ #define
> > +EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
> > +#define EXT_CSD_CACHE_SIZE    249 /* RO, 4 bytes */
> > +#define EXT_CSD_PWR_CL_DDR_200_360  253 /* RO */ #define
> > +EXT_CSD_FIRMWARE_VERSION  254 /* RO, 8 bytes */
> > +#define EXT_CSD_PRE_EOL_INFO    267 /* RO */
> > +#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A  268 /* RO */ #define
> > +EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B  269 /* RO */
> > +#define EXT_CSD_CMDQ_DEPTH    307 /* RO */
> > +#define EXT_CSD_CMDQ_SUPPORT    308 /* RO */
> > +#define EXT_CSD_SUPPORTED_MODE    493 /* RO */
> > +#define EXT_CSD_TAG_UNIT_SIZE   498 /* RO */
> > +#define EXT_CSD_DATA_TAG_SUPPORT  499 /* RO */ #define
> > +EXT_CSD_MAX_PACKED_WRITES 500 /* RO */ #define
> > +EXT_CSD_MAX_PACKED_READS  501 /* RO */
> > +#define EXT_CSD_BKOPS_SUPPORT   502 /* RO */
> > +#define EXT_CSD_HPI_FEATURES    503 /* RO */
> > +#define EXT_CSD_S_CMD_SET   504 /* RO */
> > +
> > +/*
> > + * EXT_CSD field definitions
> > + */
> > +
> > +#define EXT_CSD_WR_REL_PARAM_EN   (1 << 2)
> > +#define EXT_CSD_WR_REL_PARAM_EN_RPMB_REL_WR (1 << 4)
> > +
> > +#define EXT_CSD_PART_CONFIG_ACC_MASK  (0x7) #define
> > +EXT_CSD_PART_CONFIG_ACC_DEFAULT (0x0) #define
> > +EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
> > +
> > +#define EXT_CSD_PART_CONFIG_EN_MASK (0x7 << 3) #define
> > +EXT_CSD_PART_CONFIG_EN_BOOT0  (0x1 << 3) #define
> > +EXT_CSD_PART_CONFIG_EN_USER (0x7 << 3)
> > +
> >   #endif
> >

Re: [RFC PATCH 11/15] sd: emmc: Add Extended CSD register definitions

[Cédric Le Goater]

On 2/16/21 12:11 PM, Sai Pavan Boddu wrote:
> Hi Luc,
>> -----Original Message-----
>> From: Luc Michel <luc.michel@greensocs.com>
>> Sent: Saturday, February 13, 2021 6:26 PM
>> To: Sai Pavan Boddu <saipava@xilinx.com>; Markus Armbruster
>> <armbru@redhat.com>; Kevin Wolf <kwolf@redhat.com>; Max Reitz
>> <mreitz@redhat.com>; Vladimir Sementsov-Ogievskiy
>> <vsementsov@virtuozzo.com>; Eric Blake <eblake@redhat.com>; Joel Stanley
>> <joel@jms.id.au>; Cédric Le Goater <clg@kaod.org>; Vincent Palatin
>> <vpalatin@chromium.org>; Dr. David Alan Gilbert <dgilbert@redhat.com>;
>> Thomas Huth <thuth@redhat.com>; Stefan Hajnoczi <stefanha@redhat.com>;
>> Peter Maydell <peter.maydell@linaro.org>; Alistair Francis
>> <alistair.francis@wdc.com>; Edgar Iglesias <edgari@xilinx.com>; Paolo Bonzini
>> <pbonzini@redhat.com>
>> Cc: qemu-block@nongnu.org; qemu-devel@nongnu.org; Sai Pavan Boddu
>> <saipava@xilinx.com>
>> Subject: Re: [RFC PATCH 11/15] sd: emmc: Add Extended CSD register
>> definitions
>>
>> On 2/11/21 9:17 AM, Sai Pavan Boddu wrote:
>>> From: Cédric Le Goater <clg@kaod.org>
>>>
>>> Add user friendly macros for EXT_CSD register. >
>>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>>> [spb: Rebased over versal emmc series,
>>>        updated commit message]
>>> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
>>
>> Hi,
>>
>> If Cédric agrees, maybe you can squash this commit into patch 2, and add the
>> missing register definitions?
> [Sai Pavan Boddu] Yeah, that would be nice. I will leave @Cédric Le Goater comment here.

Sure. I hope you did in v2. Sorry I was out.

Thanks,

C.