Cavium OCTEONTX ssovf eventdev PMD

Cavium OCTEONTX ssovf eventdev PMD

[Jerin Jacob]

The following patch set adds Cavium OCTEONTX HW based eventdev
implementation to the next-eventdev tree.

Introduction to OCTEON-TX ARM processors can be found
here: http://www.cavium.com/OCTEON-TX_ARM_Processors.html

The first two patches in the series make changes to the eventdev
API and common test.

The Third patch in the series is to fix intra drivers dependencies
for the shared build(Posted by Shreyansh)

4-21 patches implement eventdev API with OCTEONTX SSOVF HW.

22-38 patches implement OCTEONTX specific test cases to validate
the driver. The test cases are usecase driven and it does not really depend on
OCTEONTX SSOVF PMD nor it doesn't invoke any PMD specific APIs.
I have created this unit test cases to validate the different use case with
eventdev.Probably, We can coverage all the PMD specific test cases under
common tests as a next step.

Performance and latency test case are missing in this patch set,
probably we need to add those in next step as the common test case.

Finally, The 39th patch adds the SSOVF documentation for build and
run instructions on OCTEONTX board.I have added only octeontx specific documentation.
We need to add the top-level overview page like(ethdev and cryptodev subsystem).
I think it will be only possible at least two drivers have documentation and
once we come up with the feature lists like ethdev and crypto devs.
I have enumerated a few of them in OCTEONTX PMD documentation.Looking forward
to seeing other vendor documentation to converge and create the overview page.

The patchset is Git log is clean, while check patch issues:
1) 1 Error on Complex Macro (which I believe it cannot be fixed) # Patch 17
2) 1 Error on spacing while using gcc inline assembly(it is false positive) # patch 17

Jerin Jacob (38):
  eventdev: update PMD dequeue timeout conversion callback
  app/test: fix eventdev reconfigure test
  event/octeontx: add build and log infrastructure
  event/octeontx: probe ssovf pcie devices
  event/octeontx: probe ssowvf pcie devices
  event/octeontx: add vdev interface functions
  event/octeontx: add mailbox support
  event/octeontx: add octeontx eventdev driver
  event/octeontx: add device capabilities function
  event/octeontx: add configure function
  event/octeontx: add support for event queues
  event/octeontx: add support for event ports
  event/octeontx: add support for linking queues to ports
  event/octeontx: add support dequeue timeout tick conversion
  event/octeontx: add dump function for easier debugging
  event/octeontx: add SSO HW device operations
  event/octeontx: add support worker enqueue function
  event/octeontx: add support worker dequeue function
  event/octeontx: add start function
  event/octeontx: add stop and close function
  app/test: octeontx eventdev unit test infrastructure
  app/test: octeontx unit test case setup and teardown
  app/test: octeontx unit test case helper functions
  app/test: octeontx simple event enqueue and dequeue test
  app/test: octeontx multi queue enqueue and dequeue test
  app/test: octeontx eventdev priority test
  app/test: add infrastructure for multicore octeontx tests
  app/test: octeontx multi queue and multi core/port tests
  app/test: octeontx single link establishment test
  app/test: octeontx multi link establishment test
  app/test: octeontx flow based two stage sched type test
  app/test: octeontx queue based two stage sched type test
  app/test: octeontx flow based maximum stage pipeline
  app/test: octeontx queue based maximum stage pipeline
  app/test: octeontx queue and flow based max stage pipeline
  app/test: octeontx producer-consumer based order test
  app/test: add remaining tests based on existing helpers
  doc: add OCTEONTX ssovf details

Shreyansh Jain (1):
  mk: handle intra drivers dependencies for shared build

 MAINTAINERS                                        |    9 +
 app/test/Makefile                                  |    5 +-
 app/test/test_eventdev.c                           |    4 +-
 app/test/test_eventdev_octeontx.c                  | 1398 ++++++++++++++++++++
 config/common_base                                 |    6 +
 config/defconfig_arm64-thunderx-linuxapp-gcc       |    6 +
 doc/guides/eventdevs/index.rst                     |   38 +
 doc/guides/eventdevs/octeontx.rst                  |  131 ++
 doc/guides/index.rst                               |    1 +
 drivers/event/Makefile                             |    1 +
 drivers/event/octeontx/Makefile                    |   65 +
 drivers/event/octeontx/rte_pmd_octeontx_ssovf.h    |   61 +
 .../octeontx/rte_pmd_octeontx_ssovf_version.map    |    9 +
 drivers/event/octeontx/ssovf_evdev.c               |  567 ++++++++
 drivers/event/octeontx/ssovf_evdev.h               |  203 +++
 drivers/event/octeontx/ssovf_mbox.c                |  232 ++++
 drivers/event/octeontx/ssovf_probe.c               |  285 ++++
 drivers/event/octeontx/ssovf_worker.c              |  358 +++++
 drivers/event/skeleton/skeleton_eventdev.c         |    4 +-
 lib/librte_eventdev/rte_eventdev.c                 |    3 +-
 lib/librte_eventdev/rte_eventdev_pmd.h             |    5 +-
 mk/rte.app.mk                                      |    1 +
 mk/rte.lib.mk                                      |    2 +-
 23 files changed, 3386 insertions(+), 8 deletions(-)
 create mode 100644 app/test/test_eventdev_octeontx.c
 create mode 100644 doc/guides/eventdevs/index.rst
 create mode 100644 doc/guides/eventdevs/octeontx.rst
 create mode 100644 drivers/event/octeontx/Makefile
 create mode 100644 drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
 create mode 100644 drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
 create mode 100644 drivers/event/octeontx/ssovf_evdev.c
 create mode 100644 drivers/event/octeontx/ssovf_evdev.h
 create mode 100644 drivers/event/octeontx/ssovf_mbox.c
 create mode 100644 drivers/event/octeontx/ssovf_probe.c
 create mode 100644 drivers/event/octeontx/ssovf_worker.c

-- 
2.5.5

[PATCH 01/39] eventdev: update PMD dequeue timeout conversion callback

[Jerin Jacob]

eventdev driver may return error on dequeue timeout tick conversion.
Change the pmd callback interface to address the same.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 drivers/event/skeleton/skeleton_eventdev.c | 4 +++-
 lib/librte_eventdev/rte_eventdev.c         | 3 +--
 lib/librte_eventdev/rte_eventdev_pmd.h     | 5 ++++-
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/event/skeleton/skeleton_eventdev.c b/drivers/event/skeleton/skeleton_eventdev.c
index dee0faf..05ec58b 100644
--- a/drivers/event/skeleton/skeleton_eventdev.c
+++ b/drivers/event/skeleton/skeleton_eventdev.c
@@ -319,7 +319,7 @@ skeleton_eventdev_port_unlink(struct rte_eventdev *dev, void *port,
 
 }
 
-static void
+static int
 skeleton_eventdev_timeout_ticks(struct rte_eventdev *dev, uint64_t ns,
 				 uint64_t *timeout_ticks)
 {
@@ -330,6 +330,8 @@ skeleton_eventdev_timeout_ticks(struct rte_eventdev *dev, uint64_t ns,
 
 	RTE_SET_USED(skel);
 	*timeout_ticks = ns * scale;
+
+	return 0;
 }
 
 static void
diff --git a/lib/librte_eventdev/rte_eventdev.c b/lib/librte_eventdev/rte_eventdev.c
index 68bfc3b..178bdcf 100644
--- a/lib/librte_eventdev/rte_eventdev.c
+++ b/lib/librte_eventdev/rte_eventdev.c
@@ -902,8 +902,7 @@ rte_event_dequeue_timeout_ticks(uint8_t dev_id, uint64_t ns,
 	if (timeout_ticks == NULL)
 		return -EINVAL;
 
-	(*dev->dev_ops->timeout_ticks)(dev, ns, timeout_ticks);
-	return 0;
+	return (*dev->dev_ops->timeout_ticks)(dev, ns, timeout_ticks);
 }
 
 int
diff --git a/lib/librte_eventdev/rte_eventdev_pmd.h b/lib/librte_eventdev/rte_eventdev_pmd.h
index 828dfce..45ac8ea 100644
--- a/lib/librte_eventdev/rte_eventdev_pmd.h
+++ b/lib/librte_eventdev/rte_eventdev_pmd.h
@@ -406,8 +406,11 @@ typedef int (*eventdev_port_unlink_t)(struct rte_eventdev *dev, void *port,
  * @param[out] timeout_ticks
  *   Value for the *timeout_ticks* parameter in rte_event_dequeue() function
  *
+ * @return
+ *   Returns 0 on success.
+ *
  */
-typedef void (*eventdev_dequeue_timeout_ticks_t)(struct rte_eventdev *dev,
+typedef int (*eventdev_dequeue_timeout_ticks_t)(struct rte_eventdev *dev,
 		uint64_t ns, uint64_t *timeout_ticks);
 
 /**
-- 
2.5.5

[PATCH 02/39] app/test: fix eventdev reconfigure test

[Jerin Jacob]

Minimum value of nb_event_ports and/or nb_event_queues
should be one before reconfiguring the event device.

Fixes: 4c9a26e419a7 ("app/test: unit test case for eventdev APIs")

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/app/test/test_eventdev.c b/app/test/test_eventdev.c
index 042a446..e087af2 100644
--- a/app/test/test_eventdev.c
+++ b/app/test/test_eventdev.c
@@ -244,8 +244,8 @@ test_eventdev_configure(void)
 
 	/* re-configure */
 	devconf_set_default_sane_values(&dev_conf, &info);
-	dev_conf.nb_event_ports = info.max_event_ports/2;
-	dev_conf.nb_event_queues = info.max_event_queues/2;
+	dev_conf.nb_event_ports = RTE_MAX(info.max_event_ports/2, 1);
+	dev_conf.nb_event_queues = RTE_MAX(info.max_event_queues/2, 1);
 	ret = rte_event_dev_configure(TEST_DEV_ID, &dev_conf);
 	TEST_ASSERT_SUCCESS(ret, "Failed to re configure eventdev");
 
-- 
2.5.5

[PATCH 03/39] mk: handle intra drivers dependencies for shared build

[Jerin Jacob]

From: Shreyansh Jain <shreyansh.jain@nxp.com>

Suggested-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
---
 mk/rte.lib.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mk/rte.lib.mk b/mk/rte.lib.mk
index 33a5f5a..ac4df9a 100644
--- a/mk/rte.lib.mk
+++ b/mk/rte.lib.mk
@@ -79,7 +79,7 @@ endif
 
 # Translate DEPDIRS-y into LDLIBS
 # Ignore (sub)directory dependencies which do not provide an actual library
-_IGNORE_DIRS = lib/librte_eal/% lib/librte_compat
+_IGNORE_DIRS = lib/librte_eal/% lib/librte_compat drivers/%
 _DEPDIRS = $(filter-out $(_IGNORE_DIRS),$(DEPDIRS-y))
 _LDDIRS = $(subst librte_ether,librte_ethdev,$(_DEPDIRS))
 LDLIBS += $(subst lib/lib,-l,$(_LDDIRS))
-- 
2.5.5

[PATCH 04/39] event/octeontx: add build and log infrastructure

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 config/common_base                                 |  6 +++
 config/defconfig_arm64-thunderx-linuxapp-gcc       |  6 +++
 drivers/event/Makefile                             |  1 +
 drivers/event/octeontx/Makefile                    | 55 +++++++++++++++++++++
 .../octeontx/rte_pmd_octeontx_ssovf_version.map    |  4 ++
 drivers/event/octeontx/ssovf_evdev.h               | 57 ++++++++++++++++++++++
 drivers/event/octeontx/ssovf_probe.c               | 32 ++++++++++++
 mk/rte.app.mk                                      |  1 +
 8 files changed, 162 insertions(+)
 create mode 100644 drivers/event/octeontx/Makefile
 create mode 100644 drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
 create mode 100644 drivers/event/octeontx/ssovf_evdev.h
 create mode 100644 drivers/event/octeontx/ssovf_probe.c

diff --git a/config/common_base b/config/common_base
index 2538f4a..a9d6ade 100644
--- a/config/common_base
+++ b/config/common_base
@@ -458,6 +458,12 @@ CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV=y
 CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n
 
 #
+# Compile PMD for octeontx sso event device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=n
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG=n
+
+#
 # Compile librte_ring
 #
 CONFIG_RTE_LIBRTE_RING=y
diff --git a/config/defconfig_arm64-thunderx-linuxapp-gcc b/config/defconfig_arm64-thunderx-linuxapp-gcc
index a5b1e24..980f86c 100644
--- a/config/defconfig_arm64-thunderx-linuxapp-gcc
+++ b/config/defconfig_arm64-thunderx-linuxapp-gcc
@@ -46,3 +46,9 @@ CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n
 CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n
 CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_DRIVER=n
 CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_MBOX=n
+
+#
+# Compile PMD for octeontx sso event device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG=n
diff --git a/drivers/event/Makefile b/drivers/event/Makefile
index 678279f..b5059dd 100644
--- a/drivers/event/Makefile
+++ b/drivers/event/Makefile
@@ -32,5 +32,6 @@
 include $(RTE_SDK)/mk/rte.vars.mk
 
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV) += skeleton
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += octeontx
 
 include $(RTE_SDK)/mk/rte.subdir.mk
diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile
new file mode 100644
index 0000000..d72ad46
--- /dev/null
+++ b/drivers/event/octeontx/Makefile
@@ -0,0 +1,55 @@
+#   BSD LICENSE
+#
+#   Copyright(c) 2017 Cavium Networks. All rights reserved.
+#   All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Cavium Networks nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+#
+# library name
+#
+LIB = librte_pmd_octeontx_ssovf.a
+
+CFLAGS += $(WERROR_FLAGS)
+
+EXPORT_MAP := rte_pmd_octeontx_ssovf_version.map
+
+LIBABIVER := 1
+
+#
+# all source are stored in SRCS-y
+#
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_probe.c
+
+# this lib depends upon:
+DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += lib/librte_eal
+DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += lib/librte_eventdev
+
+include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
new file mode 100644
index 0000000..8591cc0
--- /dev/null
+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
@@ -0,0 +1,4 @@
+DPDK_17.05 {
+
+	local: *;
+};
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
new file mode 100644
index 0000000..ce6b7d4
--- /dev/null
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -0,0 +1,57 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2017.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __SSOVF_EVDEV_H__
+#define __SSOVF_EVDEV_H__
+
+#include <rte_config.h>
+
+#define EVENTDEV_NAME_OCTEONTX_PMD event_octeontx
+
+#ifdef RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG
+#define ssovf_log_info(fmt, args...) \
+	RTE_LOG(INFO, EVENTDEV, "[%s] %s() " fmt "\n", \
+		RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args)
+#define ssovf_log_dbg(fmt, args...) \
+	RTE_LOG(DEBUG, EVENTDEV, "[%s] %s() " fmt "\n", \
+		RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args)
+#else
+#define ssovf_log_info(fmt, args...)
+#define ssovf_log_dbg(fmt, args...)
+#endif
+
+#define ssovf_func_trace ssovf_log_dbg
+#define ssovf_log_err(fmt, args...) \
+	RTE_LOG(ERR, EVENTDEV, "[%s] %s() " fmt "\n", \
+		RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args)
+
+#endif /* __SSOVF_EVDEV_H__ */
diff --git a/drivers/event/octeontx/ssovf_probe.c b/drivers/event/octeontx/ssovf_probe.c
new file mode 100644
index 0000000..9412878
--- /dev/null
+++ b/drivers/event/octeontx/ssovf_probe.c
@@ -0,0 +1,32 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2017.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
diff --git a/mk/rte.app.mk b/mk/rte.app.mk
index 3897e2e..ab4b0d6 100644
--- a/mk/rte.app.mk
+++ b/mk/rte.app.mk
@@ -154,6 +154,7 @@ endif # CONFIG_RTE_LIBRTE_CRYPTODEV
 
 ifeq ($(CONFIG_RTE_LIBRTE_EVENTDEV),y)
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV) += -lrte_pmd_skeleton_event
+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += -lrte_pmd_octeontx_ssovf
 endif # CONFIG_RTE_LIBRTE_EVENTDEV
 
 endif # !CONFIG_RTE_BUILD_SHARED_LIBS
-- 
2.5.5

[PATCH 05/39] event/octeontx: probe ssovf pcie devices

[Jerin Jacob]

An event device consists of event queues and event ports.
On Octeontx HW, each event queues(sso group/ssovf) and
event ports(sso hws/ssowvf) are enumerated as separate
SRIOV VF PCIe device.In order to expose as an event device,
On PCIe probe, the driver stores the information associated
with the PCIe device and later with vdev infrastructure
creates event device with earlier probed PCIe VF devices.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.h | 24 ++++++++++
 drivers/event/octeontx/ssovf_probe.c | 86 ++++++++++++++++++++++++++++++++++++
 2 files changed, 110 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index ce6b7d4..809eed1 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -34,6 +34,7 @@
 #define __SSOVF_EVDEV_H__
 
 #include <rte_config.h>
+#include <rte_io.h>
 
 #define EVENTDEV_NAME_OCTEONTX_PMD event_octeontx
 
@@ -54,4 +55,27 @@
 	RTE_LOG(ERR, EVENTDEV, "[%s] %s() " fmt "\n", \
 		RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args)
 
+#define PCI_VENDOR_ID_CAVIUM              0x177D
+#define PCI_DEVICE_ID_OCTEONTX_SSOGRP_VF  0xA04B
+
+#define SSO_MAX_VHGRP                     (64)
+
+/* SSO VF register offsets */
+#define SSO_VHGRP_QCTL                    (0x010ULL)
+#define SSO_VHGRP_INT                     (0x100ULL)
+#define SSO_VHGRP_INT_W1S                 (0x108ULL)
+#define SSO_VHGRP_INT_ENA_W1S             (0x110ULL)
+#define SSO_VHGRP_INT_ENA_W1C             (0x118ULL)
+#define SSO_VHGRP_INT_THR                 (0x140ULL)
+#define SSO_VHGRP_INT_CNT                 (0x180ULL)
+#define SSO_VHGRP_XAQ_CNT                 (0x1B0ULL)
+#define SSO_VHGRP_AQ_CNT                  (0x1C0ULL)
+#define SSO_VHGRP_AQ_THR                  (0x1E0ULL)
+#define SSO_VHGRP_PF_MBOX(x)              (0x200ULL | ((x) << 3))
+
+/* BAR2 */
+#define SSO_VHGRP_OP_ADD_WORK0            (0x00ULL)
+#define SSO_VHGRP_OP_ADD_WORK1            (0x08ULL)
+
+
 #endif /* __SSOVF_EVDEV_H__ */
diff --git a/drivers/event/octeontx/ssovf_probe.c b/drivers/event/octeontx/ssovf_probe.c
index 9412878..713329c 100644
--- a/drivers/event/octeontx/ssovf_probe.c
+++ b/drivers/event/octeontx/ssovf_probe.c
@@ -30,3 +30,89 @@
  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include <rte_atomic.h>
+#include <rte_common.h>
+#include <rte_eal.h>
+#include <rte_io.h>
+#include <rte_pci.h>
+
+#include "ssovf_evdev.h"
+
+struct ssovf_res {
+	uint16_t domain;
+	uint16_t vfid;
+	void *bar0;
+	void *bar2;
+};
+
+struct ssodev {
+	uint8_t total_ssovfs;
+	struct ssovf_res grp[SSO_MAX_VHGRP];
+};
+static struct ssodev sdev;
+
+/* SSOVF pcie device aka event queue probe */
+
+static int
+ssovf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
+{
+	uint64_t val;
+	uint16_t vfid;
+	uint8_t *idreg;
+	struct ssovf_res *res;
+
+	RTE_SET_USED(pci_drv);
+
+	/* For secondary processes, the primary has done all the work */
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+		return 0;
+
+	if (pci_dev->mem_resource[0].addr == NULL ||
+			pci_dev->mem_resource[2].addr == NULL) {
+		ssovf_log_err("Empty bars %p %p",
+			pci_dev->mem_resource[0].addr,
+			pci_dev->mem_resource[2].addr);
+		return -ENODEV;
+	}
+	idreg = pci_dev->mem_resource[0].addr;
+	idreg += SSO_VHGRP_AQ_THR;
+	val = rte_read64(idreg);
+
+	/* Write back the default value of aq_thr */
+	rte_write64((1ULL << 33) - 1, idreg);
+	vfid = (val >> 16) & 0xffff;
+	if (vfid >= SSO_MAX_VHGRP) {
+		ssovf_log_err("Invalid vfid (%d/%d)", vfid, SSO_MAX_VHGRP);
+		return -EINVAL;
+	}
+
+	res = &sdev.grp[vfid];
+	res->vfid = vfid;
+	res->bar0 = pci_dev->mem_resource[0].addr;
+	res->bar2 = pci_dev->mem_resource[2].addr;
+	res->domain = val & 0xffff;
+
+	sdev.total_ssovfs++;
+	rte_wmb();
+	ssovf_log_dbg("Domain=%d group=%d total_ssovfs=%d", res->domain,
+			res->vfid, sdev.total_ssovfs);
+	return 0;
+}
+
+static const struct rte_pci_id pci_ssovf_map[] = {
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+				PCI_DEVICE_ID_OCTEONTX_SSOGRP_VF)
+	},
+	{
+		.vendor_id = 0,
+	},
+};
+
+static struct rte_pci_driver pci_ssovf = {
+	.id_table = pci_ssovf_map,
+	.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
+	.probe = ssovf_probe,
+};
+
+RTE_PMD_REGISTER_PCI(octeontx_ssovf, pci_ssovf);
-- 
2.5.5

[PATCH 06/39] event/octeontx: probe ssowvf pcie devices

[Jerin Jacob]

An event device consists of event queues and event ports.
On Octeontx HW, each event queues(sso group/ssovf) and
event ports(sso hws/ssowvf) are enumerated as separate
SRIOV VF PCIe device.In order to expose as an event device,
On PCIe probe, the driver stores the information associated
with the PCIe device and later with vdev infrastructure
creates event device with earlier probed PCIe VF devices.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.h | 28 ++++++++++++
 drivers/event/octeontx/ssovf_probe.c | 86 ++++++++++++++++++++++++++++++++++++
 2 files changed, 114 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 809eed1..0a3c76e 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -57,8 +57,10 @@
 
 #define PCI_VENDOR_ID_CAVIUM              0x177D
 #define PCI_DEVICE_ID_OCTEONTX_SSOGRP_VF  0xA04B
+#define PCI_DEVICE_ID_OCTEONTX_SSOWS_VF   0xA04D
 
 #define SSO_MAX_VHGRP                     (64)
+#define SSO_MAX_VHWS                      (32)
 
 /* SSO VF register offsets */
 #define SSO_VHGRP_QCTL                    (0x010ULL)
@@ -77,5 +79,31 @@
 #define SSO_VHGRP_OP_ADD_WORK0            (0x00ULL)
 #define SSO_VHGRP_OP_ADD_WORK1            (0x08ULL)
 
+/* SSOW VF register offsets (BAR0) */
+#define SSOW_VHWS_GRPMSK_CHGX(x)          (0x080ULL | ((x) << 3))
+#define SSOW_VHWS_TAG                     (0x300ULL)
+#define SSOW_VHWS_WQP                     (0x308ULL)
+#define SSOW_VHWS_LINKS                   (0x310ULL)
+#define SSOW_VHWS_PENDTAG                 (0x340ULL)
+#define SSOW_VHWS_PENDWQP                 (0x348ULL)
+#define SSOW_VHWS_SWTP                    (0x400ULL)
+#define SSOW_VHWS_OP_ALLOC_WE             (0x410ULL)
+#define SSOW_VHWS_OP_UPD_WQP_GRP0         (0x440ULL)
+#define SSOW_VHWS_OP_UPD_WQP_GRP1         (0x448ULL)
+#define SSOW_VHWS_OP_SWTAG_UNTAG          (0x490ULL)
+#define SSOW_VHWS_OP_SWTAG_CLR            (0x820ULL)
+#define SSOW_VHWS_OP_DESCHED              (0x860ULL)
+#define SSOW_VHWS_OP_DESCHED_NOSCH        (0x870ULL)
+#define SSOW_VHWS_OP_SWTAG_DESCHED        (0x8C0ULL)
+#define SSOW_VHWS_OP_SWTAG_NOSCHED        (0x8D0ULL)
+#define SSOW_VHWS_OP_SWTP_SET             (0xC20ULL)
+#define SSOW_VHWS_OP_SWTAG_NORM           (0xC80ULL)
+#define SSOW_VHWS_OP_SWTAG_FULL0          (0xCA0UL)
+#define SSOW_VHWS_OP_SWTAG_FULL1          (0xCA8ULL)
+#define SSOW_VHWS_OP_CLR_NSCHED           (0x10000ULL)
+#define SSOW_VHWS_OP_GET_WORK0            (0x80000ULL)
+#define SSOW_VHWS_OP_GET_WORK1            (0x80008ULL)
+
+#define SSOW_BAR4_LEN                     (64 * 1024)
 
 #endif /* __SSOVF_EVDEV_H__ */
diff --git a/drivers/event/octeontx/ssovf_probe.c b/drivers/event/octeontx/ssovf_probe.c
index 713329c..7033ff5 100644
--- a/drivers/event/octeontx/ssovf_probe.c
+++ b/drivers/event/octeontx/ssovf_probe.c
@@ -45,12 +45,98 @@ struct ssovf_res {
 	void *bar2;
 };
 
+struct ssowvf_res {
+	uint16_t domain;
+	uint16_t vfid;
+	void *bar0;
+	void *bar2;
+	void *bar4;
+};
+
+struct ssowvf_identify {
+	uint16_t domain;
+	uint16_t vfid;
+};
+
 struct ssodev {
 	uint8_t total_ssovfs;
+	uint8_t total_ssowvfs;
 	struct ssovf_res grp[SSO_MAX_VHGRP];
+	struct ssowvf_res hws[SSO_MAX_VHWS];
 };
+
 static struct ssodev sdev;
 
+/* SSOWVF pcie device aka event port probe */
+
+static int
+ssowvf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
+{
+	uint16_t vfid;
+	struct ssowvf_res *res;
+	struct ssowvf_identify *id;
+
+	RTE_SET_USED(pci_drv);
+
+	/* For secondary processes, the primary has done all the work */
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+		return 0;
+
+	if (pci_dev->mem_resource[0].addr == NULL ||
+			pci_dev->mem_resource[2].addr == NULL ||
+			pci_dev->mem_resource[4].addr == NULL) {
+		ssovf_log_err("Empty bars %p %p %p",
+				pci_dev->mem_resource[0].addr,
+				pci_dev->mem_resource[2].addr,
+				pci_dev->mem_resource[4].addr);
+		return -ENODEV;
+	}
+
+	if (pci_dev->mem_resource[4].len != SSOW_BAR4_LEN) {
+		ssovf_log_err("Bar4 len mismatch %d != %d",
+			SSOW_BAR4_LEN, (int)pci_dev->mem_resource[4].len);
+		return -EINVAL;
+	}
+
+	id = pci_dev->mem_resource[4].addr;
+	vfid = id->vfid;
+	if (vfid >= SSO_MAX_VHWS) {
+		ssovf_log_err("Invalid vfid(%d/%d)", vfid, SSO_MAX_VHWS);
+		return -EINVAL;
+	}
+
+	res = &sdev.hws[vfid];
+	res->vfid = vfid;
+	res->bar0 = pci_dev->mem_resource[0].addr;
+	res->bar2 = pci_dev->mem_resource[2].addr;
+	res->bar4 = pci_dev->mem_resource[4].addr;
+	res->domain = id->domain;
+
+	sdev.total_ssowvfs++;
+	rte_wmb();
+	ssovf_log_dbg("Domain=%d hws=%d total_ssowvfs=%d", res->domain,
+			res->vfid, sdev.total_ssowvfs);
+	return 0;
+}
+
+static const struct rte_pci_id pci_ssowvf_map[] = {
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+				PCI_DEVICE_ID_OCTEONTX_SSOWS_VF)
+	},
+	{
+		.vendor_id = 0,
+	},
+};
+
+static struct rte_pci_driver pci_ssowvf = {
+	.id_table = pci_ssowvf_map,
+	.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
+	.probe = ssowvf_probe,
+};
+
+RTE_PMD_REGISTER_PCI(octeontx_ssowvf, pci_ssowvf);
+
 /* SSOVF pcie device aka event queue probe */
 
 static int
-- 
2.5.5

[PATCH 07/39] event/octeontx: add vdev interface functions

[Jerin Jacob]

ssovf and ssowvf PCIe VF devices are shared
between eventdev PMD and ethdev PMD.This patch
expose a set of interface API to get info
about probed ssovf and ssowvf VF resources to use
with eventdev and ethdev vdev devices latter.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/Makefile                    |  3 +
 drivers/event/octeontx/rte_pmd_octeontx_ssovf.h    | 53 ++++++++++++++
 .../octeontx/rte_pmd_octeontx_ssovf_version.map    |  4 ++
 drivers/event/octeontx/ssovf_evdev.h               |  2 +
 drivers/event/octeontx/ssovf_probe.c               | 81 ++++++++++++++++++++++
 5 files changed, 143 insertions(+)
 create mode 100644 drivers/event/octeontx/rte_pmd_octeontx_ssovf.h

diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile
index d72ad46..896e556 100644
--- a/drivers/event/octeontx/Makefile
+++ b/drivers/event/octeontx/Makefile
@@ -48,6 +48,9 @@ LIBABIVER := 1
 #
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_probe.c
 
+# install this header file
+SYMLINK-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)-include := rte_pmd_octeontx_ssovf.h
+
 # this lib depends upon:
 DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += lib/librte_eal
 DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += lib/librte_eventdev
diff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h b/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
new file mode 100644
index 0000000..e92a61f
--- /dev/null
+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
@@ -0,0 +1,53 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2017.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __RTE_PMD_OCTEONTX_SSOVF_H__
+#define __RTE_PMD_OCTEONTX_SSOVF_H__
+
+#include <rte_common.h>
+
+struct octeontx_ssovf_info {
+	uint16_t domain; /* Domain id */
+	uint8_t total_ssovfs; /* Total sso groups available in domain */
+	uint8_t total_ssowvfs;/* Total sso hws available in domain */
+};
+
+enum octeontx_ssovf_type {
+	OCTEONTX_SSO_GROUP, /* SSO group vf */
+	OCTEONTX_SSO_HWS,  /* SSO hardware workslot vf */
+};
+
+
+int octeontx_ssovf_info(struct octeontx_ssovf_info *info);
+void *octeontx_ssovf_bar(enum octeontx_ssovf_type, uint8_t id, uint8_t bar);
+
+#endif /* __RTE_PMD_OCTEONTX_SSOVF_H__ */
diff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
index 8591cc0..c71d4c7 100644
--- a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
@@ -1,4 +1,8 @@
 DPDK_17.05 {
+	global:
+
+	octeontx_ssovf_info;
+	octeontx_ssovf_bar;
 
 	local: *;
 };
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 0a3c76e..c2b8187 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -36,6 +36,8 @@
 #include <rte_config.h>
 #include <rte_io.h>
 
+#include "rte_pmd_octeontx_ssovf.h"
+
 #define EVENTDEV_NAME_OCTEONTX_PMD event_octeontx
 
 #ifdef RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG
diff --git a/drivers/event/octeontx/ssovf_probe.c b/drivers/event/octeontx/ssovf_probe.c
index 7033ff5..dd5aa62 100644
--- a/drivers/event/octeontx/ssovf_probe.c
+++ b/drivers/event/octeontx/ssovf_probe.c
@@ -67,6 +67,87 @@ struct ssodev {
 
 static struct ssodev sdev;
 
+/* Interface functions */
+int
+octeontx_ssovf_info(struct octeontx_ssovf_info *info)
+{
+	uint8_t i;
+	uint16_t domain;
+
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY || info == NULL)
+		return -EINVAL;
+
+	domain = sdev.grp[0].domain;
+	for (i = 0; i < sdev.total_ssovfs; i++) {
+		/* Check vfid's are contiguous and belong to same domain */
+		if (sdev.grp[i].vfid != i ||
+			sdev.grp[i].bar0 == NULL ||
+			sdev.grp[i].domain != domain) {
+			ssovf_log_err("GRP error, vfid=%d/%d domain=%d/%d %p",
+				i, sdev.grp[i].vfid,
+				domain, sdev.grp[i].domain,
+				sdev.grp[i].bar0);
+			return -EINVAL;
+		}
+	}
+
+	for (i = 0; i < sdev.total_ssowvfs; i++) {
+		/* Check vfid's are contiguous and belong to same domain */
+		if (sdev.hws[i].vfid != i ||
+			sdev.hws[i].bar0 == NULL ||
+			sdev.hws[i].domain != domain) {
+			ssovf_log_err("HWS error, vfid=%d/%d domain=%d/%d %p",
+				i, sdev.hws[i].vfid,
+				domain, sdev.hws[i].domain,
+				sdev.hws[i].bar0);
+			return -EINVAL;
+		}
+	}
+
+	info->domain = domain;
+	info->total_ssovfs = sdev.total_ssovfs;
+	info->total_ssowvfs = sdev.total_ssowvfs;
+	return 0;
+}
+
+void*
+octeontx_ssovf_bar(enum octeontx_ssovf_type type, uint8_t id, uint8_t bar)
+{
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY ||
+			type > OCTEONTX_SSO_HWS)
+		return NULL;
+
+	if (type == OCTEONTX_SSO_GROUP) {
+		if (id >= sdev.total_ssovfs)
+			return NULL;
+	} else {
+		if (id >= sdev.total_ssowvfs)
+			return NULL;
+	}
+
+	if (type == OCTEONTX_SSO_GROUP) {
+		switch (bar) {
+		case 0:
+			return sdev.grp[id].bar0;
+		case 2:
+			return sdev.grp[id].bar2;
+		default:
+			return NULL;
+		}
+	} else {
+		switch (bar) {
+		case 0:
+			return sdev.hws[id].bar0;
+		case 2:
+			return sdev.hws[id].bar2;
+		case 4:
+			return sdev.hws[id].bar4;
+		default:
+			return NULL;
+		}
+	}
+}
+
 /* SSOWVF pcie device aka event port probe */
 
 static int
-- 
2.5.5

[PATCH 08/39] event/octeontx: add mailbox support

[Jerin Jacob]

ssovf VF device has mailbox mechanism to communicate
with PF device. This patch adds support for a mbox API to
send the mailbox request to PF device.
The ssovf VF device will be used as the communication channel
to talk to PF devices of all the network accelerated
co-processors in Octeontx. Exposing as shared function to
use it from pool, crypto, network devices.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/Makefile                    |   1 +
 drivers/event/octeontx/rte_pmd_octeontx_ssovf.h    |   8 +
 .../octeontx/rte_pmd_octeontx_ssovf_version.map    |   1 +
 drivers/event/octeontx/ssovf_mbox.c                | 232 +++++++++++++++++++++
 4 files changed, 242 insertions(+)
 create mode 100644 drivers/event/octeontx/ssovf_mbox.c

diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile
index 896e556..3076b85 100644
--- a/drivers/event/octeontx/Makefile
+++ b/drivers/event/octeontx/Makefile
@@ -47,6 +47,7 @@ LIBABIVER := 1
 # all source are stored in SRCS-y
 #
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_probe.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_mbox.c
 
 # install this header file
 SYMLINK-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)-include := rte_pmd_octeontx_ssovf.h
diff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h b/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
index e92a61f..3da7cfd 100644
--- a/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
@@ -46,8 +46,16 @@ enum octeontx_ssovf_type {
 	OCTEONTX_SSO_HWS,  /* SSO hardware workslot vf */
 };
 
+struct octeontx_mbox_hdr {
+	uint16_t vfid;  /* VF index or pf resource index local to the domain */
+	uint8_t coproc; /* Coprocessor id */
+	uint8_t msg;    /* Message id */
+	uint8_t res_code; /* Functional layer response code */
+};
 
 int octeontx_ssovf_info(struct octeontx_ssovf_info *info);
 void *octeontx_ssovf_bar(enum octeontx_ssovf_type, uint8_t id, uint8_t bar);
+int octeontx_ssovf_mbox_send(struct octeontx_mbox_hdr *hdr,
+		void *txdata, uint16_t txlen, void *rxdata, uint16_t rxlen);
 
 #endif /* __RTE_PMD_OCTEONTX_SSOVF_H__ */
diff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
index c71d4c7..3810a03 100644
--- a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
@@ -3,6 +3,7 @@ DPDK_17.05 {
 
 	octeontx_ssovf_info;
 	octeontx_ssovf_bar;
+	octeontx_ssovf_mbox_send;
 
 	local: *;
 };
diff --git a/drivers/event/octeontx/ssovf_mbox.c b/drivers/event/octeontx/ssovf_mbox.c
new file mode 100644
index 0000000..d07750f
--- /dev/null
+++ b/drivers/event/octeontx/ssovf_mbox.c
@@ -0,0 +1,232 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2017.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <string.h>
+
+#include <rte_atomic.h>
+#include <rte_common.h>
+#include <rte_cycles.h>
+#include <rte_io.h>
+#include <rte_spinlock.h>
+
+#include "ssovf_evdev.h"
+
+/* Mbox operation timeout in milliseconds */
+#define MBOX_WAIT_TIME		3000
+#define MAX_RAM_MBOX_LEN	((SSOW_BAR4_LEN >> 1) - 8 /* Mbox header */)
+
+/* Mbox channel state */
+enum {
+	MBOX_CHAN_STATE_REQ = 1,
+	MBOX_CHAN_STATE_RES = 0,
+};
+
+/* Response messages */
+enum {
+	MBOX_RET_SUCCESS,
+	MBOX_RET_INVALID,
+	MBOX_RET_INTERNAL_ERR,
+};
+
+struct mbox {
+	int init_once;
+	uint8_t *ram_mbox_base; /* Base address of mbox message stored in ram */
+	uint8_t *reg; /* Store to this register triggers PF mbox interrupt */
+	uint16_t tag_own; /* Last tag which was written to own channel */
+	rte_spinlock_t lock;
+};
+
+static struct mbox octeontx_mbox;
+
+/*
+ * Structure used for mbox synchronization
+ * This structure sits at the begin of Mbox RAM and used as main
+ * synchronization point for channel communication
+ */
+struct mbox_ram_hdr {
+	union {
+		uint64_t u64;
+		struct {
+			uint8_t chan_state : 1;
+			uint8_t coproc : 7;
+			uint8_t msg;
+			uint8_t vfid;
+			uint8_t res_code;
+			uint16_t tag;
+			uint16_t len;
+		};
+	};
+};
+
+static inline void
+mbox_send_requeust(struct mbox *m, struct octeontx_mbox_hdr *hdr,
+			const void *txmsg, uint16_t txsize)
+{
+	struct mbox_ram_hdr old_hdr;
+	struct mbox_ram_hdr new_hdr = {0};
+	uint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base;
+	uint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct mbox_ram_hdr);
+
+	/*
+	 * Initialize the channel with the tag left by last send.
+	 * On success full mbox send complete, PF increments the tag by one.
+	 * The sender can validate integrity of PF message with this scheme
+	 */
+	old_hdr.u64 = rte_read64(ram_mbox_hdr);
+	m->tag_own = (old_hdr.tag + 2) & (~0x1ul); /* next even number */
+
+	/* Copy msg body */
+	if (txmsg)
+		memcpy(ram_mbox_msg, txmsg, txsize);
+
+	/* Prepare new hdr */
+	new_hdr.chan_state = MBOX_CHAN_STATE_REQ;
+	new_hdr.coproc = hdr->coproc;
+	new_hdr.msg = hdr->msg;
+	new_hdr.vfid = hdr->vfid;
+	new_hdr.tag = m->tag_own;
+	new_hdr.len = txsize;
+
+	/* Write the msg header */
+	rte_write64(new_hdr.u64, ram_mbox_hdr);
+	rte_io_wmb();
+	/* Notify PF about the new msg - write to MBOX reg generates PF IRQ */
+	rte_write64(0, m->reg);
+}
+
+static inline int
+mbox_wait_response(struct mbox *m, struct octeontx_mbox_hdr *hdr,
+			void *rxmsg, uint16_t rxsize)
+{
+	int res = 0, wait;
+	uint16_t len;
+	struct mbox_ram_hdr rx_hdr;
+	uint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base;
+	uint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct mbox_ram_hdr);
+
+	/* Wait for response */
+	wait = MBOX_WAIT_TIME;
+	while (wait > 0) {
+		rte_delay_us(100);
+		rx_hdr.u64 = rte_read64(ram_mbox_hdr);
+		if (rx_hdr.chan_state == MBOX_CHAN_STATE_RES)
+			break;
+		wait -= 10;
+	}
+
+	hdr->res_code = rx_hdr.res_code;
+	m->tag_own++;
+
+	/* Tag mismatch */
+	if (m->tag_own != rx_hdr.tag) {
+		res = -EBADR;
+		goto error;
+	}
+
+	/* PF nacked the msg */
+	if (rx_hdr.res_code != MBOX_RET_SUCCESS) {
+		res = -EBADMSG;
+		goto error;
+	}
+
+	/* Timeout */
+	if (wait <= 0) {
+		res = -ETIMEDOUT;
+		goto error;
+	}
+
+	len = RTE_MIN(rx_hdr.len, rxsize);
+	if (rxmsg)
+		memcpy(rxmsg, ram_mbox_msg, len);
+
+	return len;
+
+error:
+	ssovf_log_err("Failed to send mbox(%d/%d) coproc=%d msg=%d ret=(%d,%d)",
+			m->tag_own, rx_hdr.tag, hdr->msg, hdr->coproc, res,
+			hdr->res_code);
+	return res;
+}
+
+static inline int
+mbox_send(struct mbox *m, struct octeontx_mbox_hdr *hdr, const void *txmsg,
+		uint16_t txsize, void *rxmsg, uint16_t rxsize)
+{
+	int res = -EINVAL;
+
+	if (m->init_once == 0 || hdr == NULL ||
+		txsize > MAX_RAM_MBOX_LEN || rxsize > MAX_RAM_MBOX_LEN) {
+		ssovf_log_err("Invalid init_once=%d hdr=%p txsz=%d rxsz=%d",
+				m->init_once, hdr, txsize, rxsize);
+		return res;
+	}
+
+	rte_spinlock_lock(&m->lock);
+
+	mbox_send_requeust(m, hdr, txmsg, txsize);
+	res = mbox_wait_response(m, hdr, rxmsg, rxsize);
+
+	rte_spinlock_unlock(&m->lock);
+	return res;
+}
+
+static inline int
+mbox_setup(struct mbox *m)
+{
+	if (unlikely(m->init_once == 0)) {
+		rte_spinlock_init(&m->lock);
+		m->ram_mbox_base = octeontx_ssovf_bar(OCTEONTX_SSO_HWS, 0, 4);
+		m->reg = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, 0, 0);
+		m->reg += SSO_VHGRP_PF_MBOX(1);
+
+		if (m->ram_mbox_base == NULL || m->reg == NULL) {
+			ssovf_log_err("Invalid ram_mbox_base=%p or reg=%p",
+				m->ram_mbox_base, m->reg);
+			return -EINVAL;
+		}
+		m->init_once = 1;
+	}
+	return 0;
+}
+
+int
+octeontx_ssovf_mbox_send(struct octeontx_mbox_hdr *hdr, void *txdata,
+				 uint16_t txlen, void *rxdata, uint16_t rxlen)
+{
+	struct mbox *m = &octeontx_mbox;
+
+	RTE_BUILD_BUG_ON(sizeof(struct mbox_ram_hdr) != 8);
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY || mbox_setup(m))
+		return -EINVAL;
+
+	return mbox_send(m, hdr, txdata, txlen, rxdata, rxlen);
+}
-- 
2.5.5

[PATCH 09/39] event/octeontx: add octeontx eventdev driver

[Jerin Jacob]

This adds the minimal changes to allow a octeontx eventdev
implementation to be compiled, linked and created at run time.
The eventdev does nothing, but can be created via vdev
on command line, e.g.

sudo ./build/app/test -c 0xff00 --vdev=event_octeontx
...
Initializing event_octeontx domain=4 max_queues=64 max_ports=32
RTE>>

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/Makefile      |   1 +
 drivers/event/octeontx/ssovf_evdev.c | 148 +++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h |  23 ++++++
 3 files changed, 172 insertions(+)
 create mode 100644 drivers/event/octeontx/ssovf_evdev.c

diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile
index 3076b85..6e8227b 100644
--- a/drivers/event/octeontx/Makefile
+++ b/drivers/event/octeontx/Makefile
@@ -46,6 +46,7 @@ LIBABIVER := 1
 #
 # all source are stored in SRCS-y
 #
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_evdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_probe.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_mbox.c
 
diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
new file mode 100644
index 0000000..b349adc
--- /dev/null
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -0,0 +1,148 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2017.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <rte_common.h>
+#include <rte_debug.h>
+#include <rte_dev.h>
+#include <rte_eal.h>
+#include <rte_lcore.h>
+#include <rte_log.h>
+#include <rte_malloc.h>
+#include <rte_memory.h>
+#include <rte_memzone.h>
+#include <rte_vdev.h>
+
+#include "ssovf_evdev.h"
+
+/* SSOPF Mailbox messages */
+
+struct ssovf_mbox_dev_info {
+	uint64_t min_deq_timeout_ns;
+	uint64_t max_deq_timeout_ns;
+	uint32_t max_num_events;
+};
+
+static int
+ssovf_mbox_dev_info(struct ssovf_mbox_dev_info *info)
+{
+	struct octeontx_mbox_hdr hdr = {0};
+	uint16_t len = sizeof(struct ssovf_mbox_dev_info);
+
+	hdr.coproc = SSO_COPROC;
+	hdr.msg = SSO_GET_DEV_INFO;
+	hdr.vfid = 0;
+
+	memset(info, 0, len);
+	return octeontx_ssovf_mbox_send(&hdr, NULL, 0, info, len);
+}
+
+static int
+ssovf_vdev_probe(const char *name, const char *params)
+{
+	struct octeontx_ssovf_info oinfo;
+	struct ssovf_mbox_dev_info info;
+	struct ssovf_evdev *edev;
+	struct rte_eventdev *eventdev;
+	static int ssovf_init_once;
+	int ret;
+
+	RTE_SET_USED(params);
+
+	/* More than one instance is not supported */
+	if (ssovf_init_once) {
+		ssovf_log_err("Request to create >1 %s instance", name);
+		return -EINVAL;
+	}
+
+	eventdev = rte_event_pmd_vdev_init(name, sizeof(struct ssovf_evdev),
+				rte_socket_id());
+	if (eventdev == NULL) {
+		ssovf_log_err("Failed to create eventdev vdev %s", name);
+		return -ENOMEM;
+	}
+	eventdev->dev_ops = NULL;
+
+	/* For secondary processes, the primary has done all the work */
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+		return 0;
+
+	ret = octeontx_ssovf_info(&oinfo);
+	if (ret) {
+		ssovf_log_err("Failed to probe and validate ssovfs %d", ret);
+		return ret;
+	}
+
+	edev = ssovf_pmd_priv(eventdev);
+	edev->max_event_ports = oinfo.total_ssowvfs;
+	edev->max_event_queues = oinfo.total_ssovfs;
+	edev->is_timeout_deq = 0;
+
+	ret = ssovf_mbox_dev_info(&info);
+	if (ret < 0 || ret != sizeof(struct ssovf_mbox_dev_info)) {
+		ssovf_log_err("Failed to get mbox devinfo %d", ret);
+		return ret;
+	}
+
+	edev->min_deq_timeout_ns = info.min_deq_timeout_ns;
+	edev->max_deq_timeout_ns = info.max_deq_timeout_ns;
+	edev->max_num_events =  info.max_num_events;
+	ssovf_log_dbg("min_deq_tmo=%"PRId64" max_deq_tmo=%"PRId64" max_evts=%d",
+			info.min_deq_timeout_ns, info.max_deq_timeout_ns,
+			info.max_num_events);
+
+	if (!edev->max_event_ports || !edev->max_event_queues) {
+		ssovf_log_err("Not enough eventdev resource queues=%d ports=%d",
+			edev->max_event_queues, edev->max_event_ports);
+		return -ENODEV;
+	}
+
+	ssovf_log_info("Initializing %s domain=%d max_queues=%d max_ports=%d\n",
+			name, oinfo.domain, edev->max_event_queues,
+			edev->max_event_ports);
+
+	ssovf_init_once = 1;
+	return 0;
+}
+
+static int
+ssovf_vdev_remove(const char *name)
+{
+	ssovf_log_info("Closing %s\n", name);
+	return rte_event_pmd_vdev_uninit(name);
+}
+
+static struct rte_vdev_driver vdev_ssovf_pmd = {
+	.probe = ssovf_vdev_probe,
+	.remove = ssovf_vdev_remove
+};
+
+RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_OCTEONTX_PMD, vdev_ssovf_pmd);
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index c2b8187..b8b89a7 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -34,6 +34,7 @@
 #define __SSOVF_EVDEV_H__
 
 #include <rte_config.h>
+#include <rte_eventdev_pmd.h>
 #include <rte_io.h>
 
 #include "rte_pmd_octeontx_ssovf.h"
@@ -108,4 +109,26 @@
 
 #define SSOW_BAR4_LEN                     (64 * 1024)
 
+/* Mailbox message constants */
+#define SSO_COPROC                        0x2
+
+#define SSO_GETDOMAINCFG                  0x1
+#define SSO_IDENTIFY                      0x2
+#define SSO_GET_DEV_INFO                  0x3
+
+struct ssovf_evdev {
+	uint8_t max_event_queues;
+	uint8_t max_event_ports;
+	uint8_t is_timeout_deq;
+	uint32_t min_deq_timeout_ns;
+	uint32_t max_deq_timeout_ns;
+	int32_t max_num_events;
+} __rte_cache_aligned;
+
+static inline struct ssovf_evdev *
+ssovf_pmd_priv(const struct rte_eventdev *eventdev)
+{
+	return eventdev->data->dev_private;
+}
+
 #endif /* __SSOVF_EVDEV_H__ */
-- 
2.5.5

[PATCH 10/39] event/octeontx: add device capabilities function

[Jerin Jacob]

Add the info_get function to return details on the queues, flow,
prioritization capabilities, etc. which this device has.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index b349adc..342f404 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -65,6 +65,31 @@ ssovf_mbox_dev_info(struct ssovf_mbox_dev_info *info)
 	return octeontx_ssovf_mbox_send(&hdr, NULL, 0, info, len);
 }
 
+static void
+ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+
+	dev_info->min_dequeue_timeout_ns = edev->min_deq_timeout_ns;
+	dev_info->max_dequeue_timeout_ns = edev->max_deq_timeout_ns;
+	dev_info->max_event_queues = edev->max_event_queues;
+	dev_info->max_event_queue_flows = (1ULL << 20);
+	dev_info->max_event_queue_priority_levels = 8;
+	dev_info->max_event_priority_levels = 1;
+	dev_info->max_event_ports = edev->max_event_ports;
+	dev_info->max_event_port_dequeue_depth = 1;
+	dev_info->max_event_port_enqueue_depth = 1;
+	dev_info->max_num_events =  edev->max_num_events;
+	dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_QUEUE_QOS |
+					RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED;
+}
+
+
+/* Initialize and register event driver with DPDK Application */
+static const struct rte_eventdev_ops ssovf_ops = {
+	.dev_infos_get    = ssovf_info_get,
+};
+
 static int
 ssovf_vdev_probe(const char *name, const char *params)
 {
@@ -89,7 +114,7 @@ ssovf_vdev_probe(const char *name, const char *params)
 		ssovf_log_err("Failed to create eventdev vdev %s", name);
 		return -ENOMEM;
 	}
-	eventdev->dev_ops = NULL;
+	eventdev->dev_ops = &ssovf_ops;
 
 	/* For secondary processes, the primary has done all the work */
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
-- 
2.5.5

[PATCH 11/39] event/octeontx: add configure function

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 40 ++++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h |  4 ++++
 2 files changed, 44 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index 342f404..b59d721 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -65,6 +65,30 @@ ssovf_mbox_dev_info(struct ssovf_mbox_dev_info *info)
 	return octeontx_ssovf_mbox_send(&hdr, NULL, 0, info, len);
 }
 
+struct ssovf_mbox_getwork_wait {
+	uint64_t wait_ns;
+};
+
+static int
+ssovf_mbox_getwork_tmo_set(uint32_t timeout_ns)
+{
+	struct octeontx_mbox_hdr hdr = {0};
+	struct ssovf_mbox_getwork_wait tmo_set;
+	uint16_t len = sizeof(struct ssovf_mbox_getwork_wait);
+	int ret;
+
+	hdr.coproc = SSO_COPROC;
+	hdr.msg = SSO_SET_GETWORK_WAIT;
+	hdr.vfid = 0;
+
+	tmo_set.wait_ns = timeout_ns;
+	ret = octeontx_ssovf_mbox_send(&hdr, &tmo_set, len, NULL, 0);
+	if (ret)
+		ssovf_log_err("Failed to set getwork timeout(%d)", ret);
+
+	return ret;
+}
+
 static void
 ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
 {
@@ -84,10 +108,26 @@ ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
 					RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED;
 }
 
+static int
+ssovf_configure(const struct rte_eventdev *dev)
+{
+	struct rte_event_dev_config *conf = &dev->data->dev_conf;
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+
+	ssovf_func_trace();
+
+	if (conf->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT)
+		edev->is_timeout_deq = 1;
+	edev->nb_event_queues = conf->nb_event_queues;
+	edev->nb_event_ports = conf->nb_event_ports;
+
+	return ssovf_mbox_getwork_tmo_set(conf->dequeue_timeout_ns);
+}
 
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
+	.dev_configure    = ssovf_configure,
 };
 
 static int
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index b8b89a7..1c36923 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -115,11 +115,15 @@
 #define SSO_GETDOMAINCFG                  0x1
 #define SSO_IDENTIFY                      0x2
 #define SSO_GET_DEV_INFO                  0x3
+#define SSO_GET_GETWORK_WAIT              0x4
+#define SSO_SET_GETWORK_WAIT              0x5
 
 struct ssovf_evdev {
 	uint8_t max_event_queues;
 	uint8_t max_event_ports;
 	uint8_t is_timeout_deq;
+	uint8_t nb_event_queues;
+	uint8_t nb_event_ports;
 	uint32_t min_deq_timeout_ns;
 	uint32_t max_deq_timeout_ns;
 	int32_t max_num_events;
-- 
2.5.5

[PATCH 12/39] event/octeontx: add support for event queues

[Jerin Jacob]

Pretty much everything done in HW. Need to configure
the priority associated with event queue aka sso group
through a mailbox request to PF

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 63 ++++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h |  2 ++
 2 files changed, 65 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index b59d721..8474b90 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -89,6 +89,36 @@ ssovf_mbox_getwork_tmo_set(uint32_t timeout_ns)
 	return ret;
 }
 
+struct ssovf_mbox_grp_pri {
+	uint8_t wgt_left; /* Read only */
+	uint8_t weight;
+	uint8_t affinity;
+	uint8_t priority;
+};
+
+static int
+ssovf_mbox_priority_set(uint8_t queue, uint8_t prio)
+{
+	struct octeontx_mbox_hdr hdr = {0};
+	struct ssovf_mbox_grp_pri grp;
+	uint16_t len = sizeof(struct ssovf_mbox_grp_pri);
+	int ret;
+
+	hdr.coproc = SSO_COPROC;
+	hdr.msg = SSO_GRP_SET_PRIORITY;
+	hdr.vfid = queue;
+
+	grp.weight = 0xff;
+	grp.affinity = 0xff;
+	grp.priority = prio / 32; /* Normalize to 0 to 7 */
+
+	ret = octeontx_ssovf_mbox_send(&hdr, &grp, len, NULL, 0);
+	if (ret)
+		ssovf_log_err("Failed to set grp=%d prio=%d", queue, prio);
+
+	return ret;
+}
+
 static void
 ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
 {
@@ -124,10 +154,43 @@ ssovf_configure(const struct rte_eventdev *dev)
 	return ssovf_mbox_getwork_tmo_set(conf->dequeue_timeout_ns);
 }
 
+static void
+ssovf_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
+				 struct rte_event_queue_conf *queue_conf)
+{
+	RTE_SET_USED(dev);
+	RTE_SET_USED(queue_id);
+
+	queue_conf->nb_atomic_flows = (1ULL << 20);
+	queue_conf->nb_atomic_order_sequences = (1ULL << 20);
+	queue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_DEFAULT;
+	queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
+}
+
+static void
+ssovf_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
+{
+	RTE_SET_USED(dev);
+	RTE_SET_USED(queue_id);
+}
+
+static int
+ssovf_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
+			      const struct rte_event_queue_conf *queue_conf)
+{
+	RTE_SET_USED(dev);
+	ssovf_func_trace("queue=%d prio=%d", queue_id, queue_conf->priority);
+
+	return ssovf_mbox_priority_set(queue_id, queue_conf->priority);
+}
+
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
 	.dev_configure    = ssovf_configure,
+	.queue_def_conf   = ssovf_queue_def_conf,
+	.queue_setup      = ssovf_queue_setup,
+	.queue_release    = ssovf_queue_release,
 };
 
 static int
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 1c36923..d0f5d85 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -117,6 +117,8 @@
 #define SSO_GET_DEV_INFO                  0x3
 #define SSO_GET_GETWORK_WAIT              0x4
 #define SSO_SET_GETWORK_WAIT              0x5
+#define SSO_GRP_GET_PRIORITY              0x7
+#define SSO_GRP_SET_PRIORITY              0x8
 
 struct ssovf_evdev {
 	uint8_t max_event_queues;
-- 
2.5.5

[PATCH 13/39] event/octeontx: add support for event ports

[Jerin Jacob]

Add in the data-structures for the ports used by workers
to sent events to/from the HW scheduler. Also add a
function to release the resource allocated in setup

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 74 ++++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h | 11 ++++++
 2 files changed, 85 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index 8474b90..84868f0 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -184,6 +184,77 @@ ssovf_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
 	return ssovf_mbox_priority_set(queue_id, queue_conf->priority);
 }
 
+static void
+ssovf_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
+				 struct rte_event_port_conf *port_conf)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+
+	RTE_SET_USED(port_id);
+	port_conf->new_event_threshold = edev->max_num_events;
+	port_conf->dequeue_depth = 1;
+	port_conf->enqueue_depth = 1;
+}
+
+static void
+ssovf_port_release(void *port)
+{
+	rte_free(port);
+}
+
+static int
+ssovf_port_setup(struct rte_eventdev *dev, uint8_t port_id,
+				const struct rte_event_port_conf *port_conf)
+{
+	struct ssows *ws;
+	uint32_t reg_off;
+	uint8_t q;
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+
+	ssovf_func_trace("port=%d", port_id);
+	RTE_SET_USED(port_conf);
+
+	/* Free memory prior to re-allocation if needed */
+	if (dev->data->ports[port_id] != NULL) {
+		ssovf_port_release(dev->data->ports[port_id]);
+		dev->data->ports[port_id] = NULL;
+	}
+
+	/* Allocate event port memory */
+	ws = rte_zmalloc_socket("eventdev ssows",
+			sizeof(struct ssows), RTE_CACHE_LINE_SIZE,
+			dev->data->socket_id);
+	if (ws == NULL) {
+		ssovf_log_err("Failed to alloc memory for port=%d", port_id);
+		return -ENOMEM;
+	}
+
+	ws->base = octeontx_ssovf_bar(OCTEONTX_SSO_HWS, port_id, 0);
+	if (ws->base == NULL) {
+		rte_free(ws);
+		ssovf_log_err("Failed to get hws base addr port=%d", port_id);
+		return -EINVAL;
+	}
+
+	reg_off = SSOW_VHWS_OP_GET_WORK0;
+	reg_off |= 1 << 4; /* Index_ggrp_mask (Use maskset zero) */
+	reg_off |= 1 << 16; /* Wait */
+	ws->getwork = ws->base + reg_off;
+	ws->port = port_id;
+
+	for (q = 0; q < edev->nb_event_queues; q++) {
+		ws->grps[q] = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, q, 2);
+		if (ws->grps[q] == NULL) {
+			rte_free(ws);
+			ssovf_log_err("Failed to get grp%d base addr", q);
+			return -EINVAL;
+		}
+	}
+
+	dev->data->ports[port_id] = ws;
+	ssovf_log_dbg("port=%d ws=%p", port_id, ws);
+	return 0;
+}
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -191,6 +262,9 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.queue_def_conf   = ssovf_queue_def_conf,
 	.queue_setup      = ssovf_queue_setup,
 	.queue_release    = ssovf_queue_release,
+	.port_def_conf    = ssovf_port_def_conf,
+	.port_setup       = ssovf_port_setup,
+	.port_release     = ssovf_port_release,
 };
 
 static int
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index d0f5d85..eda0e37 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -131,6 +131,17 @@ struct ssovf_evdev {
 	int32_t max_num_events;
 } __rte_cache_aligned;
 
+/* Event port aka HWS */
+struct ssows {
+	uint8_t cur_tt;
+	uint8_t cur_grp;
+	uint8_t swtag_req;
+	uint8_t *base;
+	uint8_t *getwork;
+	uint8_t *grps[SSO_MAX_VHGRP];
+	uint8_t port;
+} __rte_cache_aligned;
+
 static inline struct ssovf_evdev *
 ssovf_pmd_priv(const struct rte_eventdev *eventdev)
 {
-- 
2.5.5

[PATCH 14/39] event/octeontx: add support for linking queues to ports

[Jerin Jacob]

queues to port link and unlink establishment is through
setting/resetting the queue/group membership in
SSOW_VHWS_GRPMSK_CHGX

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 42 ++++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h |  8 +++++++
 2 files changed, 50 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index 84868f0..dccadb6 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -255,6 +255,46 @@ ssovf_port_setup(struct rte_eventdev *dev, uint8_t port_id,
 	ssovf_log_dbg("port=%d ws=%p", port_id, ws);
 	return 0;
 }
+
+static int
+ssovf_port_link(struct rte_eventdev *dev, void *port, const uint8_t queues[],
+		const uint8_t priorities[], uint16_t nb_links)
+{
+	uint16_t link;
+	uint64_t val;
+	struct ssows *ws = port;
+
+	ssovf_func_trace("port=%d nb_links=%d", ws->port, nb_links);
+	RTE_SET_USED(dev);
+	RTE_SET_USED(priorities);
+
+	for (link = 0; link < nb_links; link++) {
+		val = queues[link];
+		val |= (1ULL << 24); /* Set membership */
+		ssovf_write64(val, ws->base + SSOW_VHWS_GRPMSK_CHGX(0));
+	}
+	return (int)nb_links;
+}
+
+static int
+ssovf_port_unlink(struct rte_eventdev *dev, void *port, uint8_t queues[],
+			uint16_t nb_unlinks)
+{
+	uint16_t unlink;
+	uint64_t val;
+	struct ssows *ws = port;
+
+	ssovf_func_trace("port=%d nb_links=%d", ws->port, nb_unlinks);
+	RTE_SET_USED(dev);
+
+	for (unlink = 0; unlink < nb_unlinks; unlink++) {
+		val = queues[unlink];
+		val &= ~(1ULL << 24); /* Clear membership */
+		ssovf_write64(val, ws->base + SSOW_VHWS_GRPMSK_CHGX(0));
+	}
+	return (int)nb_unlinks;
+}
+
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -265,6 +305,8 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.port_def_conf    = ssovf_port_def_conf,
 	.port_setup       = ssovf_port_setup,
 	.port_release     = ssovf_port_release,
+	.port_link        = ssovf_port_link,
+	.port_unlink      = ssovf_port_unlink,
 };
 
 static int
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index eda0e37..9a6bac5 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -120,6 +120,14 @@
 #define SSO_GRP_GET_PRIORITY              0x7
 #define SSO_GRP_SET_PRIORITY              0x8
 
+/*
+ * In Cavium OcteonTX SoC, all accesses to the device registers are
+ * implictly strongly ordered. So, The relaxed version of IO operation is
+ * safe to use with out any IO memory barriers.
+ */
+#define ssovf_read64 rte_read64_relaxed
+#define ssovf_write64 rte_write64_relaxed
+
 struct ssovf_evdev {
 	uint8_t max_event_queues;
 	uint8_t max_event_ports;
-- 
2.5.5

[PATCH 15/39] event/octeontx: add support dequeue timeout tick conversion

[Jerin Jacob]

SSO co-processor runs at a different frequency than core clock.
Request PF to convert the ns to SSO get_work timeout period.
On dequeue, If device is configured with
RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT configuration then
use different fast path dequeue handler to wait till requested
amount of nanosecond if the event is not available.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 38 ++++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h |  1 +
 2 files changed, 39 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index dccadb6..d1be360 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -119,6 +119,35 @@ ssovf_mbox_priority_set(uint8_t queue, uint8_t prio)
 	return ret;
 }
 
+struct ssovf_mbox_convert_ns_getworks_iter {
+	uint64_t wait_ns;
+	uint32_t getwork_iter;/* Get_work iterations for the given wait_ns */
+};
+
+static int
+ssovf_mbox_timeout_ticks(uint64_t ns, uint64_t *tmo_ticks)
+{
+	struct octeontx_mbox_hdr hdr = {0};
+	struct ssovf_mbox_convert_ns_getworks_iter ns2iter;
+	uint16_t len = sizeof(ns2iter);
+	int ret;
+
+	hdr.coproc = SSO_COPROC;
+	hdr.msg = SSO_CONVERT_NS_GETWORK_ITER;
+	hdr.vfid = 0;
+
+	memset(&ns2iter, 0, len);
+	ns2iter.wait_ns = ns;
+	ret = octeontx_ssovf_mbox_send(&hdr, &ns2iter, len, &ns2iter, len);
+	if (ret < 0 || (ret != len)) {
+		ssovf_log_err("Failed to get tmo ticks ns=%"PRId64"", ns);
+		return -EIO;
+	}
+
+	*tmo_ticks = ns2iter.getwork_iter;
+	return 0;
+}
+
 static void
 ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
 {
@@ -295,6 +324,14 @@ ssovf_port_unlink(struct rte_eventdev *dev, void *port, uint8_t queues[],
 	return (int)nb_unlinks;
 }
 
+static int
+ssovf_timeout_ticks(struct rte_eventdev *dev, uint64_t ns, uint64_t *tmo_ticks)
+{
+	RTE_SET_USED(dev);
+
+	return ssovf_mbox_timeout_ticks(ns, tmo_ticks);
+}
+
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -307,6 +344,7 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.port_release     = ssovf_port_release,
 	.port_link        = ssovf_port_link,
 	.port_unlink      = ssovf_port_unlink,
+	.timeout_ticks    = ssovf_timeout_ticks,
 };
 
 static int
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 9a6bac5..16bf3d5 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -117,6 +117,7 @@
 #define SSO_GET_DEV_INFO                  0x3
 #define SSO_GET_GETWORK_WAIT              0x4
 #define SSO_SET_GETWORK_WAIT              0x5
+#define SSO_CONVERT_NS_GETWORK_ITER       0x6
 #define SSO_GRP_GET_PRIORITY              0x7
 #define SSO_GRP_SET_PRIORITY              0x8
 
-- 
2.5.5

[PATCH 16/39] event/octeontx: add dump function for easier debugging

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 46 ++++++++++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index d1be360..babd59f 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -332,6 +332,51 @@ ssovf_timeout_ticks(struct rte_eventdev *dev, uint64_t ns, uint64_t *tmo_ticks)
 	return ssovf_mbox_timeout_ticks(ns, tmo_ticks);
 }
 
+static void
+ssows_dump(struct ssows *ws, FILE *f)
+{
+	uint8_t *base = ws->base;
+	uint64_t val;
+
+	fprintf(f, "\t---------------port%d---------------\n", ws->port);
+	val = ssovf_read64(base + SSOW_VHWS_TAG);
+	fprintf(f, "\ttag=0x%x tt=%d head=%d tail=%d grp=%d index=%d tail=%d\n",
+		(uint32_t)(val & 0xffffffff), (int)(val >> 32) & 0x3,
+		(int)(val >> 34) & 0x1, (int)(val >> 35) & 0x1,
+		(int)(val >> 36) & 0x3ff, (int)(val >> 48) & 0x3ff,
+		(int)(val >> 63) & 0x1);
+
+	val = ssovf_read64(base + SSOW_VHWS_WQP);
+	fprintf(f, "\twqp=0x%"PRIx64"\n", val);
+
+	val = ssovf_read64(base + SSOW_VHWS_LINKS);
+	fprintf(f, "\tindex=%d valid=%d revlink=%d tail=%d head=%d grp=%d\n",
+		(int)(val & 0x3ff), (int)(val >> 10) & 0x1,
+		(int)(val >> 11) & 0x3ff, (int)(val >> 26) & 0x1,
+		(int)(val >> 27) & 0x1, (int)(val >> 28) & 0x3ff);
+
+	val = ssovf_read64(base + SSOW_VHWS_PENDTAG);
+	fprintf(f, "\tptag=0x%x ptt=%d pgwi=%d pdesc=%d pgw=%d pgww=%d ps=%d\n",
+		(uint32_t)(val & 0xffffffff), (int)(val >> 32) & 0x3,
+		(int)(val >> 56) & 0x1, (int)(val >> 58) & 0x1,
+		(int)(val >> 61) & 0x1, (int)(val >> 62) & 0x1,
+		(int)(val >> 63) & 0x1);
+
+	val = ssovf_read64(base + SSOW_VHWS_PENDWQP);
+	fprintf(f, "\tpwqp=0x%"PRIx64"\n", val);
+}
+
+static void
+ssovf_dump(struct rte_eventdev *dev, FILE *f)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+	uint8_t port;
+
+	/* Dump SSOWVF debug registers */
+	for (port = 0; port < edev->nb_event_ports; port++)
+		ssows_dump(dev->data->ports[port], f);
+}
+
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -345,6 +390,7 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.port_link        = ssovf_port_link,
 	.port_unlink      = ssovf_port_unlink,
 	.timeout_ticks    = ssovf_timeout_ticks,
+	.dump             = ssovf_dump,
 };
 
 static int
-- 
2.5.5

[PATCH 17/39] event/octeontx: add SSO HW device operations

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/Makefile       |   5 ++
 drivers/event/octeontx/ssovf_evdev.h  |  30 ++++++++
 drivers/event/octeontx/ssovf_worker.c | 140 ++++++++++++++++++++++++++++++++++
 3 files changed, 175 insertions(+)
 create mode 100644 drivers/event/octeontx/ssovf_worker.c

diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile
index 6e8227b..c921303 100644
--- a/drivers/event/octeontx/Makefile
+++ b/drivers/event/octeontx/Makefile
@@ -46,9 +46,14 @@ LIBABIVER := 1
 #
 # all source are stored in SRCS-y
 #
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_worker.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_evdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_probe.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_mbox.c
+ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
+CFLAGS_ssovf_worker.o += -fno-prefetch-loop-arrays
+endif
+CFLAGS_ssovf_worker.o += -Ofast
 
 # install this header file
 SYMLINK-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)-include := rte_pmd_octeontx_ssovf.h
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 16bf3d5..16846b8 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -129,6 +129,36 @@
 #define ssovf_read64 rte_read64_relaxed
 #define ssovf_write64 rte_write64_relaxed
 
+/* ARM64 specific functions */
+#if defined(RTE_ARCH_ARM64)
+#define ssovf_load_pair(val0, val1, addr) ({		\
+			asm volatile(			\
+			"ldp %x[x0], %x[x1], [%x[p1]]"	\
+			:[x0]"=r"(val0), [x1]"=r"(val1) \
+			:[p1]"r"(addr)			\
+			); })
+
+#define ssovf_store_pair(val0, val1, addr) ({		\
+			asm volatile(			\
+			"stp %x[x0], %x[x1], [%x[p1]]"	\
+			::[x0]"r"(val0), [x1]"r"(val1), [p1]"r"(addr) \
+			); })
+#else /* Un optimized functions for building on non arm64 arch */
+
+#define ssovf_load_pair(val0, val1, addr)		\
+do {							\
+	val0 = rte_read64(addr);			\
+	val1 = rte_read64(((uint8_t *)addr) + 8);	\
+} while (0)
+
+#define ssovf_store_pair(val0, val1, addr)		\
+do {							\
+	rte_write64(val0, addr);			\
+	rte_write64(val1, (((uint8_t *)addr) + 8));	\
+} while (0)
+#endif
+
+
 struct ssovf_evdev {
 	uint8_t max_event_queues;
 	uint8_t max_event_ports;
diff --git a/drivers/event/octeontx/ssovf_worker.c b/drivers/event/octeontx/ssovf_worker.c
new file mode 100644
index 0000000..8a96076
--- /dev/null
+++ b/drivers/event/octeontx/ssovf_worker.c
@@ -0,0 +1,140 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2017.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include <rte_common.h>
+
+#include "ssovf_evdev.h"
+
+enum {
+	SSO_SYNC_ORDERED,
+	SSO_SYNC_ATOMIC,
+	SSO_SYNC_UNTAGGED,
+	SSO_SYNC_EMPTY
+};
+
+#ifndef force_inline
+#define force_inline inline __attribute__((always_inline))
+#endif
+
+#ifndef __hot
+#define __hot	__attribute__((hot))
+#endif
+
+/* SSO Operations */
+
+static force_inline uint16_t
+ssows_get_work(struct ssows *ws, struct rte_event *ev)
+{
+	uint64_t get_work0, get_work1;
+	uint64_t sched_type_queue;
+
+	ssovf_load_pair(get_work0, get_work1, ws->getwork);
+
+	sched_type_queue = (get_work0 >> 32) & 0xfff;
+	ws->cur_tt = sched_type_queue & 0x3;
+	ws->cur_grp = sched_type_queue >> 2;
+	sched_type_queue = sched_type_queue << 38;
+
+	ev->event = sched_type_queue | (get_work0 & 0xffffffff);
+	ev->u64 = get_work1;
+	return !!get_work1;
+}
+
+static force_inline void
+ssows_add_work(struct ssows *ws, const uint64_t event_ptr, const uint32_t tag,
+			const uint8_t new_tt, const uint8_t grp)
+{
+	uint64_t add_work0;
+
+	add_work0 = tag | ((uint64_t)(new_tt) << 32);
+	ssovf_store_pair(add_work0, event_ptr, ws->grps[grp]);
+}
+
+static force_inline void
+ssows_swtag_full(struct ssows *ws, const uint64_t event_ptr, const uint32_t tag,
+			const uint8_t new_tt, const uint8_t grp)
+{
+	uint64_t swtag_full0;
+
+	swtag_full0 = tag | ((uint64_t)(new_tt & 0x3) << 32) |
+				((uint64_t)grp << 34);
+	ssovf_store_pair(swtag_full0, event_ptr, (ws->base +
+				SSOW_VHWS_OP_SWTAG_FULL0));
+}
+
+static force_inline void
+ssows_swtag_desched(struct ssows *ws, uint32_t tag, uint8_t new_tt, uint8_t grp)
+{
+	uint64_t val;
+
+	val = tag | ((uint64_t)(new_tt & 0x3) << 32) | ((uint64_t)grp << 34);
+	ssovf_write64(val, ws->base + SSOW_VHWS_OP_SWTAG_DESCHED);
+}
+
+static force_inline void
+ssows_swtag_norm(struct ssows *ws, uint32_t tag, uint8_t new_tt)
+{
+	uint64_t val;
+
+	val = tag | ((uint64_t)(new_tt & 0x3) << 32);
+	ssovf_write64(val, ws->base + SSOW_VHWS_OP_SWTAG_NORM);
+}
+
+static force_inline void
+ssows_swtag_untag(struct ssows *ws)
+{
+	ssovf_write64(0, ws->base + SSOW_VHWS_OP_SWTAG_UNTAG);
+	ws->cur_tt = SSO_SYNC_UNTAGGED;
+}
+
+static force_inline void
+ssows_upd_wqp(struct ssows *ws, uint8_t grp, uint64_t event_ptr)
+{
+	ssovf_store_pair((uint64_t)grp << 34, event_ptr, (ws->base +
+				SSOW_VHWS_OP_UPD_WQP_GRP0));
+}
+
+static force_inline void
+ssows_desched(struct ssows *ws)
+{
+	ssovf_write64(0, ws->base + SSOW_VHWS_OP_DESCHED);
+}
+
+static force_inline void
+ssows_swtag_wait(struct ssows *ws)
+{
+	/* Wait for the SWTAG/SWTAG_FULL operation */
+	while (ssovf_read64(ws->base + SSOW_VHWS_SWTP))
+	;
+}
+
-- 
2.5.5

[PATCH 18/39] event/octeontx: add support worker enqueue function

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.h  |   4 ++
 drivers/event/octeontx/ssovf_worker.c | 116 ++++++++++++++++++++++++++++++++++
 2 files changed, 120 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 16846b8..fac42f5 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -187,4 +187,8 @@ ssovf_pmd_priv(const struct rte_eventdev *eventdev)
 	return eventdev->data->dev_private;
 }
 
+uint16_t ssows_enq(void *port, const struct rte_event *ev);
+uint16_t ssows_enq_burst(void *port,
+		const struct rte_event ev[], uint16_t nb_events);
+
 #endif /* __SSOVF_EVDEV_H__ */
diff --git a/drivers/event/octeontx/ssovf_worker.c b/drivers/event/octeontx/ssovf_worker.c
index 8a96076..7ec78b4 100644
--- a/drivers/event/octeontx/ssovf_worker.c
+++ b/drivers/event/octeontx/ssovf_worker.c
@@ -138,3 +138,119 @@ ssows_swtag_wait(struct ssows *ws)
 	;
 }
 
+static force_inline void
+ssows_new_event(struct ssows *ws, const struct rte_event *ev)
+{
+	const uint64_t event_ptr = ev->u64;
+	const uint32_t tag = (uint32_t)ev->event;
+	const uint8_t new_tt = ev->sched_type;
+	const uint8_t grp = ev->queue_id;
+
+	ssows_add_work(ws, event_ptr, tag, new_tt, grp);
+}
+
+static force_inline void
+ssows_fwd_swtag(struct ssows *ws, const struct rte_event *ev, const uint8_t grp)
+{
+	const uint8_t cur_tt = ws->cur_tt;
+	const uint8_t new_tt = ev->sched_type;
+	const uint32_t tag = (uint32_t)ev->event;
+	/*
+	 * cur_tt/new_tt     SSO_SYNC_ORDERED SSO_SYNC_ATOMIC SSO_SYNC_UNTAGGED
+	 *
+	 * SSO_SYNC_ORDERED        norm           norm             untag
+	 * SSO_SYNC_ATOMIC         norm           norm		   untag
+	 * SSO_SYNC_UNTAGGED       full           full             NOOP
+	 */
+	if (unlikely(cur_tt == SSO_SYNC_UNTAGGED)) {
+		if (new_tt != SSO_SYNC_UNTAGGED) {
+			ssows_swtag_full(ws, ev->u64, tag,
+				new_tt, grp);
+		}
+	} else {
+		if (likely(new_tt != SSO_SYNC_UNTAGGED))
+			ssows_swtag_norm(ws, tag, new_tt);
+		else
+			ssows_swtag_untag(ws);
+	}
+	ws->swtag_req = 1;
+}
+
+#define OCT_EVENT_TYPE_GRP_FWD (RTE_EVENT_TYPE_MAX - 1)
+
+static force_inline void
+ssows_fwd_group(struct ssows *ws, const struct rte_event *ev, const uint8_t grp)
+{
+	const uint64_t event_ptr = ev->u64;
+	const uint32_t tag = (uint32_t)ev->event;
+	const uint8_t cur_tt = ws->cur_tt;
+	const uint8_t new_tt = ev->sched_type;
+
+	if (cur_tt == SSO_SYNC_ORDERED) {
+		/* Create unique tag based on custom event type and new grp */
+		uint32_t newtag = OCT_EVENT_TYPE_GRP_FWD << 28;
+
+		newtag |= grp << 20;
+		newtag |= tag;
+		ssows_swtag_norm(ws, newtag, SSO_SYNC_ATOMIC);
+		rte_smp_wmb();
+		ssows_swtag_wait(ws);
+	} else {
+		rte_smp_wmb();
+	}
+	ssows_add_work(ws, event_ptr, tag, new_tt, grp);
+}
+
+static force_inline void
+ssows_forward_event(struct ssows *ws, const struct rte_event *ev)
+{
+	const uint8_t grp = ev->queue_id;
+
+	/* Group hasn't changed, Use SWTAG to forward the event */
+	if (ws->cur_grp == grp)
+		ssows_fwd_swtag(ws, ev, grp);
+	else
+	/*
+	 * Group has been changed for group based work pipelining,
+	 * Use deschedule/add_work operation to transfer the event to
+	 * new group/core
+	 */
+		ssows_fwd_group(ws, ev, grp);
+}
+
+static force_inline void
+ssows_release_event(struct ssows *ws)
+{
+	if (likely(ws->cur_tt != SSO_SYNC_UNTAGGED))
+		ssows_swtag_untag(ws);
+}
+
+force_inline uint16_t __hot
+ssows_enq(void *port, const struct rte_event *ev)
+{
+	struct ssows *ws = port;
+	uint16_t ret = 1;
+
+	switch (ev->op) {
+	case RTE_EVENT_OP_NEW:
+		ssows_new_event(ws, ev);
+		break;
+	case RTE_EVENT_OP_FORWARD:
+		ssows_forward_event(ws, ev);
+		break;
+	case RTE_EVENT_OP_RELEASE:
+		ssows_release_event(ws);
+		break;
+	default:
+		ret = 0;
+	}
+	return ret;
+}
+
+uint16_t __hot
+ssows_enq_burst(void *port, const struct rte_event ev[], uint16_t nb_events)
+{
+	RTE_SET_USED(nb_events);
+	return ssows_enq(port, ev);
+}
+
-- 
2.5.5

[PATCH 19/39] event/octeontx: add support worker dequeue function

[Jerin Jacob]

If device is configured with RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT
configuration then use different fast path dequeue handler to wait till
requested amount of nanosecond if the event is not available.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.h  |  7 +++++
 drivers/event/octeontx/ssovf_worker.c | 52 +++++++++++++++++++++++++++++++++++
 2 files changed, 59 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index fac42f5..2cd9147 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -190,5 +190,12 @@ ssovf_pmd_priv(const struct rte_eventdev *eventdev)
 uint16_t ssows_enq(void *port, const struct rte_event *ev);
 uint16_t ssows_enq_burst(void *port,
 		const struct rte_event ev[], uint16_t nb_events);
+uint16_t ssows_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks);
+uint16_t ssows_deq_burst(void *port, struct rte_event ev[],
+		uint16_t nb_events, uint64_t timeout_ticks);
+uint16_t ssows_deq_timeout(void *port, struct rte_event *ev,
+		uint64_t timeout_ticks);
+uint16_t ssows_deq_timeout_burst(void *port, struct rte_event ev[],
+		uint16_t nb_events, uint64_t timeout_ticks);
 
 #endif /* __SSOVF_EVDEV_H__ */
diff --git a/drivers/event/octeontx/ssovf_worker.c b/drivers/event/octeontx/ssovf_worker.c
index 7ec78b4..e0d17b9 100644
--- a/drivers/event/octeontx/ssovf_worker.c
+++ b/drivers/event/octeontx/ssovf_worker.c
@@ -226,6 +226,58 @@ ssows_release_event(struct ssows *ws)
 }
 
 force_inline uint16_t __hot
+ssows_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks)
+{
+	struct ssows *ws = port;
+
+	RTE_SET_USED(timeout_ticks);
+
+	ssows_swtag_wait(ws);
+	if (ws->swtag_req) {
+		ws->swtag_req = 0;
+		return 1;
+	} else {
+		return ssows_get_work(ws, ev);
+	}
+}
+
+force_inline uint16_t __hot
+ssows_deq_timeout(void *port, struct rte_event *ev, uint64_t timeout_ticks)
+{
+	struct ssows *ws = port;
+	uint64_t iter;
+	uint16_t ret = 1;
+
+	ssows_swtag_wait(ws);
+	if (ws->swtag_req) {
+		ws->swtag_req = 0;
+	} else {
+		ret = ssows_get_work(ws, ev);
+		for (iter = 1; iter < timeout_ticks && (ret == 0); iter++)
+			ret = ssows_get_work(ws, ev);
+	}
+	return ret;
+}
+
+uint16_t __hot
+ssows_deq_burst(void *port, struct rte_event ev[], uint16_t nb_events,
+		uint64_t timeout_ticks)
+{
+	RTE_SET_USED(nb_events);
+
+	return ssows_deq(port, ev, timeout_ticks);
+}
+
+uint16_t __hot
+ssows_deq_timeout_burst(void *port, struct rte_event ev[], uint16_t nb_events,
+			uint64_t timeout_ticks)
+{
+	RTE_SET_USED(nb_events);
+
+	return ssows_deq_timeout(port, ev, timeout_ticks);
+}
+
+force_inline uint16_t __hot
 ssows_enq(void *port, const struct rte_event *ev)
 {
 	struct ssows *ws = port;
-- 
2.5.5

[PATCH 20/39] event/octeontx: add start function

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.c  | 49 +++++++++++++++++++++++++++++++++-
 drivers/event/octeontx/ssovf_evdev.h  |  2 ++
 drivers/event/octeontx/ssovf_worker.c | 50 +++++++++++++++++++++++++++++++++++
 3 files changed, 100 insertions(+), 1 deletion(-)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index babd59f..26c84c8 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -149,6 +149,23 @@ ssovf_mbox_timeout_ticks(uint64_t ns, uint64_t *tmo_ticks)
 }
 
 static void
+ssovf_fastpath_fns_set(struct rte_eventdev *dev)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+
+	dev->schedule      = NULL;
+	dev->enqueue       = ssows_enq;
+	dev->enqueue_burst = ssows_enq_burst;
+	dev->dequeue       = ssows_deq;
+	dev->dequeue_burst = ssows_deq_burst;
+
+	if (edev->is_timeout_deq) {
+		dev->dequeue       = ssows_deq_timeout;
+		dev->dequeue_burst = ssows_deq_timeout_burst;
+	}
+}
+
+static void
 ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
 {
 	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
@@ -377,6 +394,33 @@ ssovf_dump(struct rte_eventdev *dev, FILE *f)
 		ssows_dump(dev->data->ports[port], f);
 }
 
+static int
+ssovf_start(struct rte_eventdev *dev)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+	struct ssows *ws;
+	uint8_t *base;
+	uint8_t i;
+
+	ssovf_func_trace();
+	for (i = 0; i < edev->nb_event_ports; i++) {
+		ws = dev->data->ports[i];
+		ssows_reset(ws);
+		ws->swtag_req = 0;
+	}
+
+	for (i = 0; i < edev->nb_event_queues; i++) {
+		/* Consume all the events through HWS0 */
+		ssows_flush_events(dev->data->ports[0], i);
+
+		base = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, i, 0);
+		base += SSO_VHGRP_QCTL;
+		ssovf_write64(1, base); /* Enable SSO group */
+	}
+
+	ssovf_fastpath_fns_set(dev);
+	return 0;
+}
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -391,6 +435,7 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.port_unlink      = ssovf_port_unlink,
 	.timeout_ticks    = ssovf_timeout_ticks,
 	.dump             = ssovf_dump,
+	.dev_start        = ssovf_start,
 };
 
 static int
@@ -420,8 +465,10 @@ ssovf_vdev_probe(const char *name, const char *params)
 	eventdev->dev_ops = &ssovf_ops;
 
 	/* For secondary processes, the primary has done all the work */
-	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+		ssovf_fastpath_fns_set(eventdev);
 		return 0;
+	}
 
 	ret = octeontx_ssovf_info(&oinfo);
 	if (ret) {
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 2cd9147..6e0a352 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -197,5 +197,7 @@ uint16_t ssows_deq_timeout(void *port, struct rte_event *ev,
 		uint64_t timeout_ticks);
 uint16_t ssows_deq_timeout_burst(void *port, struct rte_event ev[],
 		uint16_t nb_events, uint64_t timeout_ticks);
+void ssows_flush_events(struct ssows *ws, uint8_t queue_id);
+void ssows_reset(struct ssows *ws);
 
 #endif /* __SSOVF_EVDEV_H__ */
diff --git a/drivers/event/octeontx/ssovf_worker.c b/drivers/event/octeontx/ssovf_worker.c
index e0d17b9..caad769 100644
--- a/drivers/event/octeontx/ssovf_worker.c
+++ b/drivers/event/octeontx/ssovf_worker.c
@@ -306,3 +306,53 @@ ssows_enq_burst(void *port, const struct rte_event ev[], uint16_t nb_events)
 	return ssows_enq(port, ev);
 }
 
+void
+ssows_flush_events(struct ssows *ws, uint8_t queue_id)
+{
+	uint32_t reg_off;
+	uint64_t aq_cnt = 1;
+	uint64_t cq_ds_cnt = 1;
+	uint64_t enable, get_work0, get_work1;
+	uint8_t *base = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, queue_id, 0);
+
+	RTE_SET_USED(get_work0);
+	RTE_SET_USED(get_work1);
+
+	enable = ssovf_read64(base + SSO_VHGRP_QCTL);
+	if (!enable)
+		return;
+
+	reg_off = SSOW_VHWS_OP_GET_WORK0;
+	reg_off |= 1 << 17; /* Grouped */
+	reg_off |= 1 << 16; /* WAIT */
+	reg_off |= queue_id << 4; /* INDEX_GGRP_MASK(group number) */
+	while (aq_cnt || cq_ds_cnt) {
+		aq_cnt = ssovf_read64(base + SSO_VHGRP_AQ_CNT);
+		cq_ds_cnt = ssovf_read64(base + SSO_VHGRP_INT_CNT);
+		/* Extract cq and ds count */
+		cq_ds_cnt &= 0x1FFF1FFF0000;
+		ssovf_load_pair(get_work0, get_work1, ws->base + reg_off);
+	}
+}
+
+void
+ssows_reset(struct ssows *ws)
+{
+	uint64_t tag;
+	uint64_t pend_tag;
+	uint8_t pend_tt;
+	uint8_t tt;
+
+	tag = ssovf_read64(ws->base + SSOW_VHWS_TAG);
+	pend_tag = ssovf_read64(ws->base + SSOW_VHWS_PENDTAG);
+
+	if (pend_tag & (1ULL << 63)) { /* Tagswitch pending */
+		pend_tt = (pend_tag >> 32) & 0x3;
+		if (pend_tt == SSO_SYNC_ORDERED || pend_tt == SSO_SYNC_ATOMIC)
+			ssows_desched(ws);
+	} else {
+		tt = (tag >> 32) & 0x3;
+		if (tt == SSO_SYNC_ORDERED || tt == SSO_SYNC_ATOMIC)
+			ssows_swtag_untag(ws);
+	}
+}
-- 
2.5.5

[PATCH 21/39] event/octeontx: add stop and close function

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 44 ++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index 26c84c8..94a0eb8 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -421,6 +421,48 @@ ssovf_start(struct rte_eventdev *dev)
 	ssovf_fastpath_fns_set(dev);
 	return 0;
 }
+
+static void
+ssovf_stop(struct rte_eventdev *dev)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+	struct ssows *ws;
+	uint8_t *base;
+	uint8_t i;
+
+	ssovf_func_trace();
+	for (i = 0; i < edev->nb_event_ports; i++) {
+		ws = dev->data->ports[i];
+		ssows_reset(ws);
+		ws->swtag_req = 0;
+	}
+
+	for (i = 0; i < edev->nb_event_queues; i++) {
+		/* Consume all the events through HWS0 */
+		ssows_flush_events(dev->data->ports[0], i);
+
+		base = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, i, 0);
+		base += SSO_VHGRP_QCTL;
+		ssovf_write64(0, base); /* Disable SSO group */
+	}
+}
+
+static int
+ssovf_close(struct rte_eventdev *dev)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+	uint8_t all_queues[RTE_EVENT_MAX_QUEUES_PER_DEV];
+	uint8_t i;
+
+	for (i = 0; i < edev->nb_event_queues; i++)
+		all_queues[i] = i;
+
+	for (i = 0; i < edev->nb_event_ports; i++)
+		ssovf_port_unlink(dev, dev->data->ports[i], all_queues,
+			edev->nb_event_queues);
+	return 0;
+}
+
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -436,6 +478,8 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.timeout_ticks    = ssovf_timeout_ticks,
 	.dump             = ssovf_dump,
 	.dev_start        = ssovf_start,
+	.dev_stop         = ssovf_stop,
+	.dev_close        = ssovf_close
 };
 
 static int
-- 
2.5.5

[PATCH 22/39] app/test: octeontx eventdev unit test infrastructure

[Jerin Jacob]

add test setup and teardown routines.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/Makefile                 |  5 +-
 app/test/test_eventdev_octeontx.c | 98 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 102 insertions(+), 1 deletion(-)
 create mode 100644 app/test/test_eventdev_octeontx.c

diff --git a/app/test/Makefile b/app/test/Makefile
index a426548..b45a1d3 100644
--- a/app/test/Makefile
+++ b/app/test/Makefile
@@ -197,7 +197,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev_blockcipher.c
 SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev_perf.c
 SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev.c
 
-SRCS-$(CONFIG_RTE_LIBRTE_EVENTDEV) += test_eventdev.c
+ifeq ($(CONFIG_RTE_LIBRTE_EVENTDEV),y)
+SRCS-y += test_eventdev.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += test_eventdev_octeontx.c
+endif
 
 SRCS-$(CONFIG_RTE_LIBRTE_KVARGS) += test_kvargs.c
 
diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
new file mode 100644
index 0000000..9744961
--- /dev/null
+++ b/app/test/test_eventdev_octeontx.c
@@ -0,0 +1,98 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2017 Cavium networks. All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *	 * Redistributions of source code must retain the above copyright
+ *	   notice, this list of conditions and the following disclaimer.
+ *	 * Redistributions in binary form must reproduce the above copyright
+ *	   notice, this list of conditions and the following disclaimer in
+ *	   the documentation and/or other materials provided with the
+ *	   distribution.
+ *	 * Neither the name of Cavium networks nor the names of its
+ *	   contributors may be used to endorse or promote products derived
+ *	   from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <rte_atomic.h>
+#include <rte_common.h>
+#include <rte_cycles.h>
+#include <rte_debug.h>
+#include <rte_eal.h>
+#include <rte_ethdev.h>
+#include <rte_eventdev.h>
+#include <rte_hexdump.h>
+#include <rte_mbuf.h>
+#include <rte_malloc.h>
+#include <rte_memcpy.h>
+#include <rte_launch.h>
+#include <rte_lcore.h>
+#include <rte_per_lcore.h>
+#include <rte_random.h>
+
+#include "test.h"
+
+#define NUM_PACKETS (1 << 18)
+#define MAX_EVENTS  (16 * 1024)
+
+static int evdev;
+
+static int
+testsuite_setup(void)
+{
+	const char *eventdev_name = "event_octeontx";
+
+	evdev = rte_event_dev_get_dev_id(eventdev_name);
+	if (evdev < 0) {
+		printf("%d: Eventdev %s not found - creating.\n",
+				__LINE__, eventdev_name);
+		if (rte_eal_vdev_init(eventdev_name, NULL) < 0) {
+			printf("Error creating eventdev\n");
+			return TEST_FAILED;
+		}
+		evdev = rte_event_dev_get_dev_id(eventdev_name);
+		if (evdev < 0) {
+			printf("Error finding newly created eventdev\n");
+			return TEST_FAILED;
+		}
+	}
+
+	return TEST_SUCCESS;
+}
+
+static void
+testsuite_teardown(void)
+{
+	rte_event_dev_close(evdev);
+}
+
+
+static struct unit_test_suite eventdev_octeontx_testsuite  = {
+	.suite_name = "eventdev octeontx unit test suite",
+	.setup = testsuite_setup,
+	.teardown = testsuite_teardown,
+};
+
+static int
+test_eventdev_octeontx(void)
+{
+	return unit_test_suite_runner(&eventdev_octeontx_testsuite);
+}
+
+REGISTER_TEST_COMMAND(eventdev_octeontx_autotest, test_eventdev_octeontx);
-- 
2.5.5

[PATCH 23/39] app/test: octeontx unit test case setup and teardown

[Jerin Jacob]

Each test case expected to run as standalone.
On setup, configure the device in requested mode and start the device.
On tear down, close the device and free the allocated resources

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 122 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 122 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index 9744961..e28880b 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -52,6 +52,7 @@
 #define MAX_EVENTS  (16 * 1024)
 
 static int evdev;
+static struct rte_mempool *eventdev_test_mempool;
 
 static int
 testsuite_setup(void)
@@ -82,6 +83,127 @@ testsuite_teardown(void)
 	rte_event_dev_close(evdev);
 }
 
+static inline void
+devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
+			struct rte_event_dev_info *info)
+{
+	memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
+	dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
+	dev_conf->nb_event_ports = info->max_event_ports;
+	dev_conf->nb_event_queues = info->max_event_queues;
+	dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
+	dev_conf->nb_event_port_dequeue_depth =
+			info->max_event_port_dequeue_depth;
+	dev_conf->nb_event_port_enqueue_depth =
+			info->max_event_port_enqueue_depth;
+	dev_conf->nb_event_port_enqueue_depth =
+			info->max_event_port_enqueue_depth;
+	dev_conf->nb_events_limit =
+			info->max_num_events;
+}
+
+enum {
+	TEST_EVENTDEV_SETUP_DEFAULT,
+	TEST_EVENTDEV_SETUP_PRIORITY,
+	TEST_EVENTDEV_SETUP_DEQUEUE_TIMEOUT,
+};
+
+static inline int
+_eventdev_setup(int mode)
+{
+	int i, ret;
+	struct rte_event_dev_config dev_conf;
+	struct rte_event_dev_info info;
+	const char *pool_name = "evdev_octeontx_test_pool";
+
+	/* Create and destrory pool for each test case to make it standalone */
+	eventdev_test_mempool = rte_pktmbuf_pool_create(pool_name,
+					MAX_EVENTS,
+					0 /*MBUF_CACHE_SIZE*/,
+					0,
+					512, /* Use very small mbufs */
+					rte_socket_id());
+	if (!eventdev_test_mempool) {
+		printf("ERROR creating mempool\n");
+		return TEST_FAILED;
+	}
+
+	ret = rte_event_dev_info_get(evdev, &info);
+	TEST_ASSERT_SUCCESS(ret, "Failed to get event dev info");
+	TEST_ASSERT(info.max_num_events >= (int32_t)MAX_EVENTS,
+			"max_num_events=%d < max_events=%d",
+			info.max_num_events, MAX_EVENTS);
+
+	devconf_set_default_sane_values(&dev_conf, &info);
+	if (mode == TEST_EVENTDEV_SETUP_DEQUEUE_TIMEOUT)
+		dev_conf.event_dev_cfg |= RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT;
+
+	ret = rte_event_dev_configure(evdev, &dev_conf);
+	TEST_ASSERT_SUCCESS(ret, "Failed to configure eventdev");
+
+	if (mode == TEST_EVENTDEV_SETUP_PRIORITY) {
+		/* Configure event queues(0 to n) with
+		 * RTE_EVENT_DEV_PRIORITY_HIGHEST to
+		 * RTE_EVENT_DEV_PRIORITY_LOWEST
+		 */
+		uint8_t step = (RTE_EVENT_DEV_PRIORITY_LOWEST + 1) /
+				rte_event_queue_count(evdev);
+		for (i = 0; i < rte_event_queue_count(evdev); i++) {
+			struct rte_event_queue_conf queue_conf;
+
+			ret = rte_event_queue_default_conf_get(evdev, i,
+						&queue_conf);
+			TEST_ASSERT_SUCCESS(ret, "Failed to get def_conf%d", i);
+			queue_conf.priority = i * step;
+			ret = rte_event_queue_setup(evdev, i, &queue_conf);
+			TEST_ASSERT_SUCCESS(ret, "Failed to setup queue=%d", i);
+		}
+
+	} else {
+		/* Configure event queues with default priority */
+		for (i = 0; i < rte_event_queue_count(evdev); i++) {
+			ret = rte_event_queue_setup(evdev, i, NULL);
+			TEST_ASSERT_SUCCESS(ret, "Failed to setup queue=%d", i);
+		}
+	}
+	/* Configure event ports */
+	for (i = 0; i < rte_event_port_count(evdev); i++) {
+		ret = rte_event_port_setup(evdev, i, NULL);
+		TEST_ASSERT_SUCCESS(ret, "Failed to setup port=%d", i);
+		ret = rte_event_port_link(evdev, i, NULL, NULL, 0);
+		TEST_ASSERT(ret >= 0, "Failed to link all queues port=%d", i);
+	}
+
+	ret = rte_event_dev_start(evdev);
+	TEST_ASSERT_SUCCESS(ret, "Failed to start device");
+
+	return TEST_SUCCESS;
+}
+
+static inline int
+eventdev_setup(void)
+{
+	return _eventdev_setup(TEST_EVENTDEV_SETUP_DEFAULT);
+}
+
+static inline int
+eventdev_setup_priority(void)
+{
+	return _eventdev_setup(TEST_EVENTDEV_SETUP_PRIORITY);
+}
+
+static inline int
+eventdev_setup_dequeue_timeout(void)
+{
+	return _eventdev_setup(TEST_EVENTDEV_SETUP_DEQUEUE_TIMEOUT);
+}
+
+static inline void
+eventdev_teardown(void)
+{
+	rte_event_dev_stop(evdev);
+	rte_mempool_free(eventdev_test_mempool);
+}
 
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
-- 
2.5.5

[PATCH 24/39] app/test: octeontx unit test case helper functions

[Jerin Jacob]

Add helper functions to generate, inject, consume and validate the events.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 202 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 202 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index e28880b..8a03920 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -54,6 +54,52 @@
 static int evdev;
 static struct rte_mempool *eventdev_test_mempool;
 
+struct event_attr {
+	uint32_t flow_id;
+	uint8_t event_type;
+	uint8_t sub_event_type;
+	uint8_t sched_type;
+	uint8_t queue;
+	uint8_t port;
+};
+
+
+static uint32_t seqn_list_index;
+static int seqn_list[NUM_PACKETS];
+
+static inline void
+seqn_list_init(void)
+{
+	RTE_BUILD_BUG_ON(NUM_PACKETS < MAX_EVENTS);
+	memset(seqn_list, 0, sizeof(seqn_list));
+	seqn_list_index = 0;
+}
+
+static inline int
+seqn_list_update(int val)
+{
+	if (seqn_list_index >= NUM_PACKETS)
+		return TEST_FAILED;
+
+	seqn_list[seqn_list_index++] = val;
+	rte_smp_wmb();
+	return TEST_SUCCESS;
+}
+
+static inline int
+seqn_list_check(int limit)
+{
+	int i;
+
+	for (i = 0; i < limit; i++) {
+		if (seqn_list[i] != i) {
+			printf("Seqn mismatch %d %d\n", seqn_list[i], i);
+			return TEST_FAILED;
+		}
+	}
+	return TEST_SUCCESS;
+}
+
 static int
 testsuite_setup(void)
 {
@@ -205,6 +251,162 @@ eventdev_teardown(void)
 	rte_mempool_free(eventdev_test_mempool);
 }
 
+static inline void
+update_event_and_validation_attr(struct rte_mbuf *m, struct rte_event *ev,
+			uint32_t flow_id, uint8_t event_type,
+			uint8_t sub_event_type, uint8_t sched_type,
+			uint8_t queue, uint8_t port)
+{
+	struct event_attr *attr;
+
+	/* Store the event attributes in mbuf for future reference */
+	attr = rte_pktmbuf_mtod(m, struct event_attr *);
+	attr->flow_id = flow_id;
+	attr->event_type = event_type;
+	attr->sub_event_type = sub_event_type;
+	attr->sched_type = sched_type;
+	attr->queue = queue;
+	attr->port = port;
+
+	ev->flow_id = flow_id;
+	ev->sub_event_type = sub_event_type;
+	ev->event_type = event_type;
+	/* Inject the new event */
+	ev->op = RTE_EVENT_OP_NEW;
+	ev->sched_type = sched_type;
+	ev->queue_id = queue;
+	ev->mbuf = m;
+}
+
+static inline int
+inject_events(uint32_t flow_id, uint8_t event_type, uint8_t sub_event_type,
+		uint8_t sched_type, uint8_t queue, uint8_t port,
+		unsigned int events)
+{
+	struct rte_mbuf *m;
+	unsigned int i;
+
+	for (i = 0; i < events; i++) {
+		struct rte_event ev = {0};
+
+		m = rte_pktmbuf_alloc(eventdev_test_mempool);
+		TEST_ASSERT_NOT_NULL(m, "mempool alloc failed");
+
+		m->seqn = i;
+		update_event_and_validation_attr(m, &ev, flow_id, event_type,
+			sub_event_type, sched_type, queue, port);
+		rte_event_enqueue_burst(evdev, port, &ev, 1);
+	}
+	return 0;
+}
+
+static inline int
+check_excess_events(uint8_t port)
+{
+	int i;
+	uint16_t valid_event;
+	struct rte_event ev;
+
+	/* Check for excess events, try for a few times and exit */
+	for (i = 0; i < 32; i++) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
+
+		TEST_ASSERT_SUCCESS(valid_event, "Unexpected valid event=%d",
+					ev.mbuf->seqn);
+	}
+	return 0;
+}
+
+static inline int
+generate_random_events(const unsigned int total_events)
+{
+	struct rte_event_dev_info info;
+	unsigned int i;
+	int ret;
+
+	ret = rte_event_dev_info_get(evdev, &info);
+	TEST_ASSERT_SUCCESS(ret, "Failed to get event dev info");
+	for (i = 0; i < total_events; i++) {
+		ret = inject_events(
+			rte_rand() % info.max_event_queue_flows /*flow_id */,
+			rte_rand() % (RTE_EVENT_TYPE_CPU + 1) /* event_type */,
+			rte_rand() % 256 /* sub_event_type */,
+			rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1),
+			rte_rand() % rte_event_queue_count(evdev) /* queue */,
+			0 /* port */,
+			1 /* events */);
+		if (ret)
+			return TEST_FAILED;
+	}
+	return ret;
+}
+
+static inline int
+validate_event(struct rte_event *ev)
+{
+	struct event_attr *attr;
+
+	attr = rte_pktmbuf_mtod(ev->mbuf, struct event_attr *);
+	TEST_ASSERT_EQUAL(attr->flow_id, ev->flow_id,
+			"flow_id mismatch enq=%d deq =%d",
+			attr->flow_id, ev->flow_id);
+	TEST_ASSERT_EQUAL(attr->event_type, ev->event_type,
+			"event_type mismatch enq=%d deq =%d",
+			attr->event_type, ev->event_type);
+	TEST_ASSERT_EQUAL(attr->sub_event_type, ev->sub_event_type,
+			"sub_event_type mismatch enq=%d deq =%d",
+			attr->sub_event_type, ev->sub_event_type);
+	TEST_ASSERT_EQUAL(attr->sched_type, ev->sched_type,
+			"sched_type mismatch enq=%d deq =%d",
+			attr->sched_type, ev->sched_type);
+	TEST_ASSERT_EQUAL(attr->queue, ev->queue_id,
+			"queue mismatch enq=%d deq =%d",
+			attr->queue, ev->queue_id);
+	return 0;
+}
+
+typedef int (*validate_event_cb)(uint32_t index, uint8_t port,
+				 struct rte_event *ev);
+
+static inline int
+consume_events(uint8_t port, const uint32_t total_events, validate_event_cb fn)
+{
+	int ret;
+	uint16_t valid_event;
+	uint32_t events = 0, forward_progress_cnt = 0, index = 0;
+	struct rte_event ev;
+
+	while (1) {
+		if (++forward_progress_cnt > UINT16_MAX) {
+			printf("Detected deadlock\n");
+			return TEST_FAILED;
+		}
+
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
+		if (!valid_event)
+			continue;
+
+		forward_progress_cnt = 0;
+		ret = validate_event(&ev);
+		if (ret)
+			return TEST_FAILED;
+
+		if (fn != NULL) {
+			ret = fn(index, port, &ev);
+			TEST_ASSERT_SUCCESS(ret,
+				"Failed to validate test specific event");
+		}
+
+		++index;
+
+		rte_pktmbuf_free(ev.mbuf);
+		if (++events >= total_events)
+			break;
+	}
+
+	return check_excess_events(port);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
-- 
2.5.5

[PATCH 25/39] app/test: octeontx simple event enqueue and dequeue test

[Jerin Jacob]

Added unit test case to verify simple event enqueue and dequeue
operation with different schedule types

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 54 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index 8a03920..47b029d 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -407,10 +407,64 @@ consume_events(uint8_t port, const uint32_t total_events, validate_event_cb fn)
 	return check_excess_events(port);
 }
 
+static int
+validate_simple_enqdeq(uint32_t index, uint8_t port, struct rte_event *ev)
+{
+	RTE_SET_USED(port);
+	TEST_ASSERT_EQUAL(index, ev->mbuf->seqn, "index=%d != seqn=%d", index,
+					ev->mbuf->seqn);
+	return 0;
+}
+
+static inline int
+test_simple_enqdeq(uint8_t sched_type)
+{
+	int ret;
+
+	ret = inject_events(0 /*flow_id */,
+				RTE_EVENT_TYPE_CPU /* event_type */,
+				0 /* sub_event_type */,
+				sched_type,
+				0 /* queue */,
+				0 /* port */,
+				MAX_EVENTS);
+	if (ret)
+		return TEST_FAILED;
+
+	return consume_events(0 /* port */, MAX_EVENTS,	validate_simple_enqdeq);
+}
+
+static int
+test_simple_enqdeq_ordered(void)
+{
+	return test_simple_enqdeq(RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_simple_enqdeq_atomic(void)
+{
+	return test_simple_enqdeq(RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_simple_enqdeq_parallel(void)
+{
+	return test_simple_enqdeq(RTE_SCHED_TYPE_PARALLEL);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
 	.teardown = testsuite_teardown,
+	.unit_test_cases = {
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_simple_enqdeq_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_simple_enqdeq_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_simple_enqdeq_parallel),
+		TEST_CASES_END() /**< NULL terminate unit test array */
+	}
 };
 
 static int
-- 
2.5.5

[PATCH 26/39] app/test: octeontx multi queue enqueue and dequeue test

[Jerin Jacob]

Added unit test case to verify enqueue and dequeue operations
with multiple queues and a single port.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index 47b029d..5a6e8f6 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -452,6 +452,23 @@ test_simple_enqdeq_parallel(void)
 	return test_simple_enqdeq(RTE_SCHED_TYPE_PARALLEL);
 }
 
+/*
+ * Generate a prescribed number of events and spread them across available
+ * queues. On dequeue, using single event port(port 0) verify the enqueued
+ * event attributes
+ */
+static int
+test_multi_queue_enq_single_port_deq(void)
+{
+	int ret;
+
+	ret = generate_random_events(MAX_EVENTS);
+	if (ret)
+		return TEST_FAILED;
+
+	return consume_events(0 /* port */, MAX_EVENTS, NULL);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -463,6 +480,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_simple_enqdeq_atomic),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_simple_enqdeq_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_queue_enq_single_port_deq),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH 27/39] app/test: octeontx eventdev priority test

[Jerin Jacob]

Added unit test case to verify the priority associated with
each event queue available in the device.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 59 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index 5a6e8f6..4a63d15 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -469,6 +469,63 @@ test_multi_queue_enq_single_port_deq(void)
 	return consume_events(0 /* port */, MAX_EVENTS, NULL);
 }
 
+/*
+ * Inject 0..MAX_EVENTS events over 0..rte_event_queue_count() with modulus
+ * operation
+ *
+ * For example, Inject 32 events over 0..7 queues
+ * enqueue events 0, 8, 16, 24 in queue 0
+ * enqueue events 1, 9, 17, 25 in queue 1
+ * ..
+ * ..
+ * enqueue events 7, 15, 23, 31 in queue 7
+ *
+ * On dequeue, Validate the events comes in 0,8,16,24,1,9,17,25..,7,15,23,31
+ * order from queue0(highest priority) to queue7(lowest_priority)
+ */
+static int
+validate_queue_priority(uint32_t index, uint8_t port, struct rte_event *ev)
+{
+	uint32_t range = MAX_EVENTS / rte_event_queue_count(evdev);
+	uint32_t expected_val = (index % range) * rte_event_queue_count(evdev);
+
+	expected_val += ev->queue_id;
+	RTE_SET_USED(port);
+	TEST_ASSERT_EQUAL(ev->mbuf->seqn, expected_val,
+	"seqn=%d index=%d expected=%d range=%d nb_queues=%d max_event=%d",
+			ev->mbuf->seqn, index, expected_val, range,
+			rte_event_queue_count(evdev), MAX_EVENTS);
+	return 0;
+}
+
+static int
+test_multi_queue_priority(void)
+{
+	uint8_t queue;
+	struct rte_mbuf *m;
+	int i, max_evts_roundoff;
+
+	/* See validate_queue_priority() comments for priority validate logic */
+	max_evts_roundoff  = MAX_EVENTS / rte_event_queue_count(evdev);
+	max_evts_roundoff *= rte_event_queue_count(evdev);
+
+	for (i = 0; i < max_evts_roundoff; i++) {
+		struct rte_event ev = {0};
+
+		m = rte_pktmbuf_alloc(eventdev_test_mempool);
+		TEST_ASSERT_NOT_NULL(m, "mempool alloc failed");
+
+		m->seqn = i;
+		queue = i % rte_event_queue_count(evdev);
+		update_event_and_validation_attr(m, &ev, 0, RTE_EVENT_TYPE_CPU,
+			0, RTE_SCHED_TYPE_PARALLEL, queue, 0);
+		rte_event_enqueue_burst(evdev, 0, &ev, 1);
+	}
+
+	return consume_events(0, max_evts_roundoff, validate_queue_priority);
+}
+
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -482,6 +539,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_simple_enqdeq_parallel),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_queue_enq_single_port_deq),
+		TEST_CASE_ST(eventdev_setup_priority, eventdev_teardown,
+			test_multi_queue_priority),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH 28/39] app/test: add infrastructure for multicore octeontx tests

[Jerin Jacob]

Add helper functions to launch and wait for n cores to complete the
operation with deadlock detection.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 88 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 88 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index 4a63d15..1b2a5e1 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -63,6 +63,12 @@ struct event_attr {
 	uint8_t port;
 };
 
+struct test_core_param {
+	rte_atomic32_t *total_events;
+	uint64_t dequeue_tmo_ticks;
+	uint8_t port;
+	uint8_t sched_type;
+};
 
 static uint32_t seqn_list_index;
 static int seqn_list[NUM_PACKETS];
@@ -525,6 +531,88 @@ test_multi_queue_priority(void)
 	return consume_events(0, max_evts_roundoff, validate_queue_priority);
 }
 
+static inline int
+wait_workers_to_join(int lcore, const rte_atomic32_t *count)
+{
+	uint64_t cycles, print_cycles;
+
+	print_cycles = cycles = rte_get_timer_cycles();
+	while (rte_eal_get_lcore_state(lcore) != FINISHED) {
+		uint64_t new_cycles = rte_get_timer_cycles();
+
+		if (new_cycles - print_cycles > rte_get_timer_hz()) {
+			printf("\r%s: events %d\n", __func__,
+				rte_atomic32_read(count));
+			print_cycles = new_cycles;
+		}
+		if (new_cycles - cycles > rte_get_timer_hz() * 10) {
+			printf("%s: No schedules for seconds, deadlock (%d)\n",
+				__func__,
+				rte_atomic32_read(count));
+			rte_event_dev_dump(evdev, stdout);
+			cycles = new_cycles;
+			return TEST_FAILED;
+		}
+	}
+	rte_eal_mp_wait_lcore();
+	return TEST_SUCCESS;
+}
+
+
+static inline int
+launch_workers_and_wait(int (*master_worker)(void *),
+			int (*slave_workers)(void *), uint32_t total_events,
+			uint8_t nb_workers, uint8_t sched_type)
+{
+	uint8_t port = 0;
+	int w_lcore;
+	int ret;
+	struct test_core_param *param;
+	rte_atomic32_t atomic_total_events;
+	uint64_t dequeue_tmo_ticks;
+
+	if (!nb_workers)
+		return 0;
+
+	rte_atomic32_set(&atomic_total_events, total_events);
+	seqn_list_init();
+
+	param = malloc(sizeof(struct test_core_param) * nb_workers);
+	if (!param)
+		return TEST_FAILED;
+
+	ret = rte_event_dequeue_timeout_ticks(evdev,
+		rte_rand() % 10000000/* 10ms */, &dequeue_tmo_ticks);
+	if (ret)
+		return TEST_FAILED;
+
+	param[0].total_events = &atomic_total_events;
+	param[0].sched_type = sched_type;
+	param[0].port = 0;
+	param[0].dequeue_tmo_ticks = dequeue_tmo_ticks;
+	rte_smp_wmb();
+
+	w_lcore = rte_get_next_lcore(
+			/* start core */ -1,
+			/* skip master */ 1,
+			/* wrap */ 0);
+	rte_eal_remote_launch(master_worker, &param[0], w_lcore);
+
+	for (port = 1; port < nb_workers; port++) {
+		param[port].total_events = &atomic_total_events;
+		param[port].sched_type = sched_type;
+		param[port].port = port;
+		param[port].dequeue_tmo_ticks = dequeue_tmo_ticks;
+		rte_smp_wmb();
+		w_lcore = rte_get_next_lcore(w_lcore, 1, 0);
+		rte_eal_remote_launch(slave_workers, &param[port], w_lcore);
+	}
+
+	ret = wait_workers_to_join(w_lcore, &atomic_total_events);
+	free(param);
+	return ret;
+}
+
 
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
-- 
2.5.5

[PATCH 29/39] app/test: octeontx multi queue and multi core/port tests

[Jerin Jacob]

Add unit test case to verify multi queue enqueue and multi core/port
dequeue operation.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 53 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index 1b2a5e1..0d18de7 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -531,6 +531,29 @@ test_multi_queue_priority(void)
 	return consume_events(0, max_evts_roundoff, validate_queue_priority);
 }
 
+static int
+worker_multi_port_fn(void *arg)
+{
+	struct test_core_param *param = arg;
+	struct rte_event ev;
+	uint16_t valid_event;
+	uint8_t port = param->port;
+	rte_atomic32_t *total_events = param->total_events;
+	int ret;
+
+	while (rte_atomic32_read(total_events) > 0) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
+		if (!valid_event)
+			continue;
+
+		ret = validate_event(&ev);
+		TEST_ASSERT_SUCCESS(ret, "Failed to validate event");
+		rte_pktmbuf_free(ev.mbuf);
+		rte_atomic32_sub(total_events, 1);
+	}
+	return 0;
+}
+
 static inline int
 wait_workers_to_join(int lcore, const rte_atomic32_t *count)
 {
@@ -613,6 +636,34 @@ launch_workers_and_wait(int (*master_worker)(void *),
 	return ret;
 }
 
+/*
+ * Generate a prescribed number of events and spread them across available
+ * queues. Dequeue the events through multiple ports and verify the enqueued
+ * event attributes
+ */
+static int
+test_multi_queue_enq_multi_port_deq(void)
+{
+	const unsigned int total_events = MAX_EVENTS;
+	uint8_t nr_ports;
+	int ret;
+
+	ret = generate_random_events(total_events);
+	if (ret)
+		return TEST_FAILED;
+
+	nr_ports = RTE_MIN(rte_event_port_count(evdev), rte_lcore_count() - 1);
+
+	if (!nr_ports) {
+		printf("%s: Not enough ports=%d or workers=%d\n", __func__,
+			rte_event_port_count(evdev), rte_lcore_count() - 1);
+		return TEST_SUCCESS;
+	}
+
+	return launch_workers_and_wait(worker_multi_port_fn,
+					worker_multi_port_fn, total_events,
+					nr_ports, 0xff /* invalid */);
+}
 
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
@@ -629,6 +680,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_queue_enq_single_port_deq),
 		TEST_CASE_ST(eventdev_setup_priority, eventdev_teardown,
 			test_multi_queue_priority),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_queue_enq_multi_port_deq),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH 30/39] app/test: octeontx single link establishment test

[Jerin Jacob]

Add test case to verify queue to port single link establishment operation.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 62 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index 0d18de7..26a21cb 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -665,6 +665,66 @@ test_multi_queue_enq_multi_port_deq(void)
 					nr_ports, 0xff /* invalid */);
 }
 
+static int
+validate_queue_to_port_single_link(uint32_t index, uint8_t port,
+			struct rte_event *ev)
+{
+	RTE_SET_USED(index);
+	TEST_ASSERT_EQUAL(port, ev->queue_id,
+				"queue mismatch enq=%d deq =%d",
+				port, ev->queue_id);
+	return 0;
+}
+
+/*
+ * Link queue x to port x and check correctness of link by checking
+ * queue_id == x on dequeue on the specific port x
+ */
+static int
+test_queue_to_port_single_link(void)
+{
+	int i, nr_links, ret;
+
+	/* Unlink all connections that created in eventdev_setup */
+	for (i = 0; i < rte_event_port_count(evdev); i++) {
+		ret = rte_event_port_unlink(evdev, i, NULL, 0);
+		TEST_ASSERT(ret >= 0, "Failed to unlink all queues port=%d", i);
+	}
+
+	nr_links = RTE_MIN(rte_event_port_count(evdev),
+				rte_event_queue_count(evdev));
+	const unsigned int total_events = MAX_EVENTS / nr_links;
+
+	/* Link queue x to port x and inject events to queue x through port x */
+	for (i = 0; i < nr_links; i++) {
+		uint8_t queue = (uint8_t)i;
+
+		ret = rte_event_port_link(evdev, i, &queue, NULL, 1);
+		TEST_ASSERT(ret == 1, "Failed to link queue to port %d", i);
+
+		ret = inject_events(
+			0x100 /*flow_id */,
+			rte_rand() % (RTE_EVENT_TYPE_CPU + 1) /* event_type */,
+			rte_rand() % 256 /* sub_event_type */,
+			rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1),
+			queue /* queue */,
+			i /* port */,
+			total_events /* events */);
+		if (ret)
+			return TEST_FAILED;
+	}
+
+	/* Verify the events generated from correct queue */
+	for (i = 0; i < nr_links; i++) {
+		ret = consume_events(i /* port */, total_events,
+				validate_queue_to_port_single_link);
+		if (ret)
+			return TEST_FAILED;
+	}
+
+	return TEST_SUCCESS;
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -682,6 +742,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_queue_priority),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_queue_enq_multi_port_deq),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_queue_to_port_single_link),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH 31/39] app/test: octeontx multi link establishment test

[Jerin Jacob]

Add unit test case to verify queue to port multi link
establishment operation.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 77 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index 26a21cb..ed761ef 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -725,6 +725,81 @@ test_queue_to_port_single_link(void)
 	return TEST_SUCCESS;
 }
 
+static int
+validate_queue_to_port_multi_link(uint32_t index, uint8_t port,
+			struct rte_event *ev)
+{
+	RTE_SET_USED(index);
+	TEST_ASSERT_EQUAL(port, (ev->queue_id & 0x1),
+				"queue mismatch enq=%d deq =%d",
+				port, ev->queue_id);
+	return 0;
+}
+
+/*
+ * Link all even number of queues to port 0 and all odd number of queues to
+ * port 1 and verify the link connection on dequeue
+ */
+static int
+test_queue_to_port_multi_link(void)
+{
+	int ret, port0_events = 0, port1_events = 0;
+	uint8_t nr_queues, nr_ports, queue, port;
+
+	nr_queues = rte_event_queue_count(evdev);
+	nr_ports = rte_event_port_count(evdev);
+
+	if (nr_ports < 2) {
+		printf("%s: Not enough ports to test ports=%d\n",
+				__func__, nr_ports);
+		return TEST_SUCCESS;
+	}
+
+	/* Unlink all connections that created in eventdev_setup */
+	for (port = 0; port < nr_ports; port++) {
+		ret = rte_event_port_unlink(evdev, port, NULL, 0);
+		TEST_ASSERT(ret >= 0, "Failed to unlink all queues port=%d",
+					port);
+	}
+
+	const unsigned int total_events = MAX_EVENTS / nr_queues;
+
+	/* Link all even number of queues to port0 and odd numbers to port 1*/
+	for (queue = 0; queue < nr_queues; queue++) {
+		port = queue & 0x1;
+		ret = rte_event_port_link(evdev, port, &queue, NULL, 1);
+		TEST_ASSERT(ret == 1, "Failed to link queue=%d to port=%d",
+					queue, port);
+
+		ret = inject_events(
+			0x100 /*flow_id */,
+			rte_rand() % (RTE_EVENT_TYPE_CPU + 1) /* event_type */,
+			rte_rand() % 256 /* sub_event_type */,
+			rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1),
+			queue /* queue */,
+			port /* port */,
+			total_events /* events */);
+		if (ret)
+			return TEST_FAILED;
+
+		if (port == 0)
+			port0_events += total_events;
+		else
+			port1_events += total_events;
+	}
+
+	ret = consume_events(0 /* port */, port0_events,
+				validate_queue_to_port_multi_link);
+	if (ret)
+		return TEST_FAILED;
+	ret = consume_events(1 /* port */, port1_events,
+				validate_queue_to_port_multi_link);
+	if (ret)
+		return TEST_FAILED;
+
+	return TEST_SUCCESS;
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -744,6 +819,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_queue_enq_multi_port_deq),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_queue_to_port_single_link),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_queue_to_port_multi_link),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH 32/39] app/test: octeontx flow based two stage sched type test

[Jerin Jacob]

Add flow based two stage pipeline test with all combination
of schedule types.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 170 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 170 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index ed761ef..e17bc82 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -800,6 +800,158 @@ test_queue_to_port_multi_link(void)
 	return TEST_SUCCESS;
 }
 
+static int
+worker_flow_based_pipeline(void *arg)
+{
+	struct test_core_param *param = arg;
+	struct rte_event ev;
+	uint16_t valid_event;
+	uint8_t port = param->port;
+	uint8_t new_sched_type = param->sched_type;
+	rte_atomic32_t *total_events = param->total_events;
+	uint64_t dequeue_tmo_ticks = param->dequeue_tmo_ticks;
+
+	while (rte_atomic32_read(total_events) > 0) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1,
+					dequeue_tmo_ticks);
+		if (!valid_event)
+			continue;
+
+		/* Events from stage 0 */
+		if (ev.sub_event_type == 0) {
+			/* Move to atomic flow to maintain the ordering */
+			ev.flow_id = 0x2;
+			ev.event_type = RTE_EVENT_TYPE_CPU;
+			ev.sub_event_type = 1; /* stage 1 */
+			ev.sched_type = new_sched_type;
+			ev.op = RTE_EVENT_OP_FORWARD;
+			rte_event_enqueue_burst(evdev, port, &ev, 1);
+		} else if (ev.sub_event_type == 1) { /* Events from stage 1*/
+			if (seqn_list_update(ev.mbuf->seqn) == TEST_SUCCESS) {
+				rte_pktmbuf_free(ev.mbuf);
+				rte_atomic32_sub(total_events, 1);
+			} else {
+				printf("Failed to update seqn_list\n");
+				return TEST_FAILED;
+			}
+		} else {
+			printf("Invalid ev.sub_event_type = %d\n",
+					ev.sub_event_type);
+			return TEST_FAILED;
+		}
+	}
+	return 0;
+}
+
+static int
+test_multiport_flow_sched_type_test(uint8_t in_sched_type,
+			uint8_t out_sched_type)
+{
+	const unsigned int total_events = MAX_EVENTS;
+	uint8_t nr_ports;
+	int ret;
+
+	nr_ports = RTE_MIN(rte_event_port_count(evdev), rte_lcore_count() - 1);
+
+	if (!nr_ports) {
+		printf("%s: Not enough ports=%d or workers=%d\n", __func__,
+			rte_event_port_count(evdev), rte_lcore_count() - 1);
+		return TEST_SUCCESS;
+	}
+
+	/* Injects events with m->seqn=0 to total_events */
+	ret = inject_events(
+		0x1 /*flow_id */,
+		RTE_EVENT_TYPE_CPU /* event_type */,
+		0 /* sub_event_type (stage 0) */,
+		in_sched_type,
+		0 /* queue */,
+		0 /* port */,
+		total_events /* events */);
+	if (ret)
+		return TEST_FAILED;
+
+	ret = launch_workers_and_wait(worker_flow_based_pipeline,
+					worker_flow_based_pipeline,
+					total_events, nr_ports, out_sched_type);
+	if (ret)
+		return TEST_FAILED;
+
+	if (in_sched_type != RTE_SCHED_TYPE_PARALLEL &&
+			out_sched_type == RTE_SCHED_TYPE_ATOMIC) {
+		/* Check the events order maintained or not */
+		return seqn_list_check(total_events);
+	}
+	return TEST_SUCCESS;
+}
+
+
+/* Multi port ordered to atomic transaction */
+static int
+test_multi_port_flow_ordered_to_atomic(void)
+{
+	/* Ingress event order test */
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_ORDERED,
+				RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_multi_port_flow_ordered_to_ordered(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_ORDERED,
+				RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_multi_port_flow_ordered_to_parallel(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_ORDERED,
+				RTE_SCHED_TYPE_PARALLEL);
+}
+
+static int
+test_multi_port_flow_atomic_to_atomic(void)
+{
+	/* Ingress event order test */
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_ATOMIC,
+				RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_multi_port_flow_atomic_to_ordered(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_ATOMIC,
+				RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_multi_port_flow_atomic_to_parallel(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_ATOMIC,
+				RTE_SCHED_TYPE_PARALLEL);
+}
+
+static int
+test_multi_port_flow_parallel_to_atomic(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
+				RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_multi_port_flow_parallel_to_ordered(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
+				RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_multi_port_flow_parallel_to_parallel(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
+				RTE_SCHED_TYPE_PARALLEL);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -821,6 +973,24 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_queue_to_port_single_link),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_queue_to_port_multi_link),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_ordered_to_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_ordered_to_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_ordered_to_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_atomic_to_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_atomic_to_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_atomic_to_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_parallel_to_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_parallel_to_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_parallel_to_parallel),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH 33/39] app/test: octeontx queue based two stage sched type test

[Jerin Jacob]

Add queue based two stage pipeline test with all combination
of schedule types.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 169 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 169 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index e17bc82..2265576 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -952,6 +952,157 @@ test_multi_port_flow_parallel_to_parallel(void)
 				RTE_SCHED_TYPE_PARALLEL);
 }
 
+static int
+worker_group_based_pipeline(void *arg)
+{
+	struct test_core_param *param = arg;
+	struct rte_event ev;
+	uint16_t valid_event;
+	uint8_t port = param->port;
+	uint8_t new_sched_type = param->sched_type;
+	rte_atomic32_t *total_events = param->total_events;
+	uint64_t dequeue_tmo_ticks = param->dequeue_tmo_ticks;
+
+	while (rte_atomic32_read(total_events) > 0) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1,
+					dequeue_tmo_ticks);
+		if (!valid_event)
+			continue;
+
+		/* Events from stage 0(group 0) */
+		if (ev.queue_id == 0) {
+			/* Move to atomic flow to maintain the ordering */
+			ev.flow_id = 0x2;
+			ev.event_type = RTE_EVENT_TYPE_CPU;
+			ev.sched_type = new_sched_type;
+			ev.queue_id = 1; /* Stage 1*/
+			ev.op = RTE_EVENT_OP_FORWARD;
+			rte_event_enqueue_burst(evdev, port, &ev, 1);
+		} else if (ev.queue_id == 1) { /* Events from stage 1(group 1)*/
+			if (seqn_list_update(ev.mbuf->seqn) == TEST_SUCCESS) {
+				rte_pktmbuf_free(ev.mbuf);
+				rte_atomic32_sub(total_events, 1);
+			} else {
+				printf("Failed to update seqn_list\n");
+				return TEST_FAILED;
+			}
+		} else {
+			printf("Invalid ev.queue_id = %d\n", ev.queue_id);
+			return TEST_FAILED;
+		}
+	}
+
+
+	return 0;
+}
+
+static int
+test_multiport_queue_sched_type_test(uint8_t in_sched_type,
+			uint8_t out_sched_type)
+{
+	const unsigned int total_events = MAX_EVENTS;
+	uint8_t nr_ports;
+	int ret;
+
+	nr_ports = RTE_MIN(rte_event_port_count(evdev), rte_lcore_count() - 1);
+
+	if (rte_event_queue_count(evdev) < 2 ||  !nr_ports) {
+		printf("%s: Not enough queues=%d ports=%d or workers=%d\n",
+			 __func__, rte_event_queue_count(evdev),
+			rte_event_port_count(evdev), rte_lcore_count() - 1);
+		return TEST_SUCCESS;
+	}
+
+	/* Injects events with m->seqn=0 to total_events */
+	ret = inject_events(
+		0x1 /*flow_id */,
+		RTE_EVENT_TYPE_CPU /* event_type */,
+		0 /* sub_event_type (stage 0) */,
+		in_sched_type,
+		0 /* queue */,
+		0 /* port */,
+		total_events /* events */);
+	if (ret)
+		return TEST_FAILED;
+
+	ret = launch_workers_and_wait(worker_group_based_pipeline,
+					worker_group_based_pipeline,
+					total_events, nr_ports, out_sched_type);
+	if (ret)
+		return TEST_FAILED;
+
+	if (in_sched_type != RTE_SCHED_TYPE_PARALLEL &&
+			out_sched_type == RTE_SCHED_TYPE_ATOMIC) {
+		/* Check the events order maintained or not */
+		return seqn_list_check(total_events);
+	}
+	return TEST_SUCCESS;
+}
+
+static int
+test_multi_port_queue_ordered_to_atomic(void)
+{
+	/* Ingress event order test */
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_ORDERED,
+				RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_multi_port_queue_ordered_to_ordered(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_ORDERED,
+				RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_multi_port_queue_ordered_to_parallel(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_ORDERED,
+				RTE_SCHED_TYPE_PARALLEL);
+}
+
+static int
+test_multi_port_queue_atomic_to_atomic(void)
+{
+	/* Ingress event order test */
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_ATOMIC,
+				RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_multi_port_queue_atomic_to_ordered(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_ATOMIC,
+				RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_multi_port_queue_atomic_to_parallel(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_ATOMIC,
+				RTE_SCHED_TYPE_PARALLEL);
+}
+
+static int
+test_multi_port_queue_parallel_to_atomic(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
+				RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_multi_port_queue_parallel_to_ordered(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
+				RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_multi_port_queue_parallel_to_parallel(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
+				RTE_SCHED_TYPE_PARALLEL);
+}
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -991,6 +1142,24 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_port_flow_parallel_to_ordered),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_port_flow_parallel_to_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_ordered_to_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_ordered_to_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_ordered_to_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_atomic_to_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_atomic_to_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_atomic_to_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_parallel_to_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_parallel_to_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_parallel_to_parallel),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH 34/39] app/test: octeontx flow based maximum stage pipeline

[Jerin Jacob]

Add flow based pipeline test with maximum number of stages available
in the device.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 70 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index 2265576..da1da62 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -1103,6 +1103,74 @@ test_multi_port_queue_parallel_to_parallel(void)
 	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
 				RTE_SCHED_TYPE_PARALLEL);
 }
+
+static int
+worker_flow_based_pipeline_max_stages_rand_sched_type(void *arg)
+{
+	struct test_core_param *param = arg;
+	struct rte_event ev;
+	uint16_t valid_event;
+	uint8_t port = param->port;
+	rte_atomic32_t *total_events = param->total_events;
+
+	while (rte_atomic32_read(total_events) > 0) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
+		if (!valid_event)
+			continue;
+
+		if (ev.sub_event_type == 255) { /* last stage */
+			rte_pktmbuf_free(ev.mbuf);
+			rte_atomic32_sub(total_events, 1);
+		} else {
+			ev.event_type = RTE_EVENT_TYPE_CPU;
+			ev.sub_event_type++;
+			ev.sched_type =
+				rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1);
+			ev.op = RTE_EVENT_OP_FORWARD;
+			rte_event_enqueue_burst(evdev, port, &ev, 1);
+		}
+	}
+	return 0;
+}
+
+static int
+launch_multi_port_max_stages_random_sched_type(int (*fn)(void *))
+{
+	uint8_t nr_ports;
+	int ret;
+
+	nr_ports = RTE_MIN(rte_event_port_count(evdev), rte_lcore_count() - 1);
+
+	if (!nr_ports) {
+		printf("%s: Not enough ports=%d or workers=%d\n", __func__,
+			rte_event_port_count(evdev), rte_lcore_count() - 1);
+		return TEST_SUCCESS;
+	}
+
+	/* Injects events with m->seqn=0 to total_events */
+	ret = inject_events(
+		0x1 /*flow_id */,
+		RTE_EVENT_TYPE_CPU /* event_type */,
+		0 /* sub_event_type (stage 0) */,
+		rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1) /* sched_type */,
+		0 /* queue */,
+		0 /* port */,
+		MAX_EVENTS /* events */);
+	if (ret)
+		return TEST_FAILED;
+
+	return launch_workers_and_wait(fn, fn, MAX_EVENTS, nr_ports,
+					 0xff /* invalid */);
+}
+
+/* Flow based pipeline with maximum stages with random sched type */
+static int
+test_multi_port_flow_max_stages_random_sched_type(void)
+{
+	return launch_multi_port_max_stages_random_sched_type(
+		worker_flow_based_pipeline_max_stages_rand_sched_type);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -1160,6 +1228,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_port_queue_parallel_to_ordered),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_port_queue_parallel_to_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_max_stages_random_sched_type),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH 35/39] app/test: octeontx queue based maximum stage pipeline

[Jerin Jacob]

Add queue based pipeline test with maximum number of stages available
in the device.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index da1da62..f477bf2 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -1171,6 +1171,43 @@ test_multi_port_flow_max_stages_random_sched_type(void)
 		worker_flow_based_pipeline_max_stages_rand_sched_type);
 }
 
+static int
+worker_queue_based_pipeline_max_stages_rand_sched_type(void *arg)
+{
+	struct test_core_param *param = arg;
+	struct rte_event ev;
+	uint16_t valid_event;
+	uint8_t port = param->port;
+	uint8_t nr_queues = rte_event_queue_count(evdev);
+	rte_atomic32_t *total_events = param->total_events;
+
+	while (rte_atomic32_read(total_events) > 0) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
+		if (!valid_event)
+			continue;
+
+		if (ev.queue_id == nr_queues - 1) { /* last stage */
+			rte_pktmbuf_free(ev.mbuf);
+			rte_atomic32_sub(total_events, 1);
+		} else {
+			ev.event_type = RTE_EVENT_TYPE_CPU;
+			ev.queue_id++;
+			ev.sched_type =
+				rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1);
+			ev.op = RTE_EVENT_OP_FORWARD;
+			rte_event_enqueue_burst(evdev, port, &ev, 1);
+		}
+	}
+	return 0;
+}
+
+/* Queue based pipeline with maximum stages with random sched type */
+static int
+test_multi_port_queue_max_stages_random_sched_type(void)
+{
+	return launch_multi_port_max_stages_random_sched_type(
+		worker_queue_based_pipeline_max_stages_rand_sched_type);
+}
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -1230,6 +1267,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_port_queue_parallel_to_parallel),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_port_flow_max_stages_random_sched_type),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_max_stages_random_sched_type),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH 36/39] app/test: octeontx queue and flow based max stage pipeline

[Jerin Jacob]

Add queue and flow based pipeline test with maximum number of
stages available in the device.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 41 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index f477bf2..1afb52e 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -1208,6 +1208,45 @@ test_multi_port_queue_max_stages_random_sched_type(void)
 	return launch_multi_port_max_stages_random_sched_type(
 		worker_queue_based_pipeline_max_stages_rand_sched_type);
 }
+
+static int
+worker_mixed_pipeline_max_stages_rand_sched_type(void *arg)
+{
+	struct test_core_param *param = arg;
+	struct rte_event ev;
+	uint16_t valid_event;
+	uint8_t port = param->port;
+	uint8_t nr_queues = rte_event_queue_count(evdev);
+	rte_atomic32_t *total_events = param->total_events;
+
+	while (rte_atomic32_read(total_events) > 0) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
+		if (!valid_event)
+			continue;
+
+		if (ev.queue_id == nr_queues - 1) { /* Last stage */
+			rte_pktmbuf_free(ev.mbuf);
+			rte_atomic32_sub(total_events, 1);
+		} else {
+			ev.event_type = RTE_EVENT_TYPE_CPU;
+			ev.queue_id++;
+			ev.sub_event_type = rte_rand() % 256;
+			ev.sched_type =
+				rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1);
+			ev.op = RTE_EVENT_OP_FORWARD;
+			rte_event_enqueue_burst(evdev, port, &ev, 1);
+		}
+	}
+	return 0;
+}
+
+/* Queue and flow based pipeline with maximum stages with random sched type */
+static int
+test_multi_port_mixed_max_stages_random_sched_type(void)
+{
+	return launch_multi_port_max_stages_random_sched_type(
+		worker_mixed_pipeline_max_stages_rand_sched_type);
+}
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -1269,6 +1308,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_port_flow_max_stages_random_sched_type),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_port_queue_max_stages_random_sched_type),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_mixed_max_stages_random_sched_type),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH 37/39] app/test: octeontx producer-consumer based order test

[Jerin Jacob]

Add flow based producer-consumer based ingress order test

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 60 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index 1afb52e..e54279e 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -1247,6 +1247,64 @@ test_multi_port_mixed_max_stages_random_sched_type(void)
 	return launch_multi_port_max_stages_random_sched_type(
 		worker_mixed_pipeline_max_stages_rand_sched_type);
 }
+
+static int
+worker_ordered_flow_producer(void *arg)
+{
+	struct test_core_param *param = arg;
+	uint8_t port = param->port;
+	struct rte_mbuf *m;
+	int counter = 0;
+
+	while (counter < NUM_PACKETS) {
+		m = rte_pktmbuf_alloc(eventdev_test_mempool);
+		if (m == NULL)
+			continue;
+
+		m->seqn = counter++;
+
+		struct rte_event ev = {0};
+
+		ev.flow_id = 0x1; /* Generate a fat flow */
+		ev.sub_event_type = 0;
+		/* Inject the new event */
+		ev.op = RTE_EVENT_OP_NEW;
+		ev.event_type = RTE_EVENT_TYPE_CPU;
+		ev.sched_type = RTE_SCHED_TYPE_ORDERED;
+		ev.queue_id = 0;
+		ev.mbuf = m;
+		rte_event_enqueue_burst(evdev, port, &ev, 1);
+	}
+
+	return 0;
+}
+
+static inline int
+test_producer_consumer_ingress_order_test(int (*fn)(void *))
+{
+	uint8_t nr_ports;
+
+	nr_ports = RTE_MIN(rte_event_port_count(evdev), rte_lcore_count() - 1);
+
+	if (rte_lcore_count() < 3 || nr_ports < 2) {
+		printf("### Not enough cores for %s test.\n", __func__);
+		return TEST_SUCCESS;
+	}
+
+	launch_workers_and_wait(worker_ordered_flow_producer, fn,
+				NUM_PACKETS, nr_ports, RTE_SCHED_TYPE_ATOMIC);
+	/* Check the events order maintained or not */
+	return seqn_list_check(NUM_PACKETS);
+}
+
+/* Flow based producer consumer ingress order test */
+static int
+test_flow_producer_consumer_ingress_order_test(void)
+{
+	return test_producer_consumer_ingress_order_test(
+				worker_flow_based_pipeline);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -1310,6 +1368,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_port_queue_max_stages_random_sched_type),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_port_mixed_max_stages_random_sched_type),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_flow_producer_consumer_ingress_order_test),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH 38/39] app/test: add remaining tests based on existing helpers

[Jerin Jacob]

Add the following tests based existing helper functions
- Queue based producer-consumer ingress order test
- Run existing queue and flow based ordering test in dequeue timeout
  mode

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 app/test/test_eventdev_octeontx.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
index e54279e..4123cd5 100644
--- a/app/test/test_eventdev_octeontx.c
+++ b/app/test/test_eventdev_octeontx.c
@@ -1305,6 +1305,14 @@ test_flow_producer_consumer_ingress_order_test(void)
 				worker_flow_based_pipeline);
 }
 
+/* Queue based producer consumer ingress order test */
+static int
+test_queue_producer_consumer_ingress_order_test(void)
+{
+	return test_producer_consumer_ingress_order_test(
+				worker_group_based_pipeline);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -1370,6 +1378,13 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_port_mixed_max_stages_random_sched_type),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_flow_producer_consumer_ingress_order_test),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_queue_producer_consumer_ingress_order_test),
+		/* Tests with dequeue timeout */
+		TEST_CASE_ST(eventdev_setup_dequeue_timeout, eventdev_teardown,
+			test_multi_port_flow_ordered_to_atomic),
+		TEST_CASE_ST(eventdev_setup_dequeue_timeout, eventdev_teardown,
+			test_multi_port_queue_ordered_to_atomic),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH 39/39] doc: add OCTEONTX ssovf details

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 MAINTAINERS                       |   9 +++
 doc/guides/eventdevs/index.rst    |  38 +++++++++++
 doc/guides/eventdevs/octeontx.rst | 131 ++++++++++++++++++++++++++++++++++++++
 doc/guides/index.rst              |   1 +
 4 files changed, 179 insertions(+)
 create mode 100644 doc/guides/eventdevs/index.rst
 create mode 100644 doc/guides/eventdevs/octeontx.rst

diff --git a/MAINTAINERS b/MAINTAINERS
index c76d924..cbc5fe4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -484,6 +484,15 @@ M: Fan Zhang <roy.fan.zhang@intel.com>
 F: drivers/crypto/scheduler/
 F: doc/guides/cryptodevs/scheduler.rst
 
+Eventdev Drivers
+------------------
+
+Cavium OCTEONTX ssovf
+M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
+M: Santosh Shukla <santosh.shukla@caviumnetworks.com>
+F: drivers/event/octeontx/
+F: app/test/test_eventdev_octeontx.c
+F: doc/guides/eventdevs/octeontx.rst
 
 Packet processing
 -----------------
diff --git a/doc/guides/eventdevs/index.rst b/doc/guides/eventdevs/index.rst
new file mode 100644
index 0000000..52be539
--- /dev/null
+++ b/doc/guides/eventdevs/index.rst
@@ -0,0 +1,38 @@
+..  BSD LICENSE
+    Copyright(c) 2015 - 2017 Intel Corporation. All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions
+    are met:
+
+    * Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in
+    the documentation and/or other materials provided with the
+    distribution.
+    * Neither the name of Intel Corporation nor the names of its
+    contributors may be used to endorse or promote products derived
+    from this software without specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+    OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+    LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+    DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+    THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+Event Device Drivers
+=====================
+
+
+.. toctree::
+    :maxdepth: 2
+    :numbered:
+
+    octeontx
diff --git a/doc/guides/eventdevs/octeontx.rst b/doc/guides/eventdevs/octeontx.rst
new file mode 100644
index 0000000..eec27ab
--- /dev/null
+++ b/doc/guides/eventdevs/octeontx.rst
@@ -0,0 +1,131 @@
+..  BSD LICENSE
+    Copyright (C) Cavium networks Ltd. 2017.
+    All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions
+    are met:
+
+    * Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in
+    the documentation and/or other materials provided with the
+    distribution.
+    * Neither the name of Cavium networks nor the names of its
+    contributors may be used to endorse or promote products derived
+    from this software without specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+    OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+    LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+    DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+    THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+OCTEONTX SSOVF Eventdev Driver
+==============================
+
+The OCTEONTX SSOVF PMD (**librte_pmd_octeontx_ssovf**) provides poll mode
+eventdev driver support for the inbuilt event device found in the **Cavium OCTEONTX**
+SoC family as well as their virtual functions (VF) in SR-IOV context.
+
+More information can be found at `Cavium Networks Official Website
+<http://www.cavium.com/OCTEON-TX_ARM_Processors.html>`_.
+
+Features
+--------
+
+Features of the OCTEONTX SSOVF PMD are:
+
+- 64 Event queues
+- 32 Event ports
+- HW event scheduler
+- Supports 1M flows per event queue
+- Flow based event pipeling
+- Flow pinning support in flow based event pipeling
+- Queue based event pipeling
+- Supports ATOMIC,ORDERED,PARALLEL schedule types per flow
+- Event scheduling QoS based on event queue priority
+- Open system with configurable amount of outstanding events
+- HW accelerated dequeue timeout support to enable power management
+- SR-IOV VF
+
+Supported OCTEONTX SoCs
+-----------------------
+- CN83xx
+
+Prerequisites
+-------------
+
+There are three main pre-perquisites for executing SSOVF PMD on a OCTEONTX
+compatible board:
+
+1. **OCTEONTX Linux kernel PF driver for Network acceleration HW blocks**
+
+   The OCTEONTX Linux kernel drivers (including the required PF driver for the
+   SSOVF) are available on Github at `octeontx-kmod <https://github.com/caviumnetworks/octeontx-kmod>`_
+   along with build, install and dpdk usage instructions.
+
+2. **ARM64 Tool Chain**
+
+   For example, the *aarch64* Linaro Toolchain, which can be obtained from
+   `here <https://releases.linaro.org/components/toolchain/binaries/4.9-2017.01/aarch64-linux-gnu>`_.
+
+3. **Rootfile system**
+
+   Any *aarch64* supporting filesystem can be used. For example,
+   Ubuntu 15.10 (Wily) or 16.04 LTS (Xenial) userland which can be obtained
+   from `<http://cdimage.ubuntu.com/ubuntu-base/releases/16.04/release/ubuntu-base-16.04.1-base-arm64.tar.gz>`_.
+
+   As an alternative method, SSOVF PMD can also be executed using images provided
+   as part of SDK from Cavium. The SDK includes all the above prerequisites necessary
+   to bring up a OCTEONTX board.
+
+   SDK and related information can be obtained from: `Cavium support site <https://support.cavium.com/>`_.
+
+- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.
+
+Pre-Installation Configuration
+------------------------------
+
+Config File Options
+~~~~~~~~~~~~~~~~~~~
+
+The following options can be modified in the ``config`` file.
+Please note that enabling debugging options may affect system performance.
+
+- ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF`` (default ``n``)
+
+  By default it is enabled only for defconfig_arm64-thunderx-* config.
+  Toggle compilation of the ``librte_pmd_octeontx_ssovf`` driver.
+
+- ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG`` (default ``n``)
+
+  Toggle display of generic debugging messages
+
+Driver Compilation
+~~~~~~~~~~~~~~~~~~
+
+To compile the OCTEONTX SSOVF PMD for Linux arm64 gcc target, run the
+following “make” command:
+
+.. code-block:: console
+
+   cd <DPDK-source-directory>
+   make config T=arm64-thunderx-linuxapp-gcc install
+
+Limitations
+-----------
+
+Burst mode support
+~~~~~~~~~~~~~~~~~~
+
+Burt mode is not supported. Dequeue and Enqueue functions accepts only single
+event at a time
+
diff --git a/doc/guides/index.rst b/doc/guides/index.rst
index 82b00e9..63716b0 100644
--- a/doc/guides/index.rst
+++ b/doc/guides/index.rst
@@ -43,6 +43,7 @@ DPDK documentation
    testpmd_app_ug/index
    nics/index
    cryptodevs/index
+   eventdevs/index
    xen/index
    contributing/index
    rel_notes/index
-- 
2.5.5

Re: [PATCH 01/39] eventdev: update PMD dequeue timeout conversion callback

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH 01/39] eventdev: update PMD dequeue timeout conversion
> callback
> 
> eventdev driver may return error on dequeue timeout tick conversion.
> Change the pmd callback interface to address the same.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>


Given this is not really related to octeontx PMD, I suggest applying to tree and dropping from octeontx patchset.

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 02/39] app/test: fix eventdev reconfigure test

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH 02/39] app/test: fix eventdev reconfigure test
> 
> Minimum value of nb_event_ports and/or nb_event_queues
> should be one before reconfiguring the event device.
> 
> Fixes: 4c9a26e419a7 ("app/test: unit test case for eventdev APIs")
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 01/39] eventdev: update PMD dequeue timeout conversion callback

[Jerin Jacob]

On Wed, Mar 15, 2017 at 05:27:15PM +0000, Van Haaren, Harry wrote:
> > From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> > Sent: Friday, March 3, 2017 5:28 PM
> > To: dev@dpdk.org
> > Subject: [dpdk-dev] [PATCH 01/39] eventdev: update PMD dequeue timeout conversion
> > callback
> > 
> > eventdev driver may return error on dequeue timeout tick conversion.
> > Change the pmd callback interface to address the same.
> > 
> > Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> 
> 
> Given this is not really related to octeontx PMD, I suggest applying to tree and dropping from octeontx patchset.

OK

> 
> Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
> 

Re: [PATCH 39/39] doc: add OCTEONTX ssovf details

[Eads, Gage]

Just a few nitpicks.

<snip>

>  +
>  +Features of the OCTEONTX SSOVF PMD are:
>  +
>  +- 64 Event queues
>  +- 32 Event ports
>  +- HW event scheduler
>  +- Supports 1M flows per event queue
>  +- Flow based event pipeling

pipeling -> pipelining

>  +- Flow pinning support in flow based event pipeling

pipeling -> pipelining

>  +- Queue based event pipeling

pipeling -> pipelining

Thanks,
Gage

Re: [PATCH 19/39] event/octeontx: add support worker dequeue function

[Eads, Gage]

Hi Jerin,

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 19/39] event/octeontx: add support worker
>  dequeue function
>  
>  If device is configured with RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT
>  configuration then use different fast path dequeue handler to wait till
>  requested amount of nanosecond if the event is not available.
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
>  ---
>   drivers/event/octeontx/ssovf_evdev.h  |  7 +++++
>  drivers/event/octeontx/ssovf_worker.c | 52
>  +++++++++++++++++++++++++++++++++++
>   2 files changed, 59 insertions(+)
>  
>  diff --git a/drivers/event/octeontx/ssovf_evdev.h
>  b/drivers/event/octeontx/ssovf_evdev.h
>  index fac42f5..2cd9147 100644
>  --- a/drivers/event/octeontx/ssovf_evdev.h
>  +++ b/drivers/event/octeontx/ssovf_evdev.h
>  @@ -190,5 +190,12 @@ ssovf_pmd_priv(const struct rte_eventdev *eventdev)
>  uint16_t ssows_enq(void *port, const struct rte_event *ev);  uint16_t
>  ssows_enq_burst(void *port,
>   		const struct rte_event ev[], uint16_t nb_events);
>  +uint16_t ssows_deq(void *port, struct rte_event *ev, uint64_t
>  +timeout_ticks); uint16_t ssows_deq_burst(void *port, struct rte_event ev[],
>  +		uint16_t nb_events, uint64_t timeout_ticks); uint16_t
>  +ssows_deq_timeout(void *port, struct rte_event *ev,
>  +		uint64_t timeout_ticks);
>  +uint16_t ssows_deq_timeout_burst(void *port, struct rte_event ev[],
>  +		uint16_t nb_events, uint64_t timeout_ticks);
>  
>   #endif /* __SSOVF_EVDEV_H__ */
>  diff --git a/drivers/event/octeontx/ssovf_worker.c
>  b/drivers/event/octeontx/ssovf_worker.c
>  index 7ec78b4..e0d17b9 100644
>  --- a/drivers/event/octeontx/ssovf_worker.c
>  +++ b/drivers/event/octeontx/ssovf_worker.c
>  @@ -226,6 +226,58 @@ ssows_release_event(struct ssows *ws)  }
>  
>   force_inline uint16_t __hot
>  +ssows_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks) {
>  +	struct ssows *ws = port;
>  +
>  +	RTE_SET_USED(timeout_ticks);
>  +
>  +	ssows_swtag_wait(ws);
>  +	if (ws->swtag_req) {
>  +		ws->swtag_req = 0;
>  +		return 1;
>  +	} else {
>  +		return ssows_get_work(ws, ev);
>  +	}
>  +}

Should ssows_deq() fill in the ev structure when swtag_req is 1? I see that the flag is set when an event is forwarded to the same queue/group it was received on -- is the expectation that ev will point to that forwarded event, such that the user receives it when they next dequeue an event?

Thanks,
Gage

Re: [PATCH 39/39] doc: add OCTEONTX ssovf details

[Eads, Gage]

And one other on line 66: "pre-perquisites" -> "prerequisites"

Thanks,
Gage

>  -----Original Message-----
>  From: Eads, Gage
>  Sent: Monday, March 20, 2017 3:20 PM
>  To: 'Jerin Jacob' <jerin.jacob@caviumnetworks.com>; dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com;
>  nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com
>  Subject: RE: [dpdk-dev] [PATCH 39/39] doc: add OCTEONTX ssovf details
>  
>  Just a few nitpicks.
>  
>  <snip>
>  
>  >  +
>  >  +Features of the OCTEONTX SSOVF PMD are:
>  >  +
>  >  +- 64 Event queues
>  >  +- 32 Event ports
>  >  +- HW event scheduler
>  >  +- Supports 1M flows per event queue
>  >  +- Flow based event pipeling
>  
>  pipeling -> pipelining
>  
>  >  +- Flow pinning support in flow based event pipeling
>  
>  pipeling -> pipelining
>  
>  >  +- Queue based event pipeling
>  
>  pipeling -> pipelining
>  
>  Thanks,
>  Gage

Re: [PATCH 39/39] doc: add OCTEONTX ssovf details

[Jerin Jacob]

On Mon, Mar 20, 2017 at 09:38:53PM +0000, Eads, Gage wrote:
> And one other on line 66: "pre-perquisites" -> "prerequisites"

Thanks for the review. Will fix it in v2

> 
> Thanks,
> Gage
> 
> >  -----Original Message-----
> >  From: Eads, Gage
> >  Sent: Monday, March 20, 2017 3:20 PM
> >  To: 'Jerin Jacob' <jerin.jacob@caviumnetworks.com>; dev@dpdk.org
> >  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
> >  <bruce.richardson@intel.com>; Van Haaren, Harry
> >  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com;
> >  nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com
> >  Subject: RE: [dpdk-dev] [PATCH 39/39] doc: add OCTEONTX ssovf details
> >  
> >  Just a few nitpicks.
> >  
> >  <snip>
> >  
> >  >  +
> >  >  +Features of the OCTEONTX SSOVF PMD are:
> >  >  +
> >  >  +- 64 Event queues
> >  >  +- 32 Event ports
> >  >  +- HW event scheduler
> >  >  +- Supports 1M flows per event queue
> >  >  +- Flow based event pipeling
> >  
> >  pipeling -> pipelining
> >  
> >  >  +- Flow pinning support in flow based event pipeling
> >  
> >  pipeling -> pipelining
> >  
> >  >  +- Queue based event pipeling
> >  
> >  pipeling -> pipelining
> >  
> >  Thanks,
> >  Gage

Re: [PATCH 19/39] event/octeontx: add support worker dequeue function

[Jerin Jacob]

On Mon, Mar 20, 2017 at 09:11:35PM +0000, Eads, Gage wrote:
> Hi Jerin,

Hi Gage,

> 
> >  -----Original Message-----
> >  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> >  Sent: Friday, March 3, 2017 11:28 AM
> >  To: dev@dpdk.org
> >  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
> >  <bruce.richardson@intel.com>; Van Haaren, Harry
> >  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
> >  <gage.eads@intel.com>; nipun.gupta@nxp.com;
> >  santosh.shukla@caviumnetworks.com; Jerin Jacob
> >  <jerin.jacob@caviumnetworks.com>
> >  Subject: [dpdk-dev] [PATCH 19/39] event/octeontx: add support worker
> >  dequeue function
> >  
> >  If device is configured with RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT
> >  configuration then use different fast path dequeue handler to wait till
> >  requested amount of nanosecond if the event is not available.
> >  
> >  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> >  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
> >  ---
> >   drivers/event/octeontx/ssovf_evdev.h  |  7 +++++
> >  drivers/event/octeontx/ssovf_worker.c | 52
> >  +++++++++++++++++++++++++++++++++++
> >   2 files changed, 59 insertions(+)
> >  
> >  diff --git a/drivers/event/octeontx/ssovf_evdev.h
> >  b/drivers/event/octeontx/ssovf_evdev.h
> >  index fac42f5..2cd9147 100644
> >  --- a/drivers/event/octeontx/ssovf_evdev.h
> >  +++ b/drivers/event/octeontx/ssovf_evdev.h
> >  @@ -190,5 +190,12 @@ ssovf_pmd_priv(const struct rte_eventdev *eventdev)
> >  uint16_t ssows_enq(void *port, const struct rte_event *ev);  uint16_t
> >  ssows_enq_burst(void *port,
> >   		const struct rte_event ev[], uint16_t nb_events);
> >  +uint16_t ssows_deq(void *port, struct rte_event *ev, uint64_t
> >  +timeout_ticks); uint16_t ssows_deq_burst(void *port, struct rte_event ev[],
> >  +		uint16_t nb_events, uint64_t timeout_ticks); uint16_t
> >  +ssows_deq_timeout(void *port, struct rte_event *ev,
> >  +		uint64_t timeout_ticks);
> >  +uint16_t ssows_deq_timeout_burst(void *port, struct rte_event ev[],
> >  +		uint16_t nb_events, uint64_t timeout_ticks);
> >  
> >   #endif /* __SSOVF_EVDEV_H__ */
> >  diff --git a/drivers/event/octeontx/ssovf_worker.c
> >  b/drivers/event/octeontx/ssovf_worker.c
> >  index 7ec78b4..e0d17b9 100644
> >  --- a/drivers/event/octeontx/ssovf_worker.c
> >  +++ b/drivers/event/octeontx/ssovf_worker.c
> >  @@ -226,6 +226,58 @@ ssows_release_event(struct ssows *ws)  }
> >  
> >   force_inline uint16_t __hot
> >  +ssows_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks) {
> >  +	struct ssows *ws = port;
> >  +
> >  +	RTE_SET_USED(timeout_ticks);
> >  +
> >  +	ssows_swtag_wait(ws);
> >  +	if (ws->swtag_req) {
> >  +		ws->swtag_req = 0;
> >  +		return 1;
> >  +	} else {
> >  +		return ssows_get_work(ws, ev);
> >  +	}
> >  +}
> 
> Should ssows_deq() fill in the ev structure when swtag_req is 1? I see that the flag is set when an event is forwarded to the same queue/group it was received on -- is the expectation that ev will point to that forwarded event, such that the user receives it when they next dequeue an event?

Yes. The user receives the same event.HW supports event pinning to lower the
latency.


> 
> Thanks,
> Gage
> 

Re: [PATCH 17/39] event/octeontx: add SSO HW device operations

[Eads, Gage]

Hi Jerin,

Please note the checkpatch issues for this patch: http://dpdk.org/ml/archives/test-report/2017-March/012577.html

Thanks,
Gage

Re: [PATCH 01/39] eventdev: update PMD dequeue timeout conversion callback

[Jerin Jacob]

On Wed, Mar 15, 2017 at 05:27:15PM +0000, Van Haaren, Harry wrote:
> > From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> > Sent: Friday, March 3, 2017 5:28 PM
> > To: dev@dpdk.org
> > Subject: [dpdk-dev] [PATCH 01/39] eventdev: update PMD dequeue timeout conversion
> > callback
> > 
> > eventdev driver may return error on dequeue timeout tick conversion.
> > Change the pmd callback interface to address the same.
> > 
> > Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> 
> 
> Given this is not really related to octeontx PMD, I suggest applying to tree and dropping from octeontx patchset.
> 
> Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Applied to dpdk-next-eventdev/master. Thanks.

> 

Re: [PATCH 02/39] app/test: fix eventdev reconfigure test

[Jerin Jacob]

On Wed, Mar 15, 2017 at 05:28:35PM +0000, Van Haaren, Harry wrote:
> > From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> > Sent: Friday, March 3, 2017 5:28 PM
> > To: dev@dpdk.org
> > Subject: [dpdk-dev] [PATCH 02/39] app/test: fix eventdev reconfigure test
> > 
> > Minimum value of nb_event_ports and/or nb_event_queues
> > should be one before reconfiguring the event device.
> > 
> > Fixes: 4c9a26e419a7 ("app/test: unit test case for eventdev APIs")
> > 
> > Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> 
> Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Applied to dpdk-next-eventdev/master. Thanks.

> 
> 

Re: [PATCH 22/39] app/test: octeontx eventdev unit test infrastructure

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 22/39] app/test: octeontx eventdev unit test infrastructure
> 
> add test setup and teardown routines.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

1) I think the autotest_data.py file needs to be updated to run the test command too, event/sw example at top of patch
http://dpdk.org/dev/patchwork/patch/21694/

2) This requires a rebase against latest head, app/test has moved to test/test/.
I will ignore this app/test to test/test move for the remaining patches of the series.

With fixes above,

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>


> ---
>  app/test/Makefile                 |  5 +-
>  app/test/test_eventdev_octeontx.c | 98 +++++++++++++++++++++++++++++++++++++++
>  2 files changed, 102 insertions(+), 1 deletion(-)
>  create mode 100644 app/test/test_eventdev_octeontx.c
> 
> diff --git a/app/test/Makefile b/app/test/Makefile
> index a426548..b45a1d3 100644
> --- a/app/test/Makefile
> +++ b/app/test/Makefile
> @@ -197,7 +197,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev_blockcipher.c
>  SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev_perf.c
>  SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev.c
> 
> -SRCS-$(CONFIG_RTE_LIBRTE_EVENTDEV) += test_eventdev.c
> +ifeq ($(CONFIG_RTE_LIBRTE_EVENTDEV),y)
> +SRCS-y += test_eventdev.c
> +SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += test_eventdev_octeontx.c
> +endif
> 
>  SRCS-$(CONFIG_RTE_LIBRTE_KVARGS) += test_kvargs.c
> 
> diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
> new file mode 100644
> index 0000000..9744961
> --- /dev/null
> +++ b/app/test/test_eventdev_octeontx.c
> @@ -0,0 +1,98 @@
> +/*-
> + *   BSD LICENSE
> + *
> + *   Copyright(c) 2017 Cavium networks. All rights reserved.
> + *
> + *   Redistribution and use in source and binary forms, with or without
> + *   modification, are permitted provided that the following conditions
> + *   are met:
> + *
> + *	 * Redistributions of source code must retain the above copyright
> + *	   notice, this list of conditions and the following disclaimer.
> + *	 * Redistributions in binary form must reproduce the above copyright
> + *	   notice, this list of conditions and the following disclaimer in
> + *	   the documentation and/or other materials provided with the
> + *	   distribution.
> + *	 * Neither the name of Cavium networks nor the names of its
> + *	   contributors may be used to endorse or promote products derived
> + *	   from this software without specific prior written permission.
> + *
> + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
> + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
> + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
> + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
> + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
> + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
> + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#include <rte_atomic.h>
> +#include <rte_common.h>
> +#include <rte_cycles.h>
> +#include <rte_debug.h>
> +#include <rte_eal.h>
> +#include <rte_ethdev.h>
> +#include <rte_eventdev.h>
> +#include <rte_hexdump.h>
> +#include <rte_mbuf.h>
> +#include <rte_malloc.h>
> +#include <rte_memcpy.h>
> +#include <rte_launch.h>
> +#include <rte_lcore.h>
> +#include <rte_per_lcore.h>
> +#include <rte_random.h>
> +
> +#include "test.h"
> +
> +#define NUM_PACKETS (1 << 18)
> +#define MAX_EVENTS  (16 * 1024)
> +
> +static int evdev;
> +
> +static int
> +testsuite_setup(void)
> +{
> +	const char *eventdev_name = "event_octeontx";
> +
> +	evdev = rte_event_dev_get_dev_id(eventdev_name);
> +	if (evdev < 0) {
> +		printf("%d: Eventdev %s not found - creating.\n",
> +				__LINE__, eventdev_name);
> +		if (rte_eal_vdev_init(eventdev_name, NULL) < 0) {
> +			printf("Error creating eventdev\n");
> +			return TEST_FAILED;
> +		}
> +		evdev = rte_event_dev_get_dev_id(eventdev_name);
> +		if (evdev < 0) {
> +			printf("Error finding newly created eventdev\n");
> +			return TEST_FAILED;
> +		}
> +	}
> +
> +	return TEST_SUCCESS;
> +}
> +
> +static void
> +testsuite_teardown(void)
> +{
> +	rte_event_dev_close(evdev);
> +}
> +
> +
> +static struct unit_test_suite eventdev_octeontx_testsuite  = {
> +	.suite_name = "eventdev octeontx unit test suite",
> +	.setup = testsuite_setup,
> +	.teardown = testsuite_teardown,
> +};
> +
> +static int
> +test_eventdev_octeontx(void)
> +{
> +	return unit_test_suite_runner(&eventdev_octeontx_testsuite);
> +}
> +
> +REGISTER_TEST_COMMAND(eventdev_octeontx_autotest, test_eventdev_octeontx);
> --
> 2.5.5

Re: [PATCH 23/39] app/test: octeontx unit test case setup and teardown

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 23/39] app/test: octeontx unit test case setup and teardown
> 
> Each test case expected to run as standalone.
> On setup, configure the device in requested mode and start the device.
> On tear down, close the device and free the allocated resources
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 24/39] app/test: octeontx unit test case helper functions

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 24/39] app/test: octeontx unit test case helper functions
> 
> Add helper functions to generate, inject, consume and validate the events.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>


Acked-by: Harry van Haaren <harry.van.haaren@intel.com>



> +static inline void
> +update_event_and_validation_attr(struct rte_mbuf *m, struct rte_event *ev,
> +			uint32_t flow_id, uint8_t event_type,
> +			uint8_t sub_event_type, uint8_t sched_type,
> +			uint8_t queue, uint8_t port)
> +{
> +	struct event_attr *attr;
> +
> +	/* Store the event attributes in mbuf for future reference */
> +	attr = rte_pktmbuf_mtod(m, struct event_attr *);

<snip>

> +static inline int
> +validate_event(struct rte_event *ev)
> +{
> +	struct event_attr *attr;
> +
> +	attr = rte_pktmbuf_mtod(ev->mbuf, struct event_attr *);
> +	TEST_ASSERT_EQUAL(attr->flow_id, ev->flow_id,
> +			"flow_id mismatch enq=%d deq =%d",
> +			attr->flow_id, ev->flow_id);
> +	TEST_ASSERT_EQUAL(attr->event_type, ev->event_type,
> +			"event_type mismatch enq=%d deq =%d",
> +			attr->event_type, ev->event_type);


Simple + effective technique - I'll remember that one :)

Re: [PATCH 25/39] app/test: octeontx simple event enqueue and dequeue test

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 25/39] app/test: octeontx simple event enqueue and dequeue test
> 
> Added unit test case to verify simple event enqueue and dequeue
> operation with different schedule types
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>


Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 26/39] app/test: octeontx multi queue enqueue and dequeue test

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 26/39] app/test: octeontx multi queue enqueue and dequeue test
> 
> Added unit test case to verify enqueue and dequeue operations
> with multiple queues and a single port.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 27/39] app/test: octeontx eventdev priority test

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 27/39] app/test: octeontx eventdev priority test
> 
> Added unit test case to verify the priority associated with
> each event queue available in the device.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 28/39] app/test: add infrastructure for multicore octeontx tests

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 28/39] app/test: add infrastructure for multicore octeontx tests
> 
> Add helper functions to launch and wait for n cores to complete the
> operation with deadlock detection.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 29/39] app/test: octeontx multi queue and multi core/port tests

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 29/39] app/test: octeontx multi queue and multi core/port tests
> 
> Add unit test case to verify multi queue enqueue and multi core/port
> dequeue operation.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 30/39] app/test: octeontx single link establishment test

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 30/39] app/test: octeontx single link establishment test
> 
> Add test case to verify queue to port single link establishment operation.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 31/39] app/test: octeontx multi link establishment test

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 31/39] app/test: octeontx multi link establishment test
> 
> Add unit test case to verify queue to port multi link
> establishment operation.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 32/39] app/test: octeontx flow based two stage sched type test

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 32/39] app/test: octeontx flow based two stage sched type test
> 
> Add flow based two stage pipeline test with all combination
> of schedule types.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 33/39] app/test: octeontx queue based two stage sched type test

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 33/39] app/test: octeontx queue based two stage sched type test
> 
> Add queue based two stage pipeline test with all combination
> of schedule types.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 34/39] app/test: octeontx flow based maximum stage pipeline

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 34/39] app/test: octeontx flow based maximum stage pipeline
> 
> Add flow based pipeline test with maximum number of stages available
> in the device.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 35/39] app/test: octeontx queue based maximum stage pipeline

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 35/39] app/test: octeontx queue based maximum stage pipeline
> 
> Add queue based pipeline test with maximum number of stages available
> in the device.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 36/39] app/test: octeontx queue and flow based max stage pipeline

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 36/39] app/test: octeontx queue and flow based max stage pipeline
> 
> Add queue and flow based pipeline test with maximum number of
> stages available in the device.
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 37/39] app/test: octeontx producer-consumer based order test

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 37/39] app/test: octeontx producer-consumer based order test
> 
> Add flow based producer-consumer based ingress order test
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 38/39] app/test: add remaining tests based on existing helpers

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 38/39] app/test: add remaining tests based on existing helpers
> 
> Add the following tests based existing helper functions
> - Queue based producer-consumer ingress order test
> - Run existing queue and flow based ordering test in dequeue timeout
>   mode
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Re: [PATCH 39/39] doc: add OCTEONTX ssovf details

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 3, 2017 5:28 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van
> Haaren, Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
> <gage.eads@intel.com>; nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin
> Jacob <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 39/39] doc: add OCTEONTX ssovf details
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>


Comments inline, but after that

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>


> ---
>  MAINTAINERS                       |   9 +++
>  doc/guides/eventdevs/index.rst    |  38 +++++++++++
>  doc/guides/eventdevs/octeontx.rst | 131 ++++++++++++++++++++++++++++++++++++++
>  doc/guides/index.rst              |   1 +
>  4 files changed, 179 insertions(+)
>  create mode 100644 doc/guides/eventdevs/index.rst
>  create mode 100644 doc/guides/eventdevs/octeontx.rst
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c76d924..cbc5fe4 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -484,6 +484,15 @@ M: Fan Zhang <roy.fan.zhang@intel.com>
>  F: drivers/crypto/scheduler/
>  F: doc/guides/cryptodevs/scheduler.rst
> 
> +Eventdev Drivers
> +------------------
> +
> +Cavium OCTEONTX ssovf
> +M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> +M: Santosh Shukla <santosh.shukla@caviumnetworks.com>
> +F: drivers/event/octeontx/
> +F: app/test/test_eventdev_octeontx.c
> +F: doc/guides/eventdevs/octeontx.rst
> 
>  Packet processing
>  -----------------
> diff --git a/doc/guides/eventdevs/index.rst b/doc/guides/eventdevs/index.rst
> new file mode 100644
> index 0000000..52be539
> --- /dev/null
> +++ b/doc/guides/eventdevs/index.rst
> @@ -0,0 +1,38 @@
> +..  BSD LICENSE
> +    Copyright(c) 2015 - 2017 Intel Corporation. All rights reserved.

Copy - paste error I think      ^^^^^


> +
> +    Redistribution and use in source and binary forms, with or without
> +    modification, are permitted provided that the following conditions
> +    are met:
> +
> +    * Redistributions of source code must retain the above copyright
> +    notice, this list of conditions and the following disclaimer.
> +    * Redistributions in binary form must reproduce the above copyright
> +    notice, this list of conditions and the following disclaimer in
> +    the documentation and/or other materials provided with the
> +    distribution.
> +    * Neither the name of Intel Corporation nor the names of its
> +    contributors may be used to endorse or promote products derived
> +    from this software without specific prior written permission.
> +
> +    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> +    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> +    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
> +    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
> +    OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
> +    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
> +    LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
> +    DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
> +    THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> +    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> +    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> +
> +Event Device Drivers
> +=====================
> +
> +
> +.. toctree::
> +    :maxdepth: 2
> +    :numbered:
> +
> +    octeontx
> diff --git a/doc/guides/eventdevs/octeontx.rst b/doc/guides/eventdevs/octeontx.rst
> new file mode 100644
> index 0000000..eec27ab
> --- /dev/null
> +++ b/doc/guides/eventdevs/octeontx.rst
> @@ -0,0 +1,131 @@
> +..  BSD LICENSE
> +    Copyright (C) Cavium networks Ltd. 2017.
> +    All rights reserved.
> +
> +    Redistribution and use in source and binary forms, with or without
> +    modification, are permitted provided that the following conditions
> +    are met:
> +
> +    * Redistributions of source code must retain the above copyright
> +    notice, this list of conditions and the following disclaimer.
> +    * Redistributions in binary form must reproduce the above copyright
> +    notice, this list of conditions and the following disclaimer in
> +    the documentation and/or other materials provided with the
> +    distribution.
> +    * Neither the name of Cavium networks nor the names of its
> +    contributors may be used to endorse or promote products derived
> +    from this software without specific prior written permission.
> +
> +    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> +    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> +    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
> +    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
> +    OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
> +    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
> +    LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
> +    DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
> +    THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> +    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> +    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> +
> +OCTEONTX SSOVF Eventdev Driver
> +==============================
> +
> +The OCTEONTX SSOVF PMD (**librte_pmd_octeontx_ssovf**) provides poll mode
> +eventdev driver support for the inbuilt event device found in the **Cavium OCTEONTX**
> +SoC family as well as their virtual functions (VF) in SR-IOV context.
> +
> +More information can be found at `Cavium Networks Official Website
> +<http://www.cavium.com/OCTEON-TX_ARM_Processors.html>`_.
> +
> +Features
> +--------
> +
> +Features of the OCTEONTX SSOVF PMD are:
> +
> +- 64 Event queues
> +- 32 Event ports
> +- HW event scheduler
> +- Supports 1M flows per event queue
> +- Flow based event pipeling
> +- Flow pinning support in flow based event pipeling
> +- Queue based event pipeling

Typo in Pipelining for the above 3 items

> +- Supports ATOMIC,ORDERED,PARALLEL schedule types per flow
> +- Event scheduling QoS based on event queue priority
> +- Open system with configurable amount of outstanding events
> +- HW accelerated dequeue timeout support to enable power management
> +- SR-IOV VF
> +
> +Supported OCTEONTX SoCs
> +-----------------------
> +- CN83xx
> +
> +Prerequisites
> +-------------
> +
> +There are three main pre-perquisites for executing SSOVF PMD on a OCTEONTX
> +compatible board:
> +
> +1. **OCTEONTX Linux kernel PF driver for Network acceleration HW blocks**
> +
> +   The OCTEONTX Linux kernel drivers (including the required PF driver for the
> +   SSOVF) are available on Github at `octeontx-kmod
> <https://github.com/caviumnetworks/octeontx-kmod>`_
> +   along with build, install and dpdk usage instructions.
> +
> +2. **ARM64 Tool Chain**
> +
> +   For example, the *aarch64* Linaro Toolchain, which can be obtained from
> +   `here <https://releases.linaro.org/components/toolchain/binaries/4.9-
> 2017.01/aarch64-linux-gnu>`_.
> +
> +3. **Rootfile system**
> +
> +   Any *aarch64* supporting filesystem can be used. For example,
> +   Ubuntu 15.10 (Wily) or 16.04 LTS (Xenial) userland which can be obtained
> +   from `<http://cdimage.ubuntu.com/ubuntu-base/releases/16.04/release/ubuntu-base-
> 16.04.1-base-arm64.tar.gz>`_.
> +
> +   As an alternative method, SSOVF PMD can also be executed using images provided
> +   as part of SDK from Cavium. The SDK includes all the above prerequisites necessary
> +   to bring up a OCTEONTX board.
> +
> +   SDK and related information can be obtained from: `Cavium support site
> <https://support.cavium.com/>`_.
> +
> +- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic
> DPDK environment.
> +
> +Pre-Installation Configuration
> +------------------------------
> +
> +Config File Options
> +~~~~~~~~~~~~~~~~~~~
> +
> +The following options can be modified in the ``config`` file.
> +Please note that enabling debugging options may affect system performance.
> +
> +- ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF`` (default ``n``)
> +
> +  By default it is enabled only for defconfig_arm64-thunderx-* config.
> +  Toggle compilation of the ``librte_pmd_octeontx_ssovf`` driver.
> +
> +- ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG`` (default ``n``)
> +
> +  Toggle display of generic debugging messages
> +
> +Driver Compilation
> +~~~~~~~~~~~~~~~~~~
> +
> +To compile the OCTEONTX SSOVF PMD for Linux arm64 gcc target, run the
> +following “make” command:
> +
> +.. code-block:: console
> +
> +   cd <DPDK-source-directory>
> +   make config T=arm64-thunderx-linuxapp-gcc install
> +
> +Limitations
> +-----------
> +
> +Burst mode support
> +~~~~~~~~~~~~~~~~~~
> +
> +Burt mode is not supported. Dequeue and Enqueue functions accepts only single


Typo here, burst


> +event at a time
> +
> diff --git a/doc/guides/index.rst b/doc/guides/index.rst
> index 82b00e9..63716b0 100644
> --- a/doc/guides/index.rst
> +++ b/doc/guides/index.rst
> @@ -43,6 +43,7 @@ DPDK documentation
>     testpmd_app_ug/index
>     nics/index
>     cryptodevs/index
> +   eventdevs/index
>     xen/index
>     contributing/index
>     rel_notes/index
> --
> 2.5.5

Re: [PATCH 04/39] event/octeontx: add build and log infrastructure

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 04/39] event/octeontx: add build and log
>  infrastructure
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 05/39] event/octeontx: probe ssovf pcie devices

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 05/39] event/octeontx: probe ssovf pcie devices
>  
>  An event device consists of event queues and event ports.
>  On Octeontx HW, each event queues(sso group/ssovf) and event ports(sso
>  hws/ssowvf) are enumerated as separate SRIOV VF PCIe device.In order to
>  expose as an event device, On PCIe probe, the driver stores the information
>  associated with the PCIe device and later with vdev infrastructure creates event
>  device with earlier probed PCIe VF devices.
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Acked-by: Gage Eads <gage.eads@intel.com

Re: [PATCH 06/39] event/octeontx: probe ssowvf pcie devices

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 06/39] event/octeontx: probe ssowvf pcie devices
>  
>  An event device consists of event queues and event ports.
>  On Octeontx HW, each event queues(sso group/ssovf) and event ports(sso
>  hws/ssowvf) are enumerated as separate SRIOV VF PCIe device.In order to
>  expose as an event device, On PCIe probe, the driver stores the information
>  associated with the PCIe device and later with vdev infrastructure creates event
>  device with earlier probed PCIe VF devices.
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Minor nit: commit message should have a space before the "In" in "PCIe device.In order".

Either way,
Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 07/39] event/octeontx: add vdev interface functions

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 07/39] event/octeontx: add vdev interface
>  functions
>  
>  ssovf and ssowvf PCIe VF devices are shared between eventdev PMD and
>  ethdev PMD.This patch expose a set of interface API to get info about probed
>  ssovf and ssowvf VF resources to use with eventdev and ethdev vdev devices
>  latter.
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Minor nit: Space needed before "This" in "ethdev PMD.This"

Either way,
Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 08/39] event/octeontx: add mailbox support

[Eads, Gage]

Hi Jerin,

I identified a few issues below.

Thanks,
Gage

<snip>

>  +static inline void
>  +mbox_send_requeust(struct mbox *m, struct octeontx_mbox_hdr *hdr,
>  +			const void *txmsg, uint16_t txsize)

"requeust" -> "request"

<snip>

>  +
>  +static inline int
>  +mbox_wait_response(struct mbox *m, struct octeontx_mbox_hdr *hdr,
>  +			void *rxmsg, uint16_t rxsize)
>  +{
>  +	int res = 0, wait;
>  +	uint16_t len;
>  +	struct mbox_ram_hdr rx_hdr;
>  +	uint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base;
>  +	uint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct
>  +mbox_ram_hdr);
>  +
>  +	/* Wait for response */
>  +	wait = MBOX_WAIT_TIME;
>  +	while (wait > 0) {
>  +		rte_delay_us(100);
>  +		rx_hdr.u64 = rte_read64(ram_mbox_hdr);
>  +		if (rx_hdr.chan_state == MBOX_CHAN_STATE_RES)
>  +			break;
>  +		wait -= 10;
>  +	}

'wait' is in units of milliseconds ("Mbox operation timeout in milliseconds"), so the function subtracts 10 ms after spinning for 100 us. Is that intentional?

>  +
>  +	hdr->res_code = rx_hdr.res_code;
>  +	m->tag_own++;
>  +
>  +	/* Tag mismatch */
>  +	if (m->tag_own != rx_hdr.tag) {
>  +		res = -EBADR;
>  +		goto error;
>  +	}
>  +
>  +	/* PF nacked the msg */
>  +	if (rx_hdr.res_code != MBOX_RET_SUCCESS) {
>  +		res = -EBADMSG;
>  +		goto error;
>  +	}
>  +
>  +	/* Timeout */
>  +	if (wait <= 0) {
>  +		res = -ETIMEDOUT;
>  +		goto error;
>  +	}

Will a timeout mean rx_hdr is invalid? If so, the timeout error should be checked before checking for a PF nack or tag mismatch.

<snip>

>  +static inline int
>  +mbox_send(struct mbox *m, struct octeontx_mbox_hdr *hdr, const void
>  *txmsg,
>  +		uint16_t txsize, void *rxmsg, uint16_t rxsize) {
>  +	int res = -EINVAL;
>  +
>  +	if (m->init_once == 0 || hdr == NULL ||
>  +		txsize > MAX_RAM_MBOX_LEN || rxsize >
>  MAX_RAM_MBOX_LEN) {
>  +		ssovf_log_err("Invalid init_once=%d hdr=%p txsz=%d rxsz=%d",
>  +				m->init_once, hdr, txsize, rxsize);
>  +		return res;
>  +	}
>  +
>  +	rte_spinlock_lock(&m->lock);
>  +
>  +	mbox_send_requeust(m, hdr, txmsg, txsize);

"requeust" -> "request"

Re: [PATCH 09/39] event/octeontx: add octeontx eventdev driver

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 09/39] event/octeontx: add octeontx eventdev
>  driver
>  
>  This adds the minimal changes to allow a octeontx eventdev implementation to
>  be compiled, linked and created at run time.
>  The eventdev does nothing, but can be created via vdev on command line, e.g.
>  
>  sudo ./build/app/test -c 0xff00 --vdev=event_octeontx ...
>  Initializing event_octeontx domain=4 max_queues=64 max_ports=32
>  RTE>>
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 10/39] event/octeontx: add device capabilities function

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 10/39] event/octeontx: add device capabilities
>  function
>  
>  Add the info_get function to return details on the queues, flow, prioritization
>  capabilities, etc. which this device has.
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 11/39] event/octeontx: add configure function

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 11/39] event/octeontx: add configure function
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 12/39] event/octeontx: add support for event queues

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 12/39] event/octeontx: add support for event
>  queues
>  
>  Pretty much everything done in HW. Need to configure the priority associated
>  with event queue aka sso group through a mailbox request to PF
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 13/39] event/octeontx: add support for event ports

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 13/39] event/octeontx: add support for event ports
>  
>  Add in the data-structures for the ports used by workers to sent events to/from
>  the HW scheduler. Also add a function to release the resource allocated in
>  setup
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Possible typo in a comment identified below. Either way,
Acked-by: Gage Eads <gage.eads@intel.com>

<snip>

>  +
>  +	reg_off = SSOW_VHWS_OP_GET_WORK0;
>  +	reg_off |= 1 << 4; /* Index_ggrp_mask (Use maskset zero) */

"grp" instead of "ggrp"?

Re: [PATCH 14/39] event/octeontx: add support for linking queues to ports

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 14/39] event/octeontx: add support for linking
>  queues to ports
>  
>  queues to port link and unlink establishment is through setting/resetting the
>  queue/group membership in SSOW_VHWS_GRPMSK_CHGX
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 15/39] event/octeontx: add support dequeue timeout tick conversion

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 15/39] event/octeontx: add support dequeue
>  timeout tick conversion
>  
>  SSO co-processor runs at a different frequency than core clock.
>  Request PF to convert the ns to SSO get_work timeout period.
>  On dequeue, If device is configured with
>  RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT configuration then use
>  different fast path dequeue handler to wait till requested amount of
>  nanosecond if the event is not available.
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 16/39] event/octeontx: add dump function for easier debugging

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 16/39] event/octeontx: add dump function for
>  easier debugging
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 17/39] event/octeontx: add SSO HW device operations

[Eads, Gage]

Disregard my previous message -- I see you addressed the checkpatch issues in your cover letter.

This patch looks good, so
Acked-by: Gage Eads <gage.eads@intel.com>

>  -----Original Message-----
>  From: Eads, Gage
>  Sent: Wednesday, March 22, 2017 10:29 AM
>  To: Jerin Jacob <jerin.jacob@caviumnetworks.com>; dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com;
>  nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com
>  Subject: RE: [dpdk-dev] [PATCH 17/39] event/octeontx: add SSO HW device
>  operations
>  
>  Hi Jerin,
>  
>  Please note the checkpatch issues for this patch:
>  http://dpdk.org/ml/archives/test-report/2017-March/012577.html
>  
>  Thanks,
>  Gage

Re: [PATCH 18/39] event/octeontx: add support worker enqueue function

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 18/39] event/octeontx: add support worker
>  enqueue function
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 19/39] event/octeontx: add support worker dequeue function

[Eads, Gage]

Hi Jerin,

<snip>

>  +force_inline uint16_t __hot
>  +ssows_deq_timeout(void *port, struct rte_event *ev, uint64_t
>  +timeout_ticks) {
>  +	struct ssows *ws = port;
>  +	uint64_t iter;
>  +	uint16_t ret = 1;
>  +
>  +	ssows_swtag_wait(ws);
>  +	if (ws->swtag_req) {
>  +		ws->swtag_req = 0;
>  +	} else {
>  +		ret = ssows_get_work(ws, ev);
>  +		for (iter = 1; iter < timeout_ticks && (ret == 0); iter++)
>  +			ret = ssows_get_work(ws, ev);
>  +	}
>  +	return ret;
>  +}

If I understand this correctly, each ssows_get_work() call will wait up to N ns, where N is the dequeue_timeout_ns value supplied to ssovf_mbox_getwork_tmo_set() in ssovf_configure().

So in ssows_deq_timeout, the wait time is (worst case) timeout_ticks * (N * (ns to tick conversion factor)) ticks, which depends on the user-supplied N at eventdev configuration time.

Perhaps in ssovf_configure, if the RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT flag is used, the getwork timeout should be set to 1 tick?

Thanks,
Gage

Re: [PATCH 20/39] event/octeontx: add start function

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 20/39] event/octeontx: add start function
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 21/39] event/octeontx: add stop and close function

[Eads, Gage]

>  -----Original Message-----
>  From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
>  Sent: Friday, March 3, 2017 11:28 AM
>  To: dev@dpdk.org
>  Cc: thomas.monjalon@6wind.com; Richardson, Bruce
>  <bruce.richardson@intel.com>; Van Haaren, Harry
>  <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
>  <gage.eads@intel.com>; nipun.gupta@nxp.com;
>  santosh.shukla@caviumnetworks.com; Jerin Jacob
>  <jerin.jacob@caviumnetworks.com>
>  Subject: [dpdk-dev] [PATCH 21/39] event/octeontx: add stop and close
>  function
>  
>  Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>  Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>

Acked-by: Gage Eads <gage.eads@intel.com>

Re: [PATCH 08/39] event/octeontx: add mailbox support

[Jerin Jacob]

On Thu, Mar 23, 2017 at 04:46:07PM +0000, Eads, Gage wrote:
> Hi Jerin,

Thanks Gage for the review.

> 
> I identified a few issues below.
> 
> Thanks,
> Gage
> 
> <snip>
> 
> >  +static inline void
> >  +mbox_send_requeust(struct mbox *m, struct octeontx_mbox_hdr *hdr,
> >  +			const void *txmsg, uint16_t txsize)
> 
> "requeust" -> "request"

Will fix the typos in v2

> 
> <snip>
> 
> >  +
> >  +static inline int
> >  +mbox_wait_response(struct mbox *m, struct octeontx_mbox_hdr *hdr,
> >  +			void *rxmsg, uint16_t rxsize)
> >  +{
> >  +	int res = 0, wait;
> >  +	uint16_t len;
> >  +	struct mbox_ram_hdr rx_hdr;
> >  +	uint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base;
> >  +	uint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct
> >  +mbox_ram_hdr);
> >  +
> >  +	/* Wait for response */
> >  +	wait = MBOX_WAIT_TIME;
> >  +	while (wait > 0) {
> >  +		rte_delay_us(100);
> >  +		rx_hdr.u64 = rte_read64(ram_mbox_hdr);
> >  +		if (rx_hdr.chan_state == MBOX_CHAN_STATE_RES)
> >  +			break;
> >  +		wait -= 10;
> >  +	}
> 
> 'wait' is in units of milliseconds ("Mbox operation timeout in milliseconds"), so the function subtracts 10 ms after spinning for 100 us. Is that intentional?

No. its unintentional. Thanks for pointing it out. I will fix it by

#define MBOX_WAIT_TIME_SEC 3
	wait = MBOX_WAIT_TIME_SEC * 1000 * 10;
	while (wait > 0) {
		rte_delay_us(100);

		wait -= 1;
	}


> 
> >  +
> >  +	hdr->res_code = rx_hdr.res_code;
> >  +	m->tag_own++;
> >  +
> >  +	/* Tag mismatch */
> >  +	if (m->tag_own != rx_hdr.tag) {
> >  +		res = -EBADR;
> >  +		goto error;
> >  +	}
> >  +
> >  +	/* PF nacked the msg */
> >  +	if (rx_hdr.res_code != MBOX_RET_SUCCESS) {
> >  +		res = -EBADMSG;
> >  +		goto error;
> >  +	}
> >  +
> >  +	/* Timeout */
> >  +	if (wait <= 0) {
> >  +		res = -ETIMEDOUT;
> >  +		goto error;
> >  +	}
> 
> Will a timeout mean rx_hdr is invalid? If so, the timeout error should be checked before checking for a PF nack or tag mismatch.

rx_hdr is valid. But No harm in moving timeout to first. I will move the
timeout to first as you suggested.
 
> <snip>
> 
> >  +static inline int
> >  +mbox_send(struct mbox *m, struct octeontx_mbox_hdr *hdr, const void
> >  *txmsg,
> >  +		uint16_t txsize, void *rxmsg, uint16_t rxsize) {
> >  +	int res = -EINVAL;
> >  +
> >  +	if (m->init_once == 0 || hdr == NULL ||
> >  +		txsize > MAX_RAM_MBOX_LEN || rxsize >
> >  MAX_RAM_MBOX_LEN) {
> >  +		ssovf_log_err("Invalid init_once=%d hdr=%p txsz=%d rxsz=%d",
> >  +				m->init_once, hdr, txsize, rxsize);
> >  +		return res;
> >  +	}
> >  +
> >  +	rte_spinlock_lock(&m->lock);
> >  +
> >  +	mbox_send_requeust(m, hdr, txmsg, txsize);
> 
> "requeust" -> "request"
> 

Re: [PATCH 19/39] event/octeontx: add support worker dequeue function

[Jerin Jacob]

On Thu, Mar 23, 2017 at 06:51:07PM +0000, Eads, Gage wrote:
> Hi Jerin,

Hi Gage,

> 
> <snip>
> 
> >  +force_inline uint16_t __hot
> >  +ssows_deq_timeout(void *port, struct rte_event *ev, uint64_t
> >  +timeout_ticks) {
> >  +	struct ssows *ws = port;
> >  +	uint64_t iter;
> >  +	uint16_t ret = 1;
> >  +
> >  +	ssows_swtag_wait(ws);
> >  +	if (ws->swtag_req) {
> >  +		ws->swtag_req = 0;
> >  +	} else {
> >  +		ret = ssows_get_work(ws, ev);
> >  +		for (iter = 1; iter < timeout_ticks && (ret == 0); iter++)
> >  +			ret = ssows_get_work(ws, ev);
> >  +	}
> >  +	return ret;
> >  +}
> 
> If I understand this correctly, each ssows_get_work() call will wait up to N ns, where N is the dequeue_timeout_ns value supplied to ssovf_mbox_getwork_tmo_set() in ssovf_configure().
> 
> So in ssows_deq_timeout, the wait time is (worst case) timeout_ticks * (N * (ns to tick conversion factor)) ticks, which depends on the user-supplied N at eventdev configuration time.
> 
> Perhaps in ssovf_configure, if the RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT flag is used, the getwork timeout should be set to 1 tick?

I agree. That will improve the timeout accuracy.I will change to
ssovf_mbox_getwork_tmo_set(conf->min_dequeue_timeout_ns) in
ssovf_configure if RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT flag is set.

Thanks

> Thanks,
> Gage

Re: [PATCH 22/39] app/test: octeontx eventdev unit test infrastructure

[Jerin Jacob]

On Thu, Mar 23, 2017 at 11:55:27AM +0000, Van Haaren, Harry wrote:
> > From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> > Sent: Friday, March 3, 2017 5:28 PM
> > To: dev@dpdk.org
> > Cc: thomas.monjalon@6wind.com; Richardson, Bruce <bruce.richardson@intel.com>; Van Haaren,
> > Harry <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage <gage.eads@intel.com>;
> > nipun.gupta@nxp.com; santosh.shukla@caviumnetworks.com; Jerin Jacob
> > <jerin.jacob@caviumnetworks.com>
> > Subject: [dpdk-dev] [PATCH 22/39] app/test: octeontx eventdev unit test infrastructure
> > 
> > add test setup and teardown routines.
> > 
> > Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> 

Hi Harry,

Thanks for the review.

> 1) I think the autotest_data.py file needs to be updated to run the test command too, event/sw example at top of patch
> http://dpdk.org/dev/patchwork/patch/21694/

Unlike event/sw, Since this test case has the dependency on specific HW. I
prefer to not add to common autotest_data.py.

> 
> 2) This requires a rebase against latest head, app/test has moved to test/test/.
> I will ignore this app/test to test/test move for the remaining patches of the series.

Will fix it v2

> 
> With fixes above,
> 
> Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
> 
> 
> > ---
> >  app/test/Makefile                 |  5 +-
> >  app/test/test_eventdev_octeontx.c | 98 +++++++++++++++++++++++++++++++++++++++
> >  2 files changed, 102 insertions(+), 1 deletion(-)
> >  create mode 100644 app/test/test_eventdev_octeontx.c
> > 
> > diff --git a/app/test/Makefile b/app/test/Makefile
> > index a426548..b45a1d3 100644
> > --- a/app/test/Makefile
> > +++ b/app/test/Makefile
> > @@ -197,7 +197,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev_blockcipher.c
> >  SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev_perf.c
> >  SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev.c
> > 
> > -SRCS-$(CONFIG_RTE_LIBRTE_EVENTDEV) += test_eventdev.c
> > +ifeq ($(CONFIG_RTE_LIBRTE_EVENTDEV),y)
> > +SRCS-y += test_eventdev.c
> > +SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += test_eventdev_octeontx.c
> > +endif
> > 
> >  SRCS-$(CONFIG_RTE_LIBRTE_KVARGS) += test_kvargs.c
> > 
> > diff --git a/app/test/test_eventdev_octeontx.c b/app/test/test_eventdev_octeontx.c
> > new file mode 100644
> > index 0000000..9744961
> > --- /dev/null
> > +++ b/app/test/test_eventdev_octeontx.c
> > @@ -0,0 +1,98 @@
> > +/*-
> > + *   BSD LICENSE
> > + *
> > + *   Copyright(c) 2017 Cavium networks. All rights reserved.
> > + *
> > + *   Redistribution and use in source and binary forms, with or without
> > + *   modification, are permitted provided that the following conditions
> > + *   are met:
> > + *
> > + *	 * Redistributions of source code must retain the above copyright
> > + *	   notice, this list of conditions and the following disclaimer.
> > + *	 * Redistributions in binary form must reproduce the above copyright
> > + *	   notice, this list of conditions and the following disclaimer in
> > + *	   the documentation and/or other materials provided with the
> > + *	   distribution.
> > + *	 * Neither the name of Cavium networks nor the names of its
> > + *	   contributors may be used to endorse or promote products derived
> > + *	   from this software without specific prior written permission.
> > + *
> > + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> > + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> > + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
> > + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
> > + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
> > + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
> > + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
> > + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
> > + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> > + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> > + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> > + */
> > +
> > +#include <rte_atomic.h>
> > +#include <rte_common.h>
> > +#include <rte_cycles.h>
> > +#include <rte_debug.h>
> > +#include <rte_eal.h>
> > +#include <rte_ethdev.h>
> > +#include <rte_eventdev.h>
> > +#include <rte_hexdump.h>
> > +#include <rte_mbuf.h>
> > +#include <rte_malloc.h>
> > +#include <rte_memcpy.h>
> > +#include <rte_launch.h>
> > +#include <rte_lcore.h>
> > +#include <rte_per_lcore.h>
> > +#include <rte_random.h>
> > +
> > +#include "test.h"
> > +
> > +#define NUM_PACKETS (1 << 18)
> > +#define MAX_EVENTS  (16 * 1024)
> > +
> > +static int evdev;
> > +
> > +static int
> > +testsuite_setup(void)
> > +{
> > +	const char *eventdev_name = "event_octeontx";
> > +
> > +	evdev = rte_event_dev_get_dev_id(eventdev_name);
> > +	if (evdev < 0) {
> > +		printf("%d: Eventdev %s not found - creating.\n",
> > +				__LINE__, eventdev_name);
> > +		if (rte_eal_vdev_init(eventdev_name, NULL) < 0) {
> > +			printf("Error creating eventdev\n");
> > +			return TEST_FAILED;
> > +		}
> > +		evdev = rte_event_dev_get_dev_id(eventdev_name);
> > +		if (evdev < 0) {
> > +			printf("Error finding newly created eventdev\n");
> > +			return TEST_FAILED;
> > +		}
> > +	}
> > +
> > +	return TEST_SUCCESS;
> > +}
> > +
> > +static void
> > +testsuite_teardown(void)
> > +{
> > +	rte_event_dev_close(evdev);
> > +}
> > +
> > +
> > +static struct unit_test_suite eventdev_octeontx_testsuite  = {
> > +	.suite_name = "eventdev octeontx unit test suite",
> > +	.setup = testsuite_setup,
> > +	.teardown = testsuite_teardown,
> > +};
> > +
> > +static int
> > +test_eventdev_octeontx(void)
> > +{
> > +	return unit_test_suite_runner(&eventdev_octeontx_testsuite);
> > +}
> > +
> > +REGISTER_TEST_COMMAND(eventdev_octeontx_autotest, test_eventdev_octeontx);
> > --
> > 2.5.5
> 

Re: [PATCH 22/39] app/test: octeontx eventdev unit test infrastructure

[Van Haaren, Harry]

> From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com]
> Sent: Friday, March 24, 2017 1:41 PM
> Subject: Re: [dpdk-dev] [PATCH 22/39] app/test: octeontx eventdev unit test infrastructure
> 
> On Thu, Mar 23, 2017 at 11:55:27AM +0000, Van Haaren, Harry wrote:
<snip>
> > > Subject: [dpdk-dev] [PATCH 22/39] app/test: octeontx eventdev unit test infrastructure
> > >
> > > add test setup and teardown routines.
> > >
> > > Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> >
> 
> Hi Harry,
> 
> Thanks for the review.
> 
> > 1) I think the autotest_data.py file needs to be updated to run the test command too,
> event/sw example at top of patch
> > http://dpdk.org/dev/patchwork/patch/21694/
> 
> Unlike event/sw, Since this test case has the dependency on specific HW. I
> prefer to not add to common autotest_data.py.

Ah yes - good point - Ack-ed again for clarity.

> > 2) This requires a rebase against latest head, app/test has moved to test/test/.
> > I will ignore this app/test to test/test move for the remaining patches of the series.
> 
> Will fix it v2

Perfect.

Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

[PATCH v2 00/38] Cavium OCTEONTX ssovf eventdev PMD

[Jerin Jacob]

The following patch set adds Cavium OCTEONTX HW based eventdev
implementation to the next-eventdev tree.

Introduction to OCTEON-TX ARM processors can be found
here: http://www.cavium.com/OCTEON-TX_ARM_Processors.html

- First 18 patches implements eventdev API with OCTEONTX SSOVF HW.
- 19-35 patches adds the unit test cases for the driver.
- 36-38 adds the documentation and updates the release notes

v2:

- Enabled CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF
by default in common config.

- Fixed issue with clang and free bsd build

- git comment enhancement. Added the missing space(Gage)
http://dpdk.org/dev/patchwork/patch/21364/
http://dpdk.org/dev/patchwork/patch/21365/

- added -ENODEV return to octeontx_ssovf_info()

- s/requeust/request (Gage)
http://dpdk.org/dev/patchwork/patch/21366/

- Fixed incorrect mbox wait timeout handling(Gage)
http://dpdk.org/dev/patchwork/patch/21366/
- Improved the mbox timeout handling(Gage)
http://dpdk.org/dev/patchwork/patch/21366/

- Improved the timeout accuracy(Gage)

Improved the timeout accuracy by invoking
ssovf_mbox_getwork_tmo_set(edev->min_deq_timeout_ns) in
ssovf_configure if RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT
flag is set

http://dpdk.org/dev/patchwork/patch/21377/

- Add newly introduced RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES in info_get

- Remove RTE_EVENT_QUEUE_CFG_DEFAULT flag to
sync with next-eventdev master

- app/test has moved to test/test/. Fixed the references(Harry)

- documentation improvements based on Harry's input
http://dpdk.org/dev/patchwork/patch/21397/


The patchset is Git log is clean, while check patch issues:
1) 1 Error on Complex Macro (which I believe it cannot be fixed) # Patch 14
2) 1 Error on spacing while using gcc inline assembly(it is false positive) # patch 14

Jerin Jacob (38):
  event/octeontx: add build and log infrastructure
  event/octeontx: probe ssovf pcie devices
  event/octeontx: probe ssowvf pcie devices
  event/octeontx: add vdev interface functions
  event/octeontx: add mailbox support
  event/octeontx: add octeontx eventdev driver
  event/octeontx: add device capabilities function
  event/octeontx: add configure function
  event/octeontx: add support for event queues
  event/octeontx: add support for event ports
  event/octeontx: add support for linking queues to ports
  event/octeontx: add support dequeue timeout tick conversion
  event/octeontx: add dump function for easier debugging
  event/octeontx: add SSO HW device operations
  event/octeontx: add support worker enqueue function
  event/octeontx: add support worker dequeue function
  event/octeontx: add start function
  event/octeontx: add stop and close function
  test/test: octeontx eventdev unit test infrastructure
  test/test: octeontx unit test case setup and teardown
  test/test: octeontx unit test case helper functions
  test/test: octeontx simple event enqueue and dequeue test
  test/test: octeontx multi queue enqueue and dequeue test
  test/test: octeontx eventdev priority test
  test/test: add infrastructure for multicore octeontx tests
  test/test: octeontx multi queue and multi core/port tests
  test/test: octeontx single link establishment test
  test/test: octeontx multi link establishment test
  test/test: octeontx flow based two stage sched type test
  test/test: octeontx queue based two stage sched type test
  test/test: octeontx flow based maximum stage pipeline
  test/test: octeontx queue based maximum stage pipeline
  test/test: octeontx queue and flow based max stage pipeline
  test/test: octeontx producer-consumer based order test
  test/test: add remaining tests based on existing helpers
  doc: add OCTEONTX ssovf details
  maintainers: claim OCTEONTX eventdev PMD maintainership
  doc: add Cavium OCTEONTX eventdev PMD to 17.05 release notes

 MAINTAINERS                                        |   11 +
 config/common_base                                 |    6 +
 config/defconfig_arm64-thunderx-linuxapp-gcc       |    6 +
 doc/guides/eventdevs/index.rst                     |   38 +
 doc/guides/eventdevs/octeontx.rst                  |  151 +++
 doc/guides/index.rst                               |    1 +
 doc/guides/rel_notes/release_17_05.rst             |    6 +-
 drivers/event/Makefile                             |    1 +
 drivers/event/octeontx/Makefile                    |   65 +
 drivers/event/octeontx/rte_pmd_octeontx_ssovf.h    |   61 +
 .../octeontx/rte_pmd_octeontx_ssovf_version.map    |    9 +
 drivers/event/octeontx/ssovf_evdev.c               |  572 ++++++++
 drivers/event/octeontx/ssovf_evdev.h               |  203 +++
 drivers/event/octeontx/ssovf_mbox.c                |  232 ++++
 drivers/event/octeontx/ssovf_probe.c               |  288 ++++
 drivers/event/octeontx/ssovf_worker.c              |  342 +++++
 mk/rte.app.mk                                      |    1 +
 test/test/Makefile                                 |    5 +-
 test/test/test_eventdev_octeontx.c                 | 1398 ++++++++++++++++++++
 19 files changed, 3394 insertions(+), 2 deletions(-)
 create mode 100644 doc/guides/eventdevs/index.rst
 create mode 100644 doc/guides/eventdevs/octeontx.rst
 create mode 100644 drivers/event/octeontx/Makefile
 create mode 100644 drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
 create mode 100644 drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
 create mode 100644 drivers/event/octeontx/ssovf_evdev.c
 create mode 100644 drivers/event/octeontx/ssovf_evdev.h
 create mode 100644 drivers/event/octeontx/ssovf_mbox.c
 create mode 100644 drivers/event/octeontx/ssovf_probe.c
 create mode 100644 drivers/event/octeontx/ssovf_worker.c
 create mode 100644 test/test/test_eventdev_octeontx.c

-- 
2.5.5

[PATCH v2 01/38] event/octeontx: add build and log infrastructure

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
v2:
- Enabled CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF by default
in common config
---
 config/common_base                                 |  6 +++
 config/defconfig_arm64-thunderx-linuxapp-gcc       |  6 +++
 drivers/event/Makefile                             |  1 +
 drivers/event/octeontx/Makefile                    | 55 +++++++++++++++++++++
 .../octeontx/rte_pmd_octeontx_ssovf_version.map    |  4 ++
 drivers/event/octeontx/ssovf_evdev.h               | 57 ++++++++++++++++++++++
 drivers/event/octeontx/ssovf_probe.c               | 32 ++++++++++++
 mk/rte.app.mk                                      |  1 +
 8 files changed, 162 insertions(+)
 create mode 100644 drivers/event/octeontx/Makefile
 create mode 100644 drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
 create mode 100644 drivers/event/octeontx/ssovf_evdev.h
 create mode 100644 drivers/event/octeontx/ssovf_probe.c

diff --git a/config/common_base b/config/common_base
index 901ac3f..693eaa9 100644
--- a/config/common_base
+++ b/config/common_base
@@ -463,6 +463,12 @@ CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV=y
 CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n
 
 #
+# Compile PMD for octeontx sso event device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG=n
+
+#
 # Compile librte_ring
 #
 CONFIG_RTE_LIBRTE_RING=y
diff --git a/config/defconfig_arm64-thunderx-linuxapp-gcc b/config/defconfig_arm64-thunderx-linuxapp-gcc
index a5b1e24..980f86c 100644
--- a/config/defconfig_arm64-thunderx-linuxapp-gcc
+++ b/config/defconfig_arm64-thunderx-linuxapp-gcc
@@ -46,3 +46,9 @@ CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n
 CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n
 CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_DRIVER=n
 CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_MBOX=n
+
+#
+# Compile PMD for octeontx sso event device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG=n
diff --git a/drivers/event/Makefile b/drivers/event/Makefile
index 678279f..b5059dd 100644
--- a/drivers/event/Makefile
+++ b/drivers/event/Makefile
@@ -32,5 +32,6 @@
 include $(RTE_SDK)/mk/rte.vars.mk
 
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV) += skeleton
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += octeontx
 
 include $(RTE_SDK)/mk/rte.subdir.mk
diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile
new file mode 100644
index 0000000..d72ad46
--- /dev/null
+++ b/drivers/event/octeontx/Makefile
@@ -0,0 +1,55 @@
+#   BSD LICENSE
+#
+#   Copyright(c) 2017 Cavium Networks. All rights reserved.
+#   All rights reserved.
+#
+#   Redistribution and use in source and binary forms, with or without
+#   modification, are permitted provided that the following conditions
+#   are met:
+#
+#     * Redistributions of source code must retain the above copyright
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in
+#       the documentation and/or other materials provided with the
+#       distribution.
+#     * Neither the name of Cavium Networks nor the names of its
+#       contributors may be used to endorse or promote products derived
+#       from this software without specific prior written permission.
+#
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+#
+# library name
+#
+LIB = librte_pmd_octeontx_ssovf.a
+
+CFLAGS += $(WERROR_FLAGS)
+
+EXPORT_MAP := rte_pmd_octeontx_ssovf_version.map
+
+LIBABIVER := 1
+
+#
+# all source are stored in SRCS-y
+#
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_probe.c
+
+# this lib depends upon:
+DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += lib/librte_eal
+DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += lib/librte_eventdev
+
+include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
new file mode 100644
index 0000000..8591cc0
--- /dev/null
+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
@@ -0,0 +1,4 @@
+DPDK_17.05 {
+
+	local: *;
+};
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
new file mode 100644
index 0000000..ce6b7d4
--- /dev/null
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -0,0 +1,57 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2017.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __SSOVF_EVDEV_H__
+#define __SSOVF_EVDEV_H__
+
+#include <rte_config.h>
+
+#define EVENTDEV_NAME_OCTEONTX_PMD event_octeontx
+
+#ifdef RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG
+#define ssovf_log_info(fmt, args...) \
+	RTE_LOG(INFO, EVENTDEV, "[%s] %s() " fmt "\n", \
+		RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args)
+#define ssovf_log_dbg(fmt, args...) \
+	RTE_LOG(DEBUG, EVENTDEV, "[%s] %s() " fmt "\n", \
+		RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args)
+#else
+#define ssovf_log_info(fmt, args...)
+#define ssovf_log_dbg(fmt, args...)
+#endif
+
+#define ssovf_func_trace ssovf_log_dbg
+#define ssovf_log_err(fmt, args...) \
+	RTE_LOG(ERR, EVENTDEV, "[%s] %s() " fmt "\n", \
+		RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args)
+
+#endif /* __SSOVF_EVDEV_H__ */
diff --git a/drivers/event/octeontx/ssovf_probe.c b/drivers/event/octeontx/ssovf_probe.c
new file mode 100644
index 0000000..9412878
--- /dev/null
+++ b/drivers/event/octeontx/ssovf_probe.c
@@ -0,0 +1,32 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2017.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
diff --git a/mk/rte.app.mk b/mk/rte.app.mk
index 498369e..c07b855 100644
--- a/mk/rte.app.mk
+++ b/mk/rte.app.mk
@@ -153,6 +153,7 @@ endif # CONFIG_RTE_LIBRTE_CRYPTODEV
 
 ifeq ($(CONFIG_RTE_LIBRTE_EVENTDEV),y)
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV) += -lrte_pmd_skeleton_event
+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += -lrte_pmd_octeontx_ssovf
 endif # CONFIG_RTE_LIBRTE_EVENTDEV
 
 endif # !CONFIG_RTE_BUILD_SHARED_LIBS
-- 
2.5.5

[PATCH v2 02/38] event/octeontx: probe ssovf pcie devices

[Jerin Jacob]

An event device consists of event queues and event ports.
On Octeontx HW, each event queues(sso group/ssovf) and
event ports(sso hws/ssowvf) are enumerated as separate
SRIOV VF PCIe device. In order to expose as an event device,
On PCIe probe, the driver stores the information associated
with the PCIe device and later with vdev infrastructure
creates event device with earlier probed PCIe VF devices.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
v2:
--  git comment enhancement. Added the missing space(Gage) 
http://dpdk.org/dev/patchwork/patch/21364/
---
 drivers/event/octeontx/ssovf_evdev.h | 24 ++++++++++
 drivers/event/octeontx/ssovf_probe.c | 86 ++++++++++++++++++++++++++++++++++++
 2 files changed, 110 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index ce6b7d4..809eed1 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -34,6 +34,7 @@
 #define __SSOVF_EVDEV_H__
 
 #include <rte_config.h>
+#include <rte_io.h>
 
 #define EVENTDEV_NAME_OCTEONTX_PMD event_octeontx
 
@@ -54,4 +55,27 @@
 	RTE_LOG(ERR, EVENTDEV, "[%s] %s() " fmt "\n", \
 		RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args)
 
+#define PCI_VENDOR_ID_CAVIUM              0x177D
+#define PCI_DEVICE_ID_OCTEONTX_SSOGRP_VF  0xA04B
+
+#define SSO_MAX_VHGRP                     (64)
+
+/* SSO VF register offsets */
+#define SSO_VHGRP_QCTL                    (0x010ULL)
+#define SSO_VHGRP_INT                     (0x100ULL)
+#define SSO_VHGRP_INT_W1S                 (0x108ULL)
+#define SSO_VHGRP_INT_ENA_W1S             (0x110ULL)
+#define SSO_VHGRP_INT_ENA_W1C             (0x118ULL)
+#define SSO_VHGRP_INT_THR                 (0x140ULL)
+#define SSO_VHGRP_INT_CNT                 (0x180ULL)
+#define SSO_VHGRP_XAQ_CNT                 (0x1B0ULL)
+#define SSO_VHGRP_AQ_CNT                  (0x1C0ULL)
+#define SSO_VHGRP_AQ_THR                  (0x1E0ULL)
+#define SSO_VHGRP_PF_MBOX(x)              (0x200ULL | ((x) << 3))
+
+/* BAR2 */
+#define SSO_VHGRP_OP_ADD_WORK0            (0x00ULL)
+#define SSO_VHGRP_OP_ADD_WORK1            (0x08ULL)
+
+
 #endif /* __SSOVF_EVDEV_H__ */
diff --git a/drivers/event/octeontx/ssovf_probe.c b/drivers/event/octeontx/ssovf_probe.c
index 9412878..713329c 100644
--- a/drivers/event/octeontx/ssovf_probe.c
+++ b/drivers/event/octeontx/ssovf_probe.c
@@ -30,3 +30,89 @@
  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include <rte_atomic.h>
+#include <rte_common.h>
+#include <rte_eal.h>
+#include <rte_io.h>
+#include <rte_pci.h>
+
+#include "ssovf_evdev.h"
+
+struct ssovf_res {
+	uint16_t domain;
+	uint16_t vfid;
+	void *bar0;
+	void *bar2;
+};
+
+struct ssodev {
+	uint8_t total_ssovfs;
+	struct ssovf_res grp[SSO_MAX_VHGRP];
+};
+static struct ssodev sdev;
+
+/* SSOVF pcie device aka event queue probe */
+
+static int
+ssovf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
+{
+	uint64_t val;
+	uint16_t vfid;
+	uint8_t *idreg;
+	struct ssovf_res *res;
+
+	RTE_SET_USED(pci_drv);
+
+	/* For secondary processes, the primary has done all the work */
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+		return 0;
+
+	if (pci_dev->mem_resource[0].addr == NULL ||
+			pci_dev->mem_resource[2].addr == NULL) {
+		ssovf_log_err("Empty bars %p %p",
+			pci_dev->mem_resource[0].addr,
+			pci_dev->mem_resource[2].addr);
+		return -ENODEV;
+	}
+	idreg = pci_dev->mem_resource[0].addr;
+	idreg += SSO_VHGRP_AQ_THR;
+	val = rte_read64(idreg);
+
+	/* Write back the default value of aq_thr */
+	rte_write64((1ULL << 33) - 1, idreg);
+	vfid = (val >> 16) & 0xffff;
+	if (vfid >= SSO_MAX_VHGRP) {
+		ssovf_log_err("Invalid vfid (%d/%d)", vfid, SSO_MAX_VHGRP);
+		return -EINVAL;
+	}
+
+	res = &sdev.grp[vfid];
+	res->vfid = vfid;
+	res->bar0 = pci_dev->mem_resource[0].addr;
+	res->bar2 = pci_dev->mem_resource[2].addr;
+	res->domain = val & 0xffff;
+
+	sdev.total_ssovfs++;
+	rte_wmb();
+	ssovf_log_dbg("Domain=%d group=%d total_ssovfs=%d", res->domain,
+			res->vfid, sdev.total_ssovfs);
+	return 0;
+}
+
+static const struct rte_pci_id pci_ssovf_map[] = {
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+				PCI_DEVICE_ID_OCTEONTX_SSOGRP_VF)
+	},
+	{
+		.vendor_id = 0,
+	},
+};
+
+static struct rte_pci_driver pci_ssovf = {
+	.id_table = pci_ssovf_map,
+	.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
+	.probe = ssovf_probe,
+};
+
+RTE_PMD_REGISTER_PCI(octeontx_ssovf, pci_ssovf);
-- 
2.5.5

[PATCH v2 03/38] event/octeontx: probe ssowvf pcie devices

[Jerin Jacob]

An event device consists of event queues and event ports.
On Octeontx HW, each event queues(sso group/ssovf) and
event ports(sso hws/ssowvf) are enumerated as separate
SRIOV VF PCIe device. In order to expose as an event device,
On PCIe probe, the driver stores the information associated
with the PCIe device and later with vdev infrastructure
creates event device with earlier probed PCIe VF devices.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
v2:
- git comment enhancement. Added the missing space(Gage) 
http://dpdk.org/dev/patchwork/patch/21365/
---
 drivers/event/octeontx/ssovf_evdev.h | 28 ++++++++++++
 drivers/event/octeontx/ssovf_probe.c | 86 ++++++++++++++++++++++++++++++++++++
 2 files changed, 114 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 809eed1..0a3c76e 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -57,8 +57,10 @@
 
 #define PCI_VENDOR_ID_CAVIUM              0x177D
 #define PCI_DEVICE_ID_OCTEONTX_SSOGRP_VF  0xA04B
+#define PCI_DEVICE_ID_OCTEONTX_SSOWS_VF   0xA04D
 
 #define SSO_MAX_VHGRP                     (64)
+#define SSO_MAX_VHWS                      (32)
 
 /* SSO VF register offsets */
 #define SSO_VHGRP_QCTL                    (0x010ULL)
@@ -77,5 +79,31 @@
 #define SSO_VHGRP_OP_ADD_WORK0            (0x00ULL)
 #define SSO_VHGRP_OP_ADD_WORK1            (0x08ULL)
 
+/* SSOW VF register offsets (BAR0) */
+#define SSOW_VHWS_GRPMSK_CHGX(x)          (0x080ULL | ((x) << 3))
+#define SSOW_VHWS_TAG                     (0x300ULL)
+#define SSOW_VHWS_WQP                     (0x308ULL)
+#define SSOW_VHWS_LINKS                   (0x310ULL)
+#define SSOW_VHWS_PENDTAG                 (0x340ULL)
+#define SSOW_VHWS_PENDWQP                 (0x348ULL)
+#define SSOW_VHWS_SWTP                    (0x400ULL)
+#define SSOW_VHWS_OP_ALLOC_WE             (0x410ULL)
+#define SSOW_VHWS_OP_UPD_WQP_GRP0         (0x440ULL)
+#define SSOW_VHWS_OP_UPD_WQP_GRP1         (0x448ULL)
+#define SSOW_VHWS_OP_SWTAG_UNTAG          (0x490ULL)
+#define SSOW_VHWS_OP_SWTAG_CLR            (0x820ULL)
+#define SSOW_VHWS_OP_DESCHED              (0x860ULL)
+#define SSOW_VHWS_OP_DESCHED_NOSCH        (0x870ULL)
+#define SSOW_VHWS_OP_SWTAG_DESCHED        (0x8C0ULL)
+#define SSOW_VHWS_OP_SWTAG_NOSCHED        (0x8D0ULL)
+#define SSOW_VHWS_OP_SWTP_SET             (0xC20ULL)
+#define SSOW_VHWS_OP_SWTAG_NORM           (0xC80ULL)
+#define SSOW_VHWS_OP_SWTAG_FULL0          (0xCA0UL)
+#define SSOW_VHWS_OP_SWTAG_FULL1          (0xCA8ULL)
+#define SSOW_VHWS_OP_CLR_NSCHED           (0x10000ULL)
+#define SSOW_VHWS_OP_GET_WORK0            (0x80000ULL)
+#define SSOW_VHWS_OP_GET_WORK1            (0x80008ULL)
+
+#define SSOW_BAR4_LEN                     (64 * 1024)
 
 #endif /* __SSOVF_EVDEV_H__ */
diff --git a/drivers/event/octeontx/ssovf_probe.c b/drivers/event/octeontx/ssovf_probe.c
index 713329c..7033ff5 100644
--- a/drivers/event/octeontx/ssovf_probe.c
+++ b/drivers/event/octeontx/ssovf_probe.c
@@ -45,12 +45,98 @@ struct ssovf_res {
 	void *bar2;
 };
 
+struct ssowvf_res {
+	uint16_t domain;
+	uint16_t vfid;
+	void *bar0;
+	void *bar2;
+	void *bar4;
+};
+
+struct ssowvf_identify {
+	uint16_t domain;
+	uint16_t vfid;
+};
+
 struct ssodev {
 	uint8_t total_ssovfs;
+	uint8_t total_ssowvfs;
 	struct ssovf_res grp[SSO_MAX_VHGRP];
+	struct ssowvf_res hws[SSO_MAX_VHWS];
 };
+
 static struct ssodev sdev;
 
+/* SSOWVF pcie device aka event port probe */
+
+static int
+ssowvf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
+{
+	uint16_t vfid;
+	struct ssowvf_res *res;
+	struct ssowvf_identify *id;
+
+	RTE_SET_USED(pci_drv);
+
+	/* For secondary processes, the primary has done all the work */
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+		return 0;
+
+	if (pci_dev->mem_resource[0].addr == NULL ||
+			pci_dev->mem_resource[2].addr == NULL ||
+			pci_dev->mem_resource[4].addr == NULL) {
+		ssovf_log_err("Empty bars %p %p %p",
+				pci_dev->mem_resource[0].addr,
+				pci_dev->mem_resource[2].addr,
+				pci_dev->mem_resource[4].addr);
+		return -ENODEV;
+	}
+
+	if (pci_dev->mem_resource[4].len != SSOW_BAR4_LEN) {
+		ssovf_log_err("Bar4 len mismatch %d != %d",
+			SSOW_BAR4_LEN, (int)pci_dev->mem_resource[4].len);
+		return -EINVAL;
+	}
+
+	id = pci_dev->mem_resource[4].addr;
+	vfid = id->vfid;
+	if (vfid >= SSO_MAX_VHWS) {
+		ssovf_log_err("Invalid vfid(%d/%d)", vfid, SSO_MAX_VHWS);
+		return -EINVAL;
+	}
+
+	res = &sdev.hws[vfid];
+	res->vfid = vfid;
+	res->bar0 = pci_dev->mem_resource[0].addr;
+	res->bar2 = pci_dev->mem_resource[2].addr;
+	res->bar4 = pci_dev->mem_resource[4].addr;
+	res->domain = id->domain;
+
+	sdev.total_ssowvfs++;
+	rte_wmb();
+	ssovf_log_dbg("Domain=%d hws=%d total_ssowvfs=%d", res->domain,
+			res->vfid, sdev.total_ssowvfs);
+	return 0;
+}
+
+static const struct rte_pci_id pci_ssowvf_map[] = {
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+				PCI_DEVICE_ID_OCTEONTX_SSOWS_VF)
+	},
+	{
+		.vendor_id = 0,
+	},
+};
+
+static struct rte_pci_driver pci_ssowvf = {
+	.id_table = pci_ssowvf_map,
+	.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
+	.probe = ssowvf_probe,
+};
+
+RTE_PMD_REGISTER_PCI(octeontx_ssowvf, pci_ssowvf);
+
 /* SSOVF pcie device aka event queue probe */
 
 static int
-- 
2.5.5

[PATCH v2 04/38] event/octeontx: add vdev interface functions

[Jerin Jacob]

ssovf and ssowvf PCIe VF devices are shared
between eventdev PMD and ethdev PMD. This patch
expose a set of interface API to get info
about probed ssovf and ssowvf VF resources to use
with eventdev and ethdev vdev devices latter.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
v2:
added -ENODEV return to octeontx_ssovf_info()
---
 drivers/event/octeontx/Makefile                    |  3 +
 drivers/event/octeontx/rte_pmd_octeontx_ssovf.h    | 53 ++++++++++++++
 .../octeontx/rte_pmd_octeontx_ssovf_version.map    |  4 ++
 drivers/event/octeontx/ssovf_evdev.h               |  2 +
 drivers/event/octeontx/ssovf_probe.c               | 84 ++++++++++++++++++++++
 5 files changed, 146 insertions(+)
 create mode 100644 drivers/event/octeontx/rte_pmd_octeontx_ssovf.h

diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile
index d72ad46..896e556 100644
--- a/drivers/event/octeontx/Makefile
+++ b/drivers/event/octeontx/Makefile
@@ -48,6 +48,9 @@ LIBABIVER := 1
 #
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_probe.c
 
+# install this header file
+SYMLINK-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)-include := rte_pmd_octeontx_ssovf.h
+
 # this lib depends upon:
 DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += lib/librte_eal
 DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += lib/librte_eventdev
diff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h b/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
new file mode 100644
index 0000000..e92a61f
--- /dev/null
+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
@@ -0,0 +1,53 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2017.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __RTE_PMD_OCTEONTX_SSOVF_H__
+#define __RTE_PMD_OCTEONTX_SSOVF_H__
+
+#include <rte_common.h>
+
+struct octeontx_ssovf_info {
+	uint16_t domain; /* Domain id */
+	uint8_t total_ssovfs; /* Total sso groups available in domain */
+	uint8_t total_ssowvfs;/* Total sso hws available in domain */
+};
+
+enum octeontx_ssovf_type {
+	OCTEONTX_SSO_GROUP, /* SSO group vf */
+	OCTEONTX_SSO_HWS,  /* SSO hardware workslot vf */
+};
+
+
+int octeontx_ssovf_info(struct octeontx_ssovf_info *info);
+void *octeontx_ssovf_bar(enum octeontx_ssovf_type, uint8_t id, uint8_t bar);
+
+#endif /* __RTE_PMD_OCTEONTX_SSOVF_H__ */
diff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
index 8591cc0..c71d4c7 100644
--- a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
@@ -1,4 +1,8 @@
 DPDK_17.05 {
+	global:
+
+	octeontx_ssovf_info;
+	octeontx_ssovf_bar;
 
 	local: *;
 };
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 0a3c76e..c2b8187 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -36,6 +36,8 @@
 #include <rte_config.h>
 #include <rte_io.h>
 
+#include "rte_pmd_octeontx_ssovf.h"
+
 #define EVENTDEV_NAME_OCTEONTX_PMD event_octeontx
 
 #ifdef RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG
diff --git a/drivers/event/octeontx/ssovf_probe.c b/drivers/event/octeontx/ssovf_probe.c
index 7033ff5..b644ebd 100644
--- a/drivers/event/octeontx/ssovf_probe.c
+++ b/drivers/event/octeontx/ssovf_probe.c
@@ -67,6 +67,90 @@ struct ssodev {
 
 static struct ssodev sdev;
 
+/* Interface functions */
+int
+octeontx_ssovf_info(struct octeontx_ssovf_info *info)
+{
+	uint8_t i;
+	uint16_t domain;
+
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY || info == NULL)
+		return -EINVAL;
+
+	if (sdev.total_ssovfs == 0 || sdev.total_ssowvfs == 0)
+		return -ENODEV;
+
+	domain = sdev.grp[0].domain;
+	for (i = 0; i < sdev.total_ssovfs; i++) {
+		/* Check vfid's are contiguous and belong to same domain */
+		if (sdev.grp[i].vfid != i ||
+			sdev.grp[i].bar0 == NULL ||
+			sdev.grp[i].domain != domain) {
+			ssovf_log_err("GRP error, vfid=%d/%d domain=%d/%d %p",
+				i, sdev.grp[i].vfid,
+				domain, sdev.grp[i].domain,
+				sdev.grp[i].bar0);
+			return -EINVAL;
+		}
+	}
+
+	for (i = 0; i < sdev.total_ssowvfs; i++) {
+		/* Check vfid's are contiguous and belong to same domain */
+		if (sdev.hws[i].vfid != i ||
+			sdev.hws[i].bar0 == NULL ||
+			sdev.hws[i].domain != domain) {
+			ssovf_log_err("HWS error, vfid=%d/%d domain=%d/%d %p",
+				i, sdev.hws[i].vfid,
+				domain, sdev.hws[i].domain,
+				sdev.hws[i].bar0);
+			return -EINVAL;
+		}
+	}
+
+	info->domain = domain;
+	info->total_ssovfs = sdev.total_ssovfs;
+	info->total_ssowvfs = sdev.total_ssowvfs;
+	return 0;
+}
+
+void*
+octeontx_ssovf_bar(enum octeontx_ssovf_type type, uint8_t id, uint8_t bar)
+{
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY ||
+			type > OCTEONTX_SSO_HWS)
+		return NULL;
+
+	if (type == OCTEONTX_SSO_GROUP) {
+		if (id >= sdev.total_ssovfs)
+			return NULL;
+	} else {
+		if (id >= sdev.total_ssowvfs)
+			return NULL;
+	}
+
+	if (type == OCTEONTX_SSO_GROUP) {
+		switch (bar) {
+		case 0:
+			return sdev.grp[id].bar0;
+		case 2:
+			return sdev.grp[id].bar2;
+		default:
+			return NULL;
+		}
+	} else {
+		switch (bar) {
+		case 0:
+			return sdev.hws[id].bar0;
+		case 2:
+			return sdev.hws[id].bar2;
+		case 4:
+			return sdev.hws[id].bar4;
+		default:
+			return NULL;
+		}
+	}
+}
+
 /* SSOWVF pcie device aka event port probe */
 
 static int
-- 
2.5.5

[PATCH v2 05/38] event/octeontx: add mailbox support

[Jerin Jacob]

ssovf VF device has mailbox mechanism to communicate
with PF device. This patch adds support for a mbox API to
send the mailbox request to PF device.
The ssovf VF device will be used as the communication channel
to talk to PF devices of all the network accelerated
co-processors in Octeontx. Exposing as shared function to
use it from pool, crypto, network devices.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
v2:
- Fixed incorrect mbox wait time(Gage)
http://dpdk.org/dev/patchwork/patch/21366/
- Improved the mbox timeout handling(Gage)
http://dpdk.org/dev/patchwork/patch/21366/
- fix free bsd and clang build issues
---
 drivers/event/octeontx/Makefile                    |   1 +
 drivers/event/octeontx/rte_pmd_octeontx_ssovf.h    |   8 +
 .../octeontx/rte_pmd_octeontx_ssovf_version.map    |   1 +
 drivers/event/octeontx/ssovf_mbox.c                | 232 +++++++++++++++++++++
 4 files changed, 242 insertions(+)
 create mode 100644 drivers/event/octeontx/ssovf_mbox.c

diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile
index 896e556..3076b85 100644
--- a/drivers/event/octeontx/Makefile
+++ b/drivers/event/octeontx/Makefile
@@ -47,6 +47,7 @@ LIBABIVER := 1
 # all source are stored in SRCS-y
 #
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_probe.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_mbox.c
 
 # install this header file
 SYMLINK-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)-include := rte_pmd_octeontx_ssovf.h
diff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h b/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
index e92a61f..3da7cfd 100644
--- a/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
@@ -46,8 +46,16 @@ enum octeontx_ssovf_type {
 	OCTEONTX_SSO_HWS,  /* SSO hardware workslot vf */
 };
 
+struct octeontx_mbox_hdr {
+	uint16_t vfid;  /* VF index or pf resource index local to the domain */
+	uint8_t coproc; /* Coprocessor id */
+	uint8_t msg;    /* Message id */
+	uint8_t res_code; /* Functional layer response code */
+};
 
 int octeontx_ssovf_info(struct octeontx_ssovf_info *info);
 void *octeontx_ssovf_bar(enum octeontx_ssovf_type, uint8_t id, uint8_t bar);
+int octeontx_ssovf_mbox_send(struct octeontx_mbox_hdr *hdr,
+		void *txdata, uint16_t txlen, void *rxdata, uint16_t rxlen);
 
 #endif /* __RTE_PMD_OCTEONTX_SSOVF_H__ */
diff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
index c71d4c7..3810a03 100644
--- a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
@@ -3,6 +3,7 @@ DPDK_17.05 {
 
 	octeontx_ssovf_info;
 	octeontx_ssovf_bar;
+	octeontx_ssovf_mbox_send;
 
 	local: *;
 };
diff --git a/drivers/event/octeontx/ssovf_mbox.c b/drivers/event/octeontx/ssovf_mbox.c
new file mode 100644
index 0000000..0435f6d
--- /dev/null
+++ b/drivers/event/octeontx/ssovf_mbox.c
@@ -0,0 +1,232 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2017.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <string.h>
+
+#include <rte_atomic.h>
+#include <rte_common.h>
+#include <rte_cycles.h>
+#include <rte_io.h>
+#include <rte_spinlock.h>
+
+#include "ssovf_evdev.h"
+
+/* Mbox operation timeout in seconds */
+#define MBOX_WAIT_TIME_SEC      3
+#define MAX_RAM_MBOX_LEN	((SSOW_BAR4_LEN >> 1) - 8 /* Mbox header */)
+
+/* Mbox channel state */
+enum {
+	MBOX_CHAN_STATE_REQ = 1,
+	MBOX_CHAN_STATE_RES = 0,
+};
+
+/* Response messages */
+enum {
+	MBOX_RET_SUCCESS,
+	MBOX_RET_INVALID,
+	MBOX_RET_INTERNAL_ERR,
+};
+
+struct mbox {
+	int init_once;
+	uint8_t *ram_mbox_base; /* Base address of mbox message stored in ram */
+	uint8_t *reg; /* Store to this register triggers PF mbox interrupt */
+	uint16_t tag_own; /* Last tag which was written to own channel */
+	rte_spinlock_t lock;
+};
+
+static struct mbox octeontx_mbox;
+
+/*
+ * Structure used for mbox synchronization
+ * This structure sits at the begin of Mbox RAM and used as main
+ * synchronization point for channel communication
+ */
+struct mbox_ram_hdr {
+	union {
+		uint64_t u64;
+		struct {
+			uint8_t chan_state : 1;
+			uint8_t coproc : 7;
+			uint8_t msg;
+			uint8_t vfid;
+			uint8_t res_code;
+			uint16_t tag;
+			uint16_t len;
+		};
+	};
+};
+
+static inline void
+mbox_send_request(struct mbox *m, struct octeontx_mbox_hdr *hdr,
+			const void *txmsg, uint16_t txsize)
+{
+	struct mbox_ram_hdr old_hdr;
+	struct mbox_ram_hdr new_hdr = {.u64 = 0};
+	uint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base;
+	uint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct mbox_ram_hdr);
+
+	/*
+	 * Initialize the channel with the tag left by last send.
+	 * On success full mbox send complete, PF increments the tag by one.
+	 * The sender can validate integrity of PF message with this scheme
+	 */
+	old_hdr.u64 = rte_read64(ram_mbox_hdr);
+	m->tag_own = (old_hdr.tag + 2) & (~0x1ul); /* next even number */
+
+	/* Copy msg body */
+	if (txmsg)
+		memcpy(ram_mbox_msg, txmsg, txsize);
+
+	/* Prepare new hdr */
+	new_hdr.chan_state = MBOX_CHAN_STATE_REQ;
+	new_hdr.coproc = hdr->coproc;
+	new_hdr.msg = hdr->msg;
+	new_hdr.vfid = hdr->vfid;
+	new_hdr.tag = m->tag_own;
+	new_hdr.len = txsize;
+
+	/* Write the msg header */
+	rte_write64(new_hdr.u64, ram_mbox_hdr);
+	rte_io_wmb();
+	/* Notify PF about the new msg - write to MBOX reg generates PF IRQ */
+	rte_write64(0, m->reg);
+}
+
+static inline int
+mbox_wait_response(struct mbox *m, struct octeontx_mbox_hdr *hdr,
+			void *rxmsg, uint16_t rxsize)
+{
+	int res = 0, wait;
+	uint16_t len;
+	struct mbox_ram_hdr rx_hdr;
+	uint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base;
+	uint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct mbox_ram_hdr);
+
+	/* Wait for response */
+	wait = MBOX_WAIT_TIME_SEC * 1000 * 10;
+	while (wait > 0) {
+		rte_delay_us(100);
+		rx_hdr.u64 = rte_read64(ram_mbox_hdr);
+		if (rx_hdr.chan_state == MBOX_CHAN_STATE_RES)
+			break;
+		--wait;
+	}
+
+	hdr->res_code = rx_hdr.res_code;
+	m->tag_own++;
+
+	/* Timeout */
+	if (wait <= 0) {
+		res = -ETIMEDOUT;
+		goto error;
+	}
+
+	/* Tag mismatch */
+	if (m->tag_own != rx_hdr.tag) {
+		res = -EINVAL;
+		goto error;
+	}
+
+	/* PF nacked the msg */
+	if (rx_hdr.res_code != MBOX_RET_SUCCESS) {
+		res = -EBADMSG;
+		goto error;
+	}
+
+	len = RTE_MIN(rx_hdr.len, rxsize);
+	if (rxmsg)
+		memcpy(rxmsg, ram_mbox_msg, len);
+
+	return len;
+
+error:
+	ssovf_log_err("Failed to send mbox(%d/%d) coproc=%d msg=%d ret=(%d,%d)",
+			m->tag_own, rx_hdr.tag, hdr->msg, hdr->coproc, res,
+			hdr->res_code);
+	return res;
+}
+
+static inline int
+mbox_send(struct mbox *m, struct octeontx_mbox_hdr *hdr, const void *txmsg,
+		uint16_t txsize, void *rxmsg, uint16_t rxsize)
+{
+	int res = -EINVAL;
+
+	if (m->init_once == 0 || hdr == NULL ||
+		txsize > MAX_RAM_MBOX_LEN || rxsize > MAX_RAM_MBOX_LEN) {
+		ssovf_log_err("Invalid init_once=%d hdr=%p txsz=%d rxsz=%d",
+				m->init_once, hdr, txsize, rxsize);
+		return res;
+	}
+
+	rte_spinlock_lock(&m->lock);
+
+	mbox_send_request(m, hdr, txmsg, txsize);
+	res = mbox_wait_response(m, hdr, rxmsg, rxsize);
+
+	rte_spinlock_unlock(&m->lock);
+	return res;
+}
+
+static inline int
+mbox_setup(struct mbox *m)
+{
+	if (unlikely(m->init_once == 0)) {
+		rte_spinlock_init(&m->lock);
+		m->ram_mbox_base = octeontx_ssovf_bar(OCTEONTX_SSO_HWS, 0, 4);
+		m->reg = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, 0, 0);
+		m->reg += SSO_VHGRP_PF_MBOX(1);
+
+		if (m->ram_mbox_base == NULL || m->reg == NULL) {
+			ssovf_log_err("Invalid ram_mbox_base=%p or reg=%p",
+				m->ram_mbox_base, m->reg);
+			return -EINVAL;
+		}
+		m->init_once = 1;
+	}
+	return 0;
+}
+
+int
+octeontx_ssovf_mbox_send(struct octeontx_mbox_hdr *hdr, void *txdata,
+				 uint16_t txlen, void *rxdata, uint16_t rxlen)
+{
+	struct mbox *m = &octeontx_mbox;
+
+	RTE_BUILD_BUG_ON(sizeof(struct mbox_ram_hdr) != 8);
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY || mbox_setup(m))
+		return -EINVAL;
+
+	return mbox_send(m, hdr, txdata, txlen, rxdata, rxlen);
+}
-- 
2.5.5

[PATCH v2 06/38] event/octeontx: add octeontx eventdev driver

[Jerin Jacob]

This adds the minimal changes to allow a octeontx eventdev
implementation to be compiled, linked and created at run time.
The eventdev does nothing, but can be created via vdev
on command line, e.g.

sudo ./build/app/test -c 0xff00 --vdev=event_octeontx
...
Initializing event_octeontx domain=4 max_queues=64 max_ports=32
RTE>>

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
 drivers/event/octeontx/Makefile      |   1 +
 drivers/event/octeontx/ssovf_evdev.c | 148 +++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h |  23 ++++++
 3 files changed, 172 insertions(+)
 create mode 100644 drivers/event/octeontx/ssovf_evdev.c

diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile
index 3076b85..6e8227b 100644
--- a/drivers/event/octeontx/Makefile
+++ b/drivers/event/octeontx/Makefile
@@ -46,6 +46,7 @@ LIBABIVER := 1
 #
 # all source are stored in SRCS-y
 #
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_evdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_probe.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_mbox.c
 
diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
new file mode 100644
index 0000000..b349adc
--- /dev/null
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -0,0 +1,148 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2017.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <rte_common.h>
+#include <rte_debug.h>
+#include <rte_dev.h>
+#include <rte_eal.h>
+#include <rte_lcore.h>
+#include <rte_log.h>
+#include <rte_malloc.h>
+#include <rte_memory.h>
+#include <rte_memzone.h>
+#include <rte_vdev.h>
+
+#include "ssovf_evdev.h"
+
+/* SSOPF Mailbox messages */
+
+struct ssovf_mbox_dev_info {
+	uint64_t min_deq_timeout_ns;
+	uint64_t max_deq_timeout_ns;
+	uint32_t max_num_events;
+};
+
+static int
+ssovf_mbox_dev_info(struct ssovf_mbox_dev_info *info)
+{
+	struct octeontx_mbox_hdr hdr = {0};
+	uint16_t len = sizeof(struct ssovf_mbox_dev_info);
+
+	hdr.coproc = SSO_COPROC;
+	hdr.msg = SSO_GET_DEV_INFO;
+	hdr.vfid = 0;
+
+	memset(info, 0, len);
+	return octeontx_ssovf_mbox_send(&hdr, NULL, 0, info, len);
+}
+
+static int
+ssovf_vdev_probe(const char *name, const char *params)
+{
+	struct octeontx_ssovf_info oinfo;
+	struct ssovf_mbox_dev_info info;
+	struct ssovf_evdev *edev;
+	struct rte_eventdev *eventdev;
+	static int ssovf_init_once;
+	int ret;
+
+	RTE_SET_USED(params);
+
+	/* More than one instance is not supported */
+	if (ssovf_init_once) {
+		ssovf_log_err("Request to create >1 %s instance", name);
+		return -EINVAL;
+	}
+
+	eventdev = rte_event_pmd_vdev_init(name, sizeof(struct ssovf_evdev),
+				rte_socket_id());
+	if (eventdev == NULL) {
+		ssovf_log_err("Failed to create eventdev vdev %s", name);
+		return -ENOMEM;
+	}
+	eventdev->dev_ops = NULL;
+
+	/* For secondary processes, the primary has done all the work */
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+		return 0;
+
+	ret = octeontx_ssovf_info(&oinfo);
+	if (ret) {
+		ssovf_log_err("Failed to probe and validate ssovfs %d", ret);
+		return ret;
+	}
+
+	edev = ssovf_pmd_priv(eventdev);
+	edev->max_event_ports = oinfo.total_ssowvfs;
+	edev->max_event_queues = oinfo.total_ssovfs;
+	edev->is_timeout_deq = 0;
+
+	ret = ssovf_mbox_dev_info(&info);
+	if (ret < 0 || ret != sizeof(struct ssovf_mbox_dev_info)) {
+		ssovf_log_err("Failed to get mbox devinfo %d", ret);
+		return ret;
+	}
+
+	edev->min_deq_timeout_ns = info.min_deq_timeout_ns;
+	edev->max_deq_timeout_ns = info.max_deq_timeout_ns;
+	edev->max_num_events =  info.max_num_events;
+	ssovf_log_dbg("min_deq_tmo=%"PRId64" max_deq_tmo=%"PRId64" max_evts=%d",
+			info.min_deq_timeout_ns, info.max_deq_timeout_ns,
+			info.max_num_events);
+
+	if (!edev->max_event_ports || !edev->max_event_queues) {
+		ssovf_log_err("Not enough eventdev resource queues=%d ports=%d",
+			edev->max_event_queues, edev->max_event_ports);
+		return -ENODEV;
+	}
+
+	ssovf_log_info("Initializing %s domain=%d max_queues=%d max_ports=%d\n",
+			name, oinfo.domain, edev->max_event_queues,
+			edev->max_event_ports);
+
+	ssovf_init_once = 1;
+	return 0;
+}
+
+static int
+ssovf_vdev_remove(const char *name)
+{
+	ssovf_log_info("Closing %s\n", name);
+	return rte_event_pmd_vdev_uninit(name);
+}
+
+static struct rte_vdev_driver vdev_ssovf_pmd = {
+	.probe = ssovf_vdev_probe,
+	.remove = ssovf_vdev_remove
+};
+
+RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_OCTEONTX_PMD, vdev_ssovf_pmd);
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index c2b8187..b8b89a7 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -34,6 +34,7 @@
 #define __SSOVF_EVDEV_H__
 
 #include <rte_config.h>
+#include <rte_eventdev_pmd.h>
 #include <rte_io.h>
 
 #include "rte_pmd_octeontx_ssovf.h"
@@ -108,4 +109,26 @@
 
 #define SSOW_BAR4_LEN                     (64 * 1024)
 
+/* Mailbox message constants */
+#define SSO_COPROC                        0x2
+
+#define SSO_GETDOMAINCFG                  0x1
+#define SSO_IDENTIFY                      0x2
+#define SSO_GET_DEV_INFO                  0x3
+
+struct ssovf_evdev {
+	uint8_t max_event_queues;
+	uint8_t max_event_ports;
+	uint8_t is_timeout_deq;
+	uint32_t min_deq_timeout_ns;
+	uint32_t max_deq_timeout_ns;
+	int32_t max_num_events;
+} __rte_cache_aligned;
+
+static inline struct ssovf_evdev *
+ssovf_pmd_priv(const struct rte_eventdev *eventdev)
+{
+	return eventdev->data->dev_private;
+}
+
 #endif /* __SSOVF_EVDEV_H__ */
-- 
2.5.5

[PATCH v2 07/38] event/octeontx: add device capabilities function

[Jerin Jacob]

Add the info_get function to return details on the queues, flow,
prioritization capabilities, etc. which this device has.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
v2:
- add newly introduced RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES in info_get
---
 drivers/event/octeontx/ssovf_evdev.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index b349adc..9608d9c 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -65,6 +65,32 @@ ssovf_mbox_dev_info(struct ssovf_mbox_dev_info *info)
 	return octeontx_ssovf_mbox_send(&hdr, NULL, 0, info, len);
 }
 
+static void
+ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+
+	dev_info->min_dequeue_timeout_ns = edev->min_deq_timeout_ns;
+	dev_info->max_dequeue_timeout_ns = edev->max_deq_timeout_ns;
+	dev_info->max_event_queues = edev->max_event_queues;
+	dev_info->max_event_queue_flows = (1ULL << 20);
+	dev_info->max_event_queue_priority_levels = 8;
+	dev_info->max_event_priority_levels = 1;
+	dev_info->max_event_ports = edev->max_event_ports;
+	dev_info->max_event_port_dequeue_depth = 1;
+	dev_info->max_event_port_enqueue_depth = 1;
+	dev_info->max_num_events =  edev->max_num_events;
+	dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_QUEUE_QOS |
+					RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
+					RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES;
+}
+
+
+/* Initialize and register event driver with DPDK Application */
+static const struct rte_eventdev_ops ssovf_ops = {
+	.dev_infos_get    = ssovf_info_get,
+};
+
 static int
 ssovf_vdev_probe(const char *name, const char *params)
 {
@@ -89,7 +115,7 @@ ssovf_vdev_probe(const char *name, const char *params)
 		ssovf_log_err("Failed to create eventdev vdev %s", name);
 		return -ENOMEM;
 	}
-	eventdev->dev_ops = NULL;
+	eventdev->dev_ops = &ssovf_ops;
 
 	/* For secondary processes, the primary has done all the work */
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
-- 
2.5.5

[PATCH v2 08/38] event/octeontx: add configure function

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
v2:
- Improved the timeout accuracy(Gage) 

Improved the timeout accuracy by invoking
ssovf_mbox_getwork_tmo_set(edev->min_deq_timeout_ns) in
ssovf_configure if RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT
flag is set

http://dpdk.org/dev/patchwork/patch/21377/
---
 drivers/event/octeontx/ssovf_evdev.c | 44 ++++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h |  4 ++++
 2 files changed, 48 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index 9608d9c..b66d957 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -65,6 +65,30 @@ ssovf_mbox_dev_info(struct ssovf_mbox_dev_info *info)
 	return octeontx_ssovf_mbox_send(&hdr, NULL, 0, info, len);
 }
 
+struct ssovf_mbox_getwork_wait {
+	uint64_t wait_ns;
+};
+
+static int
+ssovf_mbox_getwork_tmo_set(uint32_t timeout_ns)
+{
+	struct octeontx_mbox_hdr hdr = {0};
+	struct ssovf_mbox_getwork_wait tmo_set;
+	uint16_t len = sizeof(struct ssovf_mbox_getwork_wait);
+	int ret;
+
+	hdr.coproc = SSO_COPROC;
+	hdr.msg = SSO_SET_GETWORK_WAIT;
+	hdr.vfid = 0;
+
+	tmo_set.wait_ns = timeout_ns;
+	ret = octeontx_ssovf_mbox_send(&hdr, &tmo_set, len, NULL, 0);
+	if (ret)
+		ssovf_log_err("Failed to set getwork timeout(%d)", ret);
+
+	return ret;
+}
+
 static void
 ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
 {
@@ -85,10 +109,30 @@ ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
 					RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES;
 }
 
+static int
+ssovf_configure(const struct rte_eventdev *dev)
+{
+	struct rte_event_dev_config *conf = &dev->data->dev_conf;
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+	uint64_t deq_tmo_ns;
+
+	ssovf_func_trace();
+	deq_tmo_ns = conf->dequeue_timeout_ns;
+
+	if (conf->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT) {
+		edev->is_timeout_deq = 1;
+		deq_tmo_ns = edev->min_deq_timeout_ns;
+	}
+	edev->nb_event_queues = conf->nb_event_queues;
+	edev->nb_event_ports = conf->nb_event_ports;
+
+	return ssovf_mbox_getwork_tmo_set(deq_tmo_ns);
+}
 
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
+	.dev_configure    = ssovf_configure,
 };
 
 static int
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index b8b89a7..1c36923 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -115,11 +115,15 @@
 #define SSO_GETDOMAINCFG                  0x1
 #define SSO_IDENTIFY                      0x2
 #define SSO_GET_DEV_INFO                  0x3
+#define SSO_GET_GETWORK_WAIT              0x4
+#define SSO_SET_GETWORK_WAIT              0x5
 
 struct ssovf_evdev {
 	uint8_t max_event_queues;
 	uint8_t max_event_ports;
 	uint8_t is_timeout_deq;
+	uint8_t nb_event_queues;
+	uint8_t nb_event_ports;
 	uint32_t min_deq_timeout_ns;
 	uint32_t max_deq_timeout_ns;
 	int32_t max_num_events;
-- 
2.5.5

[PATCH v2 09/38] event/octeontx: add support for event queues

[Jerin Jacob]

Pretty much everything done in HW. Need to configure
the priority associated with event queue aka sso group
through a mailbox request to PF

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
- Remove RTE_EVENT_QUEUE_CFG_DEFAULT flag to 
sync with next-eventdev master
---
 drivers/event/octeontx/ssovf_evdev.c | 63 ++++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h |  2 ++
 2 files changed, 65 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index b66d957..a6a2202 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -89,6 +89,36 @@ ssovf_mbox_getwork_tmo_set(uint32_t timeout_ns)
 	return ret;
 }
 
+struct ssovf_mbox_grp_pri {
+	uint8_t wgt_left; /* Read only */
+	uint8_t weight;
+	uint8_t affinity;
+	uint8_t priority;
+};
+
+static int
+ssovf_mbox_priority_set(uint8_t queue, uint8_t prio)
+{
+	struct octeontx_mbox_hdr hdr = {0};
+	struct ssovf_mbox_grp_pri grp;
+	uint16_t len = sizeof(struct ssovf_mbox_grp_pri);
+	int ret;
+
+	hdr.coproc = SSO_COPROC;
+	hdr.msg = SSO_GRP_SET_PRIORITY;
+	hdr.vfid = queue;
+
+	grp.weight = 0xff;
+	grp.affinity = 0xff;
+	grp.priority = prio / 32; /* Normalize to 0 to 7 */
+
+	ret = octeontx_ssovf_mbox_send(&hdr, &grp, len, NULL, 0);
+	if (ret)
+		ssovf_log_err("Failed to set grp=%d prio=%d", queue, prio);
+
+	return ret;
+}
+
 static void
 ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
 {
@@ -129,10 +159,43 @@ ssovf_configure(const struct rte_eventdev *dev)
 	return ssovf_mbox_getwork_tmo_set(deq_tmo_ns);
 }
 
+static void
+ssovf_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
+				 struct rte_event_queue_conf *queue_conf)
+{
+	RTE_SET_USED(dev);
+	RTE_SET_USED(queue_id);
+
+	queue_conf->nb_atomic_flows = (1ULL << 20);
+	queue_conf->nb_atomic_order_sequences = (1ULL << 20);
+	queue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_ALL_TYPES;
+	queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
+}
+
+static void
+ssovf_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
+{
+	RTE_SET_USED(dev);
+	RTE_SET_USED(queue_id);
+}
+
+static int
+ssovf_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
+			      const struct rte_event_queue_conf *queue_conf)
+{
+	RTE_SET_USED(dev);
+	ssovf_func_trace("queue=%d prio=%d", queue_id, queue_conf->priority);
+
+	return ssovf_mbox_priority_set(queue_id, queue_conf->priority);
+}
+
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
 	.dev_configure    = ssovf_configure,
+	.queue_def_conf   = ssovf_queue_def_conf,
+	.queue_setup      = ssovf_queue_setup,
+	.queue_release    = ssovf_queue_release,
 };
 
 static int
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 1c36923..d0f5d85 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -117,6 +117,8 @@
 #define SSO_GET_DEV_INFO                  0x3
 #define SSO_GET_GETWORK_WAIT              0x4
 #define SSO_SET_GETWORK_WAIT              0x5
+#define SSO_GRP_GET_PRIORITY              0x7
+#define SSO_GRP_SET_PRIORITY              0x8
 
 struct ssovf_evdev {
 	uint8_t max_event_queues;
-- 
2.5.5

[PATCH v2 10/38] event/octeontx: add support for event ports

[Jerin Jacob]

Add in the data-structures for the ports used by workers
to sent events to/from the HW scheduler. Also add a
function to release the resource allocated in setup

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 74 ++++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h | 11 ++++++
 2 files changed, 85 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index a6a2202..6781f00 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -189,6 +189,77 @@ ssovf_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
 	return ssovf_mbox_priority_set(queue_id, queue_conf->priority);
 }
 
+static void
+ssovf_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
+				 struct rte_event_port_conf *port_conf)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+
+	RTE_SET_USED(port_id);
+	port_conf->new_event_threshold = edev->max_num_events;
+	port_conf->dequeue_depth = 1;
+	port_conf->enqueue_depth = 1;
+}
+
+static void
+ssovf_port_release(void *port)
+{
+	rte_free(port);
+}
+
+static int
+ssovf_port_setup(struct rte_eventdev *dev, uint8_t port_id,
+				const struct rte_event_port_conf *port_conf)
+{
+	struct ssows *ws;
+	uint32_t reg_off;
+	uint8_t q;
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+
+	ssovf_func_trace("port=%d", port_id);
+	RTE_SET_USED(port_conf);
+
+	/* Free memory prior to re-allocation if needed */
+	if (dev->data->ports[port_id] != NULL) {
+		ssovf_port_release(dev->data->ports[port_id]);
+		dev->data->ports[port_id] = NULL;
+	}
+
+	/* Allocate event port memory */
+	ws = rte_zmalloc_socket("eventdev ssows",
+			sizeof(struct ssows), RTE_CACHE_LINE_SIZE,
+			dev->data->socket_id);
+	if (ws == NULL) {
+		ssovf_log_err("Failed to alloc memory for port=%d", port_id);
+		return -ENOMEM;
+	}
+
+	ws->base = octeontx_ssovf_bar(OCTEONTX_SSO_HWS, port_id, 0);
+	if (ws->base == NULL) {
+		rte_free(ws);
+		ssovf_log_err("Failed to get hws base addr port=%d", port_id);
+		return -EINVAL;
+	}
+
+	reg_off = SSOW_VHWS_OP_GET_WORK0;
+	reg_off |= 1 << 4; /* Index_ggrp_mask (Use maskset zero) */
+	reg_off |= 1 << 16; /* Wait */
+	ws->getwork = ws->base + reg_off;
+	ws->port = port_id;
+
+	for (q = 0; q < edev->nb_event_queues; q++) {
+		ws->grps[q] = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, q, 2);
+		if (ws->grps[q] == NULL) {
+			rte_free(ws);
+			ssovf_log_err("Failed to get grp%d base addr", q);
+			return -EINVAL;
+		}
+	}
+
+	dev->data->ports[port_id] = ws;
+	ssovf_log_dbg("port=%d ws=%p", port_id, ws);
+	return 0;
+}
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -196,6 +267,9 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.queue_def_conf   = ssovf_queue_def_conf,
 	.queue_setup      = ssovf_queue_setup,
 	.queue_release    = ssovf_queue_release,
+	.port_def_conf    = ssovf_port_def_conf,
+	.port_setup       = ssovf_port_setup,
+	.port_release     = ssovf_port_release,
 };
 
 static int
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index d0f5d85..eda0e37 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -131,6 +131,17 @@ struct ssovf_evdev {
 	int32_t max_num_events;
 } __rte_cache_aligned;
 
+/* Event port aka HWS */
+struct ssows {
+	uint8_t cur_tt;
+	uint8_t cur_grp;
+	uint8_t swtag_req;
+	uint8_t *base;
+	uint8_t *getwork;
+	uint8_t *grps[SSO_MAX_VHGRP];
+	uint8_t port;
+} __rte_cache_aligned;
+
 static inline struct ssovf_evdev *
 ssovf_pmd_priv(const struct rte_eventdev *eventdev)
 {
-- 
2.5.5

[PATCH v2 11/38] event/octeontx: add support for linking queues to ports

[Jerin Jacob]

queues to port link and unlink establishment is through
setting/resetting the queue/group membership in
SSOW_VHWS_GRPMSK_CHGX

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 42 ++++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h |  8 +++++++
 2 files changed, 50 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index 6781f00..78b0f26 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -260,6 +260,46 @@ ssovf_port_setup(struct rte_eventdev *dev, uint8_t port_id,
 	ssovf_log_dbg("port=%d ws=%p", port_id, ws);
 	return 0;
 }
+
+static int
+ssovf_port_link(struct rte_eventdev *dev, void *port, const uint8_t queues[],
+		const uint8_t priorities[], uint16_t nb_links)
+{
+	uint16_t link;
+	uint64_t val;
+	struct ssows *ws = port;
+
+	ssovf_func_trace("port=%d nb_links=%d", ws->port, nb_links);
+	RTE_SET_USED(dev);
+	RTE_SET_USED(priorities);
+
+	for (link = 0; link < nb_links; link++) {
+		val = queues[link];
+		val |= (1ULL << 24); /* Set membership */
+		ssovf_write64(val, ws->base + SSOW_VHWS_GRPMSK_CHGX(0));
+	}
+	return (int)nb_links;
+}
+
+static int
+ssovf_port_unlink(struct rte_eventdev *dev, void *port, uint8_t queues[],
+			uint16_t nb_unlinks)
+{
+	uint16_t unlink;
+	uint64_t val;
+	struct ssows *ws = port;
+
+	ssovf_func_trace("port=%d nb_links=%d", ws->port, nb_unlinks);
+	RTE_SET_USED(dev);
+
+	for (unlink = 0; unlink < nb_unlinks; unlink++) {
+		val = queues[unlink];
+		val &= ~(1ULL << 24); /* Clear membership */
+		ssovf_write64(val, ws->base + SSOW_VHWS_GRPMSK_CHGX(0));
+	}
+	return (int)nb_unlinks;
+}
+
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -270,6 +310,8 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.port_def_conf    = ssovf_port_def_conf,
 	.port_setup       = ssovf_port_setup,
 	.port_release     = ssovf_port_release,
+	.port_link        = ssovf_port_link,
+	.port_unlink      = ssovf_port_unlink,
 };
 
 static int
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index eda0e37..9a6bac5 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -120,6 +120,14 @@
 #define SSO_GRP_GET_PRIORITY              0x7
 #define SSO_GRP_SET_PRIORITY              0x8
 
+/*
+ * In Cavium OcteonTX SoC, all accesses to the device registers are
+ * implictly strongly ordered. So, The relaxed version of IO operation is
+ * safe to use with out any IO memory barriers.
+ */
+#define ssovf_read64 rte_read64_relaxed
+#define ssovf_write64 rte_write64_relaxed
+
 struct ssovf_evdev {
 	uint8_t max_event_queues;
 	uint8_t max_event_ports;
-- 
2.5.5

[PATCH v2 12/38] event/octeontx: add support dequeue timeout tick conversion

[Jerin Jacob]

SSO co-processor runs at a different frequency than core clock.
Request PF to convert the ns to SSO get_work timeout period.
On dequeue, If device is configured with
RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT configuration then
use different fast path dequeue handler to wait till requested
amount of nanosecond if the event is not available.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 38 ++++++++++++++++++++++++++++++++++++
 drivers/event/octeontx/ssovf_evdev.h |  1 +
 2 files changed, 39 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index 78b0f26..1f3996d 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -119,6 +119,35 @@ ssovf_mbox_priority_set(uint8_t queue, uint8_t prio)
 	return ret;
 }
 
+struct ssovf_mbox_convert_ns_getworks_iter {
+	uint64_t wait_ns;
+	uint32_t getwork_iter;/* Get_work iterations for the given wait_ns */
+};
+
+static int
+ssovf_mbox_timeout_ticks(uint64_t ns, uint64_t *tmo_ticks)
+{
+	struct octeontx_mbox_hdr hdr = {0};
+	struct ssovf_mbox_convert_ns_getworks_iter ns2iter;
+	uint16_t len = sizeof(ns2iter);
+	int ret;
+
+	hdr.coproc = SSO_COPROC;
+	hdr.msg = SSO_CONVERT_NS_GETWORK_ITER;
+	hdr.vfid = 0;
+
+	memset(&ns2iter, 0, len);
+	ns2iter.wait_ns = ns;
+	ret = octeontx_ssovf_mbox_send(&hdr, &ns2iter, len, &ns2iter, len);
+	if (ret < 0 || (ret != len)) {
+		ssovf_log_err("Failed to get tmo ticks ns=%"PRId64"", ns);
+		return -EIO;
+	}
+
+	*tmo_ticks = ns2iter.getwork_iter;
+	return 0;
+}
+
 static void
 ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
 {
@@ -300,6 +329,14 @@ ssovf_port_unlink(struct rte_eventdev *dev, void *port, uint8_t queues[],
 	return (int)nb_unlinks;
 }
 
+static int
+ssovf_timeout_ticks(struct rte_eventdev *dev, uint64_t ns, uint64_t *tmo_ticks)
+{
+	RTE_SET_USED(dev);
+
+	return ssovf_mbox_timeout_ticks(ns, tmo_ticks);
+}
+
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -312,6 +349,7 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.port_release     = ssovf_port_release,
 	.port_link        = ssovf_port_link,
 	.port_unlink      = ssovf_port_unlink,
+	.timeout_ticks    = ssovf_timeout_ticks,
 };
 
 static int
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 9a6bac5..16bf3d5 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -117,6 +117,7 @@
 #define SSO_GET_DEV_INFO                  0x3
 #define SSO_GET_GETWORK_WAIT              0x4
 #define SSO_SET_GETWORK_WAIT              0x5
+#define SSO_CONVERT_NS_GETWORK_ITER       0x6
 #define SSO_GRP_GET_PRIORITY              0x7
 #define SSO_GRP_SET_PRIORITY              0x8
 
-- 
2.5.5

[PATCH v2 13/38] event/octeontx: add dump function for easier debugging

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 46 ++++++++++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index 1f3996d..4fb515c 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -337,6 +337,51 @@ ssovf_timeout_ticks(struct rte_eventdev *dev, uint64_t ns, uint64_t *tmo_ticks)
 	return ssovf_mbox_timeout_ticks(ns, tmo_ticks);
 }
 
+static void
+ssows_dump(struct ssows *ws, FILE *f)
+{
+	uint8_t *base = ws->base;
+	uint64_t val;
+
+	fprintf(f, "\t---------------port%d---------------\n", ws->port);
+	val = ssovf_read64(base + SSOW_VHWS_TAG);
+	fprintf(f, "\ttag=0x%x tt=%d head=%d tail=%d grp=%d index=%d tail=%d\n",
+		(uint32_t)(val & 0xffffffff), (int)(val >> 32) & 0x3,
+		(int)(val >> 34) & 0x1, (int)(val >> 35) & 0x1,
+		(int)(val >> 36) & 0x3ff, (int)(val >> 48) & 0x3ff,
+		(int)(val >> 63) & 0x1);
+
+	val = ssovf_read64(base + SSOW_VHWS_WQP);
+	fprintf(f, "\twqp=0x%"PRIx64"\n", val);
+
+	val = ssovf_read64(base + SSOW_VHWS_LINKS);
+	fprintf(f, "\tindex=%d valid=%d revlink=%d tail=%d head=%d grp=%d\n",
+		(int)(val & 0x3ff), (int)(val >> 10) & 0x1,
+		(int)(val >> 11) & 0x3ff, (int)(val >> 26) & 0x1,
+		(int)(val >> 27) & 0x1, (int)(val >> 28) & 0x3ff);
+
+	val = ssovf_read64(base + SSOW_VHWS_PENDTAG);
+	fprintf(f, "\tptag=0x%x ptt=%d pgwi=%d pdesc=%d pgw=%d pgww=%d ps=%d\n",
+		(uint32_t)(val & 0xffffffff), (int)(val >> 32) & 0x3,
+		(int)(val >> 56) & 0x1, (int)(val >> 58) & 0x1,
+		(int)(val >> 61) & 0x1, (int)(val >> 62) & 0x1,
+		(int)(val >> 63) & 0x1);
+
+	val = ssovf_read64(base + SSOW_VHWS_PENDWQP);
+	fprintf(f, "\tpwqp=0x%"PRIx64"\n", val);
+}
+
+static void
+ssovf_dump(struct rte_eventdev *dev, FILE *f)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+	uint8_t port;
+
+	/* Dump SSOWVF debug registers */
+	for (port = 0; port < edev->nb_event_ports; port++)
+		ssows_dump(dev->data->ports[port], f);
+}
+
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -350,6 +395,7 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.port_link        = ssovf_port_link,
 	.port_unlink      = ssovf_port_unlink,
 	.timeout_ticks    = ssovf_timeout_ticks,
+	.dump             = ssovf_dump,
 };
 
 static int
-- 
2.5.5

[PATCH v2 14/38] event/octeontx: add SSO HW device operations

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
 drivers/event/octeontx/Makefile       |   5 ++
 drivers/event/octeontx/ssovf_evdev.h  |  30 ++++++++
 drivers/event/octeontx/ssovf_worker.c | 124 ++++++++++++++++++++++++++++++++++
 3 files changed, 159 insertions(+)
 create mode 100644 drivers/event/octeontx/ssovf_worker.c

diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile
index 6e8227b..c921303 100644
--- a/drivers/event/octeontx/Makefile
+++ b/drivers/event/octeontx/Makefile
@@ -46,9 +46,14 @@ LIBABIVER := 1
 #
 # all source are stored in SRCS-y
 #
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_worker.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_evdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_probe.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_mbox.c
+ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
+CFLAGS_ssovf_worker.o += -fno-prefetch-loop-arrays
+endif
+CFLAGS_ssovf_worker.o += -Ofast
 
 # install this header file
 SYMLINK-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)-include := rte_pmd_octeontx_ssovf.h
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 16bf3d5..16846b8 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -129,6 +129,36 @@
 #define ssovf_read64 rte_read64_relaxed
 #define ssovf_write64 rte_write64_relaxed
 
+/* ARM64 specific functions */
+#if defined(RTE_ARCH_ARM64)
+#define ssovf_load_pair(val0, val1, addr) ({		\
+			asm volatile(			\
+			"ldp %x[x0], %x[x1], [%x[p1]]"	\
+			:[x0]"=r"(val0), [x1]"=r"(val1) \
+			:[p1]"r"(addr)			\
+			); })
+
+#define ssovf_store_pair(val0, val1, addr) ({		\
+			asm volatile(			\
+			"stp %x[x0], %x[x1], [%x[p1]]"	\
+			::[x0]"r"(val0), [x1]"r"(val1), [p1]"r"(addr) \
+			); })
+#else /* Un optimized functions for building on non arm64 arch */
+
+#define ssovf_load_pair(val0, val1, addr)		\
+do {							\
+	val0 = rte_read64(addr);			\
+	val1 = rte_read64(((uint8_t *)addr) + 8);	\
+} while (0)
+
+#define ssovf_store_pair(val0, val1, addr)		\
+do {							\
+	rte_write64(val0, addr);			\
+	rte_write64(val1, (((uint8_t *)addr) + 8));	\
+} while (0)
+#endif
+
+
 struct ssovf_evdev {
 	uint8_t max_event_queues;
 	uint8_t max_event_ports;
diff --git a/drivers/event/octeontx/ssovf_worker.c b/drivers/event/octeontx/ssovf_worker.c
new file mode 100644
index 0000000..052d158
--- /dev/null
+++ b/drivers/event/octeontx/ssovf_worker.c
@@ -0,0 +1,124 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2017.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include <rte_common.h>
+
+#include "ssovf_evdev.h"
+
+enum {
+	SSO_SYNC_ORDERED,
+	SSO_SYNC_ATOMIC,
+	SSO_SYNC_UNTAGGED,
+	SSO_SYNC_EMPTY
+};
+
+#ifndef force_inline
+#define force_inline inline __attribute__((always_inline))
+#endif
+
+#ifndef __hot
+#define __hot	__attribute__((hot))
+#endif
+
+/* SSO Operations */
+
+static force_inline uint16_t
+ssows_get_work(struct ssows *ws, struct rte_event *ev)
+{
+	uint64_t get_work0, get_work1;
+	uint64_t sched_type_queue;
+
+	ssovf_load_pair(get_work0, get_work1, ws->getwork);
+
+	sched_type_queue = (get_work0 >> 32) & 0xfff;
+	ws->cur_tt = sched_type_queue & 0x3;
+	ws->cur_grp = sched_type_queue >> 2;
+	sched_type_queue = sched_type_queue << 38;
+
+	ev->event = sched_type_queue | (get_work0 & 0xffffffff);
+	ev->u64 = get_work1;
+	return !!get_work1;
+}
+
+static force_inline void
+ssows_add_work(struct ssows *ws, const uint64_t event_ptr, const uint32_t tag,
+			const uint8_t new_tt, const uint8_t grp)
+{
+	uint64_t add_work0;
+
+	add_work0 = tag | ((uint64_t)(new_tt) << 32);
+	ssovf_store_pair(add_work0, event_ptr, ws->grps[grp]);
+}
+
+static force_inline void
+ssows_swtag_full(struct ssows *ws, const uint64_t event_ptr, const uint32_t tag,
+			const uint8_t new_tt, const uint8_t grp)
+{
+	uint64_t swtag_full0;
+
+	swtag_full0 = tag | ((uint64_t)(new_tt & 0x3) << 32) |
+				((uint64_t)grp << 34);
+	ssovf_store_pair(swtag_full0, event_ptr, (ws->base +
+				SSOW_VHWS_OP_SWTAG_FULL0));
+}
+
+static force_inline void
+ssows_swtag_norm(struct ssows *ws, uint32_t tag, uint8_t new_tt)
+{
+	uint64_t val;
+
+	val = tag | ((uint64_t)(new_tt & 0x3) << 32);
+	ssovf_write64(val, ws->base + SSOW_VHWS_OP_SWTAG_NORM);
+}
+
+static force_inline void
+ssows_swtag_untag(struct ssows *ws)
+{
+	ssovf_write64(0, ws->base + SSOW_VHWS_OP_SWTAG_UNTAG);
+	ws->cur_tt = SSO_SYNC_UNTAGGED;
+}
+
+static force_inline void
+ssows_desched(struct ssows *ws)
+{
+	ssovf_write64(0, ws->base + SSOW_VHWS_OP_DESCHED);
+}
+
+static force_inline void
+ssows_swtag_wait(struct ssows *ws)
+{
+	/* Wait for the SWTAG/SWTAG_FULL operation */
+	while (ssovf_read64(ws->base + SSOW_VHWS_SWTP))
+	;
+}
+
-- 
2.5.5

[PATCH v2 15/38] event/octeontx: add support worker enqueue function

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
 drivers/event/octeontx/ssovf_evdev.h  |   4 ++
 drivers/event/octeontx/ssovf_worker.c | 116 ++++++++++++++++++++++++++++++++++
 2 files changed, 120 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 16846b8..fac42f5 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -187,4 +187,8 @@ ssovf_pmd_priv(const struct rte_eventdev *eventdev)
 	return eventdev->data->dev_private;
 }
 
+uint16_t ssows_enq(void *port, const struct rte_event *ev);
+uint16_t ssows_enq_burst(void *port,
+		const struct rte_event ev[], uint16_t nb_events);
+
 #endif /* __SSOVF_EVDEV_H__ */
diff --git a/drivers/event/octeontx/ssovf_worker.c b/drivers/event/octeontx/ssovf_worker.c
index 052d158..33ae912 100644
--- a/drivers/event/octeontx/ssovf_worker.c
+++ b/drivers/event/octeontx/ssovf_worker.c
@@ -122,3 +122,119 @@ ssows_swtag_wait(struct ssows *ws)
 	;
 }
 
+static force_inline void
+ssows_new_event(struct ssows *ws, const struct rte_event *ev)
+{
+	const uint64_t event_ptr = ev->u64;
+	const uint32_t tag = (uint32_t)ev->event;
+	const uint8_t new_tt = ev->sched_type;
+	const uint8_t grp = ev->queue_id;
+
+	ssows_add_work(ws, event_ptr, tag, new_tt, grp);
+}
+
+static force_inline void
+ssows_fwd_swtag(struct ssows *ws, const struct rte_event *ev, const uint8_t grp)
+{
+	const uint8_t cur_tt = ws->cur_tt;
+	const uint8_t new_tt = ev->sched_type;
+	const uint32_t tag = (uint32_t)ev->event;
+	/*
+	 * cur_tt/new_tt     SSO_SYNC_ORDERED SSO_SYNC_ATOMIC SSO_SYNC_UNTAGGED
+	 *
+	 * SSO_SYNC_ORDERED        norm           norm             untag
+	 * SSO_SYNC_ATOMIC         norm           norm		   untag
+	 * SSO_SYNC_UNTAGGED       full           full             NOOP
+	 */
+	if (unlikely(cur_tt == SSO_SYNC_UNTAGGED)) {
+		if (new_tt != SSO_SYNC_UNTAGGED) {
+			ssows_swtag_full(ws, ev->u64, tag,
+				new_tt, grp);
+		}
+	} else {
+		if (likely(new_tt != SSO_SYNC_UNTAGGED))
+			ssows_swtag_norm(ws, tag, new_tt);
+		else
+			ssows_swtag_untag(ws);
+	}
+	ws->swtag_req = 1;
+}
+
+#define OCT_EVENT_TYPE_GRP_FWD (RTE_EVENT_TYPE_MAX - 1)
+
+static force_inline void
+ssows_fwd_group(struct ssows *ws, const struct rte_event *ev, const uint8_t grp)
+{
+	const uint64_t event_ptr = ev->u64;
+	const uint32_t tag = (uint32_t)ev->event;
+	const uint8_t cur_tt = ws->cur_tt;
+	const uint8_t new_tt = ev->sched_type;
+
+	if (cur_tt == SSO_SYNC_ORDERED) {
+		/* Create unique tag based on custom event type and new grp */
+		uint32_t newtag = OCT_EVENT_TYPE_GRP_FWD << 28;
+
+		newtag |= grp << 20;
+		newtag |= tag;
+		ssows_swtag_norm(ws, newtag, SSO_SYNC_ATOMIC);
+		rte_smp_wmb();
+		ssows_swtag_wait(ws);
+	} else {
+		rte_smp_wmb();
+	}
+	ssows_add_work(ws, event_ptr, tag, new_tt, grp);
+}
+
+static force_inline void
+ssows_forward_event(struct ssows *ws, const struct rte_event *ev)
+{
+	const uint8_t grp = ev->queue_id;
+
+	/* Group hasn't changed, Use SWTAG to forward the event */
+	if (ws->cur_grp == grp)
+		ssows_fwd_swtag(ws, ev, grp);
+	else
+	/*
+	 * Group has been changed for group based work pipelining,
+	 * Use deschedule/add_work operation to transfer the event to
+	 * new group/core
+	 */
+		ssows_fwd_group(ws, ev, grp);
+}
+
+static force_inline void
+ssows_release_event(struct ssows *ws)
+{
+	if (likely(ws->cur_tt != SSO_SYNC_UNTAGGED))
+		ssows_swtag_untag(ws);
+}
+
+force_inline uint16_t __hot
+ssows_enq(void *port, const struct rte_event *ev)
+{
+	struct ssows *ws = port;
+	uint16_t ret = 1;
+
+	switch (ev->op) {
+	case RTE_EVENT_OP_NEW:
+		ssows_new_event(ws, ev);
+		break;
+	case RTE_EVENT_OP_FORWARD:
+		ssows_forward_event(ws, ev);
+		break;
+	case RTE_EVENT_OP_RELEASE:
+		ssows_release_event(ws);
+		break;
+	default:
+		ret = 0;
+	}
+	return ret;
+}
+
+uint16_t __hot
+ssows_enq_burst(void *port, const struct rte_event ev[], uint16_t nb_events)
+{
+	RTE_SET_USED(nb_events);
+	return ssows_enq(port, ev);
+}
+
-- 
2.5.5

[PATCH v2 16/38] event/octeontx: add support worker dequeue function

[Jerin Jacob]

If device is configured with RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT
configuration then use different fast path dequeue handler to wait till
requested amount of nanosecond if the event is not available.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
---
 drivers/event/octeontx/ssovf_evdev.h  |  7 +++++
 drivers/event/octeontx/ssovf_worker.c | 52 +++++++++++++++++++++++++++++++++++
 2 files changed, 59 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index fac42f5..2cd9147 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -190,5 +190,12 @@ ssovf_pmd_priv(const struct rte_eventdev *eventdev)
 uint16_t ssows_enq(void *port, const struct rte_event *ev);
 uint16_t ssows_enq_burst(void *port,
 		const struct rte_event ev[], uint16_t nb_events);
+uint16_t ssows_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks);
+uint16_t ssows_deq_burst(void *port, struct rte_event ev[],
+		uint16_t nb_events, uint64_t timeout_ticks);
+uint16_t ssows_deq_timeout(void *port, struct rte_event *ev,
+		uint64_t timeout_ticks);
+uint16_t ssows_deq_timeout_burst(void *port, struct rte_event ev[],
+		uint16_t nb_events, uint64_t timeout_ticks);
 
 #endif /* __SSOVF_EVDEV_H__ */
diff --git a/drivers/event/octeontx/ssovf_worker.c b/drivers/event/octeontx/ssovf_worker.c
index 33ae912..13c7823 100644
--- a/drivers/event/octeontx/ssovf_worker.c
+++ b/drivers/event/octeontx/ssovf_worker.c
@@ -210,6 +210,58 @@ ssows_release_event(struct ssows *ws)
 }
 
 force_inline uint16_t __hot
+ssows_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks)
+{
+	struct ssows *ws = port;
+
+	RTE_SET_USED(timeout_ticks);
+
+	ssows_swtag_wait(ws);
+	if (ws->swtag_req) {
+		ws->swtag_req = 0;
+		return 1;
+	} else {
+		return ssows_get_work(ws, ev);
+	}
+}
+
+force_inline uint16_t __hot
+ssows_deq_timeout(void *port, struct rte_event *ev, uint64_t timeout_ticks)
+{
+	struct ssows *ws = port;
+	uint64_t iter;
+	uint16_t ret = 1;
+
+	ssows_swtag_wait(ws);
+	if (ws->swtag_req) {
+		ws->swtag_req = 0;
+	} else {
+		ret = ssows_get_work(ws, ev);
+		for (iter = 1; iter < timeout_ticks && (ret == 0); iter++)
+			ret = ssows_get_work(ws, ev);
+	}
+	return ret;
+}
+
+uint16_t __hot
+ssows_deq_burst(void *port, struct rte_event ev[], uint16_t nb_events,
+		uint64_t timeout_ticks)
+{
+	RTE_SET_USED(nb_events);
+
+	return ssows_deq(port, ev, timeout_ticks);
+}
+
+uint16_t __hot
+ssows_deq_timeout_burst(void *port, struct rte_event ev[], uint16_t nb_events,
+			uint64_t timeout_ticks)
+{
+	RTE_SET_USED(nb_events);
+
+	return ssows_deq_timeout(port, ev, timeout_ticks);
+}
+
+force_inline uint16_t __hot
 ssows_enq(void *port, const struct rte_event *ev)
 {
 	struct ssows *ws = port;
-- 
2.5.5

[PATCH v2 17/38] event/octeontx: add start function

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
 drivers/event/octeontx/ssovf_evdev.c  | 49 +++++++++++++++++++++++++++++++++-
 drivers/event/octeontx/ssovf_evdev.h  |  2 ++
 drivers/event/octeontx/ssovf_worker.c | 50 +++++++++++++++++++++++++++++++++++
 3 files changed, 100 insertions(+), 1 deletion(-)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index 4fb515c..0db3252 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -149,6 +149,23 @@ ssovf_mbox_timeout_ticks(uint64_t ns, uint64_t *tmo_ticks)
 }
 
 static void
+ssovf_fastpath_fns_set(struct rte_eventdev *dev)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+
+	dev->schedule      = NULL;
+	dev->enqueue       = ssows_enq;
+	dev->enqueue_burst = ssows_enq_burst;
+	dev->dequeue       = ssows_deq;
+	dev->dequeue_burst = ssows_deq_burst;
+
+	if (edev->is_timeout_deq) {
+		dev->dequeue       = ssows_deq_timeout;
+		dev->dequeue_burst = ssows_deq_timeout_burst;
+	}
+}
+
+static void
 ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
 {
 	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
@@ -382,6 +399,33 @@ ssovf_dump(struct rte_eventdev *dev, FILE *f)
 		ssows_dump(dev->data->ports[port], f);
 }
 
+static int
+ssovf_start(struct rte_eventdev *dev)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+	struct ssows *ws;
+	uint8_t *base;
+	uint8_t i;
+
+	ssovf_func_trace();
+	for (i = 0; i < edev->nb_event_ports; i++) {
+		ws = dev->data->ports[i];
+		ssows_reset(ws);
+		ws->swtag_req = 0;
+	}
+
+	for (i = 0; i < edev->nb_event_queues; i++) {
+		/* Consume all the events through HWS0 */
+		ssows_flush_events(dev->data->ports[0], i);
+
+		base = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, i, 0);
+		base += SSO_VHGRP_QCTL;
+		ssovf_write64(1, base); /* Enable SSO group */
+	}
+
+	ssovf_fastpath_fns_set(dev);
+	return 0;
+}
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -396,6 +440,7 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.port_unlink      = ssovf_port_unlink,
 	.timeout_ticks    = ssovf_timeout_ticks,
 	.dump             = ssovf_dump,
+	.dev_start        = ssovf_start,
 };
 
 static int
@@ -425,8 +470,10 @@ ssovf_vdev_probe(const char *name, const char *params)
 	eventdev->dev_ops = &ssovf_ops;
 
 	/* For secondary processes, the primary has done all the work */
-	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+		ssovf_fastpath_fns_set(eventdev);
 		return 0;
+	}
 
 	ret = octeontx_ssovf_info(&oinfo);
 	if (ret) {
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 2cd9147..6e0a352 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -197,5 +197,7 @@ uint16_t ssows_deq_timeout(void *port, struct rte_event *ev,
 		uint64_t timeout_ticks);
 uint16_t ssows_deq_timeout_burst(void *port, struct rte_event ev[],
 		uint16_t nb_events, uint64_t timeout_ticks);
+void ssows_flush_events(struct ssows *ws, uint8_t queue_id);
+void ssows_reset(struct ssows *ws);
 
 #endif /* __SSOVF_EVDEV_H__ */
diff --git a/drivers/event/octeontx/ssovf_worker.c b/drivers/event/octeontx/ssovf_worker.c
index 13c7823..a6925f6 100644
--- a/drivers/event/octeontx/ssovf_worker.c
+++ b/drivers/event/octeontx/ssovf_worker.c
@@ -290,3 +290,53 @@ ssows_enq_burst(void *port, const struct rte_event ev[], uint16_t nb_events)
 	return ssows_enq(port, ev);
 }
 
+void
+ssows_flush_events(struct ssows *ws, uint8_t queue_id)
+{
+	uint32_t reg_off;
+	uint64_t aq_cnt = 1;
+	uint64_t cq_ds_cnt = 1;
+	uint64_t enable, get_work0, get_work1;
+	uint8_t *base = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, queue_id, 0);
+
+	RTE_SET_USED(get_work0);
+	RTE_SET_USED(get_work1);
+
+	enable = ssovf_read64(base + SSO_VHGRP_QCTL);
+	if (!enable)
+		return;
+
+	reg_off = SSOW_VHWS_OP_GET_WORK0;
+	reg_off |= 1 << 17; /* Grouped */
+	reg_off |= 1 << 16; /* WAIT */
+	reg_off |= queue_id << 4; /* INDEX_GGRP_MASK(group number) */
+	while (aq_cnt || cq_ds_cnt) {
+		aq_cnt = ssovf_read64(base + SSO_VHGRP_AQ_CNT);
+		cq_ds_cnt = ssovf_read64(base + SSO_VHGRP_INT_CNT);
+		/* Extract cq and ds count */
+		cq_ds_cnt &= 0x1FFF1FFF0000;
+		ssovf_load_pair(get_work0, get_work1, ws->base + reg_off);
+	}
+}
+
+void
+ssows_reset(struct ssows *ws)
+{
+	uint64_t tag;
+	uint64_t pend_tag;
+	uint8_t pend_tt;
+	uint8_t tt;
+
+	tag = ssovf_read64(ws->base + SSOW_VHWS_TAG);
+	pend_tag = ssovf_read64(ws->base + SSOW_VHWS_PENDTAG);
+
+	if (pend_tag & (1ULL << 63)) { /* Tagswitch pending */
+		pend_tt = (pend_tag >> 32) & 0x3;
+		if (pend_tt == SSO_SYNC_ORDERED || pend_tt == SSO_SYNC_ATOMIC)
+			ssows_desched(ws);
+	} else {
+		tt = (tag >> 32) & 0x3;
+		if (tt == SSO_SYNC_ORDERED || tt == SSO_SYNC_ATOMIC)
+			ssows_swtag_untag(ws);
+	}
+}
-- 
2.5.5

[PATCH v2 18/38] event/octeontx: add stop and close function

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
---
 drivers/event/octeontx/ssovf_evdev.c | 44 ++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index 0db3252..d4d8724 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -426,6 +426,48 @@ ssovf_start(struct rte_eventdev *dev)
 	ssovf_fastpath_fns_set(dev);
 	return 0;
 }
+
+static void
+ssovf_stop(struct rte_eventdev *dev)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+	struct ssows *ws;
+	uint8_t *base;
+	uint8_t i;
+
+	ssovf_func_trace();
+	for (i = 0; i < edev->nb_event_ports; i++) {
+		ws = dev->data->ports[i];
+		ssows_reset(ws);
+		ws->swtag_req = 0;
+	}
+
+	for (i = 0; i < edev->nb_event_queues; i++) {
+		/* Consume all the events through HWS0 */
+		ssows_flush_events(dev->data->ports[0], i);
+
+		base = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, i, 0);
+		base += SSO_VHGRP_QCTL;
+		ssovf_write64(0, base); /* Disable SSO group */
+	}
+}
+
+static int
+ssovf_close(struct rte_eventdev *dev)
+{
+	struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
+	uint8_t all_queues[RTE_EVENT_MAX_QUEUES_PER_DEV];
+	uint8_t i;
+
+	for (i = 0; i < edev->nb_event_queues; i++)
+		all_queues[i] = i;
+
+	for (i = 0; i < edev->nb_event_ports; i++)
+		ssovf_port_unlink(dev, dev->data->ports[i], all_queues,
+			edev->nb_event_queues);
+	return 0;
+}
+
 /* Initialize and register event driver with DPDK Application */
 static const struct rte_eventdev_ops ssovf_ops = {
 	.dev_infos_get    = ssovf_info_get,
@@ -441,6 +483,8 @@ static const struct rte_eventdev_ops ssovf_ops = {
 	.timeout_ticks    = ssovf_timeout_ticks,
 	.dump             = ssovf_dump,
 	.dev_start        = ssovf_start,
+	.dev_stop         = ssovf_stop,
+	.dev_close        = ssovf_close
 };
 
 static int
-- 
2.5.5

[PATCH v2 19/38] test/test: octeontx eventdev unit test infrastructure

[Jerin Jacob]

add test setup and teardown routines.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/Makefile                 |  5 +-
 test/test/test_eventdev_octeontx.c | 98 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 102 insertions(+), 1 deletion(-)
 create mode 100644 test/test/test_eventdev_octeontx.c

diff --git a/test/test/Makefile b/test/test/Makefile
index a426548..b45a1d3 100644
--- a/test/test/Makefile
+++ b/test/test/Makefile
@@ -197,7 +197,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev_blockcipher.c
 SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev_perf.c
 SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev.c
 
-SRCS-$(CONFIG_RTE_LIBRTE_EVENTDEV) += test_eventdev.c
+ifeq ($(CONFIG_RTE_LIBRTE_EVENTDEV),y)
+SRCS-y += test_eventdev.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += test_eventdev_octeontx.c
+endif
 
 SRCS-$(CONFIG_RTE_LIBRTE_KVARGS) += test_kvargs.c
 
diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
new file mode 100644
index 0000000..9744961
--- /dev/null
+++ b/test/test/test_eventdev_octeontx.c
@@ -0,0 +1,98 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2017 Cavium networks. All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *	 * Redistributions of source code must retain the above copyright
+ *	   notice, this list of conditions and the following disclaimer.
+ *	 * Redistributions in binary form must reproduce the above copyright
+ *	   notice, this list of conditions and the following disclaimer in
+ *	   the documentation and/or other materials provided with the
+ *	   distribution.
+ *	 * Neither the name of Cavium networks nor the names of its
+ *	   contributors may be used to endorse or promote products derived
+ *	   from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <rte_atomic.h>
+#include <rte_common.h>
+#include <rte_cycles.h>
+#include <rte_debug.h>
+#include <rte_eal.h>
+#include <rte_ethdev.h>
+#include <rte_eventdev.h>
+#include <rte_hexdump.h>
+#include <rte_mbuf.h>
+#include <rte_malloc.h>
+#include <rte_memcpy.h>
+#include <rte_launch.h>
+#include <rte_lcore.h>
+#include <rte_per_lcore.h>
+#include <rte_random.h>
+
+#include "test.h"
+
+#define NUM_PACKETS (1 << 18)
+#define MAX_EVENTS  (16 * 1024)
+
+static int evdev;
+
+static int
+testsuite_setup(void)
+{
+	const char *eventdev_name = "event_octeontx";
+
+	evdev = rte_event_dev_get_dev_id(eventdev_name);
+	if (evdev < 0) {
+		printf("%d: Eventdev %s not found - creating.\n",
+				__LINE__, eventdev_name);
+		if (rte_eal_vdev_init(eventdev_name, NULL) < 0) {
+			printf("Error creating eventdev\n");
+			return TEST_FAILED;
+		}
+		evdev = rte_event_dev_get_dev_id(eventdev_name);
+		if (evdev < 0) {
+			printf("Error finding newly created eventdev\n");
+			return TEST_FAILED;
+		}
+	}
+
+	return TEST_SUCCESS;
+}
+
+static void
+testsuite_teardown(void)
+{
+	rte_event_dev_close(evdev);
+}
+
+
+static struct unit_test_suite eventdev_octeontx_testsuite  = {
+	.suite_name = "eventdev octeontx unit test suite",
+	.setup = testsuite_setup,
+	.teardown = testsuite_teardown,
+};
+
+static int
+test_eventdev_octeontx(void)
+{
+	return unit_test_suite_runner(&eventdev_octeontx_testsuite);
+}
+
+REGISTER_TEST_COMMAND(eventdev_octeontx_autotest, test_eventdev_octeontx);
-- 
2.5.5

[PATCH v2 20/38] test/test: octeontx unit test case setup and teardown

[Jerin Jacob]

Each test case expected to run as standalone.
On setup, configure the device in requested mode and start the device.
On tear down, close the device and free the allocated resources

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 122 +++++++++++++++++++++++++++++++++++++
 1 file changed, 122 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index 9744961..e28880b 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -52,6 +52,7 @@
 #define MAX_EVENTS  (16 * 1024)
 
 static int evdev;
+static struct rte_mempool *eventdev_test_mempool;
 
 static int
 testsuite_setup(void)
@@ -82,6 +83,127 @@ testsuite_teardown(void)
 	rte_event_dev_close(evdev);
 }
 
+static inline void
+devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
+			struct rte_event_dev_info *info)
+{
+	memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
+	dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
+	dev_conf->nb_event_ports = info->max_event_ports;
+	dev_conf->nb_event_queues = info->max_event_queues;
+	dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
+	dev_conf->nb_event_port_dequeue_depth =
+			info->max_event_port_dequeue_depth;
+	dev_conf->nb_event_port_enqueue_depth =
+			info->max_event_port_enqueue_depth;
+	dev_conf->nb_event_port_enqueue_depth =
+			info->max_event_port_enqueue_depth;
+	dev_conf->nb_events_limit =
+			info->max_num_events;
+}
+
+enum {
+	TEST_EVENTDEV_SETUP_DEFAULT,
+	TEST_EVENTDEV_SETUP_PRIORITY,
+	TEST_EVENTDEV_SETUP_DEQUEUE_TIMEOUT,
+};
+
+static inline int
+_eventdev_setup(int mode)
+{
+	int i, ret;
+	struct rte_event_dev_config dev_conf;
+	struct rte_event_dev_info info;
+	const char *pool_name = "evdev_octeontx_test_pool";
+
+	/* Create and destrory pool for each test case to make it standalone */
+	eventdev_test_mempool = rte_pktmbuf_pool_create(pool_name,
+					MAX_EVENTS,
+					0 /*MBUF_CACHE_SIZE*/,
+					0,
+					512, /* Use very small mbufs */
+					rte_socket_id());
+	if (!eventdev_test_mempool) {
+		printf("ERROR creating mempool\n");
+		return TEST_FAILED;
+	}
+
+	ret = rte_event_dev_info_get(evdev, &info);
+	TEST_ASSERT_SUCCESS(ret, "Failed to get event dev info");
+	TEST_ASSERT(info.max_num_events >= (int32_t)MAX_EVENTS,
+			"max_num_events=%d < max_events=%d",
+			info.max_num_events, MAX_EVENTS);
+
+	devconf_set_default_sane_values(&dev_conf, &info);
+	if (mode == TEST_EVENTDEV_SETUP_DEQUEUE_TIMEOUT)
+		dev_conf.event_dev_cfg |= RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT;
+
+	ret = rte_event_dev_configure(evdev, &dev_conf);
+	TEST_ASSERT_SUCCESS(ret, "Failed to configure eventdev");
+
+	if (mode == TEST_EVENTDEV_SETUP_PRIORITY) {
+		/* Configure event queues(0 to n) with
+		 * RTE_EVENT_DEV_PRIORITY_HIGHEST to
+		 * RTE_EVENT_DEV_PRIORITY_LOWEST
+		 */
+		uint8_t step = (RTE_EVENT_DEV_PRIORITY_LOWEST + 1) /
+				rte_event_queue_count(evdev);
+		for (i = 0; i < rte_event_queue_count(evdev); i++) {
+			struct rte_event_queue_conf queue_conf;
+
+			ret = rte_event_queue_default_conf_get(evdev, i,
+						&queue_conf);
+			TEST_ASSERT_SUCCESS(ret, "Failed to get def_conf%d", i);
+			queue_conf.priority = i * step;
+			ret = rte_event_queue_setup(evdev, i, &queue_conf);
+			TEST_ASSERT_SUCCESS(ret, "Failed to setup queue=%d", i);
+		}
+
+	} else {
+		/* Configure event queues with default priority */
+		for (i = 0; i < rte_event_queue_count(evdev); i++) {
+			ret = rte_event_queue_setup(evdev, i, NULL);
+			TEST_ASSERT_SUCCESS(ret, "Failed to setup queue=%d", i);
+		}
+	}
+	/* Configure event ports */
+	for (i = 0; i < rte_event_port_count(evdev); i++) {
+		ret = rte_event_port_setup(evdev, i, NULL);
+		TEST_ASSERT_SUCCESS(ret, "Failed to setup port=%d", i);
+		ret = rte_event_port_link(evdev, i, NULL, NULL, 0);
+		TEST_ASSERT(ret >= 0, "Failed to link all queues port=%d", i);
+	}
+
+	ret = rte_event_dev_start(evdev);
+	TEST_ASSERT_SUCCESS(ret, "Failed to start device");
+
+	return TEST_SUCCESS;
+}
+
+static inline int
+eventdev_setup(void)
+{
+	return _eventdev_setup(TEST_EVENTDEV_SETUP_DEFAULT);
+}
+
+static inline int
+eventdev_setup_priority(void)
+{
+	return _eventdev_setup(TEST_EVENTDEV_SETUP_PRIORITY);
+}
+
+static inline int
+eventdev_setup_dequeue_timeout(void)
+{
+	return _eventdev_setup(TEST_EVENTDEV_SETUP_DEQUEUE_TIMEOUT);
+}
+
+static inline void
+eventdev_teardown(void)
+{
+	rte_event_dev_stop(evdev);
+	rte_mempool_free(eventdev_test_mempool);
+}
 
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
-- 
2.5.5

[PATCH v2 21/38] test/test: octeontx unit test case helper functions

[Jerin Jacob]

Add helper functions to generate, inject, consume and validate the events.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 202 +++++++++++++++++++++++++++++++++++++
 1 file changed, 202 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index e28880b..412944d 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -54,6 +54,52 @@
 static int evdev;
 static struct rte_mempool *eventdev_test_mempool;
 
+struct event_attr {
+	uint32_t flow_id;
+	uint8_t event_type;
+	uint8_t sub_event_type;
+	uint8_t sched_type;
+	uint8_t queue;
+	uint8_t port;
+};
+
+
+static uint32_t seqn_list_index;
+static int seqn_list[NUM_PACKETS];
+
+static inline void
+seqn_list_init(void)
+{
+	RTE_BUILD_BUG_ON(NUM_PACKETS < MAX_EVENTS);
+	memset(seqn_list, 0, sizeof(seqn_list));
+	seqn_list_index = 0;
+}
+
+static inline int
+seqn_list_update(int val)
+{
+	if (seqn_list_index >= NUM_PACKETS)
+		return TEST_FAILED;
+
+	seqn_list[seqn_list_index++] = val;
+	rte_smp_wmb();
+	return TEST_SUCCESS;
+}
+
+static inline int
+seqn_list_check(int limit)
+{
+	int i;
+
+	for (i = 0; i < limit; i++) {
+		if (seqn_list[i] != i) {
+			printf("Seqn mismatch %d %d\n", seqn_list[i], i);
+			return TEST_FAILED;
+		}
+	}
+	return TEST_SUCCESS;
+}
+
 static int
 testsuite_setup(void)
 {
@@ -205,6 +251,162 @@ eventdev_teardown(void)
 	rte_mempool_free(eventdev_test_mempool);
 }
 
+static inline void
+update_event_and_validation_attr(struct rte_mbuf *m, struct rte_event *ev,
+			uint32_t flow_id, uint8_t event_type,
+			uint8_t sub_event_type, uint8_t sched_type,
+			uint8_t queue, uint8_t port)
+{
+	struct event_attr *attr;
+
+	/* Store the event attributes in mbuf for future reference */
+	attr = rte_pktmbuf_mtod(m, struct event_attr *);
+	attr->flow_id = flow_id;
+	attr->event_type = event_type;
+	attr->sub_event_type = sub_event_type;
+	attr->sched_type = sched_type;
+	attr->queue = queue;
+	attr->port = port;
+
+	ev->flow_id = flow_id;
+	ev->sub_event_type = sub_event_type;
+	ev->event_type = event_type;
+	/* Inject the new event */
+	ev->op = RTE_EVENT_OP_NEW;
+	ev->sched_type = sched_type;
+	ev->queue_id = queue;
+	ev->mbuf = m;
+}
+
+static inline int
+inject_events(uint32_t flow_id, uint8_t event_type, uint8_t sub_event_type,
+		uint8_t sched_type, uint8_t queue, uint8_t port,
+		unsigned int events)
+{
+	struct rte_mbuf *m;
+	unsigned int i;
+
+	for (i = 0; i < events; i++) {
+		struct rte_event ev = {};
+
+		m = rte_pktmbuf_alloc(eventdev_test_mempool);
+		TEST_ASSERT_NOT_NULL(m, "mempool alloc failed");
+
+		m->seqn = i;
+		update_event_and_validation_attr(m, &ev, flow_id, event_type,
+			sub_event_type, sched_type, queue, port);
+		rte_event_enqueue_burst(evdev, port, &ev, 1);
+	}
+	return 0;
+}
+
+static inline int
+check_excess_events(uint8_t port)
+{
+	int i;
+	uint16_t valid_event;
+	struct rte_event ev;
+
+	/* Check for excess events, try for a few times and exit */
+	for (i = 0; i < 32; i++) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
+
+		TEST_ASSERT_SUCCESS(valid_event, "Unexpected valid event=%d",
+					ev.mbuf->seqn);
+	}
+	return 0;
+}
+
+static inline int
+generate_random_events(const unsigned int total_events)
+{
+	struct rte_event_dev_info info;
+	unsigned int i;
+	int ret;
+
+	ret = rte_event_dev_info_get(evdev, &info);
+	TEST_ASSERT_SUCCESS(ret, "Failed to get event dev info");
+	for (i = 0; i < total_events; i++) {
+		ret = inject_events(
+			rte_rand() % info.max_event_queue_flows /*flow_id */,
+			rte_rand() % (RTE_EVENT_TYPE_CPU + 1) /* event_type */,
+			rte_rand() % 256 /* sub_event_type */,
+			rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1),
+			rte_rand() % rte_event_queue_count(evdev) /* queue */,
+			0 /* port */,
+			1 /* events */);
+		if (ret)
+			return TEST_FAILED;
+	}
+	return ret;
+}
+
+static inline int
+validate_event(struct rte_event *ev)
+{
+	struct event_attr *attr;
+
+	attr = rte_pktmbuf_mtod(ev->mbuf, struct event_attr *);
+	TEST_ASSERT_EQUAL(attr->flow_id, ev->flow_id,
+			"flow_id mismatch enq=%d deq =%d",
+			attr->flow_id, ev->flow_id);
+	TEST_ASSERT_EQUAL(attr->event_type, ev->event_type,
+			"event_type mismatch enq=%d deq =%d",
+			attr->event_type, ev->event_type);
+	TEST_ASSERT_EQUAL(attr->sub_event_type, ev->sub_event_type,
+			"sub_event_type mismatch enq=%d deq =%d",
+			attr->sub_event_type, ev->sub_event_type);
+	TEST_ASSERT_EQUAL(attr->sched_type, ev->sched_type,
+			"sched_type mismatch enq=%d deq =%d",
+			attr->sched_type, ev->sched_type);
+	TEST_ASSERT_EQUAL(attr->queue, ev->queue_id,
+			"queue mismatch enq=%d deq =%d",
+			attr->queue, ev->queue_id);
+	return 0;
+}
+
+typedef int (*validate_event_cb)(uint32_t index, uint8_t port,
+				 struct rte_event *ev);
+
+static inline int
+consume_events(uint8_t port, const uint32_t total_events, validate_event_cb fn)
+{
+	int ret;
+	uint16_t valid_event;
+	uint32_t events = 0, forward_progress_cnt = 0, index = 0;
+	struct rte_event ev;
+
+	while (1) {
+		if (++forward_progress_cnt > UINT16_MAX) {
+			printf("Detected deadlock\n");
+			return TEST_FAILED;
+		}
+
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
+		if (!valid_event)
+			continue;
+
+		forward_progress_cnt = 0;
+		ret = validate_event(&ev);
+		if (ret)
+			return TEST_FAILED;
+
+		if (fn != NULL) {
+			ret = fn(index, port, &ev);
+			TEST_ASSERT_SUCCESS(ret,
+				"Failed to validate test specific event");
+		}
+
+		++index;
+
+		rte_pktmbuf_free(ev.mbuf);
+		if (++events >= total_events)
+			break;
+	}
+
+	return check_excess_events(port);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
-- 
2.5.5

[PATCH v2 22/38] test/test: octeontx simple event enqueue and dequeue test

[Jerin Jacob]

Added unit test case to verify simple event enqueue and dequeue
operation with different schedule types

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 54 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index 412944d..c1cad65 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -407,10 +407,64 @@ consume_events(uint8_t port, const uint32_t total_events, validate_event_cb fn)
 	return check_excess_events(port);
 }
 
+static int
+validate_simple_enqdeq(uint32_t index, uint8_t port, struct rte_event *ev)
+{
+	RTE_SET_USED(port);
+	TEST_ASSERT_EQUAL(index, ev->mbuf->seqn, "index=%d != seqn=%d", index,
+					ev->mbuf->seqn);
+	return 0;
+}
+
+static inline int
+test_simple_enqdeq(uint8_t sched_type)
+{
+	int ret;
+
+	ret = inject_events(0 /*flow_id */,
+				RTE_EVENT_TYPE_CPU /* event_type */,
+				0 /* sub_event_type */,
+				sched_type,
+				0 /* queue */,
+				0 /* port */,
+				MAX_EVENTS);
+	if (ret)
+		return TEST_FAILED;
+
+	return consume_events(0 /* port */, MAX_EVENTS,	validate_simple_enqdeq);
+}
+
+static int
+test_simple_enqdeq_ordered(void)
+{
+	return test_simple_enqdeq(RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_simple_enqdeq_atomic(void)
+{
+	return test_simple_enqdeq(RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_simple_enqdeq_parallel(void)
+{
+	return test_simple_enqdeq(RTE_SCHED_TYPE_PARALLEL);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
 	.teardown = testsuite_teardown,
+	.unit_test_cases = {
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_simple_enqdeq_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_simple_enqdeq_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_simple_enqdeq_parallel),
+		TEST_CASES_END() /**< NULL terminate unit test array */
+	}
 };
 
 static int
-- 
2.5.5

[PATCH v2 23/38] test/test: octeontx multi queue enqueue and dequeue test

[Jerin Jacob]

Added unit test case to verify enqueue and dequeue operations
with multiple queues and a single port.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index c1cad65..62dc28a 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -452,6 +452,23 @@ test_simple_enqdeq_parallel(void)
 	return test_simple_enqdeq(RTE_SCHED_TYPE_PARALLEL);
 }
 
+/*
+ * Generate a prescribed number of events and spread them across available
+ * queues. On dequeue, using single event port(port 0) verify the enqueued
+ * event attributes
+ */
+static int
+test_multi_queue_enq_single_port_deq(void)
+{
+	int ret;
+
+	ret = generate_random_events(MAX_EVENTS);
+	if (ret)
+		return TEST_FAILED;
+
+	return consume_events(0 /* port */, MAX_EVENTS, NULL);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -463,6 +480,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_simple_enqdeq_atomic),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_simple_enqdeq_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_queue_enq_single_port_deq),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH v2 24/38] test/test: octeontx eventdev priority test

[Jerin Jacob]

Added unit test case to verify the priority associated with
each event queue available in the device.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 59 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index 62dc28a..4e50b65 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -469,6 +469,63 @@ test_multi_queue_enq_single_port_deq(void)
 	return consume_events(0 /* port */, MAX_EVENTS, NULL);
 }
 
+/*
+ * Inject 0..MAX_EVENTS events over 0..rte_event_queue_count() with modulus
+ * operation
+ *
+ * For example, Inject 32 events over 0..7 queues
+ * enqueue events 0, 8, 16, 24 in queue 0
+ * enqueue events 1, 9, 17, 25 in queue 1
+ * ..
+ * ..
+ * enqueue events 7, 15, 23, 31 in queue 7
+ *
+ * On dequeue, Validate the events comes in 0,8,16,24,1,9,17,25..,7,15,23,31
+ * order from queue0(highest priority) to queue7(lowest_priority)
+ */
+static int
+validate_queue_priority(uint32_t index, uint8_t port, struct rte_event *ev)
+{
+	uint32_t range = MAX_EVENTS / rte_event_queue_count(evdev);
+	uint32_t expected_val = (index % range) * rte_event_queue_count(evdev);
+
+	expected_val += ev->queue_id;
+	RTE_SET_USED(port);
+	TEST_ASSERT_EQUAL(ev->mbuf->seqn, expected_val,
+	"seqn=%d index=%d expected=%d range=%d nb_queues=%d max_event=%d",
+			ev->mbuf->seqn, index, expected_val, range,
+			rte_event_queue_count(evdev), MAX_EVENTS);
+	return 0;
+}
+
+static int
+test_multi_queue_priority(void)
+{
+	uint8_t queue;
+	struct rte_mbuf *m;
+	int i, max_evts_roundoff;
+
+	/* See validate_queue_priority() comments for priority validate logic */
+	max_evts_roundoff  = MAX_EVENTS / rte_event_queue_count(evdev);
+	max_evts_roundoff *= rte_event_queue_count(evdev);
+
+	for (i = 0; i < max_evts_roundoff; i++) {
+		struct rte_event ev = {};
+
+		m = rte_pktmbuf_alloc(eventdev_test_mempool);
+		TEST_ASSERT_NOT_NULL(m, "mempool alloc failed");
+
+		m->seqn = i;
+		queue = i % rte_event_queue_count(evdev);
+		update_event_and_validation_attr(m, &ev, 0, RTE_EVENT_TYPE_CPU,
+			0, RTE_SCHED_TYPE_PARALLEL, queue, 0);
+		rte_event_enqueue_burst(evdev, 0, &ev, 1);
+	}
+
+	return consume_events(0, max_evts_roundoff, validate_queue_priority);
+}
+
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -482,6 +539,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_simple_enqdeq_parallel),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_queue_enq_single_port_deq),
+		TEST_CASE_ST(eventdev_setup_priority, eventdev_teardown,
+			test_multi_queue_priority),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH v2 25/38] test/test: add infrastructure for multicore octeontx tests

[Jerin Jacob]

Add helper functions to launch and wait for n cores to complete the
operation with deadlock detection.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 88 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 88 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index 4e50b65..abb32a2 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -63,6 +63,12 @@ struct event_attr {
 	uint8_t port;
 };
 
+struct test_core_param {
+	rte_atomic32_t *total_events;
+	uint64_t dequeue_tmo_ticks;
+	uint8_t port;
+	uint8_t sched_type;
+};
 
 static uint32_t seqn_list_index;
 static int seqn_list[NUM_PACKETS];
@@ -525,6 +531,88 @@ test_multi_queue_priority(void)
 	return consume_events(0, max_evts_roundoff, validate_queue_priority);
 }
 
+static inline int
+wait_workers_to_join(int lcore, const rte_atomic32_t *count)
+{
+	uint64_t cycles, print_cycles;
+
+	print_cycles = cycles = rte_get_timer_cycles();
+	while (rte_eal_get_lcore_state(lcore) != FINISHED) {
+		uint64_t new_cycles = rte_get_timer_cycles();
+
+		if (new_cycles - print_cycles > rte_get_timer_hz()) {
+			printf("\r%s: events %d\n", __func__,
+				rte_atomic32_read(count));
+			print_cycles = new_cycles;
+		}
+		if (new_cycles - cycles > rte_get_timer_hz() * 10) {
+			printf("%s: No schedules for seconds, deadlock (%d)\n",
+				__func__,
+				rte_atomic32_read(count));
+			rte_event_dev_dump(evdev, stdout);
+			cycles = new_cycles;
+			return TEST_FAILED;
+		}
+	}
+	rte_eal_mp_wait_lcore();
+	return TEST_SUCCESS;
+}
+
+
+static inline int
+launch_workers_and_wait(int (*master_worker)(void *),
+			int (*slave_workers)(void *), uint32_t total_events,
+			uint8_t nb_workers, uint8_t sched_type)
+{
+	uint8_t port = 0;
+	int w_lcore;
+	int ret;
+	struct test_core_param *param;
+	rte_atomic32_t atomic_total_events;
+	uint64_t dequeue_tmo_ticks;
+
+	if (!nb_workers)
+		return 0;
+
+	rte_atomic32_set(&atomic_total_events, total_events);
+	seqn_list_init();
+
+	param = malloc(sizeof(struct test_core_param) * nb_workers);
+	if (!param)
+		return TEST_FAILED;
+
+	ret = rte_event_dequeue_timeout_ticks(evdev,
+		rte_rand() % 10000000/* 10ms */, &dequeue_tmo_ticks);
+	if (ret)
+		return TEST_FAILED;
+
+	param[0].total_events = &atomic_total_events;
+	param[0].sched_type = sched_type;
+	param[0].port = 0;
+	param[0].dequeue_tmo_ticks = dequeue_tmo_ticks;
+	rte_smp_wmb();
+
+	w_lcore = rte_get_next_lcore(
+			/* start core */ -1,
+			/* skip master */ 1,
+			/* wrap */ 0);
+	rte_eal_remote_launch(master_worker, &param[0], w_lcore);
+
+	for (port = 1; port < nb_workers; port++) {
+		param[port].total_events = &atomic_total_events;
+		param[port].sched_type = sched_type;
+		param[port].port = port;
+		param[port].dequeue_tmo_ticks = dequeue_tmo_ticks;
+		rte_smp_wmb();
+		w_lcore = rte_get_next_lcore(w_lcore, 1, 0);
+		rte_eal_remote_launch(slave_workers, &param[port], w_lcore);
+	}
+
+	ret = wait_workers_to_join(w_lcore, &atomic_total_events);
+	free(param);
+	return ret;
+}
+
 
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
-- 
2.5.5

[PATCH v2 26/38] test/test: octeontx multi queue and multi core/port tests

[Jerin Jacob]

Add unit test case to verify multi queue enqueue and multi core/port
dequeue operation.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 53 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index abb32a2..7ad2076 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -531,6 +531,29 @@ test_multi_queue_priority(void)
 	return consume_events(0, max_evts_roundoff, validate_queue_priority);
 }
 
+static int
+worker_multi_port_fn(void *arg)
+{
+	struct test_core_param *param = arg;
+	struct rte_event ev;
+	uint16_t valid_event;
+	uint8_t port = param->port;
+	rte_atomic32_t *total_events = param->total_events;
+	int ret;
+
+	while (rte_atomic32_read(total_events) > 0) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
+		if (!valid_event)
+			continue;
+
+		ret = validate_event(&ev);
+		TEST_ASSERT_SUCCESS(ret, "Failed to validate event");
+		rte_pktmbuf_free(ev.mbuf);
+		rte_atomic32_sub(total_events, 1);
+	}
+	return 0;
+}
+
 static inline int
 wait_workers_to_join(int lcore, const rte_atomic32_t *count)
 {
@@ -613,6 +636,34 @@ launch_workers_and_wait(int (*master_worker)(void *),
 	return ret;
 }
 
+/*
+ * Generate a prescribed number of events and spread them across available
+ * queues. Dequeue the events through multiple ports and verify the enqueued
+ * event attributes
+ */
+static int
+test_multi_queue_enq_multi_port_deq(void)
+{
+	const unsigned int total_events = MAX_EVENTS;
+	uint8_t nr_ports;
+	int ret;
+
+	ret = generate_random_events(total_events);
+	if (ret)
+		return TEST_FAILED;
+
+	nr_ports = RTE_MIN(rte_event_port_count(evdev), rte_lcore_count() - 1);
+
+	if (!nr_ports) {
+		printf("%s: Not enough ports=%d or workers=%d\n", __func__,
+			rte_event_port_count(evdev), rte_lcore_count() - 1);
+		return TEST_SUCCESS;
+	}
+
+	return launch_workers_and_wait(worker_multi_port_fn,
+					worker_multi_port_fn, total_events,
+					nr_ports, 0xff /* invalid */);
+}
 
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
@@ -629,6 +680,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_queue_enq_single_port_deq),
 		TEST_CASE_ST(eventdev_setup_priority, eventdev_teardown,
 			test_multi_queue_priority),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_queue_enq_multi_port_deq),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH v2 27/38] test/test: octeontx single link establishment test

[Jerin Jacob]

Add test case to verify queue to port single link establishment operation.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 62 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index 7ad2076..4b1471f 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -665,6 +665,66 @@ test_multi_queue_enq_multi_port_deq(void)
 					nr_ports, 0xff /* invalid */);
 }
 
+static int
+validate_queue_to_port_single_link(uint32_t index, uint8_t port,
+			struct rte_event *ev)
+{
+	RTE_SET_USED(index);
+	TEST_ASSERT_EQUAL(port, ev->queue_id,
+				"queue mismatch enq=%d deq =%d",
+				port, ev->queue_id);
+	return 0;
+}
+
+/*
+ * Link queue x to port x and check correctness of link by checking
+ * queue_id == x on dequeue on the specific port x
+ */
+static int
+test_queue_to_port_single_link(void)
+{
+	int i, nr_links, ret;
+
+	/* Unlink all connections that created in eventdev_setup */
+	for (i = 0; i < rte_event_port_count(evdev); i++) {
+		ret = rte_event_port_unlink(evdev, i, NULL, 0);
+		TEST_ASSERT(ret >= 0, "Failed to unlink all queues port=%d", i);
+	}
+
+	nr_links = RTE_MIN(rte_event_port_count(evdev),
+				rte_event_queue_count(evdev));
+	const unsigned int total_events = MAX_EVENTS / nr_links;
+
+	/* Link queue x to port x and inject events to queue x through port x */
+	for (i = 0; i < nr_links; i++) {
+		uint8_t queue = (uint8_t)i;
+
+		ret = rte_event_port_link(evdev, i, &queue, NULL, 1);
+		TEST_ASSERT(ret == 1, "Failed to link queue to port %d", i);
+
+		ret = inject_events(
+			0x100 /*flow_id */,
+			rte_rand() % (RTE_EVENT_TYPE_CPU + 1) /* event_type */,
+			rte_rand() % 256 /* sub_event_type */,
+			rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1),
+			queue /* queue */,
+			i /* port */,
+			total_events /* events */);
+		if (ret)
+			return TEST_FAILED;
+	}
+
+	/* Verify the events generated from correct queue */
+	for (i = 0; i < nr_links; i++) {
+		ret = consume_events(i /* port */, total_events,
+				validate_queue_to_port_single_link);
+		if (ret)
+			return TEST_FAILED;
+	}
+
+	return TEST_SUCCESS;
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -682,6 +742,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_queue_priority),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_queue_enq_multi_port_deq),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_queue_to_port_single_link),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH v2 28/38] test/test: octeontx multi link establishment test

[Jerin Jacob]

Add unit test case to verify queue to port multi link
establishment operation.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 77 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index 4b1471f..059257a 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -725,6 +725,81 @@ test_queue_to_port_single_link(void)
 	return TEST_SUCCESS;
 }
 
+static int
+validate_queue_to_port_multi_link(uint32_t index, uint8_t port,
+			struct rte_event *ev)
+{
+	RTE_SET_USED(index);
+	TEST_ASSERT_EQUAL(port, (ev->queue_id & 0x1),
+				"queue mismatch enq=%d deq =%d",
+				port, ev->queue_id);
+	return 0;
+}
+
+/*
+ * Link all even number of queues to port 0 and all odd number of queues to
+ * port 1 and verify the link connection on dequeue
+ */
+static int
+test_queue_to_port_multi_link(void)
+{
+	int ret, port0_events = 0, port1_events = 0;
+	uint8_t nr_queues, nr_ports, queue, port;
+
+	nr_queues = rte_event_queue_count(evdev);
+	nr_ports = rte_event_port_count(evdev);
+
+	if (nr_ports < 2) {
+		printf("%s: Not enough ports to test ports=%d\n",
+				__func__, nr_ports);
+		return TEST_SUCCESS;
+	}
+
+	/* Unlink all connections that created in eventdev_setup */
+	for (port = 0; port < nr_ports; port++) {
+		ret = rte_event_port_unlink(evdev, port, NULL, 0);
+		TEST_ASSERT(ret >= 0, "Failed to unlink all queues port=%d",
+					port);
+	}
+
+	const unsigned int total_events = MAX_EVENTS / nr_queues;
+
+	/* Link all even number of queues to port0 and odd numbers to port 1*/
+	for (queue = 0; queue < nr_queues; queue++) {
+		port = queue & 0x1;
+		ret = rte_event_port_link(evdev, port, &queue, NULL, 1);
+		TEST_ASSERT(ret == 1, "Failed to link queue=%d to port=%d",
+					queue, port);
+
+		ret = inject_events(
+			0x100 /*flow_id */,
+			rte_rand() % (RTE_EVENT_TYPE_CPU + 1) /* event_type */,
+			rte_rand() % 256 /* sub_event_type */,
+			rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1),
+			queue /* queue */,
+			port /* port */,
+			total_events /* events */);
+		if (ret)
+			return TEST_FAILED;
+
+		if (port == 0)
+			port0_events += total_events;
+		else
+			port1_events += total_events;
+	}
+
+	ret = consume_events(0 /* port */, port0_events,
+				validate_queue_to_port_multi_link);
+	if (ret)
+		return TEST_FAILED;
+	ret = consume_events(1 /* port */, port1_events,
+				validate_queue_to_port_multi_link);
+	if (ret)
+		return TEST_FAILED;
+
+	return TEST_SUCCESS;
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -744,6 +819,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_queue_enq_multi_port_deq),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_queue_to_port_single_link),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_queue_to_port_multi_link),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH v2 29/38] test/test: octeontx flow based two stage sched type test

[Jerin Jacob]

Add flow based two stage pipeline test with all combination
of schedule types.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 170 +++++++++++++++++++++++++++++++++++++
 1 file changed, 170 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index 059257a..d19d351 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -800,6 +800,158 @@ test_queue_to_port_multi_link(void)
 	return TEST_SUCCESS;
 }
 
+static int
+worker_flow_based_pipeline(void *arg)
+{
+	struct test_core_param *param = arg;
+	struct rte_event ev;
+	uint16_t valid_event;
+	uint8_t port = param->port;
+	uint8_t new_sched_type = param->sched_type;
+	rte_atomic32_t *total_events = param->total_events;
+	uint64_t dequeue_tmo_ticks = param->dequeue_tmo_ticks;
+
+	while (rte_atomic32_read(total_events) > 0) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1,
+					dequeue_tmo_ticks);
+		if (!valid_event)
+			continue;
+
+		/* Events from stage 0 */
+		if (ev.sub_event_type == 0) {
+			/* Move to atomic flow to maintain the ordering */
+			ev.flow_id = 0x2;
+			ev.event_type = RTE_EVENT_TYPE_CPU;
+			ev.sub_event_type = 1; /* stage 1 */
+			ev.sched_type = new_sched_type;
+			ev.op = RTE_EVENT_OP_FORWARD;
+			rte_event_enqueue_burst(evdev, port, &ev, 1);
+		} else if (ev.sub_event_type == 1) { /* Events from stage 1*/
+			if (seqn_list_update(ev.mbuf->seqn) == TEST_SUCCESS) {
+				rte_pktmbuf_free(ev.mbuf);
+				rte_atomic32_sub(total_events, 1);
+			} else {
+				printf("Failed to update seqn_list\n");
+				return TEST_FAILED;
+			}
+		} else {
+			printf("Invalid ev.sub_event_type = %d\n",
+					ev.sub_event_type);
+			return TEST_FAILED;
+		}
+	}
+	return 0;
+}
+
+static int
+test_multiport_flow_sched_type_test(uint8_t in_sched_type,
+			uint8_t out_sched_type)
+{
+	const unsigned int total_events = MAX_EVENTS;
+	uint8_t nr_ports;
+	int ret;
+
+	nr_ports = RTE_MIN(rte_event_port_count(evdev), rte_lcore_count() - 1);
+
+	if (!nr_ports) {
+		printf("%s: Not enough ports=%d or workers=%d\n", __func__,
+			rte_event_port_count(evdev), rte_lcore_count() - 1);
+		return TEST_SUCCESS;
+	}
+
+	/* Injects events with m->seqn=0 to total_events */
+	ret = inject_events(
+		0x1 /*flow_id */,
+		RTE_EVENT_TYPE_CPU /* event_type */,
+		0 /* sub_event_type (stage 0) */,
+		in_sched_type,
+		0 /* queue */,
+		0 /* port */,
+		total_events /* events */);
+	if (ret)
+		return TEST_FAILED;
+
+	ret = launch_workers_and_wait(worker_flow_based_pipeline,
+					worker_flow_based_pipeline,
+					total_events, nr_ports, out_sched_type);
+	if (ret)
+		return TEST_FAILED;
+
+	if (in_sched_type != RTE_SCHED_TYPE_PARALLEL &&
+			out_sched_type == RTE_SCHED_TYPE_ATOMIC) {
+		/* Check the events order maintained or not */
+		return seqn_list_check(total_events);
+	}
+	return TEST_SUCCESS;
+}
+
+
+/* Multi port ordered to atomic transaction */
+static int
+test_multi_port_flow_ordered_to_atomic(void)
+{
+	/* Ingress event order test */
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_ORDERED,
+				RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_multi_port_flow_ordered_to_ordered(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_ORDERED,
+				RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_multi_port_flow_ordered_to_parallel(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_ORDERED,
+				RTE_SCHED_TYPE_PARALLEL);
+}
+
+static int
+test_multi_port_flow_atomic_to_atomic(void)
+{
+	/* Ingress event order test */
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_ATOMIC,
+				RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_multi_port_flow_atomic_to_ordered(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_ATOMIC,
+				RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_multi_port_flow_atomic_to_parallel(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_ATOMIC,
+				RTE_SCHED_TYPE_PARALLEL);
+}
+
+static int
+test_multi_port_flow_parallel_to_atomic(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
+				RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_multi_port_flow_parallel_to_ordered(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
+				RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_multi_port_flow_parallel_to_parallel(void)
+{
+	return test_multiport_flow_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
+				RTE_SCHED_TYPE_PARALLEL);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -821,6 +973,24 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_queue_to_port_single_link),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_queue_to_port_multi_link),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_ordered_to_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_ordered_to_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_ordered_to_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_atomic_to_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_atomic_to_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_atomic_to_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_parallel_to_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_parallel_to_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_parallel_to_parallel),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH v2 30/38] test/test: octeontx queue based two stage sched type test

[Jerin Jacob]

Add queue based two stage pipeline test with all combination
of schedule types.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 169 +++++++++++++++++++++++++++++++++++++
 1 file changed, 169 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index d19d351..06ac409 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -952,6 +952,157 @@ test_multi_port_flow_parallel_to_parallel(void)
 				RTE_SCHED_TYPE_PARALLEL);
 }
 
+static int
+worker_group_based_pipeline(void *arg)
+{
+	struct test_core_param *param = arg;
+	struct rte_event ev;
+	uint16_t valid_event;
+	uint8_t port = param->port;
+	uint8_t new_sched_type = param->sched_type;
+	rte_atomic32_t *total_events = param->total_events;
+	uint64_t dequeue_tmo_ticks = param->dequeue_tmo_ticks;
+
+	while (rte_atomic32_read(total_events) > 0) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1,
+					dequeue_tmo_ticks);
+		if (!valid_event)
+			continue;
+
+		/* Events from stage 0(group 0) */
+		if (ev.queue_id == 0) {
+			/* Move to atomic flow to maintain the ordering */
+			ev.flow_id = 0x2;
+			ev.event_type = RTE_EVENT_TYPE_CPU;
+			ev.sched_type = new_sched_type;
+			ev.queue_id = 1; /* Stage 1*/
+			ev.op = RTE_EVENT_OP_FORWARD;
+			rte_event_enqueue_burst(evdev, port, &ev, 1);
+		} else if (ev.queue_id == 1) { /* Events from stage 1(group 1)*/
+			if (seqn_list_update(ev.mbuf->seqn) == TEST_SUCCESS) {
+				rte_pktmbuf_free(ev.mbuf);
+				rte_atomic32_sub(total_events, 1);
+			} else {
+				printf("Failed to update seqn_list\n");
+				return TEST_FAILED;
+			}
+		} else {
+			printf("Invalid ev.queue_id = %d\n", ev.queue_id);
+			return TEST_FAILED;
+		}
+	}
+
+
+	return 0;
+}
+
+static int
+test_multiport_queue_sched_type_test(uint8_t in_sched_type,
+			uint8_t out_sched_type)
+{
+	const unsigned int total_events = MAX_EVENTS;
+	uint8_t nr_ports;
+	int ret;
+
+	nr_ports = RTE_MIN(rte_event_port_count(evdev), rte_lcore_count() - 1);
+
+	if (rte_event_queue_count(evdev) < 2 ||  !nr_ports) {
+		printf("%s: Not enough queues=%d ports=%d or workers=%d\n",
+			 __func__, rte_event_queue_count(evdev),
+			rte_event_port_count(evdev), rte_lcore_count() - 1);
+		return TEST_SUCCESS;
+	}
+
+	/* Injects events with m->seqn=0 to total_events */
+	ret = inject_events(
+		0x1 /*flow_id */,
+		RTE_EVENT_TYPE_CPU /* event_type */,
+		0 /* sub_event_type (stage 0) */,
+		in_sched_type,
+		0 /* queue */,
+		0 /* port */,
+		total_events /* events */);
+	if (ret)
+		return TEST_FAILED;
+
+	ret = launch_workers_and_wait(worker_group_based_pipeline,
+					worker_group_based_pipeline,
+					total_events, nr_ports, out_sched_type);
+	if (ret)
+		return TEST_FAILED;
+
+	if (in_sched_type != RTE_SCHED_TYPE_PARALLEL &&
+			out_sched_type == RTE_SCHED_TYPE_ATOMIC) {
+		/* Check the events order maintained or not */
+		return seqn_list_check(total_events);
+	}
+	return TEST_SUCCESS;
+}
+
+static int
+test_multi_port_queue_ordered_to_atomic(void)
+{
+	/* Ingress event order test */
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_ORDERED,
+				RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_multi_port_queue_ordered_to_ordered(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_ORDERED,
+				RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_multi_port_queue_ordered_to_parallel(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_ORDERED,
+				RTE_SCHED_TYPE_PARALLEL);
+}
+
+static int
+test_multi_port_queue_atomic_to_atomic(void)
+{
+	/* Ingress event order test */
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_ATOMIC,
+				RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_multi_port_queue_atomic_to_ordered(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_ATOMIC,
+				RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_multi_port_queue_atomic_to_parallel(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_ATOMIC,
+				RTE_SCHED_TYPE_PARALLEL);
+}
+
+static int
+test_multi_port_queue_parallel_to_atomic(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
+				RTE_SCHED_TYPE_ATOMIC);
+}
+
+static int
+test_multi_port_queue_parallel_to_ordered(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
+				RTE_SCHED_TYPE_ORDERED);
+}
+
+static int
+test_multi_port_queue_parallel_to_parallel(void)
+{
+	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
+				RTE_SCHED_TYPE_PARALLEL);
+}
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -991,6 +1142,24 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_port_flow_parallel_to_ordered),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_port_flow_parallel_to_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_ordered_to_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_ordered_to_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_ordered_to_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_atomic_to_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_atomic_to_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_atomic_to_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_parallel_to_atomic),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_parallel_to_ordered),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_parallel_to_parallel),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH v2 31/38] test/test: octeontx flow based maximum stage pipeline

[Jerin Jacob]

Add flow based pipeline test with maximum number of stages available
in the device.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 70 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index 06ac409..d7eb6de 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -1103,6 +1103,74 @@ test_multi_port_queue_parallel_to_parallel(void)
 	return test_multiport_queue_sched_type_test(RTE_SCHED_TYPE_PARALLEL,
 				RTE_SCHED_TYPE_PARALLEL);
 }
+
+static int
+worker_flow_based_pipeline_max_stages_rand_sched_type(void *arg)
+{
+	struct test_core_param *param = arg;
+	struct rte_event ev;
+	uint16_t valid_event;
+	uint8_t port = param->port;
+	rte_atomic32_t *total_events = param->total_events;
+
+	while (rte_atomic32_read(total_events) > 0) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
+		if (!valid_event)
+			continue;
+
+		if (ev.sub_event_type == 255) { /* last stage */
+			rte_pktmbuf_free(ev.mbuf);
+			rte_atomic32_sub(total_events, 1);
+		} else {
+			ev.event_type = RTE_EVENT_TYPE_CPU;
+			ev.sub_event_type++;
+			ev.sched_type =
+				rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1);
+			ev.op = RTE_EVENT_OP_FORWARD;
+			rte_event_enqueue_burst(evdev, port, &ev, 1);
+		}
+	}
+	return 0;
+}
+
+static int
+launch_multi_port_max_stages_random_sched_type(int (*fn)(void *))
+{
+	uint8_t nr_ports;
+	int ret;
+
+	nr_ports = RTE_MIN(rte_event_port_count(evdev), rte_lcore_count() - 1);
+
+	if (!nr_ports) {
+		printf("%s: Not enough ports=%d or workers=%d\n", __func__,
+			rte_event_port_count(evdev), rte_lcore_count() - 1);
+		return TEST_SUCCESS;
+	}
+
+	/* Injects events with m->seqn=0 to total_events */
+	ret = inject_events(
+		0x1 /*flow_id */,
+		RTE_EVENT_TYPE_CPU /* event_type */,
+		0 /* sub_event_type (stage 0) */,
+		rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1) /* sched_type */,
+		0 /* queue */,
+		0 /* port */,
+		MAX_EVENTS /* events */);
+	if (ret)
+		return TEST_FAILED;
+
+	return launch_workers_and_wait(fn, fn, MAX_EVENTS, nr_ports,
+					 0xff /* invalid */);
+}
+
+/* Flow based pipeline with maximum stages with random sched type */
+static int
+test_multi_port_flow_max_stages_random_sched_type(void)
+{
+	return launch_multi_port_max_stages_random_sched_type(
+		worker_flow_based_pipeline_max_stages_rand_sched_type);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -1160,6 +1228,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_port_queue_parallel_to_ordered),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_port_queue_parallel_to_parallel),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_flow_max_stages_random_sched_type),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH v2 32/38] test/test: octeontx queue based maximum stage pipeline

[Jerin Jacob]

Add queue based pipeline test with maximum number of stages available
in the device.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 39 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index d7eb6de..a0d58e1 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -1171,6 +1171,43 @@ test_multi_port_flow_max_stages_random_sched_type(void)
 		worker_flow_based_pipeline_max_stages_rand_sched_type);
 }
 
+static int
+worker_queue_based_pipeline_max_stages_rand_sched_type(void *arg)
+{
+	struct test_core_param *param = arg;
+	struct rte_event ev;
+	uint16_t valid_event;
+	uint8_t port = param->port;
+	uint8_t nr_queues = rte_event_queue_count(evdev);
+	rte_atomic32_t *total_events = param->total_events;
+
+	while (rte_atomic32_read(total_events) > 0) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
+		if (!valid_event)
+			continue;
+
+		if (ev.queue_id == nr_queues - 1) { /* last stage */
+			rte_pktmbuf_free(ev.mbuf);
+			rte_atomic32_sub(total_events, 1);
+		} else {
+			ev.event_type = RTE_EVENT_TYPE_CPU;
+			ev.queue_id++;
+			ev.sched_type =
+				rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1);
+			ev.op = RTE_EVENT_OP_FORWARD;
+			rte_event_enqueue_burst(evdev, port, &ev, 1);
+		}
+	}
+	return 0;
+}
+
+/* Queue based pipeline with maximum stages with random sched type */
+static int
+test_multi_port_queue_max_stages_random_sched_type(void)
+{
+	return launch_multi_port_max_stages_random_sched_type(
+		worker_queue_based_pipeline_max_stages_rand_sched_type);
+}
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -1230,6 +1267,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_port_queue_parallel_to_parallel),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_port_flow_max_stages_random_sched_type),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_queue_max_stages_random_sched_type),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH v2 33/38] test/test: octeontx queue and flow based max stage pipeline

[Jerin Jacob]

Add queue and flow based pipeline test with maximum number of
stages available in the device.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 41 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index a0d58e1..3022fdc 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -1208,6 +1208,45 @@ test_multi_port_queue_max_stages_random_sched_type(void)
 	return launch_multi_port_max_stages_random_sched_type(
 		worker_queue_based_pipeline_max_stages_rand_sched_type);
 }
+
+static int
+worker_mixed_pipeline_max_stages_rand_sched_type(void *arg)
+{
+	struct test_core_param *param = arg;
+	struct rte_event ev;
+	uint16_t valid_event;
+	uint8_t port = param->port;
+	uint8_t nr_queues = rte_event_queue_count(evdev);
+	rte_atomic32_t *total_events = param->total_events;
+
+	while (rte_atomic32_read(total_events) > 0) {
+		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
+		if (!valid_event)
+			continue;
+
+		if (ev.queue_id == nr_queues - 1) { /* Last stage */
+			rte_pktmbuf_free(ev.mbuf);
+			rte_atomic32_sub(total_events, 1);
+		} else {
+			ev.event_type = RTE_EVENT_TYPE_CPU;
+			ev.queue_id++;
+			ev.sub_event_type = rte_rand() % 256;
+			ev.sched_type =
+				rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1);
+			ev.op = RTE_EVENT_OP_FORWARD;
+			rte_event_enqueue_burst(evdev, port, &ev, 1);
+		}
+	}
+	return 0;
+}
+
+/* Queue and flow based pipeline with maximum stages with random sched type */
+static int
+test_multi_port_mixed_max_stages_random_sched_type(void)
+{
+	return launch_multi_port_max_stages_random_sched_type(
+		worker_mixed_pipeline_max_stages_rand_sched_type);
+}
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -1269,6 +1308,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_port_flow_max_stages_random_sched_type),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_port_queue_max_stages_random_sched_type),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_multi_port_mixed_max_stages_random_sched_type),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH v2 34/38] test/test: octeontx producer-consumer based order test

[Jerin Jacob]

Add flow based producer-consumer based ingress order test

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 60 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index 3022fdc..8ae8c63 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -1247,6 +1247,64 @@ test_multi_port_mixed_max_stages_random_sched_type(void)
 	return launch_multi_port_max_stages_random_sched_type(
 		worker_mixed_pipeline_max_stages_rand_sched_type);
 }
+
+static int
+worker_ordered_flow_producer(void *arg)
+{
+	struct test_core_param *param = arg;
+	uint8_t port = param->port;
+	struct rte_mbuf *m;
+	int counter = 0;
+
+	while (counter < NUM_PACKETS) {
+		m = rte_pktmbuf_alloc(eventdev_test_mempool);
+		if (m == NULL)
+			continue;
+
+		m->seqn = counter++;
+
+		struct rte_event ev = {};
+
+		ev.flow_id = 0x1; /* Generate a fat flow */
+		ev.sub_event_type = 0;
+		/* Inject the new event */
+		ev.op = RTE_EVENT_OP_NEW;
+		ev.event_type = RTE_EVENT_TYPE_CPU;
+		ev.sched_type = RTE_SCHED_TYPE_ORDERED;
+		ev.queue_id = 0;
+		ev.mbuf = m;
+		rte_event_enqueue_burst(evdev, port, &ev, 1);
+	}
+
+	return 0;
+}
+
+static inline int
+test_producer_consumer_ingress_order_test(int (*fn)(void *))
+{
+	uint8_t nr_ports;
+
+	nr_ports = RTE_MIN(rte_event_port_count(evdev), rte_lcore_count() - 1);
+
+	if (rte_lcore_count() < 3 || nr_ports < 2) {
+		printf("### Not enough cores for %s test.\n", __func__);
+		return TEST_SUCCESS;
+	}
+
+	launch_workers_and_wait(worker_ordered_flow_producer, fn,
+				NUM_PACKETS, nr_ports, RTE_SCHED_TYPE_ATOMIC);
+	/* Check the events order maintained or not */
+	return seqn_list_check(NUM_PACKETS);
+}
+
+/* Flow based producer consumer ingress order test */
+static int
+test_flow_producer_consumer_ingress_order_test(void)
+{
+	return test_producer_consumer_ingress_order_test(
+				worker_flow_based_pipeline);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -1310,6 +1368,8 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_port_queue_max_stages_random_sched_type),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_multi_port_mixed_max_stages_random_sched_type),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_flow_producer_consumer_ingress_order_test),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH v2 35/38] test/test: add remaining tests based on existing helpers

[Jerin Jacob]

Add the following tests based existing helper functions
- Queue based producer-consumer ingress order test
- Run existing queue and flow based ordering test in dequeue timeout
  mode

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 test/test/test_eventdev_octeontx.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/test/test/test_eventdev_octeontx.c b/test/test/test_eventdev_octeontx.c
index 8ae8c63..4f24674 100644
--- a/test/test/test_eventdev_octeontx.c
+++ b/test/test/test_eventdev_octeontx.c
@@ -1305,6 +1305,14 @@ test_flow_producer_consumer_ingress_order_test(void)
 				worker_flow_based_pipeline);
 }
 
+/* Queue based producer consumer ingress order test */
+static int
+test_queue_producer_consumer_ingress_order_test(void)
+{
+	return test_producer_consumer_ingress_order_test(
+				worker_group_based_pipeline);
+}
+
 static struct unit_test_suite eventdev_octeontx_testsuite  = {
 	.suite_name = "eventdev octeontx unit test suite",
 	.setup = testsuite_setup,
@@ -1370,6 +1378,13 @@ static struct unit_test_suite eventdev_octeontx_testsuite  = {
 			test_multi_port_mixed_max_stages_random_sched_type),
 		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
 			test_flow_producer_consumer_ingress_order_test),
+		TEST_CASE_ST(eventdev_setup, eventdev_teardown,
+			test_queue_producer_consumer_ingress_order_test),
+		/* Tests with dequeue timeout */
+		TEST_CASE_ST(eventdev_setup_dequeue_timeout, eventdev_teardown,
+			test_multi_port_flow_ordered_to_atomic),
+		TEST_CASE_ST(eventdev_setup_dequeue_timeout, eventdev_teardown,
+			test_multi_port_queue_ordered_to_atomic),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[PATCH v2 36/38] doc: add OCTEONTX ssovf details

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 doc/guides/eventdevs/index.rst    |  38 ++++++++++
 doc/guides/eventdevs/octeontx.rst | 151 ++++++++++++++++++++++++++++++++++++++
 doc/guides/index.rst              |   1 +
 3 files changed, 190 insertions(+)
 create mode 100644 doc/guides/eventdevs/index.rst
 create mode 100644 doc/guides/eventdevs/octeontx.rst

diff --git a/doc/guides/eventdevs/index.rst b/doc/guides/eventdevs/index.rst
new file mode 100644
index 0000000..433ee0b
--- /dev/null
+++ b/doc/guides/eventdevs/index.rst
@@ -0,0 +1,38 @@
+..  BSD LICENSE
+    Copyright(c) 2017 Cavium networks. All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions
+    are met:
+
+    * Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in
+    the documentation and/or other materials provided with the
+    distribution.
+    * Neither the name of Cavium networks nor the names of its
+    contributors may be used to endorse or promote products derived
+    from this software without specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+    OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+    LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+    DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+    THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+Event Device Drivers
+=====================
+
+
+.. toctree::
+    :maxdepth: 2
+    :numbered:
+
+    octeontx
diff --git a/doc/guides/eventdevs/octeontx.rst b/doc/guides/eventdevs/octeontx.rst
new file mode 100644
index 0000000..6d88192
--- /dev/null
+++ b/doc/guides/eventdevs/octeontx.rst
@@ -0,0 +1,151 @@
+..  BSD LICENSE
+    Copyright (C) Cavium networks Ltd. 2017.
+    All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions
+    are met:
+
+    * Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in
+    the documentation and/or other materials provided with the
+    distribution.
+    * Neither the name of Cavium networks nor the names of its
+    contributors may be used to endorse or promote products derived
+    from this software without specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+    OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+    LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+    DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+    THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+OCTEONTX SSOVF Eventdev Driver
+==============================
+
+The OCTEONTX SSOVF PMD (**librte_pmd_octeontx_ssovf**) provides poll mode
+eventdev driver support for the inbuilt event device found in the **Cavium OCTEONTX**
+SoC family as well as their virtual functions (VF) in SR-IOV context.
+
+More information can be found at `Cavium Networks Official Website
+<http://www.cavium.com/OCTEON-TX_ARM_Processors.html>`_.
+
+Features
+--------
+
+Features of the OCTEONTX SSOVF PMD are:
+
+- 64 Event queues
+- 32 Event ports
+- HW event scheduler
+- Supports 1M flows per event queue
+- Flow based event pipelining
+- Flow pinning support in flow based event pipelining
+- Queue based event pipelining
+- Supports ATOMIC,ORDERED,PARALLEL schedule types per flow
+- Event scheduling QoS based on event queue priority
+- Open system with configurable amount of outstanding events
+- HW accelerated dequeue timeout support to enable power management
+- SR-IOV VF
+
+Supported OCTEONTX SoCs
+-----------------------
+- CN83xx
+
+Prerequisites
+-------------
+
+There are three main pre-perquisites for executing SSOVF PMD on a OCTEONTX
+compatible board:
+
+1. **OCTEONTX Linux kernel PF driver for Network acceleration HW blocks**
+
+   The OCTEONTX Linux kernel drivers (including the required PF driver for the
+   SSOVF) are available on Github at `octeontx-kmod <https://github.com/caviumnetworks/octeontx-kmod>`_
+   along with build, install and dpdk usage instructions.
+
+2. **ARM64 Tool Chain**
+
+   For example, the *aarch64* Linaro Toolchain, which can be obtained from
+   `here <https://releases.linaro.org/components/toolchain/binaries/4.9-2017.01/aarch64-linux-gnu>`_.
+
+3. **Rootfile system**
+
+   Any *aarch64* supporting filesystem can be used. For example,
+   Ubuntu 15.10 (Wily) or 16.04 LTS (Xenial) userland which can be obtained
+   from `<http://cdimage.ubuntu.com/ubuntu-base/releases/16.04/release/ubuntu-base-16.04.1-base-arm64.tar.gz>`_.
+
+   As an alternative method, SSOVF PMD can also be executed using images provided
+   as part of SDK from Cavium. The SDK includes all the above prerequisites necessary
+   to bring up a OCTEONTX board.
+
+   SDK and related information can be obtained from: `Cavium support site <https://support.cavium.com/>`_.
+
+- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.
+
+Pre-Installation Configuration
+------------------------------
+
+Config File Options
+~~~~~~~~~~~~~~~~~~~
+
+The following options can be modified in the ``config`` file.
+Please note that enabling debugging options may affect system performance.
+
+- ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF`` (default ``y``)
+
+  Toggle compilation of the ``librte_pmd_octeontx_ssovf`` driver.
+
+- ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG`` (default ``n``)
+
+  Toggle display of generic debugging messages
+
+Driver Compilation
+~~~~~~~~~~~~~~~~~~
+
+To compile the OCTEONTX SSOVF PMD for Linux arm64 gcc target, run the
+following “make” command:
+
+.. code-block:: console
+
+   cd <DPDK-source-directory>
+   make config T=arm64-thunderx-linuxapp-gcc install
+
+
+Initialization
+--------------
+
+The octeontx eventdev is exposed as a vdev device which consists of a set
+of SSO group and work-slot PCIe VF devices. On EAL initialization,
+SSO PCIe VF devices will be probed and then the vdev device can be created
+from the application code, or from the EAL command line based on
+the number of probed/bound SSO PCIe VF device to DPDK by
+
+* Invoking ``rte_eal_vdev_init("event_octeontx")`` from the application
+
+* Using ``--vdev="event_octeontx"`` in the EAL options, which will call
+  rte_eal_vdev_init() internally
+
+Example:
+
+.. code-block:: console
+
+    ./your_eventdev_application --vdev="event_octeontx"
+
+Limitations
+-----------
+
+Burst mode support
+~~~~~~~~~~~~~~~~~~
+
+Burst mode is not supported. Dequeue and Enqueue functions accepts only single
+event at a time.
+
diff --git a/doc/guides/index.rst b/doc/guides/index.rst
index 82b00e9..63716b0 100644
--- a/doc/guides/index.rst
+++ b/doc/guides/index.rst
@@ -43,6 +43,7 @@ DPDK documentation
    testpmd_app_ug/index
    nics/index
    cryptodevs/index
+   eventdevs/index
    xen/index
    contributing/index
    rel_notes/index
-- 
2.5.5

[PATCH v2 37/38] maintainers: claim OCTEONTX eventdev PMD maintainership

[Jerin Jacob]

Add a section for the eventdev PMDs, and note the next-tree.
Claim maintainership of the Cavium octeontx eventdev PMD

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 MAINTAINERS | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 711fbfb..a2e9710 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -478,6 +478,17 @@ M: Fan Zhang <roy.fan.zhang@intel.com>
 F: drivers/crypto/scheduler/
 F: doc/guides/cryptodevs/scheduler.rst
 
+Eventdev Drivers
+------------------
+
+T: git://dpdk.org/next/dpdk-next-eventdev
+
+Cavium OCTEONTX ssovf
+M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
+M: Santosh Shukla <santosh.shukla@caviumnetworks.com>
+F: drivers/event/octeontx/
+F: test/test/test_eventdev_octeontx.c
+F: doc/guides/eventdevs/octeontx.rst
 
 Packet processing
 -----------------
-- 
2.5.5

[PATCH v2 38/38] doc: add Cavium OCTEONTX eventdev PMD to 17.05 release notes

[Jerin Jacob]

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 doc/guides/rel_notes/release_17_05.rst | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/doc/guides/rel_notes/release_17_05.rst b/doc/guides/rel_notes/release_17_05.rst
index 918f483..a3b2b4e 100644
--- a/doc/guides/rel_notes/release_17_05.rst
+++ b/doc/guides/rel_notes/release_17_05.rst
@@ -49,6 +49,11 @@ New Features
 
   sPAPR IOMMU based pci probing enabled for vfio-pci devices.
 
+* **Added Cavium OCTEONTX Eventdev PMD.**
+
+  Added the new octeontx ssovf eventdev driver for OCTEONTX devices. See the
+  "Event Device Drivers" document for more details on this new driver.
+
 Resolved Issues
 ---------------
 
@@ -76,7 +81,6 @@ EAL
 Drivers
 ~~~~~~~
 
-
 Libraries
 ~~~~~~~~~
 
-- 
2.5.5

Re: [PATCH v2 38/38] doc: add Cavium OCTEONTX eventdev PMD to 17.05 release notes

[Mcnamara, John]

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Jerin Jacob
> Sent: Friday, March 31, 2017 8:35 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce
> <bruce.richardson@intel.com>; Van Haaren, Harry
> <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
> <gage.eads@intel.com>; nipun.gupta@nxp.com;
> santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH v2 38/38] doc: add Cavium OCTEONTX eventdev PMD
> to 17.05 release notes
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>

Acked-by: John McNamara <john.mcnamara@intel.com>

Re: [PATCH v2 36/38] doc: add OCTEONTX ssovf details

[Mcnamara, John]

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Jerin Jacob
> Sent: Friday, March 31, 2017 8:35 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce
> <bruce.richardson@intel.com>; Van Haaren, Harry
> <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
> <gage.eads@intel.com>; nipun.gupta@nxp.com;
> santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH v2 36/38] doc: add OCTEONTX ssovf details
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
> Acked-by: Harry van Haaren <harry.van.haaren@intel.com>

Thanks, nice addition to the docs.

> ...
> +
> +Features of the OCTEONTX SSOVF PMD are:
> +
> +- 64 Event queues
> +- 32 Event ports
> +- HW event scheduler
> +- Supports 1M flows per event queue
> +- Flow based event pipelining
> +- Flow pinning support in flow based event pipelining
> +- Queue based event pipelining
> +- Supports ATOMIC,ORDERED,PARALLEL schedule types per flow

Should have a space after these commas.

Apart from that:

Acked-by: John McNamara <john.mcnamara@intel.com>

Re: [PATCH v2 36/38] doc: add OCTEONTX ssovf details

[Mcnamara, John]

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Jerin Jacob
> Sent: Friday, March 31, 2017 8:35 PM
> To: dev@dpdk.org
> Cc: thomas.monjalon@6wind.com; Richardson, Bruce
> <bruce.richardson@intel.com>; Van Haaren, Harry
> <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
> <gage.eads@intel.com>; nipun.gupta@nxp.com;
> santosh.shukla@caviumnetworks.com; Jerin Jacob
> <jerin.jacob@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH v2 36/38] doc: add OCTEONTX ssovf details
> 
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
> Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
> ---
>  doc/guides/eventdevs/index.rst    |  38 ++++++++++
>  doc/guides/eventdevs/octeontx.rst | 151
> ++++++++++++++++++++++++++++++++++++++
>  doc/guides/index.rst              |   1 +
>  3 files changed, 190 insertions(+)
>  create mode 100644 doc/guides/eventdevs/index.rst  create mode 100644
> doc/guides/eventdevs/octeontx.rst
> 
> diff --git a/doc/guides/eventdevs/index.rst
> b/doc/guides/eventdevs/index.rst new file mode 100644 index
> 0000000..433ee0b
> --- /dev/null
> +++ b/doc/guides/eventdevs/index.rst
> @@ -0,0 +1,38 @@
> +..  BSD LICENSE
> +    Copyright(c) 2017 Cavium networks. All rights reserved.
> +
> +    Redistribution and use in source and binary forms, with or without
> +    modification, are permitted provided that the following conditions
> +    are met:
> +
> +    * Redistributions of source code must retain the above copyright
> +    notice, this list of conditions and the following disclaimer.
> +    * Redistributions in binary form must reproduce the above copyright
> +    notice, this list of conditions and the following disclaimer in
> +    the documentation and/or other materials provided with the
> +    distribution.
> +    * Neither the name of Cavium networks nor the names of its
> +    contributors may be used to endorse or promote products derived
> +    from this software without specific prior written permission.
> +
> +    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> +    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> +    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
> +    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
> +    OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
> +    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
> +    LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
> +    DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
> +    THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> +    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> +    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> +
> +Event Device Drivers
> +=====================
> +
> +
> +.. toctree::
> +    :maxdepth: 2
> +    :numbered:
> +
> +    octeontx
> diff --git a/doc/guides/eventdevs/octeontx.rst
> b/doc/guides/eventdevs/octeontx.rst
> new file mode 100644
> index 0000000..6d88192
> --- /dev/null
> +++ b/doc/guides/eventdevs/octeontx.rst
> @@ -0,0 +1,151 @@
> +..  BSD LICENSE
> +    Copyright (C) Cavium networks Ltd. 2017.
> +    All rights reserved.
> +
> +    Redistribution and use in source and binary forms, with or without
> +    modification, are permitted provided that the following conditions
> +    are met:
> +
> +    * Redistributions of source code must retain the above copyright
> +    notice, this list of conditions and the following disclaimer.
> +    * Redistributions in binary form must reproduce the above copyright
> +    notice, this list of conditions and the following disclaimer in
> +    the documentation and/or other materials provided with the
> +    distribution.
> +    * Neither the name of Cavium networks nor the names of its
> +    contributors may be used to endorse or promote products derived
> +    from this software without specific prior written permission.
> +
> +    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> +    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> +    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
> +    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
> +    OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
> +    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
> +    LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
> +    DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
> +    THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> +    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> +    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> +
> +OCTEONTX SSOVF Eventdev Driver
> +==============================
> +
> +The OCTEONTX SSOVF PMD (**librte_pmd_octeontx_ssovf**) provides poll
> +mode eventdev driver support for the inbuilt event device found in the
> +**Cavium OCTEONTX** SoC family as well as their virtual functions (VF) in
> SR-IOV context.
> +
> +More information can be found at `Cavium Networks Official Website
> +<http://www.cavium.com/OCTEON-TX_ARM_Processors.html>`_.
> +
> +Features
> +--------
> +
> +Features of the OCTEONTX SSOVF PMD are:
> +
> +- 64 Event queues
> +- 32 Event ports
> +- HW event scheduler
> +- Supports 1M flows per event queue
> +- Flow based event pipelining
> +- Flow pinning support in flow based event pipelining
> +- Queue based event pipelining
> +- Supports ATOMIC,ORDERED,PARALLEL schedule types per flow
> +- Event scheduling QoS based on event queue priority
> +- Open system with configurable amount of outstanding events
> +- HW accelerated dequeue timeout support to enable power management
> +- SR-IOV VF
> +
> +Supported OCTEONTX SoCs
> +-----------------------
> +- CN83xx
> +
> +Prerequisites
> +-------------
> +
> +There are three main pre-perquisites for executing SSOVF PMD on a
> +OCTEONTX compatible board:
> +
> +1. **OCTEONTX Linux kernel PF driver for Network acceleration HW
> +blocks**
> +
> +   The OCTEONTX Linux kernel drivers (including the required PF driver
> for the
> +   SSOVF) are available on Github at `octeontx-kmod
> <https://github.com/caviumnetworks/octeontx-kmod>`_
> +   along with build, install and dpdk usage instructions.
> +
> +2. **ARM64 Tool Chain**
> +
> +   For example, the *aarch64* Linaro Toolchain, which can be obtained
> from
> +   `here <https://releases.linaro.org/components/toolchain/binaries/4.9-
> 2017.01/aarch64-linux-gnu>`_.
> +
> +3. **Rootfile system**
> +
> +   Any *aarch64* supporting filesystem can be used. For example,
> +   Ubuntu 15.10 (Wily) or 16.04 LTS (Xenial) userland which can be
> obtained
> +   from `<http://cdimage.ubuntu.com/ubuntu-
> base/releases/16.04/release/ubuntu-base-16.04.1-base-arm64.tar.gz>`_.
> +
> +   As an alternative method, SSOVF PMD can also be executed using images
> provided
> +   as part of SDK from Cavium. The SDK includes all the above
> prerequisites necessary
> +   to bring up a OCTEONTX board.
> +
> +   SDK and related information can be obtained from: `Cavium support site
> <https://support.cavium.com/>`_.
> +
> +- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to
> setup the basic DPDK environment.
> +
> +Pre-Installation Configuration
> +------------------------------
> +
> +Config File Options
> +~~~~~~~~~~~~~~~~~~~
> +
> +The following options can be modified in the ``config`` file.
> +Please note that enabling debugging options may affect system
> performance.
> +
> +- ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF`` (default ``y``)
> +
> +  Toggle compilation of the ``librte_pmd_octeontx_ssovf`` driver.
> +
> +- ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG`` (default ``n``)
> +
> +  Toggle display of generic debugging messages
> +
> +Driver Compilation
> +~~~~~~~~~~~~~~~~~~
> +
> +To compile the OCTEONTX SSOVF PMD for Linux arm64 gcc target, run the
> +following “make” command:

One other minor thing, you should use normal quotes around make. Sphinx
converts them to proper quotes. Here and elsewhere.

Re: [PATCH v2 36/38] doc: add OCTEONTX ssovf details

[Jerin Jacob]

On Sun, Apr 02, 2017 at 12:29:22PM +0000, Mcnamara, John wrote:
> 
> > -----Original Message-----
> > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Jerin Jacob
> > Sent: Friday, March 31, 2017 8:35 PM
> > To: dev@dpdk.org
> > Cc: thomas.monjalon@6wind.com; Richardson, Bruce
> > <bruce.richardson@intel.com>; Van Haaren, Harry
> > <harry.van.haaren@intel.com>; hemant.agrawal@nxp.com; Eads, Gage
> > <gage.eads@intel.com>; nipun.gupta@nxp.com;
> > santosh.shukla@caviumnetworks.com; Jerin Jacob
> > <jerin.jacob@caviumnetworks.com>
> > Subject: [dpdk-dev] [PATCH v2 36/38] doc: add OCTEONTX ssovf details
> > 
> > Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> > Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
> > Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
> 
> Thanks, nice addition to the docs.
> 
> > ...
> > +
> > +Features of the OCTEONTX SSOVF PMD are:
> > +
> > +- 64 Event queues
> > +- 32 Event ports
> > +- HW event scheduler
> > +- Supports 1M flows per event queue
> > +- Flow based event pipelining
> > +- Flow pinning support in flow based event pipelining
> > +- Queue based event pipelining
> > +- Supports ATOMIC,ORDERED,PARALLEL schedule types per flow
> 
> Should have a space after these commas.

Thanks for the review. Will fix the space issue and add normal quotes around
``make``.

> 
> Apart from that:
> 
> Acked-by: John McNamara <john.mcnamara@intel.com>
> 
> 
> 
> 

Re: [PATCH v2 00/38] Cavium OCTEONTX ssovf eventdev PMD

[Jerin Jacob]

On Sat, Apr 01, 2017 at 01:04:27AM +0530, Jerin Jacob wrote:
> The following patch set adds Cavium OCTEONTX HW based eventdev
> implementation to the next-eventdev tree.
> 
> Introduction to OCTEON-TX ARM processors can be found
> here: http://www.cavium.com/OCTEON-TX_ARM_Processors.html
> 
> - First 18 patches implements eventdev API with OCTEONTX SSOVF HW.
> - 19-35 patches adds the unit test cases for the driver.
> - 36-38 adds the documentation and updates the release notes


Applied to dpdk-next-eventdev/master after addressing John's comments.
http://dpdk.org/ml/archives/dev/2017-April/062868.html

Thanks.