All of lore.kernel.org
 help / color / mirror / Atom feed
From: Andi Kleen <ak@linux.intel.com>
To: Sean Christopherson <seanjc@google.com>,
	Lai Jiangshan <jiangshanlai+lkml@gmail.com>
Cc: Kuppuswamy Sathyanarayanan 
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	X86 ML <x86@kernel.org>, Paolo Bonzini <pbonzini@redhat.com>,
	David Hildenbrand <david@redhat.com>,
	Andrea Arcangeli <aarcange@redhat.com>,
	Josh Poimboeuf <jpoimboe@redhat.com>,
	Juergen Gross <jgross@suse.com>, Deep Shah <sdeep@vmware.com>,
	VMware Inc <pv-drivers@vmware.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
	Peter H Anvin <hpa@zytor.com>,
	Dave Hansen <dave.hansen@intel.com>,
	Tony Luck <tony.luck@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Kirill Shutemov <kirill.shutemov@linux.intel.com>,
	Kuppuswamy Sathyanarayanan <knsathya@kernel.org>,
	LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v8 06/11] x86/traps: Add #VE support for TDX guest
Date: Mon, 11 Oct 2021 09:49:15 -0700	[thread overview]
Message-ID: <924d36a6-480b-2ef4-4691-dc010ed82d45@linux.intel.com> (raw)
In-Reply-To: <YWRS41aZH9A6fekt@google.com>


> Minor clarification: it eliminates the chance of a #VE during the syscall gap
> _if the VMM is benign_.  If the VMM is malicious, it can unmap and remap the
> syscall page to induce an EPT Violation #VE due to the page not being accepted.

This has been addressed. The TDX module will support a mode that forbids 
unmapping pages permanently, and Linux is going to check/enforce that 
this mode is enabled. The patch for the check is not included in the 
posted patches yet though.


>
> This question?
>
>    Can the hypervisor cause an already-accepted secure-EPT page to transition to
>    the unaccepted state?
>
> Yep.  I wrote the above before following the link, I should have guessed which
> question it was :-)
>
> IIRC, the proposed middle ground was to add a TDCALL and/or TDPARAMS setting that
> would allow the guest to opt-out of EPT Violation #VE due to page not accepted,

It's a TDPARAMS setting


-Andi


  reply	other threads:[~2021-10-11 16:49 UTC|newest]

Thread overview: 77+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-05  2:51 [PATCH v8 00/11] Add TDX Guest Support (Initial support) Kuppuswamy Sathyanarayanan
2021-10-05  2:51 ` [PATCH v8 01/11] x86/paravirt: Move halt paravirt calls under CONFIG_PARAVIRT Kuppuswamy Sathyanarayanan
2021-10-05 20:13   ` Josh Poimboeuf
2021-10-05  2:51 ` [PATCH v8 02/11] x86/tdx: Introduce INTEL_TDX_GUEST config option Kuppuswamy Sathyanarayanan
2021-10-05  4:53   ` Randy Dunlap
2021-10-05 13:29     ` Sathyanarayanan Kuppuswamy Natarajan
2021-10-05 14:09       ` Dave Hansen
2021-10-05 14:31         ` Sean Christopherson
2021-10-05 14:43         ` Kuppuswamy, Sathyanarayanan
2021-10-05 14:13       ` Borislav Petkov
2021-10-05 14:48         ` Kuppuswamy, Sathyanarayanan
2021-10-05 17:29           ` Borislav Petkov
2021-10-05 20:21             ` Josh Poimboeuf
2021-10-05 20:38               ` Kuppuswamy, Sathyanarayanan
2021-10-05 20:17   ` Josh Poimboeuf
2021-10-05 20:33     ` Sean Christopherson
2021-10-05 20:42       ` Dave Hansen
2021-10-05 20:37     ` Kuppuswamy, Sathyanarayanan
2021-10-05  2:51 ` [PATCH v8 03/11] x86/cpufeatures: Add TDX Guest CPU feature Kuppuswamy Sathyanarayanan
2021-10-05 21:04   ` Josh Poimboeuf
2021-10-05 21:19     ` Borislav Petkov
2021-10-05 21:41     ` Kuppuswamy, Sathyanarayanan
2021-10-06  3:42       ` Josh Poimboeuf
2021-10-06  4:33         ` Kuppuswamy, Sathyanarayanan
2021-10-06  5:03           ` Josh Poimboeuf
2021-10-06 12:47             ` Borislav Petkov
2021-10-06 14:11               ` Josh Poimboeuf
2021-10-06 14:26                 ` Borislav Petkov
2021-10-06 14:25   ` Josh Poimboeuf
2021-10-06 15:26   ` Borislav Petkov
2021-10-06 15:43     ` Kuppuswamy, Sathyanarayanan
2021-10-06 16:20       ` Borislav Petkov
2021-10-05  2:51 ` [PATCH v8 04/11] x86/tdx: Add Intel ARCH support to cc_platform_has() Kuppuswamy Sathyanarayanan
2021-10-05  4:47   ` Randy Dunlap
2021-10-05 12:29     ` Kuppuswamy, Sathyanarayanan
2021-10-05 21:16   ` Josh Poimboeuf
2021-10-05 21:42     ` Kuppuswamy, Sathyanarayanan
2021-10-06 18:02     ` Borislav Petkov
2021-10-06 18:14       ` Kuppuswamy, Sathyanarayanan
2021-10-05  2:51 ` [PATCH v8 05/11] x86/tdx: Add __tdx_module_call() and __tdx_hypercall() helper functions Kuppuswamy Sathyanarayanan
2021-10-06  5:53   ` Josh Poimboeuf
2021-10-06 16:52     ` Kuppuswamy, Sathyanarayanan
2021-10-07  9:33   ` Borislav Petkov
2021-10-07 16:55     ` Kuppuswamy, Sathyanarayanan
2021-10-05  2:52 ` [PATCH v8 06/11] x86/traps: Add #VE support for TDX guest Kuppuswamy Sathyanarayanan
2021-10-06 18:40   ` Josh Poimboeuf
2021-10-07 17:06   ` Borislav Petkov
2021-10-07 17:22     ` Kuppuswamy, Sathyanarayanan
2021-10-07 17:32       ` Borislav Petkov
2021-10-17 17:15     ` Dave Hansen
2021-10-18 10:53       ` Borislav Petkov
2021-10-18 14:05         ` Dave Hansen
2021-10-18 14:09           ` Borislav Petkov
2021-10-09  3:56   ` Lai Jiangshan
2021-10-11 15:06     ` Sean Christopherson
2021-10-11 16:49       ` Andi Kleen [this message]
2021-10-05  2:52 ` [PATCH v8 07/11] x86/tdx: Add HLT " Kuppuswamy Sathyanarayanan
2021-10-06 19:17   ` Josh Poimboeuf
2021-10-07 19:25     ` Kuppuswamy, Sathyanarayanan
2021-10-08 17:31   ` Borislav Petkov
2021-10-08 17:38     ` Kuppuswamy, Sathyanarayanan
2021-10-08 17:59       ` Borislav Petkov
2021-10-05  2:52 ` [PATCH v8 08/11] x86/tdx: Wire up KVM hypercalls Kuppuswamy Sathyanarayanan
2021-10-06 19:34   ` Josh Poimboeuf
2021-10-06 19:40     ` Borislav Petkov
2021-11-05 20:59   ` Sean Christopherson
2021-11-12 16:17     ` Sathyanarayanan Kuppuswamy
2021-10-05  2:52 ` [PATCH v8 09/11] x86/tdx: Add MSR support for TDX guest Kuppuswamy Sathyanarayanan
2021-10-05 23:22   ` Josh Poimboeuf
2021-10-06  0:48     ` Kuppuswamy, Sathyanarayanan
2021-10-06 19:49   ` Josh Poimboeuf
2021-10-08  2:16     ` Kuppuswamy, Sathyanarayanan
2021-10-05  2:52 ` [PATCH v8 10/11] x86/tdx: Don't write CSTAR MSR on Intel Kuppuswamy Sathyanarayanan
2021-10-05  2:52 ` [PATCH v8 11/11] x86/tdx: Handle CPUID via #VE Kuppuswamy Sathyanarayanan
2021-10-06 20:26   ` Josh Poimboeuf
2021-10-08  2:25     ` Kuppuswamy, Sathyanarayanan
2021-10-11 18:16       ` Josh Poimboeuf

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=924d36a6-480b-2ef4-4691-dc010ed82d45@linux.intel.com \
    --to=ak@linux.intel.com \
    --cc=aarcange@redhat.com \
    --cc=bp@alien8.de \
    --cc=dan.j.williams@intel.com \
    --cc=dave.hansen@intel.com \
    --cc=david@redhat.com \
    --cc=hpa@zytor.com \
    --cc=jgross@suse.com \
    --cc=jiangshanlai+lkml@gmail.com \
    --cc=jmattson@google.com \
    --cc=joro@8bytes.org \
    --cc=jpoimboe@redhat.com \
    --cc=kirill.shutemov@linux.intel.com \
    --cc=knsathya@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=pv-drivers@vmware.com \
    --cc=sathyanarayanan.kuppuswamy@linux.intel.com \
    --cc=sdeep@vmware.com \
    --cc=seanjc@google.com \
    --cc=tglx@linutronix.de \
    --cc=tony.luck@intel.com \
    --cc=vkuznets@redhat.com \
    --cc=wanpengli@tencent.com \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.