From: Lai Jiangshan <jiangshanlai+lkml@gmail.com>
To: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
X86 ML <x86@kernel.org>, Paolo Bonzini <pbonzini@redhat.com>,
David Hildenbrand <david@redhat.com>,
Andrea Arcangeli <aarcange@redhat.com>,
Josh Poimboeuf <jpoimboe@redhat.com>,
Juergen Gross <jgross@suse.com>, Deep Shah <sdeep@vmware.com>,
VMware Inc <pv-drivers@vmware.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
Peter H Anvin <hpa@zytor.com>,
Dave Hansen <dave.hansen@intel.com>,
Tony Luck <tony.luck@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Andi Kleen <ak@linux.intel.com>,
Kirill Shutemov <kirill.shutemov@linux.intel.com>,
Sean Christopherson <seanjc@google.com>,
Kuppuswamy Sathyanarayanan <knsathya@kernel.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v8 06/11] x86/traps: Add #VE support for TDX guest
Date: Sat, 9 Oct 2021 11:56:35 +0800 [thread overview]
Message-ID: <CAJhGHyAqapG2MHfANeHG+LFHYr3a8AcHtbxcL3xUR_rmEOTqiQ@mail.gmail.com> (raw)
In-Reply-To: <20211005025205.1784480-7-sathyanarayanan.kuppuswamy@linux.intel.com>
On Tue, Oct 5, 2021 at 10:54 AM Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
>
> The entry paths do not access TD-shared memory, MMIO regions or use
> those specific MSRs, instructions, CPUID leaves that might generate #VE.
> In addition, all interrupts including NMIs are blocked by the hardware
> starting with #VE delivery until TDGETVEINFO is called. This eliminates
> the chance of a #VE during the syscall gap or paranoid entry paths and
> simplifies #VE handling.
Hello
If the reason is applied to #VE, I think it can be applied to SVM-ES's
#VC too. (I wish the entry code for #VC to be simplified since I'm
moving some the asm entry code to C code)
And I'm sorry I haven't read all the emails.
Has the question asked by Andy Lutomirski been answered in any emails?
https://lore.kernel.org/lkml/CALCETrU9XypKbj-TrXLB3CPW6=MZ__5ifLz0ckbB=c=Myegn9Q@mail.gmail.com/
Thanks
Lai
>
> After TDGETVEINFO #VE could happen in theory (e.g. through an NMI),
> but it is expected not to happen because TDX expects NMIs not to
> trigger #VEs. Another case where they could happen is if the #VE
> exception panics, but in this case there are no guarantees on anything
> anyways.
>
next prev parent reply other threads:[~2021-10-09 3:56 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-05 2:51 [PATCH v8 00/11] Add TDX Guest Support (Initial support) Kuppuswamy Sathyanarayanan
2021-10-05 2:51 ` [PATCH v8 01/11] x86/paravirt: Move halt paravirt calls under CONFIG_PARAVIRT Kuppuswamy Sathyanarayanan
2021-10-05 20:13 ` Josh Poimboeuf
2021-10-05 2:51 ` [PATCH v8 02/11] x86/tdx: Introduce INTEL_TDX_GUEST config option Kuppuswamy Sathyanarayanan
2021-10-05 4:53 ` Randy Dunlap
2021-10-05 13:29 ` Sathyanarayanan Kuppuswamy Natarajan
2021-10-05 14:09 ` Dave Hansen
2021-10-05 14:31 ` Sean Christopherson
2021-10-05 14:43 ` Kuppuswamy, Sathyanarayanan
2021-10-05 14:13 ` Borislav Petkov
2021-10-05 14:48 ` Kuppuswamy, Sathyanarayanan
2021-10-05 17:29 ` Borislav Petkov
2021-10-05 20:21 ` Josh Poimboeuf
2021-10-05 20:38 ` Kuppuswamy, Sathyanarayanan
2021-10-05 20:17 ` Josh Poimboeuf
2021-10-05 20:33 ` Sean Christopherson
2021-10-05 20:42 ` Dave Hansen
2021-10-05 20:37 ` Kuppuswamy, Sathyanarayanan
2021-10-05 2:51 ` [PATCH v8 03/11] x86/cpufeatures: Add TDX Guest CPU feature Kuppuswamy Sathyanarayanan
2021-10-05 21:04 ` Josh Poimboeuf
2021-10-05 21:19 ` Borislav Petkov
2021-10-05 21:41 ` Kuppuswamy, Sathyanarayanan
2021-10-06 3:42 ` Josh Poimboeuf
2021-10-06 4:33 ` Kuppuswamy, Sathyanarayanan
2021-10-06 5:03 ` Josh Poimboeuf
2021-10-06 12:47 ` Borislav Petkov
2021-10-06 14:11 ` Josh Poimboeuf
2021-10-06 14:26 ` Borislav Petkov
2021-10-06 14:25 ` Josh Poimboeuf
2021-10-06 15:26 ` Borislav Petkov
2021-10-06 15:43 ` Kuppuswamy, Sathyanarayanan
2021-10-06 16:20 ` Borislav Petkov
2021-10-05 2:51 ` [PATCH v8 04/11] x86/tdx: Add Intel ARCH support to cc_platform_has() Kuppuswamy Sathyanarayanan
2021-10-05 4:47 ` Randy Dunlap
2021-10-05 12:29 ` Kuppuswamy, Sathyanarayanan
2021-10-05 21:16 ` Josh Poimboeuf
2021-10-05 21:42 ` Kuppuswamy, Sathyanarayanan
2021-10-06 18:02 ` Borislav Petkov
2021-10-06 18:14 ` Kuppuswamy, Sathyanarayanan
2021-10-05 2:51 ` [PATCH v8 05/11] x86/tdx: Add __tdx_module_call() and __tdx_hypercall() helper functions Kuppuswamy Sathyanarayanan
2021-10-06 5:53 ` Josh Poimboeuf
2021-10-06 16:52 ` Kuppuswamy, Sathyanarayanan
2021-10-07 9:33 ` Borislav Petkov
2021-10-07 16:55 ` Kuppuswamy, Sathyanarayanan
2021-10-05 2:52 ` [PATCH v8 06/11] x86/traps: Add #VE support for TDX guest Kuppuswamy Sathyanarayanan
2021-10-06 18:40 ` Josh Poimboeuf
2021-10-07 17:06 ` Borislav Petkov
2021-10-07 17:22 ` Kuppuswamy, Sathyanarayanan
2021-10-07 17:32 ` Borislav Petkov
2021-10-17 17:15 ` Dave Hansen
2021-10-18 10:53 ` Borislav Petkov
2021-10-18 14:05 ` Dave Hansen
2021-10-18 14:09 ` Borislav Petkov
2021-10-09 3:56 ` Lai Jiangshan [this message]
2021-10-11 15:06 ` Sean Christopherson
2021-10-11 16:49 ` Andi Kleen
2021-10-05 2:52 ` [PATCH v8 07/11] x86/tdx: Add HLT " Kuppuswamy Sathyanarayanan
2021-10-06 19:17 ` Josh Poimboeuf
2021-10-07 19:25 ` Kuppuswamy, Sathyanarayanan
2021-10-08 17:31 ` Borislav Petkov
2021-10-08 17:38 ` Kuppuswamy, Sathyanarayanan
2021-10-08 17:59 ` Borislav Petkov
2021-10-05 2:52 ` [PATCH v8 08/11] x86/tdx: Wire up KVM hypercalls Kuppuswamy Sathyanarayanan
2021-10-06 19:34 ` Josh Poimboeuf
2021-10-06 19:40 ` Borislav Petkov
2021-11-05 20:59 ` Sean Christopherson
2021-11-12 16:17 ` Sathyanarayanan Kuppuswamy
2021-10-05 2:52 ` [PATCH v8 09/11] x86/tdx: Add MSR support for TDX guest Kuppuswamy Sathyanarayanan
2021-10-05 23:22 ` Josh Poimboeuf
2021-10-06 0:48 ` Kuppuswamy, Sathyanarayanan
2021-10-06 19:49 ` Josh Poimboeuf
2021-10-08 2:16 ` Kuppuswamy, Sathyanarayanan
2021-10-05 2:52 ` [PATCH v8 10/11] x86/tdx: Don't write CSTAR MSR on Intel Kuppuswamy Sathyanarayanan
2021-10-05 2:52 ` [PATCH v8 11/11] x86/tdx: Handle CPUID via #VE Kuppuswamy Sathyanarayanan
2021-10-06 20:26 ` Josh Poimboeuf
2021-10-08 2:25 ` Kuppuswamy, Sathyanarayanan
2021-10-11 18:16 ` Josh Poimboeuf
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