[PATCH 0/2] ARM: mvebu: Add DLINK-DNS327L support

[PATCH 0/2] ARM: mvebu: Add DLINK-DNS327L support

[Andrew Andrianov]

This patchset adds support for armada370-based NAS by DLINK.

DNS-327L is a 2-bay NAS with the following specs:     
     - 512MiB RAM
     - 128MiB NAND Flash
     - 1 GbE interface (Marvell PHY)
     - 1 rear USB 3.0 port (via PCIe USB 3.0 controller)
     - 2 internal SATA ports handled by the Armada 370: 
       	 uses 2 gpios for power control
     - two front 2-color leds (amber + white) for both discs, 
        controlled by the SoC
     - One white LED handled by SoC (USB)
     - 3 buttons. Power handled by weltrend, USB and 
       RESET (on the bottom) are wired via GPIOs 
     - Unidentified i2c device at address 0x13 (via i2cdetect)
     - UART0 providing serial console
     - Weltrend MCU serving for RTC, temperature, fan control, 
       and power button handling interfaced via UART1 (dns320l-daemon)
     
Hardware notes follow: 
Everything's supported, save for mysterious i2c device at 
address 0x13 that I couldn't even find on the PCB.

Stock firmware performs some messing with PHY registers (that 
have no public documentation) using a userspace script. With 
upstream kernel it is possible to match the stock behavior using 
the following in u-boot prompt:

mw.l 0xd00184e0 0xa8a; 
phyWrite 0 16 2; 
phyWrite 0 19 77; 
phyWrite 0 18 5747; 

When power button is pressed to turn the NAS off, weltrend signals 
the SoC by driving mpp63 line low. Apparently right now pinctrl assumes
that this line can only work as 'gpo' that screws up gpio-buttons driver.
Since without gpio-buttons, mpp63 works as input properly via sysfs 
interface, I've added a patch for pinctrl-armada-370.c that fixes the 
issue.

The only remaining issue are hard-freezes every 4-16 hours when
CONFIG_ARM_MVEBU_V7_CPUIDLE=y
As of 3.18 this issue was still present, I'm testing if things changed 
in 4.0-rc7 right now (Still live for 3 hours at the time of writing)

Andrew Andrianov (2):
  pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)
  ARM: mvebu: dts: Add dts file for DLink DNS-327L

 arch/arm/boot/dts/Makefile                     |    1 +
 arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  309 ++++++++++++++++++++++++
 drivers/pinctrl/mvebu/pinctrl-armada-370.c     |    2 +-
 3 files changed, 311 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

-- 
1.7.10.4

[PATCH 0/2] ARM: mvebu: Add DLINK-DNS327L support

[Andrew Andrianov]

This patchset adds support for armada370-based NAS by DLINK.

DNS-327L is a 2-bay NAS with the following specs:     
     - 512MiB RAM
     - 128MiB NAND Flash
     - 1 GbE interface (Marvell PHY)
     - 1 rear USB 3.0 port (via PCIe USB 3.0 controller)
     - 2 internal SATA ports handled by the Armada 370: 
       	 uses 2 gpios for power control
     - two front 2-color leds (amber + white) for both discs, 
        controlled by the SoC
     - One white LED handled by SoC (USB)
     - 3 buttons. Power handled by weltrend, USB and 
       RESET (on the bottom) are wired via GPIOs 
     - Unidentified i2c device at address 0x13 (via i2cdetect)
     - UART0 providing serial console
     - Weltrend MCU serving for RTC, temperature, fan control, 
       and power button handling interfaced via UART1 (dns320l-daemon)
     
Hardware notes follow: 
Everything's supported, save for mysterious i2c device at 
address 0x13 that I couldn't even find on the PCB.

Stock firmware performs some messing with PHY registers (that 
have no public documentation) using a userspace script. With 
upstream kernel it is possible to match the stock behavior using 
the following in u-boot prompt:

mw.l 0xd00184e0 0xa8a; 
phyWrite 0 16 2; 
phyWrite 0 19 77; 
phyWrite 0 18 5747; 

When power button is pressed to turn the NAS off, weltrend signals 
the SoC by driving mpp63 line low. Apparently right now pinctrl assumes
that this line can only work as 'gpo' that screws up gpio-buttons driver.
Since without gpio-buttons, mpp63 works as input properly via sysfs 
interface, I've added a patch for pinctrl-armada-370.c that fixes the 
issue.

The only remaining issue are hard-freezes every 4-16 hours when
CONFIG_ARM_MVEBU_V7_CPUIDLE=y
As of 3.18 this issue was still present, I'm testing if things changed 
in 4.0-rc7 right now (Still live for 3 hours at the time of writing)

Andrew Andrianov (2):
  pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)
  ARM: mvebu: dts: Add dts file for DLink DNS-327L

 arch/arm/boot/dts/Makefile                     |    1 +
 arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  309 ++++++++++++++++++++++++
 drivers/pinctrl/mvebu/pinctrl-armada-370.c     |    2 +-
 3 files changed, 311 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

-- 
1.7.10.4

[PATCH 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Andrew Andrianov]

Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
---
 drivers/pinctrl/mvebu/pinctrl-armada-370.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
index c4f51d0..78c332d 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
@@ -364,7 +364,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x5, "audio", "mclk"),
 	   MPP_FUNCTION(0x6, "uart0", "cts")),
 	MPP_MODE(63,
-	   MPP_FUNCTION(0x0, "gpo", NULL),
+	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "sck"),
 	   MPP_FUNCTION(0x2, "tclk", NULL)),
 	MPP_MODE(64,
-- 
1.7.10.4

[PATCH 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Andrew Andrianov]

Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
---
 drivers/pinctrl/mvebu/pinctrl-armada-370.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
index c4f51d0..78c332d 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
@@ -364,7 +364,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x5, "audio", "mclk"),
 	   MPP_FUNCTION(0x6, "uart0", "cts")),
 	MPP_MODE(63,
-	   MPP_FUNCTION(0x0, "gpo", NULL),
+	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "sck"),
 	   MPP_FUNCTION(0x2, "tclk", NULL)),
 	MPP_MODE(64,
-- 
1.7.10.4

Re: [PATCH 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Linus Walleij]

On Sat, Apr 11, 2015 at 10:29 PM, Andrew Andrianov <andrew@ncrmnt.org> wrote:

> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>

Patch applied for fixes.

Yours,
Linus Walleij

[PATCH 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Linus Walleij]

On Sat, Apr 11, 2015 at 10:29 PM, Andrew Andrianov <andrew@ncrmnt.org> wrote:

> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>

Patch applied for fixes.

Yours,
Linus Walleij

Re: [PATCH 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Linus Walleij]

On Sat, Apr 11, 2015 at 10:29 PM, Andrew Andrianov <andrew@ncrmnt.org> wrote:

> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>

Patch applied for fixes.

Yours,
Linus Walleij

Re: [PATCH 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Thomas Petazzoni]

Dear Andrew Andrianov,

On Sat, 11 Apr 2015 23:29:19 +0300, Andrew Andrianov wrote:
> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
> ---
>  drivers/pinctrl/mvebu/pinctrl-armada-370.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
> index c4f51d0..78c332d 100644
> --- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c
> +++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
> @@ -364,7 +364,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
>  	   MPP_FUNCTION(0x5, "audio", "mclk"),
>  	   MPP_FUNCTION(0x6, "uart0", "cts")),
>  	MPP_MODE(63,
> -	   MPP_FUNCTION(0x0, "gpo", NULL),
> +	   MPP_FUNCTION(0x0, "gpio", NULL),
>  	   MPP_FUNCTION(0x1, "spi0", "sck"),
>  	   MPP_FUNCTION(0x2, "tclk", NULL)),
>  	MPP_MODE(64,

I know the patch has already been applied, but this is weird: I just
checked the datasheet again, and it really says this pin is a "gpo".
I'll try to get some more information.

Best regards,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

[PATCH 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Thomas Petazzoni]

Dear Andrew Andrianov,

On Sat, 11 Apr 2015 23:29:19 +0300, Andrew Andrianov wrote:
> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
> ---
>  drivers/pinctrl/mvebu/pinctrl-armada-370.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
> index c4f51d0..78c332d 100644
> --- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c
> +++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
> @@ -364,7 +364,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
>  	   MPP_FUNCTION(0x5, "audio", "mclk"),
>  	   MPP_FUNCTION(0x6, "uart0", "cts")),
>  	MPP_MODE(63,
> -	   MPP_FUNCTION(0x0, "gpo", NULL),
> +	   MPP_FUNCTION(0x0, "gpio", NULL),
>  	   MPP_FUNCTION(0x1, "spi0", "sck"),
>  	   MPP_FUNCTION(0x2, "tclk", NULL)),
>  	MPP_MODE(64,

I know the patch has already been applied, but this is weird: I just
checked the datasheet again, and it really says this pin is a "gpo".
I'll try to get some more information.

Best regards,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

Re: [PATCH 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Andrew]

Thomas Petazzoni писал 29.05.2015 12:10:
> Dear Andrew Andrianov,
> 
> On Sat, 11 Apr 2015 23:29:19 +0300, Andrew Andrianov wrote:
>> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
>> ---
>>  drivers/pinctrl/mvebu/pinctrl-armada-370.c |    2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>> 
>> diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c 
>> b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
>> index c4f51d0..78c332d 100644
>> --- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c
>> +++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
>> @@ -364,7 +364,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] 
>> = {
>>  	   MPP_FUNCTION(0x5, "audio", "mclk"),
>>  	   MPP_FUNCTION(0x6, "uart0", "cts")),
>>  	MPP_MODE(63,
>> -	   MPP_FUNCTION(0x0, "gpo", NULL),
>> +	   MPP_FUNCTION(0x0, "gpio", NULL),
>>  	   MPP_FUNCTION(0x1, "spi0", "sck"),
>>  	   MPP_FUNCTION(0x2, "tclk", NULL)),
>>  	MPP_MODE(64,
> 
> I know the patch has already been applied, but this is weird: I just
> checked the datasheet again, and it really says this pin is a "gpo".
> I'll try to get some more information.
> 
> Best regards,
> 
> Thomas

Yep, exactly. I've seen that in the public docs. It must be a typo,
unless there's something we don't know.

On DNS-327L this pin is wired as a button. Without th patch only
gpio-buttons driver fails probing, but you can still configure the pin
as input via sysfs gpio interface and even read sensible values from it.
If you have a board where this pin is broken out - it's easy to test.

-- 
Regards,
Andrew

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[PATCH 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Andrew]

Thomas Petazzoni ????? 29.05.2015 12:10:
> Dear Andrew Andrianov,
> 
> On Sat, 11 Apr 2015 23:29:19 +0300, Andrew Andrianov wrote:
>> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
>> ---
>>  drivers/pinctrl/mvebu/pinctrl-armada-370.c |    2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>> 
>> diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c 
>> b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
>> index c4f51d0..78c332d 100644
>> --- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c
>> +++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
>> @@ -364,7 +364,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] 
>> = {
>>  	   MPP_FUNCTION(0x5, "audio", "mclk"),
>>  	   MPP_FUNCTION(0x6, "uart0", "cts")),
>>  	MPP_MODE(63,
>> -	   MPP_FUNCTION(0x0, "gpo", NULL),
>> +	   MPP_FUNCTION(0x0, "gpio", NULL),
>>  	   MPP_FUNCTION(0x1, "spi0", "sck"),
>>  	   MPP_FUNCTION(0x2, "tclk", NULL)),
>>  	MPP_MODE(64,
> 
> I know the patch has already been applied, but this is weird: I just
> checked the datasheet again, and it really says this pin is a "gpo".
> I'll try to get some more information.
> 
> Best regards,
> 
> Thomas

Yep, exactly. I've seen that in the public docs. It must be a typo,
unless there's something we don't know.

On DNS-327L this pin is wired as a button. Without th patch only
gpio-buttons driver fails probing, but you can still configure the pin
as input via sysfs gpio interface and even read sensible values from it.
If you have a board where this pin is broken out - it's easy to test.

-- 
Regards,
Andrew

Re: [PATCH 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Andrew]

Thomas Petazzoni писал 29.05.2015 12:10:
> Dear Andrew Andrianov,
> 
> On Sat, 11 Apr 2015 23:29:19 +0300, Andrew Andrianov wrote:
>> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
>> ---
>>  drivers/pinctrl/mvebu/pinctrl-armada-370.c |    2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>> 
>> diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c 
>> b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
>> index c4f51d0..78c332d 100644
>> --- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c
>> +++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
>> @@ -364,7 +364,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] 
>> = {
>>  	   MPP_FUNCTION(0x5, "audio", "mclk"),
>>  	   MPP_FUNCTION(0x6, "uart0", "cts")),
>>  	MPP_MODE(63,
>> -	   MPP_FUNCTION(0x0, "gpo", NULL),
>> +	   MPP_FUNCTION(0x0, "gpio", NULL),
>>  	   MPP_FUNCTION(0x1, "spi0", "sck"),
>>  	   MPP_FUNCTION(0x2, "tclk", NULL)),
>>  	MPP_MODE(64,
> 
> I know the patch has already been applied, but this is weird: I just
> checked the datasheet again, and it really says this pin is a "gpo".
> I'll try to get some more information.
> 
> Best regards,
> 
> Thomas

Yep, exactly. I've seen that in the public docs. It must be a typo,
unless there's something we don't know.

On DNS-327L this pin is wired as a button. Without th patch only
gpio-buttons driver fails probing, but you can still configure the pin
as input via sysfs gpio interface and even read sensible values from it.
If you have a board where this pin is broken out - it's easy to test.

-- 
Regards,
Andrew

Re: [PATCH 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Thomas Petazzoni]

Andrew,

On Fri, 29 May 2015 12:55:44 +0300, Andrew wrote:

> Yep, exactly. I've seen that in the public docs. It must be a typo,
> unless there's something we don't know.
> 
> On DNS-327L this pin is wired as a button. Without th patch only
> gpio-buttons driver fails probing, but you can still configure the pin
> as input via sysfs gpio interface and even read sensible values from it.
> If you have a board where this pin is broken out - it's easy to test.

Ok, I've made a request for Marvell to check this aspect. If there's a
mistake, they should hopefully fix the datasheet at some point.

Thanks,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

[PATCH 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Thomas Petazzoni]

Andrew,

On Fri, 29 May 2015 12:55:44 +0300, Andrew wrote:

> Yep, exactly. I've seen that in the public docs. It must be a typo,
> unless there's something we don't know.
> 
> On DNS-327L this pin is wired as a button. Without th patch only
> gpio-buttons driver fails probing, but you can still configure the pin
> as input via sysfs gpio interface and even read sensible values from it.
> If you have a board where this pin is broken out - it's easy to test.

Ok, I've made a request for Marvell to check this aspect. If there's a
mistake, they should hopefully fix the datasheet at some point.

Thanks,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

[PATCH 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Andrew Andrianov]

Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
---
 arch/arm/boot/dts/Makefile                     |    1 +
 arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  309 ++++++++++++++++++++++++
 2 files changed, 310 insertions(+)
 create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a1c776b..8535e4e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -612,6 +612,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
 	zynq-zybo.dtb
 dtb-$(CONFIG_MACH_ARMADA_370) += \
 	armada-370-db.dtb \
+	armada-370-dlink-dns327l.dtb \
 	armada-370-mirabox.dtb \
 	armada-370-netgear-rn102.dtb \
 	armada-370-netgear-rn104.dtb \
diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
new file mode 100644
index 0000000..12bc072
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
@@ -0,0 +1,309 @@
+/*
+ * Device Tree file for DLINK DNS-327L
+ *
+ * Copyright (C) 2014, Andrew Andrianov <andrew@ncrmnt.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+/* Remaining mysteries:
+ *
+ * There's still something unknown on i2c address 0x13
+ * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-370.dtsi"
+
+/ {
+	model = "DLINK DNS-327L";
+	compatible = "dlink,dns327l",
+		"marvell,armada370",
+		"marvell,armada-370-xp";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlyprintk";
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x20000000>; /* 512 MiB */
+	};
+
+	soc {
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
+			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
+
+		pcie-controller {
+			status = "okay";
+
+			/* Connected to Marvell SATA controller */
+			pcie@1,0 {
+				/* Port 0, Lane 0 */
+				status = "okay";
+			};
+
+			/* Connected to NEC USB 3.0 controller */
+			pcie@2,0 {
+				/* Port 1, Lane 0 */
+				status = "okay";
+			};
+		};
+
+		internal-regs {
+			serial@12000 {
+				status = "okay";
+			};
+
+			serial@12100 {
+				status = "okay";
+			};
+
+			sata@a0000 {
+				nr-ports = <2>;
+				status = "okay";
+			};
+
+			mdio {
+			phy0: ethernet-phy@0 { /* Marvell 88E1318 */
+					reg = <0>;
+				};
+			};
+
+			ethernet@74000 {
+				status = "okay";
+				phy = <&phy0>;
+				phy-mode = "rgmii-id";
+			};
+
+			usb@50000 {
+				status = "okay";
+			};
+
+			i2c@11000 {
+				compatible = "marvell,mv64xxx-i2c";
+				clock-frequency = <100000>;
+				status = "okay";
+			};
+
+			nand@d0000 {
+				status = "okay";
+				num-cs = <1>;
+				marvell,nand-keep-config;
+				marvell,nand-enable-arbiter;
+				nand-on-flash-bbt;
+
+				partition@0 {
+					label = "u-boot";
+					/* 1.0 MiB */
+					reg = <0x0000000 0x100000>;
+					read-only;
+				};
+
+				partition@100000 {
+					label = "u-boot-env";
+					/* 128 KiB */
+					reg = <0x100000 0x20000>;
+					read-only;
+				};
+
+				partition@120000 {
+					label = "uImage";
+					/* 7 MiB */
+					reg = <0x120000 0x700000>;
+				};
+
+				partition@820000 {
+					label = "ubifs";
+					/* ~ 84 MiB */
+					reg = <0x820000 0x54e0000>;
+				};
+
+				/* Hardwired into stock bootloader */
+				partition@800000 {
+					label = "failsafe-uImage";
+					/* 5 MiB */
+					reg = <0x5d00000 0x500000>;
+				};
+
+				partition@6200000 {
+					label = "failsafe-fs";
+					/* 29 MiB */
+					reg = <0x6200000 0x1d00000>;
+				};
+
+				partition@7f00000 {
+					label = "bbt";
+					/* 1 MiB for BBT */
+					reg = <0x7f00000 0x100000>;
+				};
+			};
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <
+			&backup_button_pin
+			&power_button_pin>;
+		pinctrl-names = "default";
+
+		power-button {
+			label = "Power Button";
+			linux,code = <KEY_POWER>;
+			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+		};
+
+		backup-button {
+			label = "Backup Button";
+			linux,code = <KEY_COPY>;
+			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
+		};
+
+		reset-button {
+			label = "Reset Button";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+		};
+
+
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <
+			&sata_l_amber_pin
+			&sata_r_amber_pin
+			&backup_led_pin>;
+
+		pinctrl-names = "default";
+
+		sata-r-amber-pin {
+			label = "dns327l:amber:sata-r";
+			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+		sata-l-amber-pin {
+			label = "dns327l:amber:sata-l";
+			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+		backup-led-pin {
+			label = "dns327l:white:usb";
+			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-0 = <&xhci_pwr_pin
+			&sata1_pwr_pin
+			&sata2_pwr_pin>;
+
+		pinctrl-names = "default";
+
+	usb_power: regulator@1 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "USB3.0 Port Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-boot-on;
+			regulator-always-on;
+			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+		};
+
+	sata1_power: regulator@2 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "SATA-1 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-always-on;
+			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		};
+
+	sata2_power: regulator@3 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "SATA-2 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-always-on;
+			gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&pinctrl {
+	sata1_white_pin: sata1-white-pin {
+		marvell,pins = "mpp55";
+		marvell,function = "sata1";
+	};
+
+	sata_r_amber_pin: sata-r-amber-pin {
+		marvell,pins = "mpp52";
+		marvell,function = "gpio";
+	};
+
+	sata2_white_pin: sata2-white-pin {
+		marvell,pins = "mpp57";
+		marvell,function = "sata0";
+	};
+
+	sata_l_amber_pin: sata-l-amber-pin {
+		marvell,pins = "mpp53";
+		marvell,function = "gpio";
+	};
+
+	backup_led_pin: backup-led-pin {
+		marvell,pins = "mpp61";
+		marvell,function = "gpo";
+	};
+
+	xhci_pwr_pin: xhci-pwr-pin {
+		marvell,pins = "mpp13";
+		marvell,function = "gpio";
+	};
+
+	sata1_pwr_pin: sata1-pwr-pin {
+		marvell,pins = "mpp54";
+		marvell,function = "gpio";
+	};
+
+	sata2_pwr_pin: sata2-pwr-pin {
+		marvell,pins = "mpp56";
+		marvell,function = "gpio";
+	};
+
+	power_button_pin: power-button-pin {
+		marvell,pins = "mpp65";
+		marvell,function = "gpio";
+	};
+
+	backup_button_pin: backup-button-pin {
+		marvell,pins = "mpp63";
+		marvell,function = "gpio";
+	};
+
+	reset_button_pin: reset-button-pin {
+		marvell,pins = "mpp64";
+		marvell,function = "gpio";
+	};
+};
-- 
1.7.10.4

[PATCH 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Andrew Andrianov]

Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
---
 arch/arm/boot/dts/Makefile                     |    1 +
 arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  309 ++++++++++++++++++++++++
 2 files changed, 310 insertions(+)
 create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a1c776b..8535e4e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -612,6 +612,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
 	zynq-zybo.dtb
 dtb-$(CONFIG_MACH_ARMADA_370) += \
 	armada-370-db.dtb \
+	armada-370-dlink-dns327l.dtb \
 	armada-370-mirabox.dtb \
 	armada-370-netgear-rn102.dtb \
 	armada-370-netgear-rn104.dtb \
diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
new file mode 100644
index 0000000..12bc072
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
@@ -0,0 +1,309 @@
+/*
+ * Device Tree file for DLINK DNS-327L
+ *
+ * Copyright (C) 2014, Andrew Andrianov <andrew@ncrmnt.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+/* Remaining mysteries:
+ *
+ * There's still something unknown on i2c address 0x13
+ * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-370.dtsi"
+
+/ {
+	model = "DLINK DNS-327L";
+	compatible = "dlink,dns327l",
+		"marvell,armada370",
+		"marvell,armada-370-xp";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlyprintk";
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x20000000>; /* 512 MiB */
+	};
+
+	soc {
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
+			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
+
+		pcie-controller {
+			status = "okay";
+
+			/* Connected to Marvell SATA controller */
+			pcie at 1,0 {
+				/* Port 0, Lane 0 */
+				status = "okay";
+			};
+
+			/* Connected to NEC USB 3.0 controller */
+			pcie at 2,0 {
+				/* Port 1, Lane 0 */
+				status = "okay";
+			};
+		};
+
+		internal-regs {
+			serial at 12000 {
+				status = "okay";
+			};
+
+			serial at 12100 {
+				status = "okay";
+			};
+
+			sata at a0000 {
+				nr-ports = <2>;
+				status = "okay";
+			};
+
+			mdio {
+			phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
+					reg = <0>;
+				};
+			};
+
+			ethernet at 74000 {
+				status = "okay";
+				phy = <&phy0>;
+				phy-mode = "rgmii-id";
+			};
+
+			usb at 50000 {
+				status = "okay";
+			};
+
+			i2c at 11000 {
+				compatible = "marvell,mv64xxx-i2c";
+				clock-frequency = <100000>;
+				status = "okay";
+			};
+
+			nand at d0000 {
+				status = "okay";
+				num-cs = <1>;
+				marvell,nand-keep-config;
+				marvell,nand-enable-arbiter;
+				nand-on-flash-bbt;
+
+				partition at 0 {
+					label = "u-boot";
+					/* 1.0 MiB */
+					reg = <0x0000000 0x100000>;
+					read-only;
+				};
+
+				partition at 100000 {
+					label = "u-boot-env";
+					/* 128 KiB */
+					reg = <0x100000 0x20000>;
+					read-only;
+				};
+
+				partition at 120000 {
+					label = "uImage";
+					/* 7 MiB */
+					reg = <0x120000 0x700000>;
+				};
+
+				partition at 820000 {
+					label = "ubifs";
+					/* ~ 84 MiB */
+					reg = <0x820000 0x54e0000>;
+				};
+
+				/* Hardwired into stock bootloader */
+				partition at 800000 {
+					label = "failsafe-uImage";
+					/* 5 MiB */
+					reg = <0x5d00000 0x500000>;
+				};
+
+				partition at 6200000 {
+					label = "failsafe-fs";
+					/* 29 MiB */
+					reg = <0x6200000 0x1d00000>;
+				};
+
+				partition at 7f00000 {
+					label = "bbt";
+					/* 1 MiB for BBT */
+					reg = <0x7f00000 0x100000>;
+				};
+			};
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <
+			&backup_button_pin
+			&power_button_pin>;
+		pinctrl-names = "default";
+
+		power-button {
+			label = "Power Button";
+			linux,code = <KEY_POWER>;
+			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+		};
+
+		backup-button {
+			label = "Backup Button";
+			linux,code = <KEY_COPY>;
+			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
+		};
+
+		reset-button {
+			label = "Reset Button";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+		};
+
+
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <
+			&sata_l_amber_pin
+			&sata_r_amber_pin
+			&backup_led_pin>;
+
+		pinctrl-names = "default";
+
+		sata-r-amber-pin {
+			label = "dns327l:amber:sata-r";
+			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+		sata-l-amber-pin {
+			label = "dns327l:amber:sata-l";
+			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+		backup-led-pin {
+			label = "dns327l:white:usb";
+			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-0 = <&xhci_pwr_pin
+			&sata1_pwr_pin
+			&sata2_pwr_pin>;
+
+		pinctrl-names = "default";
+
+	usb_power: regulator at 1 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "USB3.0 Port Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-boot-on;
+			regulator-always-on;
+			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+		};
+
+	sata1_power: regulator at 2 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "SATA-1 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-always-on;
+			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		};
+
+	sata2_power: regulator at 3 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "SATA-2 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-always-on;
+			gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&pinctrl {
+	sata1_white_pin: sata1-white-pin {
+		marvell,pins = "mpp55";
+		marvell,function = "sata1";
+	};
+
+	sata_r_amber_pin: sata-r-amber-pin {
+		marvell,pins = "mpp52";
+		marvell,function = "gpio";
+	};
+
+	sata2_white_pin: sata2-white-pin {
+		marvell,pins = "mpp57";
+		marvell,function = "sata0";
+	};
+
+	sata_l_amber_pin: sata-l-amber-pin {
+		marvell,pins = "mpp53";
+		marvell,function = "gpio";
+	};
+
+	backup_led_pin: backup-led-pin {
+		marvell,pins = "mpp61";
+		marvell,function = "gpo";
+	};
+
+	xhci_pwr_pin: xhci-pwr-pin {
+		marvell,pins = "mpp13";
+		marvell,function = "gpio";
+	};
+
+	sata1_pwr_pin: sata1-pwr-pin {
+		marvell,pins = "mpp54";
+		marvell,function = "gpio";
+	};
+
+	sata2_pwr_pin: sata2-pwr-pin {
+		marvell,pins = "mpp56";
+		marvell,function = "gpio";
+	};
+
+	power_button_pin: power-button-pin {
+		marvell,pins = "mpp65";
+		marvell,function = "gpio";
+	};
+
+	backup_button_pin: backup-button-pin {
+		marvell,pins = "mpp63";
+		marvell,function = "gpio";
+	};
+
+	reset_button_pin: reset-button-pin {
+		marvell,pins = "mpp64";
+		marvell,function = "gpio";
+	};
+};
-- 
1.7.10.4

Re: [PATCH 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Andrew Lunn]

On Sat, Apr 11, 2015 at 11:29:20PM +0300, Andrew Andrianov wrote:
> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
> ---
>  arch/arm/boot/dts/Makefile                     |    1 +
>  arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  309 ++++++++++++++++++++++++
>  2 files changed, 310 insertions(+)
>  create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index a1c776b..8535e4e 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -612,6 +612,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>  	zynq-zybo.dtb
>  dtb-$(CONFIG_MACH_ARMADA_370) += \
>  	armada-370-db.dtb \
> +	armada-370-dlink-dns327l.dtb \
>  	armada-370-mirabox.dtb \
>  	armada-370-netgear-rn102.dtb \
>  	armada-370-netgear-rn104.dtb \
> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> new file mode 100644
> index 0000000..12bc072
> --- /dev/null
> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> @@ -0,0 +1,309 @@
> +/*
> + * Device Tree file for DLINK DNS-327L
> + *
> + * Copyright (C) 2014, Andrew Andrianov <andrew@ncrmnt.org>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + */

Hi Andrew

There has been a move to license all the 370 and XP DTS files under
dual GPL and X11. Are you willing to add X11?

> +
> +/* Remaining mysteries:
> + *
> + * There's still something unknown on i2c address 0x13
> + * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "armada-370.dtsi"
> +
> +/ {
> +	model = "DLINK DNS-327L";
> +	compatible = "dlink,dns327l",
> +		"marvell,armada370",
> +		"marvell,armada-370-xp";
> +
> +	chosen {
> +		bootargs = "console=ttyS0,115200 earlyprintk";

It would be nice to have

stdout-path = &uart0;

here. That will help with boot loaders, using this DT file, and it a
step towards removing the console=ttyS0,115200.

> +	};
> +
> +	memory {
> +		device_type = "memory";
> +		reg = <0x00000000 0x20000000>; /* 512 MiB */
> +	};
> +
> +	soc {
> +		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
> +			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
> +
> +		pcie-controller {
> +			status = "okay";
> +
> +			/* Connected to Marvell SATA controller */
> +			pcie@1,0 {
> +				/* Port 0, Lane 0 */
> +				status = "okay";
> +			};
> +
> +			/* Connected to NEC USB 3.0 controller */
> +			pcie@2,0 {
> +				/* Port 1, Lane 0 */
> +				status = "okay";
> +			};
> +		};
> +
> +		internal-regs {
> +			serial@12000 {
> +				status = "okay";
> +			};
> +
> +			serial@12100 {
> +				status = "okay";
> +			};

Are both serial ports usable?
Could you document the pinout for the console?

      Thanks
	Andrew

[PATCH 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Andrew Lunn]

On Sat, Apr 11, 2015 at 11:29:20PM +0300, Andrew Andrianov wrote:
> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
> ---
>  arch/arm/boot/dts/Makefile                     |    1 +
>  arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  309 ++++++++++++++++++++++++
>  2 files changed, 310 insertions(+)
>  create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index a1c776b..8535e4e 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -612,6 +612,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>  	zynq-zybo.dtb
>  dtb-$(CONFIG_MACH_ARMADA_370) += \
>  	armada-370-db.dtb \
> +	armada-370-dlink-dns327l.dtb \
>  	armada-370-mirabox.dtb \
>  	armada-370-netgear-rn102.dtb \
>  	armada-370-netgear-rn104.dtb \
> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> new file mode 100644
> index 0000000..12bc072
> --- /dev/null
> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> @@ -0,0 +1,309 @@
> +/*
> + * Device Tree file for DLINK DNS-327L
> + *
> + * Copyright (C) 2014, Andrew Andrianov <andrew@ncrmnt.org>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + */

Hi Andrew

There has been a move to license all the 370 and XP DTS files under
dual GPL and X11. Are you willing to add X11?

> +
> +/* Remaining mysteries:
> + *
> + * There's still something unknown on i2c address 0x13
> + * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "armada-370.dtsi"
> +
> +/ {
> +	model = "DLINK DNS-327L";
> +	compatible = "dlink,dns327l",
> +		"marvell,armada370",
> +		"marvell,armada-370-xp";
> +
> +	chosen {
> +		bootargs = "console=ttyS0,115200 earlyprintk";

It would be nice to have

stdout-path = &uart0;

here. That will help with boot loaders, using this DT file, and it a
step towards removing the console=ttyS0,115200.

> +	};
> +
> +	memory {
> +		device_type = "memory";
> +		reg = <0x00000000 0x20000000>; /* 512 MiB */
> +	};
> +
> +	soc {
> +		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
> +			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
> +
> +		pcie-controller {
> +			status = "okay";
> +
> +			/* Connected to Marvell SATA controller */
> +			pcie at 1,0 {
> +				/* Port 0, Lane 0 */
> +				status = "okay";
> +			};
> +
> +			/* Connected to NEC USB 3.0 controller */
> +			pcie at 2,0 {
> +				/* Port 1, Lane 0 */
> +				status = "okay";
> +			};
> +		};
> +
> +		internal-regs {
> +			serial at 12000 {
> +				status = "okay";
> +			};
> +
> +			serial at 12100 {
> +				status = "okay";
> +			};

Are both serial ports usable?
Could you document the pinout for the console?

      Thanks
	Andrew

Re: [PATCH 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Andrew Lunn]

> > +		internal-regs {
> > +			serial@12000 {
> > +				status = "okay";
> > +			};
> > +
> > +			serial@12100 {
> > +				status = "okay";
> > +			};
> 
> Are both serial ports usable?

Ah, sorry. I now noticed you said the MCU is on uart1.
Could you add a comment here please.

      Andrew
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[PATCH 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Andrew Lunn]

> > +		internal-regs {
> > +			serial at 12000 {
> > +				status = "okay";
> > +			};
> > +
> > +			serial at 12100 {
> > +				status = "okay";
> > +			};
> 
> Are both serial ports usable?

Ah, sorry. I now noticed you said the MCU is on uart1.
Could you add a comment here please.

      Andrew

Re: [PATCH 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Andrew Lunn]

> > +		internal-regs {
> > +			serial@12000 {
> > +				status = "okay";
> > +			};
> > +
> > +			serial@12100 {
> > +				status = "okay";
> > +			};
> 
> Are both serial ports usable?

Ah, sorry. I now noticed you said the MCU is on uart1.
Could you add a comment here please.

      Andrew

[PATCH v2 0/2] ARM: mvebu: Add support for DLINK DNS-327L

[Andrew Andrianov]

Rebased against 4.0-rc7
This is the resubmit of the patchset with fixes based on review by Andrew Lunn
In my previous email I've wrongly referenced power button (in email, dts was okay) 
as mpp63, it's really mpp65 (mpp63 is the 'backup' button). 
Fixed and updated description of the patchset from my first email follows.

DNS-327L is a 2-bay NAS with the following specs:     
     - 512MiB RAM
     - 128MiB NAND Flash
     - 1 GbE interface (Marvell PHY)
     - 1 rear USB 3.0 port (via PCIe USB 3.0 controller)
     - 2 internal SATA ports handled by the Armada 370: 
       	 uses 2 gpios for power control
     - two front 2-color leds (amber + white) for both discs, 
        controlled by the SoC
     - One white LED handled by SoC (USB)
     - 3 buttons. Power handled by weltrend, USB and 
       RESET (on the bottom) are wired via GPIOs 
     - Unidentified i2c device at address 0x13 (via i2cdetect)
     - UART0 providing serial console
     - Weltrend MCU serving for RTC, temperature, fan control, 
       and power button handling interfaced via UART1 
       (Handled via userspace dns320l-daemon)

Hardware notes follow: 
Everything's supported, save for mysterious i2c device at 
address 0x13 (any ideas what can it be?) that I couldn't even find 
on the PCB.

Stock firmware performs some messing with PHY registers (that 
have no public documentation) using a userspace script. Using 
upstream kernel it is possible to match the stock behavior using 
the following in u-boot prompt:

/* Set RGMII voltage to 1.8v, according to public docs. Nice! */
mw.l 0xd00184e0 0xa8a; 
/* Some weird magic that goes into phy registers, no public docs */
phyWrite 0 16 2; 
phyWrite 0 19 77; 
phyWrite 0 18 5747; 

When power button is long-pressed to turn the NAS off, weltrend signals 
the SoC by driving mpp65 line low.

'Backup' button is wired to gpio63. Apparently right now pinctrl assumes
that this line can only work as 'gpo' that screws up gpio-buttons driver.
Since without gpio-buttons, mpp63 works as input properly via sysfs 
interface, I've added a patch for pinctrl-armada-370.c that fixes the 
issue.

Andrew Andrianov (2):
  pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)
  ARM: mvebu: dts: Add dts file for DLink DNS-327L

 arch/arm/boot/dts/Makefile                     |    1 +
 arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  344 ++++++++++++++++++++++++
 drivers/pinctrl/mvebu/pinctrl-armada-370.c     |    2 +-
 3 files changed, 346 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

-- 
1.7.10.4

[PATCH v2 0/2] ARM: mvebu: Add support for DLINK DNS-327L

[Andrew Andrianov]

Rebased against 4.0-rc7
This is the resubmit of the patchset with fixes based on review by Andrew Lunn
In my previous email I've wrongly referenced power button (in email, dts was okay) 
as mpp63, it's really mpp65 (mpp63 is the 'backup' button). 
Fixed and updated description of the patchset from my first email follows.

DNS-327L is a 2-bay NAS with the following specs:     
     - 512MiB RAM
     - 128MiB NAND Flash
     - 1 GbE interface (Marvell PHY)
     - 1 rear USB 3.0 port (via PCIe USB 3.0 controller)
     - 2 internal SATA ports handled by the Armada 370: 
       	 uses 2 gpios for power control
     - two front 2-color leds (amber + white) for both discs, 
        controlled by the SoC
     - One white LED handled by SoC (USB)
     - 3 buttons. Power handled by weltrend, USB and 
       RESET (on the bottom) are wired via GPIOs 
     - Unidentified i2c device at address 0x13 (via i2cdetect)
     - UART0 providing serial console
     - Weltrend MCU serving for RTC, temperature, fan control, 
       and power button handling interfaced via UART1 
       (Handled via userspace dns320l-daemon)

Hardware notes follow: 
Everything's supported, save for mysterious i2c device at 
address 0x13 (any ideas what can it be?) that I couldn't even find 
on the PCB.

Stock firmware performs some messing with PHY registers (that 
have no public documentation) using a userspace script. Using 
upstream kernel it is possible to match the stock behavior using 
the following in u-boot prompt:

/* Set RGMII voltage to 1.8v, according to public docs. Nice! */
mw.l 0xd00184e0 0xa8a; 
/* Some weird magic that goes into phy registers, no public docs */
phyWrite 0 16 2; 
phyWrite 0 19 77; 
phyWrite 0 18 5747; 

When power button is long-pressed to turn the NAS off, weltrend signals 
the SoC by driving mpp65 line low.

'Backup' button is wired to gpio63. Apparently right now pinctrl assumes
that this line can only work as 'gpo' that screws up gpio-buttons driver.
Since without gpio-buttons, mpp63 works as input properly via sysfs 
interface, I've added a patch for pinctrl-armada-370.c that fixes the 
issue.

Andrew Andrianov (2):
  pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)
  ARM: mvebu: dts: Add dts file for DLink DNS-327L

 arch/arm/boot/dts/Makefile                     |    1 +
 arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  344 ++++++++++++++++++++++++
 drivers/pinctrl/mvebu/pinctrl-armada-370.c     |    2 +-
 3 files changed, 346 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

-- 
1.7.10.4

[PATCH v2 0/2] ARM: mvebu: Add support for DLINK DNS-327L

[Andrew Andrianov]

Rebased against 4.0-rc7
This is the resubmit of the patchset with fixes based on review by Andrew Lunn
In my previous email I've wrongly referenced power button (in email, dts was okay) 
as mpp63, it's really mpp65 (mpp63 is the 'backup' button). 
Fixed and updated description of the patchset from my first email follows.

DNS-327L is a 2-bay NAS with the following specs:     
     - 512MiB RAM
     - 128MiB NAND Flash
     - 1 GbE interface (Marvell PHY)
     - 1 rear USB 3.0 port (via PCIe USB 3.0 controller)
     - 2 internal SATA ports handled by the Armada 370: 
       	 uses 2 gpios for power control
     - two front 2-color leds (amber + white) for both discs, 
        controlled by the SoC
     - One white LED handled by SoC (USB)
     - 3 buttons. Power handled by weltrend, USB and 
       RESET (on the bottom) are wired via GPIOs 
     - Unidentified i2c device at address 0x13 (via i2cdetect)
     - UART0 providing serial console
     - Weltrend MCU serving for RTC, temperature, fan control, 
       and power button handling interfaced via UART1 
       (Handled via userspace dns320l-daemon)

Hardware notes follow: 
Everything's supported, save for mysterious i2c device at 
address 0x13 (any ideas what can it be?) that I couldn't even find 
on the PCB.

Stock firmware performs some messing with PHY registers (that 
have no public documentation) using a userspace script. Using 
upstream kernel it is possible to match the stock behavior using 
the following in u-boot prompt:

/* Set RGMII voltage to 1.8v, according to public docs. Nice! */
mw.l 0xd00184e0 0xa8a; 
/* Some weird magic that goes into phy registers, no public docs */
phyWrite 0 16 2; 
phyWrite 0 19 77; 
phyWrite 0 18 5747; 

When power button is long-pressed to turn the NAS off, weltrend signals 
the SoC by driving mpp65 line low.

'Backup' button is wired to gpio63. Apparently right now pinctrl assumes
that this line can only work as 'gpo' that screws up gpio-buttons driver.
Since without gpio-buttons, mpp63 works as input properly via sysfs 
interface, I've added a patch for pinctrl-armada-370.c that fixes the 
issue.

Andrew Andrianov (2):
  pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)
  ARM: mvebu: dts: Add dts file for DLink DNS-327L

 arch/arm/boot/dts/Makefile                     |    1 +
 arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  344 ++++++++++++++++++++++++
 drivers/pinctrl/mvebu/pinctrl-armada-370.c     |    2 +-
 3 files changed, 346 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

-- 
1.7.10.4

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[PATCH v2 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Andrew Andrianov]

Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
---
 drivers/pinctrl/mvebu/pinctrl-armada-370.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
index c4f51d0..78c332d 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
@@ -364,7 +364,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x5, "audio", "mclk"),
 	   MPP_FUNCTION(0x6, "uart0", "cts")),
 	MPP_MODE(63,
-	   MPP_FUNCTION(0x0, "gpo", NULL),
+	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "sck"),
 	   MPP_FUNCTION(0x2, "tclk", NULL)),
 	MPP_MODE(64,
-- 
1.7.10.4

[PATCH v2 1/2] pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)

[Andrew Andrianov]

Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
---
 drivers/pinctrl/mvebu/pinctrl-armada-370.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
index c4f51d0..78c332d 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
@@ -364,7 +364,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x5, "audio", "mclk"),
 	   MPP_FUNCTION(0x6, "uart0", "cts")),
 	MPP_MODE(63,
-	   MPP_FUNCTION(0x0, "gpo", NULL),
+	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "sck"),
 	   MPP_FUNCTION(0x2, "tclk", NULL)),
 	MPP_MODE(64,
-- 
1.7.10.4

[PATCH v2 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Andrew Andrianov]

Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
---
 arch/arm/boot/dts/Makefile                     |    1 +
 arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  344 ++++++++++++++++++++++++
 2 files changed, 345 insertions(+)
 create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a1c776b..8535e4e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -612,6 +612,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
 	zynq-zybo.dtb
 dtb-$(CONFIG_MACH_ARMADA_370) += \
 	armada-370-db.dtb \
+	armada-370-dlink-dns327l.dtb \
 	armada-370-mirabox.dtb \
 	armada-370-netgear-rn102.dtb \
 	armada-370-netgear-rn104.dtb \
diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
new file mode 100644
index 0000000..c58806c
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
@@ -0,0 +1,344 @@
+/*
+ * Device Tree file for DLINK DNS-327L
+ *
+ * Copyright (C) 2014, Andrew Andrianov <andrew@ncrmnt.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/* Remaining mysteries:
+ *
+ * There's still something unknown on i2c address 0x13
+ * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-370.dtsi"
+
+/ {
+	model = "DLINK DNS-327L";
+	compatible = "dlink,dns327l",
+		"marvell,armada370",
+		"marvell,armada-370-xp";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlyprintk";
+		stdout-path = &uart0;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x20000000>; /* 512 MiB */
+	};
+
+	soc {
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
+			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
+
+		pcie-controller {
+			status = "okay";
+
+			/* Connected to Marvell SATA controller */
+			pcie@1,0 {
+				/* Port 0, Lane 0 */
+				status = "okay";
+			};
+
+			/* Connected to NEC USB 3.0 controller */
+			pcie@2,0 {
+				/* Port 1, Lane 0 */
+				status = "okay";
+			};
+		};
+
+		internal-regs {
+			/* Console on the PCB */
+			serial@12000 {
+				status = "okay";
+			};
+
+			/* Wired to Weltrend MCU */
+			serial@12100 {
+				status = "okay";
+			};
+
+			sata@a0000 {
+				nr-ports = <2>;
+				status = "okay";
+			};
+
+			mdio {
+			phy0: ethernet-phy@0 { /* Marvell 88E1318 */
+					reg = <0>;
+				};
+			};
+
+			ethernet@74000 {
+				status = "okay";
+				phy = <&phy0>;
+				phy-mode = "rgmii-id";
+			};
+
+			usb@50000 {
+				status = "okay";
+			};
+
+			i2c@11000 {
+				compatible = "marvell,mv64xxx-i2c";
+				clock-frequency = <100000>;
+				status = "okay";
+			};
+
+			nand@d0000 {
+				status = "okay";
+				num-cs = <1>;
+				marvell,nand-keep-config;
+				marvell,nand-enable-arbiter;
+				nand-on-flash-bbt;
+
+				partition@0 {
+					label = "u-boot";
+					/* 1.0 MiB */
+					reg = <0x0000000 0x100000>;
+					read-only;
+				};
+
+				partition@100000 {
+					label = "u-boot-env";
+					/* 128 KiB */
+					reg = <0x100000 0x20000>;
+					read-only;
+				};
+
+				partition@120000 {
+					label = "uImage";
+					/* 7 MiB */
+					reg = <0x120000 0x700000>;
+				};
+
+				partition@820000 {
+					label = "ubifs";
+					/* ~ 84 MiB */
+					reg = <0x820000 0x54e0000>;
+				};
+
+				/* Hardwired into stock bootloader */
+				partition@800000 {
+					label = "failsafe-uImage";
+					/* 5 MiB */
+					reg = <0x5d00000 0x500000>;
+				};
+
+				partition@6200000 {
+					label = "failsafe-fs";
+					/* 29 MiB */
+					reg = <0x6200000 0x1d00000>;
+				};
+
+				partition@7f00000 {
+					label = "bbt";
+					/* 1 MiB for BBT */
+					reg = <0x7f00000 0x100000>;
+				};
+			};
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <
+			&backup_button_pin
+			&power_button_pin
+			&reset_button_pin>;
+		pinctrl-names = "default";
+
+		power-button {
+			label = "Power Button";
+			linux,code = <KEY_POWER>;
+			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+		};
+
+		backup-button {
+			label = "Backup Button";
+			linux,code = <KEY_COPY>;
+			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
+		};
+
+		reset-button {
+			label = "Reset Button";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <
+			&sata_l_amber_pin
+			&sata_r_amber_pin
+			&backup_led_pin>;
+
+		pinctrl-names = "default";
+
+		sata-r-amber-pin {
+			label = "dns327l:amber:sata-r";
+			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+		sata-l-amber-pin {
+			label = "dns327l:amber:sata-l";
+			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+		backup-led-pin {
+			label = "dns327l:white:usb";
+			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-0 = <&xhci_pwr_pin
+			&sata1_pwr_pin
+			&sata2_pwr_pin>;
+
+		pinctrl-names = "default";
+
+	usb_power: regulator@1 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "USB3.0 Port Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-boot-on;
+			regulator-always-on;
+			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+		};
+
+	sata1_power: regulator@2 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "SATA-1 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-always-on;
+			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		};
+
+	sata2_power: regulator@3 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "SATA-2 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-always-on;
+			gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&pinctrl {
+	sata1_white_pin: sata1-white-pin {
+		marvell,pins = "mpp55";
+		marvell,function = "sata1";
+	};
+
+	sata_r_amber_pin: sata-r-amber-pin {
+		marvell,pins = "mpp52";
+		marvell,function = "gpio";
+	};
+
+	sata2_white_pin: sata2-white-pin {
+		marvell,pins = "mpp57";
+		marvell,function = "sata0";
+	};
+
+	sata_l_amber_pin: sata-l-amber-pin {
+		marvell,pins = "mpp53";
+		marvell,function = "gpio";
+	};
+
+	backup_led_pin: backup-led-pin {
+		marvell,pins = "mpp61";
+		marvell,function = "gpo";
+	};
+
+	xhci_pwr_pin: xhci-pwr-pin {
+		marvell,pins = "mpp13";
+		marvell,function = "gpio";
+	};
+
+	sata1_pwr_pin: sata1-pwr-pin {
+		marvell,pins = "mpp54";
+		marvell,function = "gpio";
+	};
+
+	sata2_pwr_pin: sata2-pwr-pin {
+		marvell,pins = "mpp56";
+		marvell,function = "gpio";
+	};
+
+	power_button_pin: power-button-pin {
+		marvell,pins = "mpp65";
+		marvell,function = "gpio";
+	};
+
+	backup_button_pin: backup-button-pin {
+		marvell,pins = "mpp63";
+		marvell,function = "gpio";
+	};
+
+	reset_button_pin: reset-button-pin {
+		marvell,pins = "mpp64";
+		marvell,function = "gpio";
+	};
+};
-- 
1.7.10.4

[PATCH v2 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Andrew Andrianov]

Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
---
 arch/arm/boot/dts/Makefile                     |    1 +
 arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  344 ++++++++++++++++++++++++
 2 files changed, 345 insertions(+)
 create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a1c776b..8535e4e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -612,6 +612,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
 	zynq-zybo.dtb
 dtb-$(CONFIG_MACH_ARMADA_370) += \
 	armada-370-db.dtb \
+	armada-370-dlink-dns327l.dtb \
 	armada-370-mirabox.dtb \
 	armada-370-netgear-rn102.dtb \
 	armada-370-netgear-rn104.dtb \
diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
new file mode 100644
index 0000000..c58806c
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
@@ -0,0 +1,344 @@
+/*
+ * Device Tree file for DLINK DNS-327L
+ *
+ * Copyright (C) 2014, Andrew Andrianov <andrew@ncrmnt.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/* Remaining mysteries:
+ *
+ * There's still something unknown on i2c address 0x13
+ * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-370.dtsi"
+
+/ {
+	model = "DLINK DNS-327L";
+	compatible = "dlink,dns327l",
+		"marvell,armada370",
+		"marvell,armada-370-xp";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlyprintk";
+		stdout-path = &uart0;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x20000000>; /* 512 MiB */
+	};
+
+	soc {
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
+			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
+
+		pcie-controller {
+			status = "okay";
+
+			/* Connected to Marvell SATA controller */
+			pcie at 1,0 {
+				/* Port 0, Lane 0 */
+				status = "okay";
+			};
+
+			/* Connected to NEC USB 3.0 controller */
+			pcie at 2,0 {
+				/* Port 1, Lane 0 */
+				status = "okay";
+			};
+		};
+
+		internal-regs {
+			/* Console on the PCB */
+			serial at 12000 {
+				status = "okay";
+			};
+
+			/* Wired to Weltrend MCU */
+			serial at 12100 {
+				status = "okay";
+			};
+
+			sata at a0000 {
+				nr-ports = <2>;
+				status = "okay";
+			};
+
+			mdio {
+			phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
+					reg = <0>;
+				};
+			};
+
+			ethernet at 74000 {
+				status = "okay";
+				phy = <&phy0>;
+				phy-mode = "rgmii-id";
+			};
+
+			usb at 50000 {
+				status = "okay";
+			};
+
+			i2c at 11000 {
+				compatible = "marvell,mv64xxx-i2c";
+				clock-frequency = <100000>;
+				status = "okay";
+			};
+
+			nand at d0000 {
+				status = "okay";
+				num-cs = <1>;
+				marvell,nand-keep-config;
+				marvell,nand-enable-arbiter;
+				nand-on-flash-bbt;
+
+				partition at 0 {
+					label = "u-boot";
+					/* 1.0 MiB */
+					reg = <0x0000000 0x100000>;
+					read-only;
+				};
+
+				partition at 100000 {
+					label = "u-boot-env";
+					/* 128 KiB */
+					reg = <0x100000 0x20000>;
+					read-only;
+				};
+
+				partition at 120000 {
+					label = "uImage";
+					/* 7 MiB */
+					reg = <0x120000 0x700000>;
+				};
+
+				partition at 820000 {
+					label = "ubifs";
+					/* ~ 84 MiB */
+					reg = <0x820000 0x54e0000>;
+				};
+
+				/* Hardwired into stock bootloader */
+				partition at 800000 {
+					label = "failsafe-uImage";
+					/* 5 MiB */
+					reg = <0x5d00000 0x500000>;
+				};
+
+				partition at 6200000 {
+					label = "failsafe-fs";
+					/* 29 MiB */
+					reg = <0x6200000 0x1d00000>;
+				};
+
+				partition at 7f00000 {
+					label = "bbt";
+					/* 1 MiB for BBT */
+					reg = <0x7f00000 0x100000>;
+				};
+			};
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <
+			&backup_button_pin
+			&power_button_pin
+			&reset_button_pin>;
+		pinctrl-names = "default";
+
+		power-button {
+			label = "Power Button";
+			linux,code = <KEY_POWER>;
+			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+		};
+
+		backup-button {
+			label = "Backup Button";
+			linux,code = <KEY_COPY>;
+			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
+		};
+
+		reset-button {
+			label = "Reset Button";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <
+			&sata_l_amber_pin
+			&sata_r_amber_pin
+			&backup_led_pin>;
+
+		pinctrl-names = "default";
+
+		sata-r-amber-pin {
+			label = "dns327l:amber:sata-r";
+			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+		sata-l-amber-pin {
+			label = "dns327l:amber:sata-l";
+			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+		backup-led-pin {
+			label = "dns327l:white:usb";
+			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-0 = <&xhci_pwr_pin
+			&sata1_pwr_pin
+			&sata2_pwr_pin>;
+
+		pinctrl-names = "default";
+
+	usb_power: regulator at 1 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "USB3.0 Port Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-boot-on;
+			regulator-always-on;
+			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+		};
+
+	sata1_power: regulator at 2 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "SATA-1 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-always-on;
+			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		};
+
+	sata2_power: regulator at 3 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "SATA-2 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-always-on;
+			gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&pinctrl {
+	sata1_white_pin: sata1-white-pin {
+		marvell,pins = "mpp55";
+		marvell,function = "sata1";
+	};
+
+	sata_r_amber_pin: sata-r-amber-pin {
+		marvell,pins = "mpp52";
+		marvell,function = "gpio";
+	};
+
+	sata2_white_pin: sata2-white-pin {
+		marvell,pins = "mpp57";
+		marvell,function = "sata0";
+	};
+
+	sata_l_amber_pin: sata-l-amber-pin {
+		marvell,pins = "mpp53";
+		marvell,function = "gpio";
+	};
+
+	backup_led_pin: backup-led-pin {
+		marvell,pins = "mpp61";
+		marvell,function = "gpo";
+	};
+
+	xhci_pwr_pin: xhci-pwr-pin {
+		marvell,pins = "mpp13";
+		marvell,function = "gpio";
+	};
+
+	sata1_pwr_pin: sata1-pwr-pin {
+		marvell,pins = "mpp54";
+		marvell,function = "gpio";
+	};
+
+	sata2_pwr_pin: sata2-pwr-pin {
+		marvell,pins = "mpp56";
+		marvell,function = "gpio";
+	};
+
+	power_button_pin: power-button-pin {
+		marvell,pins = "mpp65";
+		marvell,function = "gpio";
+	};
+
+	backup_button_pin: backup-button-pin {
+		marvell,pins = "mpp63";
+		marvell,function = "gpio";
+	};
+
+	reset_button_pin: reset-button-pin {
+		marvell,pins = "mpp64";
+		marvell,function = "gpio";
+	};
+};
-- 
1.7.10.4

[PATCH v2 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Andrew Andrianov]

Signed-off-by: Andrew Andrianov <andrew-g16cbSVCqPUdnm+yROfE0A@public.gmane.org>
---
 arch/arm/boot/dts/Makefile                     |    1 +
 arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  344 ++++++++++++++++++++++++
 2 files changed, 345 insertions(+)
 create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a1c776b..8535e4e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -612,6 +612,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
 	zynq-zybo.dtb
 dtb-$(CONFIG_MACH_ARMADA_370) += \
 	armada-370-db.dtb \
+	armada-370-dlink-dns327l.dtb \
 	armada-370-mirabox.dtb \
 	armada-370-netgear-rn102.dtb \
 	armada-370-netgear-rn104.dtb \
diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
new file mode 100644
index 0000000..c58806c
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
@@ -0,0 +1,344 @@
+/*
+ * Device Tree file for DLINK DNS-327L
+ *
+ * Copyright (C) 2014, Andrew Andrianov <andrew-g16cbSVCqPUdnm+yROfE0A@public.gmane.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/* Remaining mysteries:
+ *
+ * There's still something unknown on i2c address 0x13
+ * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-370.dtsi"
+
+/ {
+	model = "DLINK DNS-327L";
+	compatible = "dlink,dns327l",
+		"marvell,armada370",
+		"marvell,armada-370-xp";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlyprintk";
+		stdout-path = &uart0;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x20000000>; /* 512 MiB */
+	};
+
+	soc {
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
+			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
+
+		pcie-controller {
+			status = "okay";
+
+			/* Connected to Marvell SATA controller */
+			pcie@1,0 {
+				/* Port 0, Lane 0 */
+				status = "okay";
+			};
+
+			/* Connected to NEC USB 3.0 controller */
+			pcie@2,0 {
+				/* Port 1, Lane 0 */
+				status = "okay";
+			};
+		};
+
+		internal-regs {
+			/* Console on the PCB */
+			serial@12000 {
+				status = "okay";
+			};
+
+			/* Wired to Weltrend MCU */
+			serial@12100 {
+				status = "okay";
+			};
+
+			sata@a0000 {
+				nr-ports = <2>;
+				status = "okay";
+			};
+
+			mdio {
+			phy0: ethernet-phy@0 { /* Marvell 88E1318 */
+					reg = <0>;
+				};
+			};
+
+			ethernet@74000 {
+				status = "okay";
+				phy = <&phy0>;
+				phy-mode = "rgmii-id";
+			};
+
+			usb@50000 {
+				status = "okay";
+			};
+
+			i2c@11000 {
+				compatible = "marvell,mv64xxx-i2c";
+				clock-frequency = <100000>;
+				status = "okay";
+			};
+
+			nand@d0000 {
+				status = "okay";
+				num-cs = <1>;
+				marvell,nand-keep-config;
+				marvell,nand-enable-arbiter;
+				nand-on-flash-bbt;
+
+				partition@0 {
+					label = "u-boot";
+					/* 1.0 MiB */
+					reg = <0x0000000 0x100000>;
+					read-only;
+				};
+
+				partition@100000 {
+					label = "u-boot-env";
+					/* 128 KiB */
+					reg = <0x100000 0x20000>;
+					read-only;
+				};
+
+				partition@120000 {
+					label = "uImage";
+					/* 7 MiB */
+					reg = <0x120000 0x700000>;
+				};
+
+				partition@820000 {
+					label = "ubifs";
+					/* ~ 84 MiB */
+					reg = <0x820000 0x54e0000>;
+				};
+
+				/* Hardwired into stock bootloader */
+				partition@800000 {
+					label = "failsafe-uImage";
+					/* 5 MiB */
+					reg = <0x5d00000 0x500000>;
+				};
+
+				partition@6200000 {
+					label = "failsafe-fs";
+					/* 29 MiB */
+					reg = <0x6200000 0x1d00000>;
+				};
+
+				partition@7f00000 {
+					label = "bbt";
+					/* 1 MiB for BBT */
+					reg = <0x7f00000 0x100000>;
+				};
+			};
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <
+			&backup_button_pin
+			&power_button_pin
+			&reset_button_pin>;
+		pinctrl-names = "default";
+
+		power-button {
+			label = "Power Button";
+			linux,code = <KEY_POWER>;
+			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+		};
+
+		backup-button {
+			label = "Backup Button";
+			linux,code = <KEY_COPY>;
+			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
+		};
+
+		reset-button {
+			label = "Reset Button";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <
+			&sata_l_amber_pin
+			&sata_r_amber_pin
+			&backup_led_pin>;
+
+		pinctrl-names = "default";
+
+		sata-r-amber-pin {
+			label = "dns327l:amber:sata-r";
+			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+		sata-l-amber-pin {
+			label = "dns327l:amber:sata-l";
+			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+		backup-led-pin {
+			label = "dns327l:white:usb";
+			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+		default-state = "keep";
+		};
+
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-0 = <&xhci_pwr_pin
+			&sata1_pwr_pin
+			&sata2_pwr_pin>;
+
+		pinctrl-names = "default";
+
+	usb_power: regulator@1 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "USB3.0 Port Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-boot-on;
+			regulator-always-on;
+			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+		};
+
+	sata1_power: regulator@2 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "SATA-1 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-always-on;
+			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		};
+
+	sata2_power: regulator@3 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "SATA-2 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			enable-active-high;
+			regulator-always-on;
+			gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&pinctrl {
+	sata1_white_pin: sata1-white-pin {
+		marvell,pins = "mpp55";
+		marvell,function = "sata1";
+	};
+
+	sata_r_amber_pin: sata-r-amber-pin {
+		marvell,pins = "mpp52";
+		marvell,function = "gpio";
+	};
+
+	sata2_white_pin: sata2-white-pin {
+		marvell,pins = "mpp57";
+		marvell,function = "sata0";
+	};
+
+	sata_l_amber_pin: sata-l-amber-pin {
+		marvell,pins = "mpp53";
+		marvell,function = "gpio";
+	};
+
+	backup_led_pin: backup-led-pin {
+		marvell,pins = "mpp61";
+		marvell,function = "gpo";
+	};
+
+	xhci_pwr_pin: xhci-pwr-pin {
+		marvell,pins = "mpp13";
+		marvell,function = "gpio";
+	};
+
+	sata1_pwr_pin: sata1-pwr-pin {
+		marvell,pins = "mpp54";
+		marvell,function = "gpio";
+	};
+
+	sata2_pwr_pin: sata2-pwr-pin {
+		marvell,pins = "mpp56";
+		marvell,function = "gpio";
+	};
+
+	power_button_pin: power-button-pin {
+		marvell,pins = "mpp65";
+		marvell,function = "gpio";
+	};
+
+	backup_button_pin: backup-button-pin {
+		marvell,pins = "mpp63";
+		marvell,function = "gpio";
+	};
+
+	reset_button_pin: reset-button-pin {
+		marvell,pins = "mpp64";
+		marvell,function = "gpio";
+	};
+};
-- 
1.7.10.4

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Re: [PATCH v2 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Sebastian Hesselbarth]

On 12.04.2015 13:25, Andrew Andrianov wrote:
> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>

Andrew,

Hmm, I was hoping to reply before you respin, my comments still apply
for v2. One more below.

> ---
>   arch/arm/boot/dts/Makefile                     |    1 +
>   arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  344 ++++++++++++++++++++++++
>   2 files changed, 345 insertions(+)
>   create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
[...]
> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> new file mode 100644
> index 0000000..c58806c
> --- /dev/null
> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> @@ -0,0 +1,344 @@
> +/*
> + * Device Tree file for DLINK DNS-327L
> + *
> + * Copyright (C) 2014, Andrew Andrianov <andrew@ncrmnt.org>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + *     modify it under the terms of the GNU General Public License as
> + *     published by the Free Software Foundation; either version 2 of the
> + *     License, or (at your option) any later version.
> + *
> + *     This file is distributed in the hope that it will be useful
> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *     GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + *     obtaining a copy of this software and associated documentation
> + *     files (the "Software"), to deal in the Software without
> + *     restriction, including without limitation the rights to use
> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> + *     sell copies of the Software, and to permit persons to whom the
> + *     Software is furnished to do so, subject to the following
> + *     conditions:
> + *
> + *     The above copyright notice and this permission notice shall be
> + *     included in all copies or substantial portions of the Software.
> + *
> + *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + *     OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/* Remaining mysteries:
> + *
> + * There's still something unknown on i2c address 0x13
> + * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "armada-370.dtsi"
> +
> +/ {
> +	model = "DLINK DNS-327L";
> +	compatible = "dlink,dns327l",
> +		"marvell,armada370",
> +		"marvell,armada-370-xp";
> +
> +	chosen {
> +		bootargs = "console=ttyS0,115200 earlyprintk";
> +		stdout-path = &uart0;

With stdout-path you can also pass 115200 option, also please
remove the bootargs line completely.

Sebastian

[PATCH v2 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Sebastian Hesselbarth]

On 12.04.2015 13:25, Andrew Andrianov wrote:
> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>

Andrew,

Hmm, I was hoping to reply before you respin, my comments still apply
for v2. One more below.

> ---
>   arch/arm/boot/dts/Makefile                     |    1 +
>   arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  344 ++++++++++++++++++++++++
>   2 files changed, 345 insertions(+)
>   create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
[...]
> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> new file mode 100644
> index 0000000..c58806c
> --- /dev/null
> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> @@ -0,0 +1,344 @@
> +/*
> + * Device Tree file for DLINK DNS-327L
> + *
> + * Copyright (C) 2014, Andrew Andrianov <andrew@ncrmnt.org>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + *     modify it under the terms of the GNU General Public License as
> + *     published by the Free Software Foundation; either version 2 of the
> + *     License, or (at your option) any later version.
> + *
> + *     This file is distributed in the hope that it will be useful
> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *     GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + *     obtaining a copy of this software and associated documentation
> + *     files (the "Software"), to deal in the Software without
> + *     restriction, including without limitation the rights to use
> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> + *     sell copies of the Software, and to permit persons to whom the
> + *     Software is furnished to do so, subject to the following
> + *     conditions:
> + *
> + *     The above copyright notice and this permission notice shall be
> + *     included in all copies or substantial portions of the Software.
> + *
> + *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + *     OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/* Remaining mysteries:
> + *
> + * There's still something unknown on i2c address 0x13
> + * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "armada-370.dtsi"
> +
> +/ {
> +	model = "DLINK DNS-327L";
> +	compatible = "dlink,dns327l",
> +		"marvell,armada370",
> +		"marvell,armada-370-xp";
> +
> +	chosen {
> +		bootargs = "console=ttyS0,115200 earlyprintk";
> +		stdout-path = &uart0;

With stdout-path you can also pass 115200 option, also please
remove the bootargs line completely.

Sebastian

Re: [PATCH 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Andrew]

Andrew Lunn писал 12.04.2015 00:40:
> On Sat, Apr 11, 2015 at 11:29:20PM +0300, Andrew Andrianov wrote:
>> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
>> ---
>>  arch/arm/boot/dts/Makefile                     |    1 +
>>  arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  309 
>> ++++++++++++++++++++++++
>>  2 files changed, 310 insertions(+)
>>  create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>> 
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index a1c776b..8535e4e 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -612,6 +612,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>>  	zynq-zybo.dtb
>>  dtb-$(CONFIG_MACH_ARMADA_370) += \
>>  	armada-370-db.dtb \
>> +	armada-370-dlink-dns327l.dtb \
>>  	armada-370-mirabox.dtb \
>>  	armada-370-netgear-rn102.dtb \
>>  	armada-370-netgear-rn104.dtb \
>> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts 
>> b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>> new file mode 100644
>> index 0000000..12bc072
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>> @@ -0,0 +1,309 @@
>> +/*
>> + * Device Tree file for DLINK DNS-327L
>> + *
>> + * Copyright (C) 2014, Andrew Andrianov <andrew@ncrmnt.org>
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * as published by the Free Software Foundation; either version
>> + * 2 of the License, or (at your option) any later version.
>> + */
> 
> Hi Andrew
> 
> There has been a move to license all the 370 and XP DTS files under
> dual GPL and X11. Are you willing to add X11?

No problem, will fix.

> 
>> +
>> +/* Remaining mysteries:
>> + *
>> + * There's still something unknown on i2c address 0x13
>> + * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours
>> + *
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include <dt-bindings/input/input.h>
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include "armada-370.dtsi"
>> +
>> +/ {
>> +	model = "DLINK DNS-327L";
>> +	compatible = "dlink,dns327l",
>> +		"marvell,armada370",
>> +		"marvell,armada-370-xp";
>> +
>> +	chosen {
>> +		bootargs = "console=ttyS0,115200 earlyprintk";
> 
> It would be nice to have
> 
> stdout-path = &uart0;
> 
> here. That will help with boot loaders, using this DT file, and it a
> step towards removing the console=ttyS0,115200.
> 
>> +	};
>> +
>> +	memory {
>> +		device_type = "memory";
>> +		reg = <0x00000000 0x20000000>; /* 512 MiB */
>> +	};
>> +
>> +	soc {
>> +		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
>> +			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
>> +
>> +		pcie-controller {
>> +			status = "okay";
>> +
>> +			/* Connected to Marvell SATA controller */
>> +			pcie@1,0 {
>> +				/* Port 0, Lane 0 */
>> +				status = "okay";
>> +			};
>> +
>> +			/* Connected to NEC USB 3.0 controller */
>> +			pcie@2,0 {
>> +				/* Port 1, Lane 0 */
>> +				status = "okay";
>> +			};
>> +		};
>> +
>> +		internal-regs {
>> +			serial@12000 {
>> +				status = "okay";
>> +			};
>> +
>> +			serial@12100 {
>> +				status = "okay";
>> +			};
> 
> Are both serial ports usable?
> Could you document the pinout for the console?
> 
>       Thanks
> 	Andrew


The serial console pinout is :
[RXD|(gap)|3.3v|GND|TXD]


I've been documenting the hardware extensively in my blog here:
http://ncrmnt.org/wp/2015/02/15/debian-dlink-dns-327l-the-guide/
Pictures of the PCB are all there.

The second UART is used to interface with weltrend mcu only.

I'll resubmit the patches with fixes sometime tomorrow evening (GMT+4).
Hopefully I'll also find out is hardware freezes with cpuidle enabled 
are
still there on 4.0-rc7.

-- 
Regards,
Andrew

[PATCH 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Andrew]

Andrew Lunn ????? 12.04.2015 00:40:
> On Sat, Apr 11, 2015 at 11:29:20PM +0300, Andrew Andrianov wrote:
>> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
>> ---
>>  arch/arm/boot/dts/Makefile                     |    1 +
>>  arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  309 
>> ++++++++++++++++++++++++
>>  2 files changed, 310 insertions(+)
>>  create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>> 
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index a1c776b..8535e4e 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -612,6 +612,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>>  	zynq-zybo.dtb
>>  dtb-$(CONFIG_MACH_ARMADA_370) += \
>>  	armada-370-db.dtb \
>> +	armada-370-dlink-dns327l.dtb \
>>  	armada-370-mirabox.dtb \
>>  	armada-370-netgear-rn102.dtb \
>>  	armada-370-netgear-rn104.dtb \
>> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts 
>> b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>> new file mode 100644
>> index 0000000..12bc072
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>> @@ -0,0 +1,309 @@
>> +/*
>> + * Device Tree file for DLINK DNS-327L
>> + *
>> + * Copyright (C) 2014, Andrew Andrianov <andrew@ncrmnt.org>
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * as published by the Free Software Foundation; either version
>> + * 2 of the License, or (at your option) any later version.
>> + */
> 
> Hi Andrew
> 
> There has been a move to license all the 370 and XP DTS files under
> dual GPL and X11. Are you willing to add X11?

No problem, will fix.

> 
>> +
>> +/* Remaining mysteries:
>> + *
>> + * There's still something unknown on i2c address 0x13
>> + * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours
>> + *
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include <dt-bindings/input/input.h>
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include "armada-370.dtsi"
>> +
>> +/ {
>> +	model = "DLINK DNS-327L";
>> +	compatible = "dlink,dns327l",
>> +		"marvell,armada370",
>> +		"marvell,armada-370-xp";
>> +
>> +	chosen {
>> +		bootargs = "console=ttyS0,115200 earlyprintk";
> 
> It would be nice to have
> 
> stdout-path = &uart0;
> 
> here. That will help with boot loaders, using this DT file, and it a
> step towards removing the console=ttyS0,115200.
> 
>> +	};
>> +
>> +	memory {
>> +		device_type = "memory";
>> +		reg = <0x00000000 0x20000000>; /* 512 MiB */
>> +	};
>> +
>> +	soc {
>> +		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
>> +			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
>> +
>> +		pcie-controller {
>> +			status = "okay";
>> +
>> +			/* Connected to Marvell SATA controller */
>> +			pcie at 1,0 {
>> +				/* Port 0, Lane 0 */
>> +				status = "okay";
>> +			};
>> +
>> +			/* Connected to NEC USB 3.0 controller */
>> +			pcie at 2,0 {
>> +				/* Port 1, Lane 0 */
>> +				status = "okay";
>> +			};
>> +		};
>> +
>> +		internal-regs {
>> +			serial at 12000 {
>> +				status = "okay";
>> +			};
>> +
>> +			serial at 12100 {
>> +				status = "okay";
>> +			};
> 
> Are both serial ports usable?
> Could you document the pinout for the console?
> 
>       Thanks
> 	Andrew


The serial console pinout is :
[RXD|(gap)|3.3v|GND|TXD]


I've been documenting the hardware extensively in my blog here:
http://ncrmnt.org/wp/2015/02/15/debian-dlink-dns-327l-the-guide/
Pictures of the PCB are all there.

The second UART is used to interface with weltrend mcu only.

I'll resubmit the patches with fixes sometime tomorrow evening (GMT+4).
Hopefully I'll also find out is hardware freezes with cpuidle enabled 
are
still there on 4.0-rc7.

-- 
Regards,
Andrew

Re: [PATCH 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Sebastian Hesselbarth]

On 11.04.2015 22:29, Andrew Andrianov wrote:
> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>

Andrew,

thanks for providing this dts, please _always_ add a commit log
describing what the patch is about. The introduction in the cover
letter is nice, but it will be gone once the patches are applied,
so this patch needs some log, too.

I also have a DNS-327L and I thought I started a dts, but either
I misremember or I just cannot find it.

Anyways, some comments below.

> ---
>   arch/arm/boot/dts/Makefile                     |    1 +
>   arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  309 ++++++++++++++++++++++++
>   2 files changed, 310 insertions(+)
>   create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index a1c776b..8535e4e 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -612,6 +612,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>   	zynq-zybo.dtb
>   dtb-$(CONFIG_MACH_ARMADA_370) += \
>   	armada-370-db.dtb \
> +	armada-370-dlink-dns327l.dtb \
>   	armada-370-mirabox.dtb \
>   	armada-370-netgear-rn102.dtb \
>   	armada-370-netgear-rn104.dtb \
> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> new file mode 100644
> index 0000000..12bc072
> --- /dev/null
> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> @@ -0,0 +1,309 @@
> +/*
> + * Device Tree file for DLINK DNS-327L

Just a nit, but the company's logo uses "D-Link" so we should
use that in here.

I am fine with the file named "-370-dlink-dns" though.

> + * Copyright (C) 2014, Andrew Andrianov <andrew@ncrmnt.org>

+2015?

> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + */

Andrew Lunn already mentioned dual licensing here.

> +/* Remaining mysteries:
> + *
> + * There's still something unknown on i2c address 0x13

Well, I can at least tell it is a "device" instead of "something" ;)

I am ok with the comment about an "unknown device at i2c address 0x13".

> + * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours

I don't think the dts is the right place for Linux issues.

> + *
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "armada-370.dtsi"
> +
> +/ {
> +	model = "DLINK DNS-327L";

"D-Link DNS-327L"

> +	compatible = "dlink,dns327l",
> +		"marvell,armada370",
> +		"marvell,armada-370-xp";
> +
> +	chosen {
> +		bootargs = "console=ttyS0,115200 earlyprintk";
> +	};

Andrew Lunn already mentioned stdout-path property.

> +	memory {
> +		device_type = "memory";
> +		reg = <0x00000000 0x20000000>; /* 512 MiB */
> +	};
> +
> +	soc {
> +		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
> +			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
> +
> +		pcie-controller {
> +			status = "okay";
> +
> +			/* Connected to Marvell SATA controller */

Really? It is actually using the two internal SATA ports.

> +			pcie@1,0 {
> +				/* Port 0, Lane 0 */
> +				status = "okay";
> +			};
> +
> +			/* Connected to NEC USB 3.0 controller */

Please just enable the port where the USB3 controller is connected
to. Could be the other one.

> +			pcie@2,0 {
> +				/* Port 1, Lane 0 */
> +				status = "okay";
> +			};
> +		};
> +
> +		internal-regs {
> +			serial@12000 {
> +				status = "okay";
> +			};
> +
> +			serial@12100 {
> +				status = "okay";
> +			};

&uart0 { status = "okay" };
&uart1 { status = "okay" };

And move to bottom of the file. We try not to replay the bus structure
on board level all the time, if possible.

> +			sata@a0000 {
> +				nr-ports = <2>;
> +				status = "okay";
> +			};

Ok, sata has no node label, yet. It has to stay here.

> +			mdio {
> +			phy0: ethernet-phy@0 { /* Marvell 88E1318 */
> +					reg = <0>;
> +				};
> +			};

Something is wrong with indention of the node above and we do have
a node label for &mdio so it can also move.

> +			ethernet@74000 {
> +				status = "okay";
> +				phy = <&phy0>;
> +				phy-mode = "rgmii-id";
> +			};

ditto, &eth1.

> +			usb@50000 {
> +				status = "okay";
> +			};

Again, no node label, yet.

> +			i2c@11000 {
> +				compatible = "marvell,mv64xxx-i2c";
> +				clock-frequency = <100000>;
> +				status = "okay";
> +			};

&i2c0, so please move.

> +			nand@d0000 {

Again, no node label, yet.

I guess there will be a cleanup patch set adding proper labels to
armada-370-xp.dtsi some day.

> +				status = "okay";
> +				num-cs = <1>;

I stumbled upon this on ix4-300d already while adding support for
pxa3xx nfc on barebox bootloader for the armada370/xp type of nfc
controller.

It is most likely the flash is connected to cs0 just because it is one
selected if boot source is NAND.

It could be that current barebox and Linux nfc driver deal with
the property differently, I haven't really checked yet.

> +				marvell,nand-keep-config;
> +				marvell,nand-enable-arbiter;
> +				nand-on-flash-bbt;

Do you know the ECC scheme used?

If so, please add corresponding nand-ecc-strength and
nand-ecc-step-size properties.

> +				partition@0 {
> +					label = "u-boot";
> +					/* 1.0 MiB */
> +					reg = <0x0000000 0x100000>;
> +					read-only;
> +				};
> +
> +				partition@100000 {
> +					label = "u-boot-env";
> +					/* 128 KiB */
> +					reg = <0x100000 0x20000>;
> +					read-only;
> +				};
> +
> +				partition@120000 {
> +					label = "uImage";
> +					/* 7 MiB */
> +					reg = <0x120000 0x700000>;
> +				};
> +
> +				partition@820000 {
> +					label = "ubifs";
> +					/* ~ 84 MiB */
> +					reg = <0x820000 0x54e0000>;
> +				};
> +
> +				/* Hardwired into stock bootloader */

I don't get the comment above.

> +				partition@800000 {

partition@5d00000

> +					label = "failsafe-uImage";
> +					/* 5 MiB */
> +					reg = <0x5d00000 0x500000>;
> +				};
> +
> +				partition@6200000 {
> +					label = "failsafe-fs";
> +					/* 29 MiB */
> +					reg = <0x6200000 0x1d00000>;
> +				};
> +
> +				partition@7f00000 {
> +					label = "bbt";
> +					/* 1 MiB for BBT */
> +					reg = <0x7f00000 0x100000>;
> +				};
> +			};
> +		};
> +	};
> +
> +	gpio-keys {
> +		compatible = "gpio-keys";
> +		pinctrl-0 = <
> +			&backup_button_pin
> +			&power_button_pin>;
> +		pinctrl-names = "default";
> +
> +		power-button {
> +			label = "Power Button";
> +			linux,code = <KEY_POWER>;
> +			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
> +		};
> +
> +		backup-button {
> +			label = "Backup Button";
> +			linux,code = <KEY_COPY>;

Hmm, is KEY_COPY the best option?

> +			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
> +		};
> +
> +		reset-button {
> +			label = "Reset Button";
> +			linux,code = <KEY_RESTART>;
> +			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
> +		};
> +
> +

Double empty lines above.

> +	};
> +
> +	gpio-leds {
> +		compatible = "gpio-leds";
> +		pinctrl-0 = <
> +			&sata_l_amber_pin
> +			&sata_r_amber_pin
> +			&backup_led_pin>;
> +
> +		pinctrl-names = "default";
> +
> +		sata-r-amber-pin {
> +			label = "dns327l:amber:sata-r";
> +			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
> +		default-state = "keep";

Wrong indention.

> +		};
> +
> +		sata-l-amber-pin {
> +			label = "dns327l:amber:sata-l";
> +			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
> +		default-state = "keep";
> +		};
> +
> +		backup-led-pin {
> +			label = "dns327l:white:usb";
> +			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
> +		default-state = "keep";
> +		};
> +

ditto for all gpio nodes above, and another empty line.

> +	};
> +
> +	regulators {
> +		compatible = "simple-bus";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		pinctrl-0 = <&xhci_pwr_pin
> +			&sata1_pwr_pin
> +			&sata2_pwr_pin>;
> +
> +		pinctrl-names = "default";
> +
> +	usb_power: regulator@1 {

Wrong indention.

> +			compatible = "regulator-fixed";
> +			reg = <1>;
> +			regulator-name = "USB3.0 Port Power";
> +			regulator-min-microvolt = <5000000>;
> +			regulator-max-microvolt = <5000000>;
> +			enable-active-high;
> +			regulator-boot-on;
> +			regulator-always-on;
> +			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
> +		};
> +
> +	sata1_power: regulator@2 {

ditto.

> +			compatible = "regulator-fixed";
> +			reg = <1>;

reg = <2>;

> +			regulator-name = "SATA-1 Power";

Front HDD LEDs are actually labeled "L" and "R", can you evaluate
which 0/1 matches L/R and rename the regulator names accordingly?

> +			regulator-min-microvolt = <5000000>;
> +			regulator-max-microvolt = <5000000>;
> +			enable-active-high;
> +			regulator-always-on;
> +			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
> +		};
> +
> +	sata2_power: regulator@3 {

Wrong indention.

> +			compatible = "regulator-fixed";
> +			reg = <1>;

reg = <3>;

> +			regulator-name = "SATA-2 Power";

Same comment about the 0/1 vs L/R naming.

> +			regulator-min-microvolt = <5000000>;
> +			regulator-max-microvolt = <5000000>;
> +			enable-active-high;
> +			regulator-always-on;
> +			gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
> +		};
> +	};
> +};
> +
> +&pinctrl {
> +	sata1_white_pin: sata1-white-pin {
> +		marvell,pins = "mpp55";
> +		marvell,function = "sata1";
> +	};
> +
> +	sata_r_amber_pin: sata-r-amber-pin {
> +		marvell,pins = "mpp52";
> +		marvell,function = "gpio";
> +	};
> +
> +	sata2_white_pin: sata2-white-pin {
> +		marvell,pins = "mpp57";
> +		marvell,function = "sata0";
> +	};
> +
> +	sata_l_amber_pin: sata-l-amber-pin {
> +		marvell,pins = "mpp53";
> +		marvell,function = "gpio";
> +	};

If you find the 0/1, L/R mapping you should use it all over this file.

Sebastian

> +
> +	backup_led_pin: backup-led-pin {
> +		marvell,pins = "mpp61";
> +		marvell,function = "gpo";
> +	};
> +
> +	xhci_pwr_pin: xhci-pwr-pin {
> +		marvell,pins = "mpp13";
> +		marvell,function = "gpio";
> +	};
> +
> +	sata1_pwr_pin: sata1-pwr-pin {
> +		marvell,pins = "mpp54";
> +		marvell,function = "gpio";
> +	};
> +
> +	sata2_pwr_pin: sata2-pwr-pin {
> +		marvell,pins = "mpp56";
> +		marvell,function = "gpio";
> +	};
> +
> +	power_button_pin: power-button-pin {
> +		marvell,pins = "mpp65";
> +		marvell,function = "gpio";
> +	};
> +
> +	backup_button_pin: backup-button-pin {
> +		marvell,pins = "mpp63";
> +		marvell,function = "gpio";
> +	};
> +
> +	reset_button_pin: reset-button-pin {
> +		marvell,pins = "mpp64";
> +		marvell,function = "gpio";
> +	};
> +};
>

[PATCH 2/2] ARM: mvebu: dts: Add dts file for DLink DNS-327L

[Sebastian Hesselbarth]

On 11.04.2015 22:29, Andrew Andrianov wrote:
> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>

Andrew,

thanks for providing this dts, please _always_ add a commit log
describing what the patch is about. The introduction in the cover
letter is nice, but it will be gone once the patches are applied,
so this patch needs some log, too.

I also have a DNS-327L and I thought I started a dts, but either
I misremember or I just cannot find it.

Anyways, some comments below.

> ---
>   arch/arm/boot/dts/Makefile                     |    1 +
>   arch/arm/boot/dts/armada-370-dlink-dns327l.dts |  309 ++++++++++++++++++++++++
>   2 files changed, 310 insertions(+)
>   create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index a1c776b..8535e4e 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -612,6 +612,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>   	zynq-zybo.dtb
>   dtb-$(CONFIG_MACH_ARMADA_370) += \
>   	armada-370-db.dtb \
> +	armada-370-dlink-dns327l.dtb \
>   	armada-370-mirabox.dtb \
>   	armada-370-netgear-rn102.dtb \
>   	armada-370-netgear-rn104.dtb \
> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> new file mode 100644
> index 0000000..12bc072
> --- /dev/null
> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> @@ -0,0 +1,309 @@
> +/*
> + * Device Tree file for DLINK DNS-327L

Just a nit, but the company's logo uses "D-Link" so we should
use that in here.

I am fine with the file named "-370-dlink-dns" though.

> + * Copyright (C) 2014, Andrew Andrianov <andrew@ncrmnt.org>

+2015?

> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + */

Andrew Lunn already mentioned dual licensing here.

> +/* Remaining mysteries:
> + *
> + * There's still something unknown on i2c address 0x13

Well, I can at least tell it is a "device" instead of "something" ;)

I am ok with the comment about an "unknown device at i2c address 0x13".

> + * CONFIG_ARM_MVEBU_V7_CPUIDLE=y causes hard freezes every 1-8 hours

I don't think the dts is the right place for Linux issues.

> + *
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "armada-370.dtsi"
> +
> +/ {
> +	model = "DLINK DNS-327L";

"D-Link DNS-327L"

> +	compatible = "dlink,dns327l",
> +		"marvell,armada370",
> +		"marvell,armada-370-xp";
> +
> +	chosen {
> +		bootargs = "console=ttyS0,115200 earlyprintk";
> +	};

Andrew Lunn already mentioned stdout-path property.

> +	memory {
> +		device_type = "memory";
> +		reg = <0x00000000 0x20000000>; /* 512 MiB */
> +	};
> +
> +	soc {
> +		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
> +			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
> +
> +		pcie-controller {
> +			status = "okay";
> +
> +			/* Connected to Marvell SATA controller */

Really? It is actually using the two internal SATA ports.

> +			pcie at 1,0 {
> +				/* Port 0, Lane 0 */
> +				status = "okay";
> +			};
> +
> +			/* Connected to NEC USB 3.0 controller */

Please just enable the port where the USB3 controller is connected
to. Could be the other one.

> +			pcie at 2,0 {
> +				/* Port 1, Lane 0 */
> +				status = "okay";
> +			};
> +		};
> +
> +		internal-regs {
> +			serial at 12000 {
> +				status = "okay";
> +			};
> +
> +			serial at 12100 {
> +				status = "okay";
> +			};

&uart0 { status = "okay" };
&uart1 { status = "okay" };

And move to bottom of the file. We try not to replay the bus structure
on board level all the time, if possible.

> +			sata at a0000 {
> +				nr-ports = <2>;
> +				status = "okay";
> +			};

Ok, sata has no node label, yet. It has to stay here.

> +			mdio {
> +			phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
> +					reg = <0>;
> +				};
> +			};

Something is wrong with indention of the node above and we do have
a node label for &mdio so it can also move.

> +			ethernet at 74000 {
> +				status = "okay";
> +				phy = <&phy0>;
> +				phy-mode = "rgmii-id";
> +			};

ditto, &eth1.

> +			usb at 50000 {
> +				status = "okay";
> +			};

Again, no node label, yet.

> +			i2c at 11000 {
> +				compatible = "marvell,mv64xxx-i2c";
> +				clock-frequency = <100000>;
> +				status = "okay";
> +			};

&i2c0, so please move.

> +			nand at d0000 {

Again, no node label, yet.

I guess there will be a cleanup patch set adding proper labels to
armada-370-xp.dtsi some day.

> +				status = "okay";
> +				num-cs = <1>;

I stumbled upon this on ix4-300d already while adding support for
pxa3xx nfc on barebox bootloader for the armada370/xp type of nfc
controller.

It is most likely the flash is connected to cs0 just because it is one
selected if boot source is NAND.

It could be that current barebox and Linux nfc driver deal with
the property differently, I haven't really checked yet.

> +				marvell,nand-keep-config;
> +				marvell,nand-enable-arbiter;
> +				nand-on-flash-bbt;

Do you know the ECC scheme used?

If so, please add corresponding nand-ecc-strength and
nand-ecc-step-size properties.

> +				partition at 0 {
> +					label = "u-boot";
> +					/* 1.0 MiB */
> +					reg = <0x0000000 0x100000>;
> +					read-only;
> +				};
> +
> +				partition at 100000 {
> +					label = "u-boot-env";
> +					/* 128 KiB */
> +					reg = <0x100000 0x20000>;
> +					read-only;
> +				};
> +
> +				partition at 120000 {
> +					label = "uImage";
> +					/* 7 MiB */
> +					reg = <0x120000 0x700000>;
> +				};
> +
> +				partition at 820000 {
> +					label = "ubifs";
> +					/* ~ 84 MiB */
> +					reg = <0x820000 0x54e0000>;
> +				};
> +
> +				/* Hardwired into stock bootloader */

I don't get the comment above.

> +				partition at 800000 {

partition at 5d00000

> +					label = "failsafe-uImage";
> +					/* 5 MiB */
> +					reg = <0x5d00000 0x500000>;
> +				};
> +
> +				partition at 6200000 {
> +					label = "failsafe-fs";
> +					/* 29 MiB */
> +					reg = <0x6200000 0x1d00000>;
> +				};
> +
> +				partition at 7f00000 {
> +					label = "bbt";
> +					/* 1 MiB for BBT */
> +					reg = <0x7f00000 0x100000>;
> +				};
> +			};
> +		};
> +	};
> +
> +	gpio-keys {
> +		compatible = "gpio-keys";
> +		pinctrl-0 = <
> +			&backup_button_pin
> +			&power_button_pin>;
> +		pinctrl-names = "default";
> +
> +		power-button {
> +			label = "Power Button";
> +			linux,code = <KEY_POWER>;
> +			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
> +		};
> +
> +		backup-button {
> +			label = "Backup Button";
> +			linux,code = <KEY_COPY>;

Hmm, is KEY_COPY the best option?

> +			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
> +		};
> +
> +		reset-button {
> +			label = "Reset Button";
> +			linux,code = <KEY_RESTART>;
> +			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
> +		};
> +
> +

Double empty lines above.

> +	};
> +
> +	gpio-leds {
> +		compatible = "gpio-leds";
> +		pinctrl-0 = <
> +			&sata_l_amber_pin
> +			&sata_r_amber_pin
> +			&backup_led_pin>;
> +
> +		pinctrl-names = "default";
> +
> +		sata-r-amber-pin {
> +			label = "dns327l:amber:sata-r";
> +			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
> +		default-state = "keep";

Wrong indention.

> +		};
> +
> +		sata-l-amber-pin {
> +			label = "dns327l:amber:sata-l";
> +			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
> +		default-state = "keep";
> +		};
> +
> +		backup-led-pin {
> +			label = "dns327l:white:usb";
> +			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
> +		default-state = "keep";
> +		};
> +

ditto for all gpio nodes above, and another empty line.

> +	};
> +
> +	regulators {
> +		compatible = "simple-bus";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		pinctrl-0 = <&xhci_pwr_pin
> +			&sata1_pwr_pin
> +			&sata2_pwr_pin>;
> +
> +		pinctrl-names = "default";
> +
> +	usb_power: regulator at 1 {

Wrong indention.

> +			compatible = "regulator-fixed";
> +			reg = <1>;
> +			regulator-name = "USB3.0 Port Power";
> +			regulator-min-microvolt = <5000000>;
> +			regulator-max-microvolt = <5000000>;
> +			enable-active-high;
> +			regulator-boot-on;
> +			regulator-always-on;
> +			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
> +		};
> +
> +	sata1_power: regulator at 2 {

ditto.

> +			compatible = "regulator-fixed";
> +			reg = <1>;

reg = <2>;

> +			regulator-name = "SATA-1 Power";

Front HDD LEDs are actually labeled "L" and "R", can you evaluate
which 0/1 matches L/R and rename the regulator names accordingly?

> +			regulator-min-microvolt = <5000000>;
> +			regulator-max-microvolt = <5000000>;
> +			enable-active-high;
> +			regulator-always-on;
> +			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
> +		};
> +
> +	sata2_power: regulator at 3 {

Wrong indention.

> +			compatible = "regulator-fixed";
> +			reg = <1>;

reg = <3>;

> +			regulator-name = "SATA-2 Power";

Same comment about the 0/1 vs L/R naming.

> +			regulator-min-microvolt = <5000000>;
> +			regulator-max-microvolt = <5000000>;
> +			enable-active-high;
> +			regulator-always-on;
> +			gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
> +		};
> +	};
> +};
> +
> +&pinctrl {
> +	sata1_white_pin: sata1-white-pin {
> +		marvell,pins = "mpp55";
> +		marvell,function = "sata1";
> +	};
> +
> +	sata_r_amber_pin: sata-r-amber-pin {
> +		marvell,pins = "mpp52";
> +		marvell,function = "gpio";
> +	};
> +
> +	sata2_white_pin: sata2-white-pin {
> +		marvell,pins = "mpp57";
> +		marvell,function = "sata0";
> +	};
> +
> +	sata_l_amber_pin: sata-l-amber-pin {
> +		marvell,pins = "mpp53";
> +		marvell,function = "gpio";
> +	};

If you find the 0/1, L/R mapping you should use it all over this file.

Sebastian

> +
> +	backup_led_pin: backup-led-pin {
> +		marvell,pins = "mpp61";
> +		marvell,function = "gpo";
> +	};
> +
> +	xhci_pwr_pin: xhci-pwr-pin {
> +		marvell,pins = "mpp13";
> +		marvell,function = "gpio";
> +	};
> +
> +	sata1_pwr_pin: sata1-pwr-pin {
> +		marvell,pins = "mpp54";
> +		marvell,function = "gpio";
> +	};
> +
> +	sata2_pwr_pin: sata2-pwr-pin {
> +		marvell,pins = "mpp56";
> +		marvell,function = "gpio";
> +	};
> +
> +	power_button_pin: power-button-pin {
> +		marvell,pins = "mpp65";
> +		marvell,function = "gpio";
> +	};
> +
> +	backup_button_pin: backup-button-pin {
> +		marvell,pins = "mpp63";
> +		marvell,function = "gpio";
> +	};
> +
> +	reset_button_pin: reset-button-pin {
> +		marvell,pins = "mpp64";
> +		marvell,function = "gpio";
> +	};
> +};
>

Re: [PATCH 0/2] ARM: mvebu: Add DLINK-DNS327L support

[Andrew Lunn]

> When power button is pressed to turn the NAS off, weltrend signals 
> the SoC by driving mpp63 line low. Apparently right now pinctrl assumes
> that this line can only work as 'gpo' that screws up gpio-buttons driver.
> Since without gpio-buttons, mpp63 works as input properly via sysfs 
> interface, I've added a patch for pinctrl-armada-370.c that fixes the 
> issue.

Hi Andrew

This is odd. I just checked the Marvell datasheets, and they list this
pin a GPO.

We probably want Thomas or Gregory to check this with Marvell.

   Andrew

[PATCH 0/2] ARM: mvebu: Add DLINK-DNS327L support

[Andrew Lunn]

> When power button is pressed to turn the NAS off, weltrend signals 
> the SoC by driving mpp63 line low. Apparently right now pinctrl assumes
> that this line can only work as 'gpo' that screws up gpio-buttons driver.
> Since without gpio-buttons, mpp63 works as input properly via sysfs 
> interface, I've added a patch for pinctrl-armada-370.c that fixes the 
> issue.

Hi Andrew

This is odd. I just checked the Marvell datasheets, and they list this
pin a GPO.

We probably want Thomas or Gregory to check this with Marvell.

   Andrew

Re: [PATCH 0/2] ARM: mvebu: Add DLINK-DNS327L support

[Gregory CLEMENT]

Hi Andrew,

On 11/04/2015 23:28, Andrew Lunn wrote:
>> When power button is pressed to turn the NAS off, weltrend signals 
>> the SoC by driving mpp63 line low. Apparently right now pinctrl assumes
>> that this line can only work as 'gpo' that screws up gpio-buttons driver.
>> Since without gpio-buttons, mpp63 works as input properly via sysfs 
>> interface, I've added a patch for pinctrl-armada-370.c that fixes the 
>> issue.
> 
> Hi Andrew
> 
> This is odd. I just checked the Marvell datasheets, and they list this
> pin a GPO.
> 
> We probably want Thomas or Gregory to check this with Marvell.

I have check on the datasheet I have (in case of it was different of the public one)
and for all the variant of the Armada 370:  88F6710, 88F6707, and 88F6W11 the MPP63
is list as GPO.

I will ask Marvell to see if it was a typo on their datasheet.


Thanks,

Gregory


> 
>    Andrew
> 


-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH 0/2] ARM: mvebu: Add DLINK-DNS327L support

[Gregory CLEMENT]

Hi Andrew,

On 11/04/2015 23:28, Andrew Lunn wrote:
>> When power button is pressed to turn the NAS off, weltrend signals 
>> the SoC by driving mpp63 line low. Apparently right now pinctrl assumes
>> that this line can only work as 'gpo' that screws up gpio-buttons driver.
>> Since without gpio-buttons, mpp63 works as input properly via sysfs 
>> interface, I've added a patch for pinctrl-armada-370.c that fixes the 
>> issue.
> 
> Hi Andrew
> 
> This is odd. I just checked the Marvell datasheets, and they list this
> pin a GPO.
> 
> We probably want Thomas or Gregory to check this with Marvell.

I have check on the datasheet I have (in case of it was different of the public one)
and for all the variant of the Armada 370:  88F6710, 88F6707, and 88F6W11 the MPP63
is list as GPO.

I will ask Marvell to see if it was a typo on their datasheet.


Thanks,

Gregory


> 
>    Andrew
> 


-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com