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* [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg
@ 2018-05-17 17:46 Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 01/49] docker: add "probe" command for configure Alex Bennée
                   ` (48 more replies)
  0 siblings, 49 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

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Hi,

Hopefully this is ready for merging. At 48(+1) patches this is quite a
large series to have hanging around. The main changes are:

  - Review/Tested-by tags
  - Help text for new configure options
  - Support dynamic linking for host/guest targets
  - Updates to MAINTAINERS

I've also fixed a bunch of checkpatch issues but there still some
legitimate ones (tabs in old tests) and a whole bunch of false
positives. I'd prefer to tackle the tabs next time we actually update
the tests.

I'm not sure what to do with the final patch in the series. We could
merge it and give maintainers a chance to fix the tests and only
delete the tests if they are not fixed in the meantime?

I've got some additional tests as well as Travis integration to add
but I thought I'd get the base set merged first.

As usual detailed notes are bellow the --- in the commit messages.

The following patches still need review:

  patch 0017/docker Add fedora i386 cross image.patch needs review
  patch 0021/tests tcg i386 add runner for test i386 fprem.patch needs review
  patch 0022/tests tcg i386 disable i386 version of test i386 .patch needs review
  patch 0027/tests tcg enable building for ARM.patch needs review
  patch 0029/tests tcg arm disable p 32768 mmap test.patch needs review
  patch 0030/tests tcg enable building for AArch64.patch needs review
  patch 0031/tests tcg aarch64 add Makefile.target.patch needs review
  patch 0032/tests tcg arm add fcvt test cases for AArch32 64.patch needs review
  patch 0034/tests tcg enable building for MIPS.patch needs review
  patch 0035/tests tcg mips include common mips hello mips.patch needs review
  patch 0038/tests tcg enable building for Alpha.patch needs review
  patch 0039/tests tcg alpha add Alpha specific tests.patch needs review
  patch 0043/tests tcg enable building for sparc64.patch needs review
  patch 0044/tests tcg enable building for mips64.patch needs review
  patch 0045/tests tcg enable building for RISCV64.patch needs review
  patch 0046/tests tcg Makefile update to be called from Makef.patch needs review
  patch 0047/Makefile.target add clean build guest tests targe.patch needs review
  patch 0049/tests tcg override runners for broken tests UPSTR.patch needs review

Alex Bennée (45):
  docker: add "probe" command for configure
  configure: add test for docker availability
  configure: add support for --cross-cc-FOO
  configure: move i386_cc to cross_cc_i386
  configure: allow user to specify --cross-cc-cflags-foo=
  configure: set cross_cc_FOO for host compiler
  docker: Add "cc" subcommand
  docker: extend "cc" command to accept compiler
  docker: allow "cc" command to run in user context
  docker: Makefile.include introduce DOCKER_SCRIPT
  tests/tcg: move architecture independent tests into subdir
  tests/tcg/multiarch: enable additional linux-test tests
  tests/tcg/multiarch: move most output to stdout
  tests/tcg: move i386 specific tests into subdir
  tests/tcg: enable building for i386
  tests/tcg/i386: fix test-i386
  tests/tcg/i386: add runner for test-i386-fprem
  tests/tcg/i386: disable i386 version of test-i386-ssse
  tests/tcg/x86_64: add Makefile.target
  tests/tcg/i386/test-i386: use modern vector_size attributes
  tests/tcg/i386/test-i386: fix printf format
  tests/tcg: move ARM specific tests into subdir
  tests/tcg: enable building for ARM
  tests/tcg/arm: fix up test-arm-iwmmxt test
  tests/tcg/arm: disable -p 32768 mmap test
  tests/tcg: enable building for AArch64
  tests/tcg/aarch64: add Makefile.target
  tests/tcg/arm: add fcvt test cases for AArch32/64
  tests/tcg: move MIPS specific tests into subdir
  tests/tcg: enable building for MIPS
  tests/tcg/mips: include common mips hello-mips
  tests/tcg: enable building for s390x
  tests/tcg: enable building for ppc64
  tests/tcg: enable building for Alpha
  tests/tcg/alpha: add Alpha specific tests
  tests/tcg: enable building for HPPA
  tests/tcg: enable building for m68k
  tests/tcg: enable building for sh4
  tests/tcg: enable building for sparc64
  tests/tcg: enable building for mips64
  tests/tcg: enable building for RISCV64
  tests/tcg/Makefile: update to be called from Makefile.target
  Makefile.target: add (clean-/build-)guest-tests targets
  tests/Makefile.include: add [build|clean|check]-tcg targets
  tests/tcg: override runners for broken tests (!UPSTREAM)

Fam Zheng (4):
  Makefile: Rename TARGET_DIRS to TARGET_LIST
  tests/tcg/multiarch: Build fix for linux-test
  docker: Add fedora-i386-cross image
  tests/tcg/i386: Build fix for hello-i386

 MAINTAINERS                                   |   14 +
 Makefile                                      |   20 +-
 Makefile.target                               |    5 +
 configure                                     |  153 +-
 scripts/create_config                         |    2 +-
 tests/Makefile.include                        |   28 +-
 tests/docker/Makefile.include                 |   17 +-
 tests/docker/docker.py                        |   49 +
 .../dockerfiles/debian-alpha-cross.docker     |   12 +
 .../dockerfiles/debian-cross-build.docker     |   36 +
 .../dockerfiles/debian-hppa-cross.docker      |   12 +
 .../dockerfiles/debian-m68k-cross.docker      |   12 +
 .../dockerfiles/debian-mips64-cross.docker    |   12 +
 .../dockerfiles/debian-riscv64-cross.docker   |   12 +
 .../dockerfiles/debian-sh4-cross.docker       |   12 +
 tests/docker/dockerfiles/debian-sid.docker    |   23 +
 .../dockerfiles/debian-sparc64-cross.docker   |   12 +
 .../dockerfiles/fedora-i386-cross.docker      |   14 +
 tests/tcg/Makefile                            |  208 +-
 tests/tcg/Makefile.include                    |   88 +
 tests/tcg/README                              |   69 +-
 tests/tcg/aarch64/Makefile.include            |    8 +
 tests/tcg/aarch64/Makefile.target             |   19 +
 tests/tcg/aarch64/fcvt.ref                    | 3268 +++++++++++++++++
 tests/tcg/alpha/Makefile                      |   35 -
 tests/tcg/alpha/Makefile.include              |    2 +
 tests/tcg/alpha/Makefile.target               |   15 +
 tests/tcg/alpha/crt.s                         |   26 -
 tests/tcg/alpha/hello-alpha.c                 |    2 +
 tests/tcg/alpha/test-cond.c                   |    1 +
 tests/tcg/alpha/test-ovf.c                    |    2 +
 tests/tcg/arm/Makefile.include                |    8 +
 tests/tcg/arm/Makefile.target                 |   39 +
 tests/tcg/arm/README                          |   11 +
 tests/tcg/arm/fcvt.c                          |  458 +++
 tests/tcg/arm/fcvt.ref                        | 3268 +++++++++++++++++
 tests/tcg/{ => arm}/hello-arm.c               |    0
 .../test-arm-iwmmxt.S}                        |    0
 tests/tcg/hppa/Makefile.include               |    2 +
 tests/tcg/hppa/Makefile.target                |    7 +
 tests/tcg/i386/Makefile.include               |    9 +
 tests/tcg/i386/Makefile.target                |   58 +
 tests/tcg/i386/README                         |   38 +
 tests/tcg/{ => i386}/hello-i386.c             |    1 +
 tests/tcg/{ => i386}/pi_10.com                |  Bin
 tests/tcg/{ => i386}/runcom.c                 |    0
 tests/tcg/{ => i386}/test-i386-code16.S       |    0
 tests/tcg/{ => i386}/test-i386-fprem.c        |   12 +-
 tests/tcg/{ => i386}/test-i386-muldiv.h       |    0
 tests/tcg/{ => i386}/test-i386-shift.h        |    0
 tests/tcg/{ => i386}/test-i386-ssse3.c        |    0
 tests/tcg/{ => i386}/test-i386-vm86.S         |    0
 tests/tcg/{ => i386}/test-i386.c              |    7 +-
 tests/tcg/{ => i386}/test-i386.h              |    0
 tests/tcg/m68k/Makefile.include               |    2 +
 tests/tcg/m68k/Makefile.target                |    9 +
 tests/tcg/mips/Makefile.include               |   20 +
 tests/tcg/mips/Makefile.target                |   23 +
 tests/tcg/mips/README                         |    7 +
 tests/tcg/{ => mips}/hello-mips.c             |    0
 tests/tcg/multiarch/Makefile.target           |   29 +
 tests/tcg/multiarch/README                    |    1 +
 tests/tcg/{ => multiarch}/linux-test.c        |  113 +-
 tests/tcg/{ => multiarch}/sha1.c              |    0
 tests/tcg/{ => multiarch}/test-mmap.c         |   40 +-
 tests/tcg/{ => multiarch}/testthread.c        |    0
 tests/tcg/ppc64le/Makefile.include            |    2 +
 tests/tcg/riscv/Makefile.include              |   10 +
 tests/tcg/s390x/Makefile.include              |    2 +
 tests/tcg/sh4/Makefile.include                |    4 +
 tests/tcg/sparc64/Makefile.include            |    2 +
 tests/tcg/sparc64/Makefile.target             |    8 +
 tests/tcg/test_path.c                         |  157 -
 tests/tcg/x86_64/Makefile.target              |   15 +
 74 files changed, 8016 insertions(+), 534 deletions(-)
 create mode 100644 tests/docker/dockerfiles/debian-alpha-cross.docker
 create mode 100644 tests/docker/dockerfiles/debian-cross-build.docker
 create mode 100644 tests/docker/dockerfiles/debian-hppa-cross.docker
 create mode 100644 tests/docker/dockerfiles/debian-m68k-cross.docker
 create mode 100644 tests/docker/dockerfiles/debian-mips64-cross.docker
 create mode 100644 tests/docker/dockerfiles/debian-riscv64-cross.docker
 create mode 100644 tests/docker/dockerfiles/debian-sh4-cross.docker
 create mode 100644 tests/docker/dockerfiles/debian-sid.docker
 create mode 100644 tests/docker/dockerfiles/debian-sparc64-cross.docker
 create mode 100644 tests/docker/dockerfiles/fedora-i386-cross.docker
 create mode 100644 tests/tcg/Makefile.include
 create mode 100644 tests/tcg/aarch64/Makefile.include
 create mode 100644 tests/tcg/aarch64/Makefile.target
 create mode 100644 tests/tcg/aarch64/fcvt.ref
 delete mode 100644 tests/tcg/alpha/Makefile
 create mode 100644 tests/tcg/alpha/Makefile.include
 create mode 100644 tests/tcg/alpha/Makefile.target
 delete mode 100644 tests/tcg/alpha/crt.s
 create mode 100644 tests/tcg/arm/Makefile.include
 create mode 100644 tests/tcg/arm/Makefile.target
 create mode 100644 tests/tcg/arm/README
 create mode 100644 tests/tcg/arm/fcvt.c
 create mode 100644 tests/tcg/arm/fcvt.ref
 rename tests/tcg/{ => arm}/hello-arm.c (100%)
 rename tests/tcg/{test-arm-iwmmxt.s => arm/test-arm-iwmmxt.S} (100%)
 create mode 100644 tests/tcg/hppa/Makefile.include
 create mode 100644 tests/tcg/hppa/Makefile.target
 create mode 100644 tests/tcg/i386/Makefile.include
 create mode 100644 tests/tcg/i386/Makefile.target
 create mode 100644 tests/tcg/i386/README
 rename tests/tcg/{ => i386}/hello-i386.c (96%)
 rename tests/tcg/{ => i386}/pi_10.com (100%)
 rename tests/tcg/{ => i386}/runcom.c (100%)
 rename tests/tcg/{ => i386}/test-i386-code16.S (100%)
 rename tests/tcg/{ => i386}/test-i386-fprem.c (97%)
 rename tests/tcg/{ => i386}/test-i386-muldiv.h (100%)
 rename tests/tcg/{ => i386}/test-i386-shift.h (100%)
 rename tests/tcg/{ => i386}/test-i386-ssse3.c (100%)
 rename tests/tcg/{ => i386}/test-i386-vm86.S (100%)
 rename tests/tcg/{ => i386}/test-i386.c (99%)
 rename tests/tcg/{ => i386}/test-i386.h (100%)
 create mode 100644 tests/tcg/m68k/Makefile.include
 create mode 100644 tests/tcg/m68k/Makefile.target
 create mode 100644 tests/tcg/mips/Makefile.include
 create mode 100644 tests/tcg/mips/Makefile.target
 create mode 100644 tests/tcg/mips/README
 rename tests/tcg/{ => mips}/hello-mips.c (100%)
 create mode 100644 tests/tcg/multiarch/Makefile.target
 create mode 100644 tests/tcg/multiarch/README
 rename tests/tcg/{ => multiarch}/linux-test.c (86%)
 rename tests/tcg/{ => multiarch}/sha1.c (100%)
 rename tests/tcg/{ => multiarch}/test-mmap.c (93%)
 rename tests/tcg/{ => multiarch}/testthread.c (100%)
 create mode 100644 tests/tcg/ppc64le/Makefile.include
 create mode 100644 tests/tcg/riscv/Makefile.include
 create mode 100644 tests/tcg/s390x/Makefile.include
 create mode 100644 tests/tcg/sh4/Makefile.include
 create mode 100644 tests/tcg/sparc64/Makefile.include
 create mode 100644 tests/tcg/sparc64/Makefile.target
 delete mode 100644 tests/tcg/test_path.c
 create mode 100644 tests/tcg/x86_64/Makefile.target

-- 
2.17.0

^ permalink raw reply	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 01/49] docker: add "probe" command for configure
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 02/49] configure: add test for docker availability Alex Bennée
                   ` (47 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

This is a helper function for the configure script. It replies yes,
sudo or no to inform the user if non-interactive docker support is
available. We trap the Exception to fail gracefully.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Fam Zheng <famz@redhat.com>
---
 tests/docker/docker.py | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/tests/docker/docker.py b/tests/docker/docker.py
index 1246ba9578..f8267586eb 100755
--- a/tests/docker/docker.py
+++ b/tests/docker/docker.py
@@ -390,6 +390,24 @@ class ImagesCommand(SubCommand):
     def run(self, args, argv):
         return Docker().command("images", argv, args.quiet)
 
+
+class ProbeCommand(SubCommand):
+    """Probe if we can run docker automatically"""
+    name = "probe"
+
+    def run(self, args, argv):
+        try:
+            docker = Docker()
+            if docker._command[0] == "docker":
+                print "yes"
+            elif docker._command[0] == "sudo":
+                print "sudo"
+        except Exception:
+            print "no"
+
+        return
+
+
 def main():
     parser = argparse.ArgumentParser(description="A Docker helper",
             usage="%s <subcommand> ..." % os.path.basename(sys.argv[0]))
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 02/49] configure: add test for docker availability
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 01/49] docker: add "probe" command for configure Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 03/49] configure: add support for --cross-cc-FOO Alex Bennée
                   ` (46 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

This tests for a working docker installation without sudo and sets up
config-host.mak accordingly. This will be useful from cross compiling
things in the future.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 configure | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/configure b/configure
index 59f91ab3f9..33681f16dd 100755
--- a/configure
+++ b/configure
@@ -456,6 +456,7 @@ jemalloc="no"
 replication="yes"
 vxhs=""
 libxml2=""
+docker="no"
 
 supported_cpu="no"
 supported_os="no"
@@ -5444,6 +5445,17 @@ EOF
   fi
 fi
 
+##########################################
+# Docker and cross-compiler support
+#
+# This is specifically for building test
+# cases for foreign architectures, not
+# cross-compiling QEMU itself.
+
+if has "docker"; then
+    docker=$($python $source_path/tests/docker/docker.py probe)
+fi
+
 ##########################################
 # End of CC checks
 # After here, no more $cc or $ld runs
@@ -5907,6 +5919,7 @@ echo "avx2 optimization $avx2_opt"
 echo "replication support $replication"
 echo "VxHS block device $vxhs"
 echo "capstone          $capstone"
+echo "docker            $docker"
 
 if test "$sdl_too_old" = "yes"; then
 echo "-> Your SDL version is too old - please upgrade to have SDL support"
@@ -6731,6 +6744,10 @@ if test "$gcov" = "yes" ; then
   echo "GCOV=$gcov_tool" >> $config_host_mak
 fi
 
+if test "$docker" != "no"; then
+    echo "HAVE_USER_DOCKER=y" >> $config_host_mak
+fi
+
 # use included Linux headers
 if test "$linux" = "yes" ; then
   mkdir -p linux-headers
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 03/49] configure: add support for --cross-cc-FOO
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 01/49] docker: add "probe" command for configure Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 02/49] configure: add test for docker availability Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 18:19   ` Richard Henderson
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 04/49] configure: move i386_cc to cross_cc_i386 Alex Bennée
                   ` (45 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

This allows us to specify cross compilers for our guests. This is
useful for building test images/programs. Currently we re-run the
compile test for each target. I couldn't think of a way to cache the
value for a given arch without getting messier configure code.

The cross compiler for the guest is visible to each target as
CROSS_CC_GUEST in config-target.mak.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v3
  - --cross-cc-*[!a-zA-Z0-9_-]*=*) error_exit...
  - --cross-cc-*) cc_arch=${opt#--cross-cc-}; cc_arch=${cc_arch%%=*}
  - add remaining target_compiler definitions
v4
  - also set cross_cc_$cpu=$host_cc
  - try a non-static build if static fails
  - use write_c_skeleton
  - add doc string in help
---
 configure | 92 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 92 insertions(+)

diff --git a/configure b/configure
index 33681f16dd..b21e6ce6ac 100755
--- a/configure
+++ b/configure
@@ -458,6 +458,13 @@ vxhs=""
 libxml2=""
 docker="no"
 
+# cross compilers defaults, can be overridden with --cross-cc-ARCH
+cross_cc_aarch64="aarch64-linux-gnu-gcc"
+cross_cc_arm="arm-linux-gnueabihf-gcc"
+cross_cc_powerpc="powerpc-linux-gnu-gcc"
+
+enabled_cross_compilers=""
+
 supported_cpu="no"
 supported_os="no"
 bogus_os="no"
@@ -488,6 +495,11 @@ for opt do
   ;;
   --disable-debug-info) debug_info="no"
   ;;
+  --cross-cc-*[!a-zA-Z0-9_-]*=*) error_exit "Passed bad --cross-cc-FOO option"
+  ;;
+  --cross-cc-*) cc_arch=${opt#--cross-cc-}; cc_arch=${cc_arch%%=*}
+                eval "cross_cc_${cc_arch}=\$optarg"
+  ;;
   esac
 done
 # OS specific
@@ -676,30 +688,37 @@ case "$cpu" in
   ppc|ppc64|s390|s390x|sparc64|x32)
     cpu="$cpu"
     supported_cpu="yes"
+    eval "cross_cc_${cpu}=\$host_cc"
   ;;
   i386|i486|i586|i686|i86pc|BePC)
     cpu="i386"
     supported_cpu="yes"
+    cross_cc_i386=$host_cc
   ;;
   x86_64|amd64)
     cpu="x86_64"
     supported_cpu="yes"
+    cross_cc_x86_64=$host_cc
   ;;
   armv*b|armv*l|arm)
     cpu="arm"
     supported_cpu="yes"
+    cross_cc_arm=$host_cc
   ;;
   aarch64)
     cpu="aarch64"
     supported_cpu="yes"
+    cross_cc_aarch64=$host_cc
   ;;
   mips*)
     cpu="mips"
     supported_cpu="yes"
+    cross_cc_mips=$host_cc
   ;;
   sparc|sun4[cdmuv])
     cpu="sparc"
     supported_cpu="yes"
+    cross_cc_sparc=$host_cc
   ;;
   *)
     # This will result in either an error or falling back to TCI later
@@ -917,6 +936,8 @@ for opt do
   ;;
   --disable-debug-info)
   ;;
+  --cross-cc-*)
+  ;;
   --enable-modules)
       modules="yes"
   ;;
@@ -1501,6 +1522,7 @@ Advanced options (experts only):
   --extra-cflags=CFLAGS    append extra C compiler flags QEMU_CFLAGS
   --extra-cxxflags=CXXFLAGS append extra C++ compiler flags QEMU_CXXFLAGS
   --extra-ldflags=LDFLAGS  append extra linker flags LDFLAGS
+  --cross-cc-ARCH=CC       use compiler when building ARCH guest test cases
   --make=MAKE              use specified make [$make]
   --install=INSTALL        use specified install [$install]
   --python=PYTHON          use specified python [$python]
@@ -6811,6 +6833,9 @@ case "$target" in
     ;;
 esac
 
+target_compiler=""
+target_compiler_static=""
+
 mkdir -p $target_dir
 echo "# Automatically generated by configure - do not modify" > $config_target_mak
 
@@ -6826,19 +6851,23 @@ TARGET_ABI_DIR=""
 case "$target_name" in
   i386)
     gdb_xml_files="i386-32bit.xml i386-32bit-core.xml i386-32bit-sse.xml"
+    target_compiler=$cross_cc_i386
   ;;
   x86_64)
     TARGET_BASE_ARCH=i386
     gdb_xml_files="i386-64bit.xml i386-64bit-core.xml i386-64bit-sse.xml"
+    target_compiler=$cross_cc_x86_64
   ;;
   alpha)
     mttcg="yes"
+    target_compiler=$cross_cc_alpha
   ;;
   arm|armeb)
     TARGET_ARCH=arm
     bflt="yes"
     mttcg="yes"
     gdb_xml_files="arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml"
+    target_compiler=$cross_cc_arm
   ;;
   aarch64|aarch64_be)
     TARGET_ARCH=aarch64
@@ -6846,58 +6875,73 @@ case "$target_name" in
     bflt="yes"
     mttcg="yes"
     gdb_xml_files="aarch64-core.xml aarch64-fpu.xml arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml"
+    target_compiler=$cross_cc_aarch64
   ;;
   cris)
+    target_compiler=$cross_cc_cris
   ;;
   hppa)
     mttcg="yes"
+    target_compiler=$cross_cc_hppa
   ;;
   lm32)
+    target_compiler=$cross_cc_lm32
   ;;
   m68k)
     bflt="yes"
     gdb_xml_files="cf-core.xml cf-fp.xml m68k-fp.xml"
+    target_compiler=$cross_cc_m68k
   ;;
   microblaze|microblazeel)
     TARGET_ARCH=microblaze
     bflt="yes"
+    target_compiler=$cross_cc_microblaze
   ;;
   mips|mipsel)
     TARGET_ARCH=mips
+    target_compiler=$cross_cc_mips
     echo "TARGET_ABI_MIPSO32=y" >> $config_target_mak
   ;;
   mipsn32|mipsn32el)
     TARGET_ARCH=mips64
     TARGET_BASE_ARCH=mips
+    target_compiler=$cross_cc_mipsn32
     echo "TARGET_ABI_MIPSN32=y" >> $config_target_mak
     echo "TARGET_ABI32=y" >> $config_target_mak
   ;;
   mips64|mips64el)
     TARGET_ARCH=mips64
     TARGET_BASE_ARCH=mips
+    target_compiler=$cross_cc_mips64
     echo "TARGET_ABI_MIPSN64=y" >> $config_target_mak
   ;;
   moxie)
+    target_compiler=$cross_cc_moxie
   ;;
   nios2)
+    target_compiler=$cross_cc_nios2
   ;;
   or1k)
+    target_compiler=$cross_cc_or1k
     TARGET_ARCH=openrisc
     TARGET_BASE_ARCH=openrisc
   ;;
   ppc)
     gdb_xml_files="power-core.xml power-fpu.xml power-altivec.xml power-spe.xml"
+    target_compiler=$cross_cc_powerpc
   ;;
   ppcemb)
     TARGET_BASE_ARCH=ppc
     TARGET_ABI_DIR=ppc
     gdb_xml_files="power-core.xml power-fpu.xml power-altivec.xml power-spe.xml"
+    target_compiler=$cross_cc_ppcemb
   ;;
   ppc64)
     TARGET_BASE_ARCH=ppc
     TARGET_ABI_DIR=ppc
     mttcg=yes
     gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
+    target_compiler=$cross_cc_ppc64
   ;;
   ppc64le)
     TARGET_ARCH=ppc64
@@ -6905,6 +6949,7 @@ case "$target_name" in
     TARGET_ABI_DIR=ppc
     mttcg=yes
     gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
+    target_compiler=$cross_cc_ppc64le
   ;;
   ppc64abi32)
     TARGET_ARCH=ppc64
@@ -6912,45 +6957,57 @@ case "$target_name" in
     TARGET_ABI_DIR=ppc
     echo "TARGET_ABI32=y" >> $config_target_mak
     gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
+    target_compiler=$cross_cc_ppc64abi32
   ;;
   riscv32)
     TARGET_BASE_ARCH=riscv
     TARGET_ABI_DIR=riscv
     mttcg=yes
+    target_compiler=$cross_cc_riscv32
   ;;
   riscv64)
     TARGET_BASE_ARCH=riscv
     TARGET_ABI_DIR=riscv
     mttcg=yes
+    target_compiler=$cross_cc_riscv64
   ;;
   sh4|sh4eb)
     TARGET_ARCH=sh4
     bflt="yes"
+    target_compiler=$cross_cc_sh4
   ;;
   sparc)
+    target_compiler=$cross_cc_sparc
   ;;
   sparc64)
     TARGET_BASE_ARCH=sparc
+    target_compiler=$cross_cc_sparc64
   ;;
   sparc32plus)
     TARGET_ARCH=sparc64
     TARGET_BASE_ARCH=sparc
     TARGET_ABI_DIR=sparc
+    target_compiler=$cross_cc_sparc32plus
     echo "TARGET_ABI32=y" >> $config_target_mak
   ;;
   s390x)
     mttcg=yes
     gdb_xml_files="s390x-core64.xml s390-acr.xml s390-fpr.xml s390-vx.xml s390-cr.xml s390-virt.xml s390-gs.xml"
+    target_compiler=$cross_cc_s390x
   ;;
   tilegx)
+    target_compiler=$cross_cc_tilegx
   ;;
   tricore)
+    target_compiler=$cross_cc_tricore
   ;;
   unicore32)
+    target_compiler=$cross_cc_unicore32
   ;;
   xtensa|xtensaeb)
     TARGET_ARCH=xtensa
     mttcg="yes"
+    target_compiler=$cross_cc_xtensa
   ;;
   *)
     error_exit "Unsupported target CPU"
@@ -6961,6 +7018,27 @@ if [ "$TARGET_BASE_ARCH" = "" ]; then
   TARGET_BASE_ARCH=$TARGET_ARCH
 fi
 
+# Do we have a cross compiler for this target?
+if has $target_compiler; then
+
+    write_c_skeleton
+
+    if ! do_compiler $target_compiler -o $TMPE $TMPC -static ; then
+        # For host systems we might get away with building without -static
+        if ! do_compiler $target_compiler -o $TMPE $TMPC ; then
+            target_compiler=""
+        else
+            enabled_cross_compilers="${enabled_cross_compilers} ${target_compiler}"
+            target_compiler_static="n"
+        fi
+    else
+        enabled_cross_compilers="${enabled_cross_compilers} ${target_compiler}"
+        target_compiler_static="y"
+    fi
+else
+    target_compiler=""
+fi
+
 symlink "$source_path/Makefile.target" "$target_dir/Makefile"
 
 upper() {
@@ -7034,6 +7112,14 @@ if test "$target_bsd_user" = "yes" ; then
   echo "CONFIG_BSD_USER=y" >> $config_target_mak
 fi
 
+if test -n "$target_compiler"; then
+  echo "CROSS_CC_GUEST=$target_compiler" >> $config_target_mak
+
+  if test -n "$target_compiler_static"; then
+      echo "CROSS_CC_GUEST_STATIC=$target_compiler_static" >> $config_target_mak
+  fi
+fi
+
 # generate QEMU_CFLAGS/LDFLAGS for targets
 
 cflags=""
@@ -7156,6 +7242,12 @@ echo "QEMU_CFLAGS+=$cflags" >> $config_target_mak
 
 done # for target in $targets
 
+if test -n "$enabled_cross_compilers"; then
+    echo
+    echo "NOTE: cross-compilers enabled:"
+    printf '%s\n' $enabled_cross_compilers | sort -u
+fi
+
 if [ "$fdt" = "git" ]; then
   echo "config-host.h: subdir-dtc" >> $config_host_mak
 fi
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 04/49] configure: move i386_cc to cross_cc_i386
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (2 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 03/49] configure: add support for --cross-cc-FOO Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 05/49] configure: allow user to specify --cross-cc-cflags-foo= Alex Bennée
                   ` (44 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

Also dont assume x86_64 compiler can build i386 binaries.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
  - drop using system x86_64 compiler for i386 compiles
v3
  - fix cross_cc_i386 when on i386
v4
  - fix merge conflicts
  - sort cross_cc defines
---
 configure | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/configure b/configure
index b21e6ce6ac..52a5d747e4 100755
--- a/configure
+++ b/configure
@@ -289,7 +289,6 @@ libs_softmmu=""
 libs_tools=""
 audio_pt_int=""
 audio_win_int=""
-cc_i386=i386-pc-linux-gnu-gcc
 libs_qga=""
 debug_info="yes"
 stack_protector=""
@@ -461,6 +460,8 @@ docker="no"
 # cross compilers defaults, can be overridden with --cross-cc-ARCH
 cross_cc_aarch64="aarch64-linux-gnu-gcc"
 cross_cc_arm="arm-linux-gnueabihf-gcc"
+cross_cc_i386="i386-pc-linux-gnu-gcc"
+cross_cc_cflags_i386=""
 cross_cc_powerpc="powerpc-linux-gnu-gcc"
 
 enabled_cross_compilers=""
@@ -1447,7 +1448,8 @@ case "$cpu" in
     i386)
            CPU_CFLAGS="-m32"
            LDFLAGS="-m32 $LDFLAGS"
-           cc_i386='$(CC) -m32'
+           cross_cc_i386=$cc
+           cross_cc_cflags_i386=$CPU_CFLAGS
            ;;
     x86_64)
            # ??? Only extremely old AMD cpus do not have cmpxchg16b.
@@ -1455,12 +1457,14 @@ case "$cpu" in
            # runtime and generate the fallback to serial emulation.
            CPU_CFLAGS="-m64 -mcx16"
            LDFLAGS="-m64 $LDFLAGS"
-           cc_i386='$(CC) -m32'
+           cross_cc_x86_64=$cc
+           cross_cc_cflags_x86_64=$CPU_CFLAGS
            ;;
     x32)
            CPU_CFLAGS="-mx32"
            LDFLAGS="-mx32 $LDFLAGS"
-           cc_i386='$(CC) -m32'
+           cross_cc_i386=$cc
+           cross_cc_cflags_i386="-m32"
            ;;
     # No special flags required for other host CPUs
 esac
@@ -6714,7 +6718,6 @@ echo "CC=$cc" >> $config_host_mak
 if $iasl -h > /dev/null 2>&1; then
   echo "IASL=$iasl" >> $config_host_mak
 fi
-echo "CC_I386=$cc_i386" >> $config_host_mak
 echo "HOST_CC=$host_cc" >> $config_host_mak
 echo "CXX=$cxx" >> $config_host_mak
 echo "OBJCC=$objcc" >> $config_host_mak
@@ -6835,6 +6838,7 @@ esac
 
 target_compiler=""
 target_compiler_static=""
+target_compiler_cflags=""
 
 mkdir -p $target_dir
 echo "# Automatically generated by configure - do not modify" > $config_target_mak
@@ -6852,6 +6856,7 @@ case "$target_name" in
   i386)
     gdb_xml_files="i386-32bit.xml i386-32bit-core.xml i386-32bit-sse.xml"
     target_compiler=$cross_cc_i386
+    target_compiler_cflags=$cross_cc_ccflags_i386
   ;;
   x86_64)
     TARGET_BASE_ARCH=i386
@@ -7023,9 +7028,9 @@ if has $target_compiler; then
 
     write_c_skeleton
 
-    if ! do_compiler $target_compiler -o $TMPE $TMPC -static ; then
+    if ! do_compiler $target_compiler $target_compiler_cflags -o $TMPE $TMPC -static ; then
         # For host systems we might get away with building without -static
-        if ! do_compiler $target_compiler -o $TMPE $TMPC ; then
+        if ! do_compiler $target_compiler $target_compiler_cflags -o $TMPE $TMPC ; then
             target_compiler=""
         else
             enabled_cross_compilers="${enabled_cross_compilers} ${target_compiler}"
@@ -7118,8 +7123,13 @@ if test -n "$target_compiler"; then
   if test -n "$target_compiler_static"; then
       echo "CROSS_CC_GUEST_STATIC=$target_compiler_static" >> $config_target_mak
   fi
+
+  if test -n "$target_compiler_cflags"; then
+      echo "CROSS_CC_GUEST_CFLAGS=$target_compiler_cflags" >> $config_target_mak
+  fi
 fi
 
+
 # generate QEMU_CFLAGS/LDFLAGS for targets
 
 cflags=""
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 05/49] configure: allow user to specify --cross-cc-cflags-foo=
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (3 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 04/49] configure: move i386_cc to cross_cc_i386 Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 06/49] configure: set cross_cc_FOO for host compiler Alex Bennée
                   ` (43 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

As an individual compiler may be able to support several targets with
the appropriate flags we need to expose this to the user as well.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v3
  - fix up the cross-cc
v4
  - add --help text
  - sort cross_cc_foo lines
---
 configure | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/configure b/configure
index 52a5d747e4..2c2f27b755 100755
--- a/configure
+++ b/configure
@@ -459,10 +459,14 @@ docker="no"
 
 # cross compilers defaults, can be overridden with --cross-cc-ARCH
 cross_cc_aarch64="aarch64-linux-gnu-gcc"
+cross_cc_aarch64_be="$cross_cc_aarch64"
+cross_cc_cflags_aarch64_be="-mbig-endian"
 cross_cc_arm="arm-linux-gnueabihf-gcc"
+cross_cc_cflags_armeb="-mbig-endian"
 cross_cc_i386="i386-pc-linux-gnu-gcc"
 cross_cc_cflags_i386=""
 cross_cc_powerpc="powerpc-linux-gnu-gcc"
+cross_cc_powerpc="powerpc-linux-gnu-gcc"
 
 enabled_cross_compilers=""
 
@@ -498,6 +502,9 @@ for opt do
   ;;
   --cross-cc-*[!a-zA-Z0-9_-]*=*) error_exit "Passed bad --cross-cc-FOO option"
   ;;
+  --cross-cc-cflags-*) cc_arch=${opt#--cross-cc-flags-}; cc_arch=${cc_arch%%=*}
+                      eval "cross_cc_cflags_${cc_arch}=\$optarg"
+  ;;
   --cross-cc-*) cc_arch=${opt#--cross-cc-}; cc_arch=${cc_arch%%=*}
                 eval "cross_cc_${cc_arch}=\$optarg"
   ;;
@@ -1527,6 +1534,7 @@ Advanced options (experts only):
   --extra-cxxflags=CXXFLAGS append extra C++ compiler flags QEMU_CXXFLAGS
   --extra-ldflags=LDFLAGS  append extra linker flags LDFLAGS
   --cross-cc-ARCH=CC       use compiler when building ARCH guest test cases
+  --cross-cc-flags-ARCH=   use compiler flags when building ARCH guest tests
   --make=MAKE              use specified make [$make]
   --install=INSTALL        use specified install [$install]
   --python=PYTHON          use specified python [$python]
@@ -6873,6 +6881,7 @@ case "$target_name" in
     mttcg="yes"
     gdb_xml_files="arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml"
     target_compiler=$cross_cc_arm
+    eval "target_compiler_cflags=\$cross_cc_cflags_${target_name}"
   ;;
   aarch64|aarch64_be)
     TARGET_ARCH=aarch64
@@ -6881,6 +6890,7 @@ case "$target_name" in
     mttcg="yes"
     gdb_xml_files="aarch64-core.xml aarch64-fpu.xml arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml"
     target_compiler=$cross_cc_aarch64
+    eval "target_compiler_cflags=\$cross_cc_cflags_${target_name}"
   ;;
   cris)
     target_compiler=$cross_cc_cris
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 06/49] configure: set cross_cc_FOO for host compiler
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (4 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 05/49] configure: allow user to specify --cross-cc-cflags-foo= Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 07/49] Makefile: Rename TARGET_DIRS to TARGET_LIST Alex Bennée
                   ` (42 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

We can build tests for the host system with the compiler that we have
selected.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 configure | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/configure b/configure
index 2c2f27b755..01b20355ca 100755
--- a/configure
+++ b/configure
@@ -1431,26 +1431,38 @@ case "$cpu" in
     ppc)
            CPU_CFLAGS="-m32"
            LDFLAGS="-m32 $LDFLAGS"
+           cross_cc_powerpc=$cc
+           cross_cc_cflags_powerpc=$CPU_CFLAGS
            ;;
     ppc64)
            CPU_CFLAGS="-m64"
            LDFLAGS="-m64 $LDFLAGS"
+           cross_cc_ppc64=$cc
+           cross_cc_cflags_ppc64=$CPU_CFLAGS
            ;;
     sparc)
            CPU_CFLAGS="-m32 -mv8plus -mcpu=ultrasparc"
            LDFLAGS="-m32 -mv8plus $LDFLAGS"
+           cross_cc_sparc=$cc
+           cross_cc_cflags_sparc=$CPU_CFLAGS
            ;;
     sparc64)
            CPU_CFLAGS="-m64 -mcpu=ultrasparc"
            LDFLAGS="-m64 $LDFLAGS"
+           cross_cc_sparc64=$cc
+           cross_cc_cflags_sparc64=$CPU_CFLAGS
            ;;
     s390)
            CPU_CFLAGS="-m31"
            LDFLAGS="-m31 $LDFLAGS"
+           cross_cc_s390=$cc
+           cross_cc_cflags_s390=$CPU_CFLAGS
            ;;
     s390x)
            CPU_CFLAGS="-m64"
            LDFLAGS="-m64 $LDFLAGS"
+           cross_cc_s390x=$cc
+           cross_cc_cflags_s390x=$CPU_CFLAGS
            ;;
     i386)
            CPU_CFLAGS="-m32"
@@ -1471,7 +1483,7 @@ case "$cpu" in
            CPU_CFLAGS="-mx32"
            LDFLAGS="-mx32 $LDFLAGS"
            cross_cc_i386=$cc
-           cross_cc_cflags_i386="-m32"
+           cross_cc_cflags_i386=$CPU_CFLAGS
            ;;
     # No special flags required for other host CPUs
 esac
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 07/49] Makefile: Rename TARGET_DIRS to TARGET_LIST
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (5 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 06/49] configure: set cross_cc_FOO for host compiler Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 08/49] docker: Add "cc" subcommand Alex Bennée
                   ` (41 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel

From: Fam Zheng <famz@redhat.com>

To be more accurate on its purpose and make code that looks for a certain
target out of this variable more readable.

Signed-off-by: Fam Zheng <famz@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 Makefile               | 20 ++++++++++----------
 configure              |  2 +-
 scripts/create_config  |  2 +-
 tests/Makefile.include |  2 +-
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/Makefile b/Makefile
index 35554b5bef..52cd83f7fd 100644
--- a/Makefile
+++ b/Makefile
@@ -62,8 +62,8 @@ seems to have been used for an in-tree build. You can fix this by running \
 endif
 endif
 
-CONFIG_SOFTMMU := $(if $(filter %-softmmu,$(TARGET_DIRS)),y)
-CONFIG_USER_ONLY := $(if $(filter %-user,$(TARGET_DIRS)),y)
+CONFIG_SOFTMMU := $(if $(filter %-softmmu,$(TARGET_LIST)),y)
+CONFIG_USER_ONLY := $(if $(filter %-user,$(TARGET_LIST)),y)
 CONFIG_XEN := $(CONFIG_XEN_BACKEND)
 CONFIG_ALL=y
 -include config-all-devices.mak
@@ -362,8 +362,8 @@ DOCS=
 endif
 
 SUBDIR_MAKEFLAGS=$(if $(V),,--no-print-directory --quiet) BUILD_DIR=$(BUILD_DIR)
-SUBDIR_DEVICES_MAK=$(patsubst %, %/config-devices.mak, $(TARGET_DIRS))
-SUBDIR_DEVICES_MAK_DEP=$(patsubst %, %-config-devices.mak.d, $(TARGET_DIRS))
+SUBDIR_DEVICES_MAK=$(patsubst %, %/config-devices.mak, $(TARGET_LIST))
+SUBDIR_DEVICES_MAK_DEP=$(patsubst %, %-config-devices.mak.d, $(TARGET_LIST))
 
 ifeq ($(SUBDIR_DEVICES_MAK),)
 config-all-devices.mak:
@@ -466,7 +466,7 @@ config-host.h-timestamp: config-host.mak
 qemu-options.def: $(SRC_PATH)/qemu-options.hx $(SRC_PATH)/scripts/hxtool
 	$(call quiet-command,sh $(SRC_PATH)/scripts/hxtool -h < $< > $@,"GEN","$@")
 
-SUBDIR_RULES=$(patsubst %,subdir-%, $(TARGET_DIRS))
+SUBDIR_RULES=$(patsubst %,subdir-%, $(TARGET_LIST))
 SOFTMMU_SUBDIR_RULES=$(filter %-softmmu,$(SUBDIR_RULES))
 
 $(SOFTMMU_SUBDIR_RULES): $(block-obj-y)
@@ -510,7 +510,7 @@ ROMSUBDIR_RULES=$(patsubst %,romsubdir-%, $(ROMS))
 romsubdir-%:
 	$(call quiet-command,$(MAKE) $(SUBDIR_MAKEFLAGS) -C pc-bios/$* V="$(V)" TARGET_DIR="$*/" CFLAGS="$(filter -O% -g%,$(CFLAGS))",)
 
-ALL_SUBDIRS=$(TARGET_DIRS) $(patsubst %,pc-bios/%, $(ROMS))
+ALL_SUBDIRS=$(TARGET_LIST) $(patsubst %,pc-bios/%, $(ROMS))
 
 recurse-all: $(SUBDIR_RULES) $(ROMSUBDIR_RULES)
 
@@ -763,7 +763,7 @@ distclean: clean
 	rm -f docs/interop/qemu-qmp-ref.pdf docs/interop/qemu-ga-ref.pdf
 	rm -f docs/interop/qemu-qmp-ref.html docs/interop/qemu-ga-ref.html
 	rm -f docs/qemu-block-drivers.7
-	for d in $(TARGET_DIRS); do \
+	for d in $(TARGET_LIST); do \
 	rm -rf $$d || exit 1 ; \
         done
 	rm -Rf .sdk
@@ -864,7 +864,7 @@ endif
 		$(INSTALL_DATA) $(SRC_PATH)/pc-bios/keymaps/$$x "$(DESTDIR)$(qemu_datadir)/keymaps"; \
 	done
 	$(INSTALL_DATA) $(BUILD_DIR)/trace-events-all "$(DESTDIR)$(qemu_datadir)/trace-events-all"
-	for d in $(TARGET_DIRS); do \
+	for d in $(TARGET_LIST); do \
 	$(MAKE) $(SUBDIR_MAKEFLAGS) TARGET_DIR=$$d/ -C $$d $@ || exit 1 ; \
         done
 
@@ -1062,9 +1062,9 @@ endif
 	@echo  '  ctags/TAGS      - Generate tags file for editors'
 	@echo  '  cscope          - Generate cscope index'
 	@echo  ''
-	@$(if $(TARGET_DIRS), \
+	@$(if $(TARGET_LIST), \
 		echo 'Architecture specific targets:'; \
-		$(foreach t, $(TARGET_DIRS), \
+		$(foreach t, $(TARGET_LIST), \
 		printf "  %-30s - Build for %s\\n" $(patsubst %,subdir-%,$(t)) $(t);) \
 		echo '')
 	@echo  'Cleaning targets:'
diff --git a/configure b/configure
index 01b20355ca..8a73dbab1d 100755
--- a/configure
+++ b/configure
@@ -6168,7 +6168,7 @@ qemu_version=$(head $source_path/VERSION)
 echo "VERSION=$qemu_version" >>$config_host_mak
 echo "PKGVERSION=$pkgversion" >>$config_host_mak
 echo "SRC_PATH=$source_path" >> $config_host_mak
-echo "TARGET_DIRS=$target_list" >> $config_host_mak
+echo "TARGET_LIST=$target_list" >> $config_host_mak
 if [ "$docs" = "yes" ] ; then
   echo "BUILD_DOCS=yes" >> $config_host_mak
 fi
diff --git a/scripts/create_config b/scripts/create_config
index d727e5e36e..58948a67a4 100755
--- a/scripts/create_config
+++ b/scripts/create_config
@@ -107,7 +107,7 @@ case $line in
     target_name=${line#*=}
     echo "#define TARGET_NAME \"$target_name\""
     ;;
- TARGET_DIRS=*)
+ TARGET_LIST=*)
     # do nothing
     ;;
  TARGET_*=y) # configuration
diff --git a/tests/Makefile.include b/tests/Makefile.include
index 3b9a5e31a2..3d2f0458ab 100644
--- a/tests/Makefile.include
+++ b/tests/Makefile.include
@@ -854,7 +854,7 @@ endif
 
 # QTest rules
 
-TARGETS=$(patsubst %-softmmu,%, $(filter %-softmmu,$(TARGET_DIRS)))
+TARGETS=$(patsubst %-softmmu,%, $(filter %-softmmu,$(TARGET_LIST)))
 ifeq ($(CONFIG_POSIX),y)
 QTEST_TARGETS = $(TARGETS)
 check-qtest-y=$(foreach TARGET,$(TARGETS), $(check-qtest-$(TARGET)-y))
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 08/49] docker: Add "cc" subcommand
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (6 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 07/49] Makefile: Rename TARGET_DIRS to TARGET_LIST Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 09/49] docker: extend "cc" command to accept compiler Alex Bennée
                   ` (40 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

Signed-off-by: Fam Zheng <famz@redhat.com>
[AJB: add if args.paths check]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2
  - add if args.paths check to avoid iterating null argument
---
 tests/docker/docker.py | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/tests/docker/docker.py b/tests/docker/docker.py
index f8267586eb..bcc3ee2dee 100755
--- a/tests/docker/docker.py
+++ b/tests/docker/docker.py
@@ -408,6 +408,31 @@ class ProbeCommand(SubCommand):
         return
 
 
+class CcCommand(SubCommand):
+    """Compile sources with cc in images"""
+    name = "cc"
+
+    def args(self, parser):
+        parser.add_argument("--image", "-i", required=True,
+                            help="The docker image in which to run cc")
+        parser.add_argument("--source-path", "-s", nargs="*", dest="paths",
+                            help="""Extra paths to (ro) mount into container for
+                            reading sources""")
+
+    def run(self, args, argv):
+        if argv and argv[0] == "--":
+            argv = argv[1:]
+        cwd = os.getcwd()
+        cmd = ["--rm", "-w", cwd,
+               "-v", "%s:%s:rw" % (cwd, cwd)]
+        if args.paths:
+            for p in args.paths:
+                cmd += ["-v", "%s:%s:ro,z" % (p, p)]
+        cmd += [args.image, "cc"]
+        cmd += argv
+        return Docker().command("run", cmd, args.quiet)
+
+
 def main():
     parser = argparse.ArgumentParser(description="A Docker helper",
             usage="%s <subcommand> ..." % os.path.basename(sys.argv[0]))
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 09/49] docker: extend "cc" command to accept compiler
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (7 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 08/49] docker: Add "cc" subcommand Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 10/49] docker: allow "cc" command to run in user context Alex Bennée
                   ` (39 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

When calling our cross-compilation images we want to call something
other than the default cc.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Fam Zheng <famz@redhat.com>
---
v2
  - use arg.cc default to simplify logic
---
 tests/docker/docker.py | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tests/docker/docker.py b/tests/docker/docker.py
index bcc3ee2dee..59bce9f19a 100755
--- a/tests/docker/docker.py
+++ b/tests/docker/docker.py
@@ -415,6 +415,8 @@ class CcCommand(SubCommand):
     def args(self, parser):
         parser.add_argument("--image", "-i", required=True,
                             help="The docker image in which to run cc")
+        parser.add_argument("--cc", default="cc",
+                            help="The compiler executable to call")
         parser.add_argument("--source-path", "-s", nargs="*", dest="paths",
                             help="""Extra paths to (ro) mount into container for
                             reading sources""")
@@ -428,7 +430,7 @@ class CcCommand(SubCommand):
         if args.paths:
             for p in args.paths:
                 cmd += ["-v", "%s:%s:ro,z" % (p, p)]
-        cmd += [args.image, "cc"]
+        cmd += [args.image, args.cc]
         cmd += argv
         return Docker().command("run", cmd, args.quiet)
 
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 10/49] docker: allow "cc" command to run in user context
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (8 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 09/49] docker: extend "cc" command to accept compiler Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 11/49] docker: Makefile.include introduce DOCKER_SCRIPT Alex Bennée
                   ` (38 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Fam Zheng <famz@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 tests/docker/docker.py | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/tests/docker/docker.py b/tests/docker/docker.py
index 59bce9f19a..37bfa98005 100755
--- a/tests/docker/docker.py
+++ b/tests/docker/docker.py
@@ -417,6 +417,8 @@ class CcCommand(SubCommand):
                             help="The docker image in which to run cc")
         parser.add_argument("--cc", default="cc",
                             help="The compiler executable to call")
+        parser.add_argument("--user",
+                            help="The user-id to run under")
         parser.add_argument("--source-path", "-s", nargs="*", dest="paths",
                             help="""Extra paths to (ro) mount into container for
                             reading sources""")
@@ -430,6 +432,8 @@ class CcCommand(SubCommand):
         if args.paths:
             for p in args.paths:
                 cmd += ["-v", "%s:%s:ro,z" % (p, p)]
+        if args.user:
+            cmd += ["-u", args.user]
         cmd += [args.image, args.cc]
         cmd += argv
         return Docker().command("run", cmd, args.quiet)
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 11/49] docker: Makefile.include introduce DOCKER_SCRIPT
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (9 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 10/49] docker: allow "cc" command to run in user context Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 12/49] tests/tcg: move architecture independent tests into subdir Alex Bennée
                   ` (37 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

Define this in one place to make it easy to re-use.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 tests/docker/Makefile.include | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
index de87341528..6a5aa9ec71 100644
--- a/tests/docker/Makefile.include
+++ b/tests/docker/Makefile.include
@@ -14,6 +14,8 @@ DOCKER_TESTS := $(notdir $(shell \
 
 DOCKER_TOOLS := travis
 
+DOCKER_SCRIPT=$(SRC_PATH)/tests/docker/docker.py
+
 TESTS ?= %
 IMAGES ?= %
 
@@ -37,7 +39,7 @@ docker-image-%: $(DOCKER_FILES_DIR)/%.docker
 		echo WARNING: EXECUTABLE is not set, debootstrap may fail. 2>&1 ; \
 	fi
 	$(call quiet-command,\
-		$(SRC_PATH)/tests/docker/docker.py build qemu:$* $< \
+		$(DOCKER_SCRIPT) build qemu:$* $< \
 		$(if $V,,--quiet) $(if $(NOCACHE),--no-cache) \
 		$(if $(NOUSER),,--add-current-user) \
 		$(if $(EXTRA_FILES),--extra-files $(EXTRA_FILES))\
@@ -129,11 +131,11 @@ docker-run: docker-qemu-src
 	fi
 	$(if $(EXECUTABLE),						\
 		$(call quiet-command,					\
-			$(SRC_PATH)/tests/docker/docker.py update 	\
+			$(DOCKER_SCRIPT) update 			\
 			$(IMAGE) $(EXECUTABLE),				\
 			"  COPYING $(EXECUTABLE) to $(IMAGE)"))
 	$(call quiet-command,						\
-		$(SRC_PATH)/tests/docker/docker.py run 			\
+		$(DOCKER_SCRIPT) run 					\
 			$(if $(NOUSER),,-u $(shell id -u)) 		\
 			--security-opt seccomp=unconfined		\
 			$(if $V,,--rm) 					\
@@ -163,4 +165,4 @@ docker-run-%:
 	@$(MAKE) docker-run TEST=$(CMD) IMAGE=qemu:$(IMAGE)
 
 docker-clean:
-	$(call quiet-command, $(SRC_PATH)/tests/docker/docker.py clean)
+	$(call quiet-command, $(DOCKER_SCRIPT) clean)
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 12/49] tests/tcg: move architecture independent tests into subdir
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (10 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 11/49] docker: Makefile.include introduce DOCKER_SCRIPT Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 13/49] tests/tcg/multiarch: Build fix for linux-test Alex Bennée
                   ` (36 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

We will want to build these for all supported guest architectures so
lets move them all into one place. We also drop test_path at this
point because it needs qemu utils and glib bits which is hard to
support for cross compiling.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
  - move VPATH and TESTs setup into multiarch/Makefile.target
  - remove moved bits from tests/tcg/Makefile
v3
  - use LDFLAGS+= for testthread linking
v4
  - make myself MAINTAINER for tests/tcg/multiarch
---
 MAINTAINERS                            |   4 +
 tests/tcg/Makefile                     |  31 -----
 tests/tcg/README                       |  10 +-
 tests/tcg/multiarch/Makefile.target    |  29 +++++
 tests/tcg/multiarch/README             |   1 +
 tests/tcg/{ => multiarch}/linux-test.c |   0
 tests/tcg/{ => multiarch}/sha1.c       |   0
 tests/tcg/{ => multiarch}/test-mmap.c  |   0
 tests/tcg/{ => multiarch}/testthread.c |   0
 tests/tcg/test_path.c                  | 157 -------------------------
 10 files changed, 38 insertions(+), 194 deletions(-)
 create mode 100644 tests/tcg/multiarch/Makefile.target
 create mode 100644 tests/tcg/multiarch/README
 rename tests/tcg/{ => multiarch}/linux-test.c (100%)
 rename tests/tcg/{ => multiarch}/sha1.c (100%)
 rename tests/tcg/{ => multiarch}/test-mmap.c (100%)
 rename tests/tcg/{ => multiarch}/testthread.c (100%)
 delete mode 100644 tests/tcg/test_path.c

diff --git a/MAINTAINERS b/MAINTAINERS
index e187b1f18f..ebc7117993 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -303,6 +303,10 @@ F: target/tricore/
 F: hw/tricore/
 F: include/hw/tricore/
 
+Multiarch Linux User Tests
+M: Alex Bennée <alex.bennee@linaro.org>
+F: tests/tcg/multiarch/
+
 Guest CPU Cores (KVM):
 ----------------------
 
diff --git a/tests/tcg/Makefile b/tests/tcg/Makefile
index 89e3342f3d..e12395117a 100644
--- a/tests/tcg/Makefile
+++ b/tests/tcg/Makefile
@@ -18,12 +18,9 @@ LDFLAGS=
 # also, pi_10.com runs indefinitely
 
 I386_TESTS=hello-i386 \
-	   linux-test \
-	   testthread \
 	   sha1-i386 \
 	   test-i386 \
 	   test-i386-fprem \
-	   test-mmap \
 	   # runcom
 
 # native i386 compilers sometimes are not biarch.  assume cross-compilers are
@@ -47,8 +44,6 @@ run-%: %
 	-$(QEMU) ./$*
 
 run-hello-i386: hello-i386
-run-linux-test: linux-test
-run-testthread: testthread
 run-sha1-i386: sha1-i386
 
 run-test-i386: test-i386
@@ -66,11 +61,6 @@ run-test-x86_64: test-x86_64
 	-$(QEMU_X86_64) test-x86_64 > test-x86_64.out
 	@if diff -u test-x86_64.ref test-x86_64.out ; then echo "Auto Test OK"; fi
 
-run-test-mmap: test-mmap
-	-$(QEMU) ./test-mmap
-	-$(QEMU) -p 8192 ./test-mmap 8192
-	-$(QEMU) -p 16384 ./test-mmap 16384
-	-$(QEMU) -p 32768 ./test-mmap 32768
 
 run-runcom: runcom
 	-$(QEMU) ./runcom $(SRC_PATH)/tests/pi_10.com
@@ -80,17 +70,10 @@ run-test_path: test_path
 
 # rules to compile tests
 
-test_path: test_path.o
-
-test_path.o: test_path.c
-
 hello-i386: hello-i386.c
 	$(CC_I386) -nostdlib $(CFLAGS) -static $(LDFLAGS) -o $@ $<
 	strip $@
 
-testthread: testthread.c
-	$(CC_I386) $(CFLAGS) $(LDFLAGS) -o $@ $< -lpthread
-
 # i386/x86_64 emulation test (test various opcodes) */
 test-i386: test-i386.c test-i386-code16.S test-i386-vm86.S \
            test-i386.h test-i386-shift.h test-i386-muldiv.h
@@ -104,28 +87,14 @@ test-x86_64: test-i386.c \
            test-i386.h test-i386-shift.h test-i386-muldiv.h
 	$(CC_X86_64) $(QEMU_INCLUDES) $(CFLAGS) $(LDFLAGS) -o $@ $(<D)/test-i386.c -lm
 
-# generic Linux and CPU test
-linux-test: linux-test.c
-	$(CC_I386) $(CFLAGS) $(LDFLAGS) -o $@ $< -lm
-
 # vm86 test
 runcom: runcom.c
 	$(CC_I386) $(CFLAGS) $(LDFLAGS) -o $@ $<
 
-test-mmap: test-mmap.c
-	$(CC_I386) -m32 $(CFLAGS) -Wall -O2 $(LDFLAGS) -o $@ $<
-
 # speed test
 sha1-i386: sha1.c
 	$(CC_I386) $(CFLAGS) $(LDFLAGS) -o $@ $<
 
-sha1: sha1.c
-	$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $<
-
-speed: sha1 sha1-i386
-	time ./sha1
-	time $(QEMU) ./sha1-i386
-
 # arm test
 hello-arm: hello-arm.o
 	arm-linux-ld -o $@ $<
diff --git a/tests/tcg/README b/tests/tcg/README
index 5dcfb4852b..0890044cf0 100644
--- a/tests/tcg/README
+++ b/tests/tcg/README
@@ -1,9 +1,7 @@
-This directory contains various interesting programs for
-regression testing.
-
-The target "make test" runs the programs and, if applicable,
-runs "diff" to detect mismatches between output on the host and
-output on QEMU.
+This directory contains various interesting guest programs for
+regression testing. Tests are either multi-arch, meaning they can be
+built for all guest architectures that support linux-user executable,
+or they are architecture specific.
 
 i386
 ====
diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Makefile.target
new file mode 100644
index 0000000000..0a6307b8a3
--- /dev/null
+++ b/tests/tcg/multiarch/Makefile.target
@@ -0,0 +1,29 @@
+# -*- Mode: makefile -*-
+#
+# Multiarch Tests - included from tests/tcg/Makefile.target
+#
+# These tests are plain C and built without any architecture specific code.
+#
+
+MULTIARCH_SRC=$(SRC_PATH)/tests/tcg/multiarch
+
+# Set search path for all sources
+VPATH 		+= $(MULTIARCH_SRC)
+MULTIARCH_SRCS   =$(notdir $(wildcard $(MULTIARCH_SRC)/*.c))
+MULTIARCH_TESTS  =$(MULTIARCH_SRCS:.c=)
+
+# Update TESTS
+TESTS		+=$(MULTIARCH_TESTS)
+
+#
+# The following are any additional rules needed to build things
+#
+
+testthread: LDFLAGS+=-lpthread
+
+# Specialist Runners
+run-test-mmap: test-mmap
+	$(call quiet-command, $(QEMU) $< > test-mmap.out, "TEST", "$< (default) on $(TARGET_NAME)")
+	$(call quiet-command, $(QEMU) -p 8192 $< 8192 > test-mmap-8192.out, "TEST", "$< (8k pages) on $(TARGET_NAME)")
+	$(call quiet-command, $(QEMU) -p 16384 $< 16384 > test-mmap-16384.out, "TEST", "$< (16k pages) on $(TARGET_NAME)")
+	$(call quiet-command, $(QEMU) -p 32768 $< 32768 > test-mmap-32768.out, "TEST", "$< (32k pages) on $(TARGET_NAME)")
diff --git a/tests/tcg/multiarch/README b/tests/tcg/multiarch/README
new file mode 100644
index 0000000000..522c9d2ea3
--- /dev/null
+++ b/tests/tcg/multiarch/README
@@ -0,0 +1 @@
+Multi-architecture linux-user tests
diff --git a/tests/tcg/linux-test.c b/tests/tcg/multiarch/linux-test.c
similarity index 100%
rename from tests/tcg/linux-test.c
rename to tests/tcg/multiarch/linux-test.c
diff --git a/tests/tcg/sha1.c b/tests/tcg/multiarch/sha1.c
similarity index 100%
rename from tests/tcg/sha1.c
rename to tests/tcg/multiarch/sha1.c
diff --git a/tests/tcg/test-mmap.c b/tests/tcg/multiarch/test-mmap.c
similarity index 100%
rename from tests/tcg/test-mmap.c
rename to tests/tcg/multiarch/test-mmap.c
diff --git a/tests/tcg/testthread.c b/tests/tcg/multiarch/testthread.c
similarity index 100%
rename from tests/tcg/testthread.c
rename to tests/tcg/multiarch/testthread.c
diff --git a/tests/tcg/test_path.c b/tests/tcg/test_path.c
deleted file mode 100644
index 1c29bce263..0000000000
--- a/tests/tcg/test_path.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/* Test path override code */
-#include "config-host.h"
-#include "util/cutils.c"
-#include "util/hexdump.c"
-#include "util/iov.c"
-#include "util/path.c"
-#include "util/qemu-timer-common.c"
-#include <stdarg.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-
-void qemu_log(const char *fmt, ...);
-
-/* Any log message kills the test. */
-void qemu_log(const char *fmt, ...)
-{
-    va_list ap;
-
-    fprintf(stderr, "FATAL: ");
-    va_start(ap, fmt);
-    vfprintf(stderr, fmt, ap);
-    va_end(ap);
-    exit(1);
-}
-
-#define NO_CHANGE(_path)						\
-	do {								\
-	    if (strcmp(path(_path), _path) != 0) return __LINE__;	\
-	} while(0)
-
-#define CHANGE_TO(_path, _newpath)					\
-	do {								\
-	    if (strcmp(path(_path), _newpath) != 0) return __LINE__;	\
-	} while(0)
-
-static void cleanup(void)
-{
-    unlink("/tmp/qemu-test_path/DIR1/DIR2/FILE");
-    unlink("/tmp/qemu-test_path/DIR1/DIR2/FILE2");
-    unlink("/tmp/qemu-test_path/DIR1/DIR2/FILE3");
-    unlink("/tmp/qemu-test_path/DIR1/DIR2/FILE4");
-    unlink("/tmp/qemu-test_path/DIR1/DIR2/FILE5");
-    rmdir("/tmp/qemu-test_path/DIR1/DIR2");
-    rmdir("/tmp/qemu-test_path/DIR1/DIR3");
-    rmdir("/tmp/qemu-test_path/DIR1");
-    rmdir("/tmp/qemu-test_path");
-}
-
-static unsigned int do_test(void)
-{
-    if (mkdir("/tmp/qemu-test_path", 0700) != 0)
-	return __LINE__;
-
-    if (mkdir("/tmp/qemu-test_path/DIR1", 0700) != 0)
-	return __LINE__;
-
-    if (mkdir("/tmp/qemu-test_path/DIR1/DIR2", 0700) != 0)
-	return __LINE__;
-
-    if (mkdir("/tmp/qemu-test_path/DIR1/DIR3", 0700) != 0)
-	return __LINE__;
-
-    if (close(creat("/tmp/qemu-test_path/DIR1/DIR2/FILE", 0600)) != 0)
-	return __LINE__;
-
-    if (close(creat("/tmp/qemu-test_path/DIR1/DIR2/FILE2", 0600)) != 0)
-	return __LINE__;
-
-    if (close(creat("/tmp/qemu-test_path/DIR1/DIR2/FILE3", 0600)) != 0)
-	return __LINE__;
-
-    if (close(creat("/tmp/qemu-test_path/DIR1/DIR2/FILE4", 0600)) != 0)
-	return __LINE__;
-
-    if (close(creat("/tmp/qemu-test_path/DIR1/DIR2/FILE5", 0600)) != 0)
-	return __LINE__;
-
-    init_paths("/tmp/qemu-test_path");
-
-    NO_CHANGE("/tmp");
-    NO_CHANGE("/tmp/");
-    NO_CHANGE("/tmp/qemu-test_path");
-    NO_CHANGE("/tmp/qemu-test_path/");
-    NO_CHANGE("/tmp/qemu-test_path/D");
-    NO_CHANGE("/tmp/qemu-test_path/DI");
-    NO_CHANGE("/tmp/qemu-test_path/DIR");
-    NO_CHANGE("/tmp/qemu-test_path/DIR1");
-    NO_CHANGE("/tmp/qemu-test_path/DIR1/");
-
-    NO_CHANGE("/D");
-    NO_CHANGE("/DI");
-    NO_CHANGE("/DIR");
-    NO_CHANGE("/DIR2");
-    NO_CHANGE("/DIR1.");
-
-    CHANGE_TO("/DIR1", "/tmp/qemu-test_path/DIR1");
-    CHANGE_TO("/DIR1/", "/tmp/qemu-test_path/DIR1");
-
-    NO_CHANGE("/DIR1/D");
-    NO_CHANGE("/DIR1/DI");
-    NO_CHANGE("/DIR1/DIR");
-    NO_CHANGE("/DIR1/DIR1");
-
-    CHANGE_TO("/DIR1/DIR2", "/tmp/qemu-test_path/DIR1/DIR2");
-    CHANGE_TO("/DIR1/DIR2/", "/tmp/qemu-test_path/DIR1/DIR2");
-
-    CHANGE_TO("/DIR1/DIR3", "/tmp/qemu-test_path/DIR1/DIR3");
-    CHANGE_TO("/DIR1/DIR3/", "/tmp/qemu-test_path/DIR1/DIR3");
-
-    NO_CHANGE("/DIR1/DIR2/F");
-    NO_CHANGE("/DIR1/DIR2/FI");
-    NO_CHANGE("/DIR1/DIR2/FIL");
-    NO_CHANGE("/DIR1/DIR2/FIL.");
-
-    CHANGE_TO("/DIR1/DIR2/FILE", "/tmp/qemu-test_path/DIR1/DIR2/FILE");
-    CHANGE_TO("/DIR1/DIR2/FILE2", "/tmp/qemu-test_path/DIR1/DIR2/FILE2");
-    CHANGE_TO("/DIR1/DIR2/FILE3", "/tmp/qemu-test_path/DIR1/DIR2/FILE3");
-    CHANGE_TO("/DIR1/DIR2/FILE4", "/tmp/qemu-test_path/DIR1/DIR2/FILE4");
-    CHANGE_TO("/DIR1/DIR2/FILE5", "/tmp/qemu-test_path/DIR1/DIR2/FILE5");
-
-    NO_CHANGE("/DIR1/DIR2/FILE6");
-    NO_CHANGE("/DIR1/DIR2/FILE/X");
-
-    CHANGE_TO("/DIR1/../DIR1", "/tmp/qemu-test_path/DIR1");
-    CHANGE_TO("/DIR1/../DIR1/", "/tmp/qemu-test_path/DIR1");
-    CHANGE_TO("/../DIR1", "/tmp/qemu-test_path/DIR1");
-    CHANGE_TO("/../DIR1/", "/tmp/qemu-test_path/DIR1");
-    CHANGE_TO("/DIR1/DIR2/../DIR2", "/tmp/qemu-test_path/DIR1/DIR2");
-    CHANGE_TO("/DIR1/DIR2/../DIR2/../../DIR1/DIR2/FILE", "/tmp/qemu-test_path/DIR1/DIR2/FILE");
-    CHANGE_TO("/DIR1/DIR2/../DIR2/FILE", "/tmp/qemu-test_path/DIR1/DIR2/FILE");
-
-    NO_CHANGE("/DIR1/DIR2/../DIR1");
-    NO_CHANGE("/DIR1/DIR2/../FILE");
-
-    CHANGE_TO("/./DIR1/DIR2/FILE", "/tmp/qemu-test_path/DIR1/DIR2/FILE");
-    CHANGE_TO("/././DIR1/DIR2/FILE", "/tmp/qemu-test_path/DIR1/DIR2/FILE");
-    CHANGE_TO("/DIR1/./DIR2/FILE", "/tmp/qemu-test_path/DIR1/DIR2/FILE");
-    CHANGE_TO("/DIR1/././DIR2/FILE", "/tmp/qemu-test_path/DIR1/DIR2/FILE");
-    CHANGE_TO("/DIR1/DIR2/./FILE", "/tmp/qemu-test_path/DIR1/DIR2/FILE");
-    CHANGE_TO("/DIR1/DIR2/././FILE", "/tmp/qemu-test_path/DIR1/DIR2/FILE");
-    CHANGE_TO("/./DIR1/./DIR2/./FILE", "/tmp/qemu-test_path/DIR1/DIR2/FILE");
-
-    return 0;
-}
-
-int main(int argc, char *argv[])
-{
-    int ret;
-
-    ret = do_test();
-    cleanup();
-    if (ret) {
-	fprintf(stderr, "test_path: failed on line %i\n", ret);
-	return 1;
-    }
-    return 0;
-}
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 13/49] tests/tcg/multiarch: Build fix for linux-test
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (11 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 12/49] tests/tcg: move architecture independent tests into subdir Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 14/49] tests/tcg/multiarch: enable additional linux-test tests Alex Bennée
                   ` (35 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

From: Fam Zheng <famz@redhat.com>

To keep the compiler happy, and to fit in our buildsys flags:

- Make local functions "static"
- #ifdef out unused functions
- drop cutils/osdep dependencies

Signed-off-by: Fam Zheng <famz@redhat.com>
[AJB: drop cutils/osdep dependencies]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 tests/tcg/multiarch/linux-test.c | 68 ++++++++++----------------------
 1 file changed, 21 insertions(+), 47 deletions(-)

diff --git a/tests/tcg/multiarch/linux-test.c b/tests/tcg/multiarch/linux-test.c
index 5070d31446..4457bd04ba 100644
--- a/tests/tcg/multiarch/linux-test.c
+++ b/tests/tcg/multiarch/linux-test.c
@@ -16,7 +16,6 @@
  *  You should have received a copy of the GNU General Public License
  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  */
-#define _GNU_SOURCE
 #include <stdarg.h>
 #include <stdlib.h>
 #include <stdio.h>
@@ -31,6 +30,7 @@
 #include <utime.h>
 #include <time.h>
 #include <sys/time.h>
+#include <sys/resource.h>
 #include <sys/uio.h>
 #include <sys/socket.h>
 #include <netinet/in.h>
@@ -39,13 +39,12 @@
 #include <dirent.h>
 #include <setjmp.h>
 #include <sys/shm.h>
-#include "qemu/cutils.h"
 
 #define TESTPATH "/tmp/linux-test.tmp"
 #define TESTPORT 7654
 #define STACK_SIZE 16384
 
-void error1(const char *filename, int line, const char *fmt, ...)
+static void error1(const char *filename, int line, const char *fmt, ...)
 {
     va_list ap;
     va_start(ap, fmt);
@@ -56,7 +55,7 @@ void error1(const char *filename, int line, const char *fmt, ...)
     exit(1);
 }
 
-int __chk_error(const char *filename, int line, int ret)
+static int __chk_error(const char *filename, int line, int ret)
 {
     if (ret < 0) {
         error1(filename, line, "%m (ret=%d, errno=%d)",
@@ -73,7 +72,7 @@ int __chk_error(const char *filename, int line, int ret)
 
 #define FILE_BUF_SIZE 300
 
-void test_file(void)
+static void test_file(void)
 {
     int fd, i, len, ret;
     uint8_t buf[FILE_BUF_SIZE];
@@ -210,7 +209,7 @@ void test_file(void)
     chk_error(rmdir(TESTPATH));
 }
 
-void test_fork(void)
+static void test_fork(void)
 {
     int pid, status;
 
@@ -224,7 +223,7 @@ void test_fork(void)
         error("waitpid status=0x%x", status);
 }
 
-void test_time(void)
+static void test_time(void)
 {
     struct timeval tv, tv2;
     struct timespec ts, rem;
@@ -251,34 +250,7 @@ void test_time(void)
         error("getrusage");
 }
 
-void pstrcpy(char *buf, int buf_size, const char *str)
-{
-    int c;
-    char *q = buf;
-
-    if (buf_size <= 0)
-        return;
-
-    for(;;) {
-        c = *str++;
-        if (c == 0 || q >= buf + buf_size - 1)
-            break;
-        *q++ = c;
-    }
-    *q = '\0';
-}
-
-/* strcat and truncate. */
-char *pstrcat(char *buf, int buf_size, const char *s)
-{
-    int len;
-    len = strlen(buf);
-    if (len < buf_size)
-        pstrcpy(buf + len, buf_size - len, s);
-    return buf;
-}
-
-int server_socket(void)
+static int server_socket(void)
 {
     int val, fd;
     struct sockaddr_in sockaddr;
@@ -298,7 +270,7 @@ int server_socket(void)
 
 }
 
-int client_socket(void)
+static int client_socket(void)
 {
     int fd;
     struct sockaddr_in sockaddr;
@@ -312,9 +284,9 @@ int client_socket(void)
     return fd;
 }
 
-const char socket_msg[] = "hello socket\n";
+static const char socket_msg[] = "hello socket\n";
 
-void test_socket(void)
+static void test_socket(void)
 {
     int server_fd, client_fd, fd, pid, ret, val;
     struct sockaddr_in sockaddr;
@@ -348,9 +320,10 @@ void test_socket(void)
     chk_error(close(server_fd));
 }
 
+#if 0
 #define WCOUNT_MAX 512
 
-void test_pipe(void)
+static void test_pipe(void)
 {
     fd_set rfds, wfds;
     int fds[2], fd_max, ret;
@@ -391,10 +364,10 @@ void test_pipe(void)
     chk_error(close(fds[1]));
 }
 
-int thread1_res;
-int thread2_res;
+static int thread1_res;
+static int thread2_res;
 
-int thread1_func(void *arg)
+static int thread1_func(void *arg)
 {
     int i;
     for(i=0;i<5;i++) {
@@ -404,7 +377,7 @@ int thread1_func(void *arg)
     return 0;
 }
 
-int thread2_func(void *arg)
+static int thread2_func(void *arg)
 {
     int i;
     for(i=0;i<6;i++) {
@@ -435,27 +408,28 @@ void test_clone(void)
         thread2_res != 6)
         error("clone");
 }
+#endif
 
 /***********************************/
 
 volatile int alarm_count;
 jmp_buf jmp_env;
 
-void sig_alarm(int sig)
+static void sig_alarm(int sig)
 {
     if (sig != SIGALRM)
         error("signal");
     alarm_count++;
 }
 
-void sig_segv(int sig, siginfo_t *info, void *puc)
+static void sig_segv(int sig, siginfo_t *info, void *puc)
 {
     if (sig != SIGSEGV)
         error("signal");
     longjmp(jmp_env, 1);
 }
 
-void test_signal(void)
+static void test_signal(void)
 {
     struct sigaction act;
     struct itimerval it, oit;
@@ -510,7 +484,7 @@ void test_signal(void)
 
 #define SHM_SIZE 32768
 
-void test_shm(void)
+static void test_shm(void)
 {
     void *ptr;
     int shmid;
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 14/49] tests/tcg/multiarch: enable additional linux-test tests
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (12 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 13/49] tests/tcg/multiarch: Build fix for linux-test Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 15/49] tests/tcg/multiarch: move most output to stdout Alex Bennée
                   ` (34 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

Un-comment the remaining tests.

I removed the itimer value tests because I'm fairly sure a re-arming
timer will always have a different value in it when you grab it.

I've also fixed up the clone thread flags as QEMU will only allow a
clone to use flags which match glibc. However the test is still racey
so it remains disabled by default - it can be run by passing any
additional parameters on the command line.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v3
  - make clone flags match CLONE_THREAD_FLAGS
v4
  - disable test_clone for default case
---
 tests/tcg/multiarch/linux-test.c | 51 +++++++++++++++++++++-----------
 1 file changed, 33 insertions(+), 18 deletions(-)

diff --git a/tests/tcg/multiarch/linux-test.c b/tests/tcg/multiarch/linux-test.c
index 4457bd04ba..6f2c531474 100644
--- a/tests/tcg/multiarch/linux-test.c
+++ b/tests/tcg/multiarch/linux-test.c
@@ -16,6 +16,7 @@
  *  You should have received a copy of the GNU General Public License
  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  */
+#define _GNU_SOURCE
 #include <stdarg.h>
 #include <stdlib.h>
 #include <stdio.h>
@@ -58,8 +59,8 @@ static void error1(const char *filename, int line, const char *fmt, ...)
 static int __chk_error(const char *filename, int line, int ret)
 {
     if (ret < 0) {
-        error1(filename, line, "%m (ret=%d, errno=%d)",
-               ret, errno);
+        error1(filename, line, "%m (ret=%d, errno=%d/%s)",
+               ret, errno, strerror(errno));
     }
     return ret;
 }
@@ -216,6 +217,7 @@ static void test_fork(void)
     pid = chk_error(fork());
     if (pid == 0) {
         /* child */
+        sleep(2);
         exit(2);
     }
     chk_error(waitpid(pid, &status, 0));
@@ -320,7 +322,6 @@ static void test_socket(void)
     chk_error(close(server_fd));
 }
 
-#if 0
 #define WCOUNT_MAX 512
 
 static void test_pipe(void)
@@ -355,7 +356,7 @@ static void test_pipe(void)
             }
             if (FD_ISSET(fds[1], &wfds)) {
                 ch = 'a';
-                chk_error(write(fds[0], &ch, 1));
+                chk_error(write(fds[1], &ch, 1));
                 wcount++;
             }
         }
@@ -387,28 +388,41 @@ static int thread2_func(void *arg)
     return 0;
 }
 
-void test_clone(void)
+static void wait_for_child(pid_t pid)
+{
+    int status;
+    chk_error(waitpid(pid, &status, 0));
+}
+
+/* For test_clone we must match the clone flags used by glibc, see
+ * CLONE_THREAD_FLAGS in the QEMU source code.
+ */
+static void test_clone(void)
 {
     uint8_t *stack1, *stack2;
-    int pid1, pid2, status1, status2;
+    pid_t pid1, pid2;
 
     stack1 = malloc(STACK_SIZE);
     pid1 = chk_error(clone(thread1_func, stack1 + STACK_SIZE,
-                           CLONE_VM | CLONE_FS | CLONE_FILES | SIGCHLD, "hello1"));
+                           CLONE_VM | CLONE_FS | CLONE_FILES |
+                           CLONE_SIGHAND | CLONE_THREAD | CLONE_SYSVSEM,
+                            "hello1"));
 
     stack2 = malloc(STACK_SIZE);
     pid2 = chk_error(clone(thread2_func, stack2 + STACK_SIZE,
-                           CLONE_VM | CLONE_FS | CLONE_FILES | SIGCHLD, "hello2"));
+                           CLONE_VM | CLONE_FS | CLONE_FILES |
+                           CLONE_SIGHAND | CLONE_THREAD | CLONE_SYSVSEM,
+                           "hello2"));
 
-    while (waitpid(pid1, &status1, 0) != pid1);
+    wait_for_child(pid1);
     free(stack1);
-    while (waitpid(pid2, &status2, 0) != pid2);
+    wait_for_child(pid2);
     free(stack2);
+
     if (thread1_res != 5 ||
         thread2_res != 6)
         error("clone");
 }
-#endif
 
 /***********************************/
 
@@ -449,12 +463,10 @@ static void test_signal(void)
     it.it_value.tv_usec = 10 * 1000;
     chk_error(setitimer(ITIMER_REAL, &it, NULL));
     chk_error(getitimer(ITIMER_REAL, &oit));
-    if (oit.it_value.tv_sec != it.it_value.tv_sec ||
-        oit.it_value.tv_usec != it.it_value.tv_usec)
-        error("itimer");
 
     while (alarm_count < 5) {
         usleep(10 * 1000);
+        getitimer(ITIMER_REAL, &oit);
     }
 
     it.it_interval.tv_sec = 0;
@@ -463,9 +475,6 @@ static void test_signal(void)
     it.it_value.tv_usec = 0;
     memset(&oit, 0xff, sizeof(oit));
     chk_error(setitimer(ITIMER_REAL, &it, &oit));
-    if (oit.it_value.tv_sec != 0 ||
-        oit.it_value.tv_usec != 10 * 1000)
-        error("setitimer");
 
     /* SIGSEGV test */
     act.sa_sigaction = sig_segv;
@@ -503,10 +512,16 @@ static void test_shm(void)
 int main(int argc, char **argv)
 {
     test_file();
+    test_pipe();
     test_fork();
     test_time();
     test_socket();
-    //    test_clone();
+
+    if (argc > 1) {
+        printf("test_clone still considered buggy\n");
+        test_clone();
+    }
+
     test_signal();
     test_shm();
     return 0;
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 15/49] tests/tcg/multiarch: move most output to stdout
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (13 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 14/49] tests/tcg/multiarch: enable additional linux-test tests Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 16/49] tests/tcg: move i386 specific tests into subdir Alex Bennée
                   ` (33 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

The default test run outputs to stdout so it can be re-directed.
Errors are still reported to stderr.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

---
v4
  - remove space in fprintf () to keep checkpatch happy
---
 tests/tcg/multiarch/test-mmap.c | 40 ++++++++++++++++-----------------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/tests/tcg/multiarch/test-mmap.c b/tests/tcg/multiarch/test-mmap.c
index cdefadfa4c..5c0afe6e49 100644
--- a/tests/tcg/multiarch/test-mmap.c
+++ b/tests/tcg/multiarch/test-mmap.c
@@ -36,7 +36,7 @@
 do                                                             \
 {                                                              \
   if (!(x)) {                                                  \
-    fprintf (stderr, "FAILED at %s:%d\n", __FILE__, __LINE__); \
+    fprintf(stderr, "FAILED at %s:%d\n", __FILE__, __LINE__); \
     exit (EXIT_FAILURE);                                       \
   }                                                            \
 } while (0)
@@ -57,7 +57,7 @@ void check_aligned_anonymous_unfixed_mmaps(void)
 	uintptr_t p;
 	int i;
 
-	fprintf (stderr, "%s", __func__);
+	fprintf(stdout, "%s", __func__);
 	for (i = 0; i < 0x1fff; i++)
 	{
 		size_t len;
@@ -106,7 +106,7 @@ void check_aligned_anonymous_unfixed_mmaps(void)
 		munmap (p4, len);
 		munmap (p5, len);
 	}
-	fprintf (stderr, " passed\n");
+	fprintf(stdout, " passed\n");
 }
 
 void check_large_anonymous_unfixed_mmap(void)
@@ -115,7 +115,7 @@ void check_large_anonymous_unfixed_mmap(void)
 	uintptr_t p;
 	size_t len;
 
-	fprintf (stderr, "%s", __func__);
+	fprintf(stdout, "%s", __func__);
 
 	len = 0x02000000;
 	p1 = mmap(NULL, len, PROT_READ, 
@@ -130,7 +130,7 @@ void check_large_anonymous_unfixed_mmap(void)
 	/* Make sure we can read from the entire area.  */
 	memcpy (dummybuf, p1, pagesize);
 	munmap (p1, len);
-	fprintf (stderr, " passed\n");
+	fprintf(stdout, " passed\n");
 }
 
 void check_aligned_anonymous_unfixed_colliding_mmaps(void)
@@ -141,7 +141,7 @@ void check_aligned_anonymous_unfixed_colliding_mmaps(void)
 	uintptr_t p;
 	int i;
 
-	fprintf (stderr, "%s", __func__);
+	fprintf(stdout, "%s", __func__);
 	for (i = 0; i < 0x2fff; i++)
 	{
 		int nlen;
@@ -180,7 +180,7 @@ void check_aligned_anonymous_unfixed_colliding_mmaps(void)
 		munmap (p2, pagesize);
 		munmap (p3, nlen);
 	}
-	fprintf (stderr, " passed\n");
+	fprintf(stdout, " passed\n");
 }
 
 void check_aligned_anonymous_fixed_mmaps(void)
@@ -194,7 +194,7 @@ void check_aligned_anonymous_fixed_mmaps(void)
 	addr = mmap(NULL, pagesize * 40, PROT_READ | PROT_WRITE, 
 		    MAP_PRIVATE | MAP_ANONYMOUS,
 		    -1, 0);
-	fprintf (stderr, "%s addr=%p", __func__, addr);
+	fprintf(stdout, "%s addr=%p", __func__, addr);
 	fail_unless (addr != MAP_FAILED);
 
 	for (i = 0; i < 40; i++)
@@ -212,7 +212,7 @@ void check_aligned_anonymous_fixed_mmaps(void)
 		munmap (p1, pagesize);
 		addr += pagesize;
 	}
-	fprintf (stderr, " passed\n");
+	fprintf(stdout, " passed\n");
 }
 
 void check_aligned_anonymous_fixed_mmaps_collide_with_host(void)
@@ -225,8 +225,8 @@ void check_aligned_anonymous_fixed_mmaps_collide_with_host(void)
 	/* Find a suitable address to start with.  Right were the x86 hosts
 	 stack is.  */
 	addr = ((void *)0x80000000);
-	fprintf (stderr, "%s addr=%p", __func__, addr);
-	fprintf (stderr, "FIXME: QEMU fails to track pages used by the host.");
+	fprintf(stdout, "%s addr=%p", __func__, addr);
+	fprintf(stdout, "FIXME: QEMU fails to track pages used by the host.");
 
 	for (i = 0; i < 20; i++)
 	{
@@ -243,7 +243,7 @@ void check_aligned_anonymous_fixed_mmaps_collide_with_host(void)
 		munmap (p1, pagesize);
 		addr += pagesize;
 	}
-	fprintf (stderr, " passed\n");
+	fprintf(stdout, " passed\n");
 }
 
 void check_file_unfixed_mmaps(void)
@@ -252,7 +252,7 @@ void check_file_unfixed_mmaps(void)
 	uintptr_t p;
 	int i;
 
-	fprintf (stderr, "%s", __func__);
+	fprintf(stdout, "%s", __func__);
 	for (i = 0; i < 0x10; i++)
 	{
 		size_t len;
@@ -294,7 +294,7 @@ void check_file_unfixed_mmaps(void)
 		munmap (p2, len);
 		munmap (p3, len);
 	}
-	fprintf (stderr, " passed\n");
+	fprintf(stdout, " passed\n");
 }
 
 void check_file_unfixed_eof_mmaps(void)
@@ -304,7 +304,7 @@ void check_file_unfixed_eof_mmaps(void)
 	uintptr_t p;
 	int i;
 
-	fprintf (stderr, "%s", __func__);
+	fprintf(stdout, "%s", __func__);
 	for (i = 0; i < 0x10; i++)
 	{
 		p1 = mmap(NULL, pagesize, PROT_READ, 
@@ -327,7 +327,7 @@ void check_file_unfixed_eof_mmaps(void)
 		fail_unless (cp[pagesize - 4] == 0);
 		munmap (p1, pagesize);
 	}
-	fprintf (stderr, " passed\n");
+	fprintf(stdout, " passed\n");
 }
 
 void check_file_fixed_eof_mmaps(void)
@@ -343,7 +343,7 @@ void check_file_fixed_eof_mmaps(void)
 		    MAP_PRIVATE | MAP_ANONYMOUS,
 		    -1, 0);
 
-	fprintf (stderr, "%s addr=%p", __func__, (void *)addr);
+	fprintf(stdout, "%s addr=%p", __func__, (void *)addr);
 	fail_unless (addr != MAP_FAILED);
 
 	for (i = 0; i < 0x10; i++)
@@ -371,7 +371,7 @@ void check_file_fixed_eof_mmaps(void)
 		munmap (p1, pagesize);
 		addr += pagesize;
 	}
-	fprintf (stderr, " passed\n");
+	fprintf(stdout, " passed\n");
 }
 
 void check_file_fixed_mmaps(void)
@@ -384,7 +384,7 @@ void check_file_fixed_mmaps(void)
 	addr = mmap(NULL, pagesize * 40 * 4, PROT_READ, 
 		    MAP_PRIVATE | MAP_ANONYMOUS,
 		    -1, 0);
-	fprintf (stderr, "%s addr=%p", __func__, (void *)addr);
+	fprintf(stdout, "%s addr=%p", __func__, (void *)addr);
 	fail_unless (addr != MAP_FAILED);
 
 	for (i = 0; i < 40; i++)
@@ -426,7 +426,7 @@ void check_file_fixed_mmaps(void)
 		munmap (p4, pagesize);
 		addr += pagesize * 4;
 	}
-	fprintf (stderr, " passed\n");
+	fprintf(stdout, " passed\n");
 }
 
 void checked_write(int fd, const void *buf, size_t count)
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 16/49] tests/tcg: move i386 specific tests into subdir
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (14 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 15/49] tests/tcg/multiarch: move most output to stdout Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 17/49] docker: Add fedora-i386-cross image Alex Bennée
                   ` (32 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Paolo Bonzini, Richard Henderson,
	Eduardo Habkost

These only need to be built for i386 guests. This includes a stub
tests/tcg/i386/Makfile.target which absorbs some of what was in
tests/tcg/Makefile.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

---
v2
  - move VPATH and TESTs setup into i386/Makefile.target
  - set CFLAGS+=-m32 for cross building
v4
  - update MAINATINERS
---
 MAINTAINERS                             |   1 +
 tests/tcg/README                        |  39 ------------------------
 tests/tcg/i386/Makefile.target          |  30 ++++++++++++++++++
 tests/tcg/i386/README                   |  38 +++++++++++++++++++++++
 tests/tcg/{ => i386}/hello-i386.c       |   0
 tests/tcg/{ => i386}/pi_10.com          | Bin
 tests/tcg/{ => i386}/runcom.c           |   0
 tests/tcg/{ => i386}/test-i386-code16.S |   0
 tests/tcg/{ => i386}/test-i386-fprem.c  |   0
 tests/tcg/{ => i386}/test-i386-muldiv.h |   0
 tests/tcg/{ => i386}/test-i386-shift.h  |   0
 tests/tcg/{ => i386}/test-i386-ssse3.c  |   0
 tests/tcg/{ => i386}/test-i386-vm86.S   |   0
 tests/tcg/{ => i386}/test-i386.c        |   0
 tests/tcg/{ => i386}/test-i386.h        |   0
 15 files changed, 69 insertions(+), 39 deletions(-)
 create mode 100644 tests/tcg/i386/Makefile.target
 create mode 100644 tests/tcg/i386/README
 rename tests/tcg/{ => i386}/hello-i386.c (100%)
 rename tests/tcg/{ => i386}/pi_10.com (100%)
 rename tests/tcg/{ => i386}/runcom.c (100%)
 rename tests/tcg/{ => i386}/test-i386-code16.S (100%)
 rename tests/tcg/{ => i386}/test-i386-fprem.c (100%)
 rename tests/tcg/{ => i386}/test-i386-muldiv.h (100%)
 rename tests/tcg/{ => i386}/test-i386-shift.h (100%)
 rename tests/tcg/{ => i386}/test-i386-ssse3.c (100%)
 rename tests/tcg/{ => i386}/test-i386-vm86.S (100%)
 rename tests/tcg/{ => i386}/test-i386.c (100%)
 rename tests/tcg/{ => i386}/test-i386.h (100%)

diff --git a/MAINTAINERS b/MAINTAINERS
index ebc7117993..688f166d39 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -283,6 +283,7 @@ M: Richard Henderson <rth@twiddle.net>
 M: Eduardo Habkost <ehabkost@redhat.com>
 S: Maintained
 F: target/i386/
+F: tests/tcg/i386/
 F: hw/i386/
 F: disas/i386.c
 T: git git://github.com/ehabkost/qemu.git x86-next
diff --git a/tests/tcg/README b/tests/tcg/README
index 0890044cf0..469504c4cb 100644
--- a/tests/tcg/README
+++ b/tests/tcg/README
@@ -3,45 +3,6 @@ regression testing. Tests are either multi-arch, meaning they can be
 built for all guest architectures that support linux-user executable,
 or they are architecture specific.
 
-i386
-====
-
-test-i386
----------
-
-This program executes most of the 16 bit and 32 bit x86 instructions and
-generates a text output, for comparison with the output obtained with
-a real CPU or another emulator.
-
-The Linux system call modify_ldt() is used to create x86 selectors
-to test some 16 bit addressing and 32 bit with segmentation cases.
-
-The Linux system call vm86() is used to test vm86 emulation.
-
-Various exceptions are raised to test most of the x86 user space
-exception reporting.
-
-linux-test
-----------
-
-This program tests various Linux system calls. It is used to verify
-that the system call parameters are correctly converted between target
-and host CPUs.
-
-test-i386-fprem
----------------
-
-runcom
-------
-
-test-mmap
----------
-
-sha1
-----
-
-hello-i386
-----------
 
 
 ARM
diff --git a/tests/tcg/i386/Makefile.target b/tests/tcg/i386/Makefile.target
new file mode 100644
index 0000000000..2f27b65e2d
--- /dev/null
+++ b/tests/tcg/i386/Makefile.target
@@ -0,0 +1,30 @@
+# i386 cross compile notes
+
+I386_SRC=$(SRC_PATH)/tests/tcg/i386
+
+# Set search path for all sources
+VPATH 		+= $(I386_SRC)
+
+I386_SRCS=$(notdir $(wildcard $(I386_SRC)/*.c))
+I386_TESTS=$(I386_SRCS:.c=)
+
+# Update TESTS
+TESTS+=$(I386_TESTS)
+
+ifneq ($(TARGET_NAME),x86_64)
+CFLAGS+=-m32
+endif
+
+#
+# hello-i386 is a barebones app
+#
+hello-i386: CFLAGS+=-ffreestanding
+hello-i386: LDFLAGS+=-nostdlib
+
+#
+# test-386 includes a couple of additional objects that need to be linked together
+#
+
+test-i386: test-i386.c test-i386-code16.S test-i386-vm86.S test-i386.h test-i386-shift.h test-i386-muldiv.h
+	$(CC) $(CFLAGS) $(LDFLAGS) -o $@ \
+	   $(<D)/test-i386.c $(<D)/test-i386-code16.S $(<D)/test-i386-vm86.S -lm
diff --git a/tests/tcg/i386/README b/tests/tcg/i386/README
new file mode 100644
index 0000000000..7a0a47bf27
--- /dev/null
+++ b/tests/tcg/i386/README
@@ -0,0 +1,38 @@
+These are i386 specific guest programs
+
+test-i386
+---------
+
+This program executes most of the 16 bit and 32 bit x86 instructions and
+generates a text output, for comparison with the output obtained with
+a real CPU or another emulator.
+
+The Linux system call modify_ldt() is used to create x86 selectors
+to test some 16 bit addressing and 32 bit with segmentation cases.
+
+The Linux system call vm86() is used to test vm86 emulation.
+
+Various exceptions are raised to test most of the x86 user space
+exception reporting.
+
+linux-test
+----------
+
+This program tests various Linux system calls. It is used to verify
+that the system call parameters are correctly converted between target
+and host CPUs.
+
+test-i386-fprem
+---------------
+
+runcom
+------
+
+test-mmap
+---------
+
+sha1
+----
+
+hello-i386
+----------
diff --git a/tests/tcg/hello-i386.c b/tests/tcg/i386/hello-i386.c
similarity index 100%
rename from tests/tcg/hello-i386.c
rename to tests/tcg/i386/hello-i386.c
diff --git a/tests/tcg/pi_10.com b/tests/tcg/i386/pi_10.com
similarity index 100%
rename from tests/tcg/pi_10.com
rename to tests/tcg/i386/pi_10.com
diff --git a/tests/tcg/runcom.c b/tests/tcg/i386/runcom.c
similarity index 100%
rename from tests/tcg/runcom.c
rename to tests/tcg/i386/runcom.c
diff --git a/tests/tcg/test-i386-code16.S b/tests/tcg/i386/test-i386-code16.S
similarity index 100%
rename from tests/tcg/test-i386-code16.S
rename to tests/tcg/i386/test-i386-code16.S
diff --git a/tests/tcg/test-i386-fprem.c b/tests/tcg/i386/test-i386-fprem.c
similarity index 100%
rename from tests/tcg/test-i386-fprem.c
rename to tests/tcg/i386/test-i386-fprem.c
diff --git a/tests/tcg/test-i386-muldiv.h b/tests/tcg/i386/test-i386-muldiv.h
similarity index 100%
rename from tests/tcg/test-i386-muldiv.h
rename to tests/tcg/i386/test-i386-muldiv.h
diff --git a/tests/tcg/test-i386-shift.h b/tests/tcg/i386/test-i386-shift.h
similarity index 100%
rename from tests/tcg/test-i386-shift.h
rename to tests/tcg/i386/test-i386-shift.h
diff --git a/tests/tcg/test-i386-ssse3.c b/tests/tcg/i386/test-i386-ssse3.c
similarity index 100%
rename from tests/tcg/test-i386-ssse3.c
rename to tests/tcg/i386/test-i386-ssse3.c
diff --git a/tests/tcg/test-i386-vm86.S b/tests/tcg/i386/test-i386-vm86.S
similarity index 100%
rename from tests/tcg/test-i386-vm86.S
rename to tests/tcg/i386/test-i386-vm86.S
diff --git a/tests/tcg/test-i386.c b/tests/tcg/i386/test-i386.c
similarity index 100%
rename from tests/tcg/test-i386.c
rename to tests/tcg/i386/test-i386.c
diff --git a/tests/tcg/test-i386.h b/tests/tcg/i386/test-i386.h
similarity index 100%
rename from tests/tcg/test-i386.h
rename to tests/tcg/i386/test-i386.h
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 17/49] docker: Add fedora-i386-cross image
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (15 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 16/49] tests/tcg: move i386 specific tests into subdir Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 18/49] tests/tcg: enable building for i386 Alex Bennée
                   ` (31 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

From: Fam Zheng <famz@redhat.com>

It has some basic *-devel.i686 packages to be used with "gcc -m32" as a
32 bit cross build environment.

Signed-off-by: Fam Zheng <famz@redhat.com>
[AJB: add glibc-static]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2
  - include static glibc package as well
---
 tests/docker/dockerfiles/fedora-i386-cross.docker | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
 create mode 100644 tests/docker/dockerfiles/fedora-i386-cross.docker

diff --git a/tests/docker/dockerfiles/fedora-i386-cross.docker b/tests/docker/dockerfiles/fedora-i386-cross.docker
new file mode 100644
index 0000000000..8fbef2fa53
--- /dev/null
+++ b/tests/docker/dockerfiles/fedora-i386-cross.docker
@@ -0,0 +1,14 @@
+FROM fedora:latest
+ENV PACKAGES \
+    gcc \
+    glibc-static.i686 \
+    glibc-devel.i686 \
+    glib2-devel.i686 \
+    zlib-devel.i686 \
+    glib2-devel.i686 \
+    nettle-devel.i686 \
+    pixman-devel.i686 \
+    gnutls-devel.i686
+
+RUN dnf install -y $PACKAGES
+RUN rpm -q $PACKAGES | sort > /packages.txt
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 18/49] tests/tcg: enable building for i386
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (16 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 17/49] docker: Add fedora-i386-cross image Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-18 11:28   ` Paolo Bonzini
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 19/49] tests/tcg/i386: Build fix for hello-i386 Alex Bennée
                   ` (30 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Paolo Bonzini, Richard Henderson,
	Eduardo Habkost

While you can construct a compile command that does work using the
x86_64 host compiler that most people use this is flakey. Different
distros handle this is different ways so we default to using a known
good i386 compiler via docker.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

---
v3
  - add runner for runcom
---
 tests/tcg/i386/Makefile.include | 9 +++++++++
 tests/tcg/i386/Makefile.target  | 9 +++++++++
 2 files changed, 18 insertions(+)
 create mode 100644 tests/tcg/i386/Makefile.include

diff --git a/tests/tcg/i386/Makefile.include b/tests/tcg/i386/Makefile.include
new file mode 100644
index 0000000000..be1c3008dd
--- /dev/null
+++ b/tests/tcg/i386/Makefile.include
@@ -0,0 +1,9 @@
+#
+# Makefile.include for all i386
+#
+# There is enough brokeness in x86_64 compilers that we don't default
+# to using the x86_64 system compiler for i386 binaries.
+#
+
+DOCKER_IMAGE=fedora-i386-cross
+DOCKER_CROSS_COMPILER=gcc
diff --git a/tests/tcg/i386/Makefile.target b/tests/tcg/i386/Makefile.target
index 2f27b65e2d..39a1627650 100644
--- a/tests/tcg/i386/Makefile.target
+++ b/tests/tcg/i386/Makefile.target
@@ -28,3 +28,12 @@ hello-i386: LDFLAGS+=-nostdlib
 test-i386: test-i386.c test-i386-code16.S test-i386-vm86.S test-i386.h test-i386-shift.h test-i386-muldiv.h
 	$(CC) $(CFLAGS) $(LDFLAGS) -o $@ \
 	   $(<D)/test-i386.c $(<D)/test-i386-code16.S $(<D)/test-i386-vm86.S -lm
+
+# Specialist test runners
+.PHONY: pi_10.com
+pi_10.com:
+	cp $(I386_SRC)/pi_10.com .
+
+run-runcom: runcom pi_10.com
+	$(call quiet-command, $(QEMU) ./runcom ./pi_10.com > runcom.out, "TEST", "$< on $(TARGET_NAME)")
+
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 19/49] tests/tcg/i386: Build fix for hello-i386
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (17 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 18/49] tests/tcg: enable building for i386 Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 20/49] tests/tcg/i386: fix test-i386 Alex Bennée
                   ` (29 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Paolo Bonzini, Richard Henderson, Eduardo Habkost

From: Fam Zheng <famz@redhat.com>

We have -Werror=missing-prototype, add a dummy prototype to avoid that
warning.

Signed-off-by: Fam Zheng <famz@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 tests/tcg/i386/hello-i386.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/tcg/i386/hello-i386.c b/tests/tcg/i386/hello-i386.c
index fa00380de2..cfeb24b2f5 100644
--- a/tests/tcg/i386/hello-i386.c
+++ b/tests/tcg/i386/hello-i386.c
@@ -20,6 +20,7 @@ static inline int write(int fd, const char * buf, int len)
   return status;
 }
 
+void _start(void);
 void _start(void)
 {
     write(1, "Hello World\n", 12);
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 20/49] tests/tcg/i386: fix test-i386
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (18 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 19/49] tests/tcg/i386: Build fix for hello-i386 Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 19:04   ` Eric Blake
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 21/49] tests/tcg/i386: add runner for test-i386-fprem Alex Bennée
                   ` (28 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Paolo Bonzini, Richard Henderson,
	Eduardo Habkost

The test-i386 test case is a little special as it includes assembler
files. Add the additional compile magic to assemble these bits and
link them to the final binary.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 tests/tcg/i386/test-i386.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/tcg/i386/test-i386.c b/tests/tcg/i386/test-i386.c
index 9599204895..cae6a7773a 100644
--- a/tests/tcg/i386/test-i386.c
+++ b/tests/tcg/i386/test-i386.c
@@ -17,7 +17,6 @@
  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  */
 #define _GNU_SOURCE
-#include "qemu/compiler.h"
 #include <stdlib.h>
 #include <stdio.h>
 #include <string.h>
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 21/49] tests/tcg/i386: add runner for test-i386-fprem
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (19 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 20/49] tests/tcg/i386: fix test-i386 Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-18 11:30   ` Paolo Bonzini
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 22/49] tests/tcg/i386: disable i386 version of test-i386-ssse Alex Bennée
                   ` (27 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Paolo Bonzini, Richard Henderson,
	Eduardo Habkost

The runner needs to compare against a reference run. We also only run
this test when SPEED=slow as it takes a while.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/i386/Makefile.target   | 11 +++++++++++
 tests/tcg/i386/test-i386-fprem.c | 12 +++++++++---
 2 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/tests/tcg/i386/Makefile.target b/tests/tcg/i386/Makefile.target
index 39a1627650..94fa50abbc 100644
--- a/tests/tcg/i386/Makefile.target
+++ b/tests/tcg/i386/Makefile.target
@@ -37,3 +37,14 @@ pi_10.com:
 run-runcom: runcom pi_10.com
 	$(call quiet-command, $(QEMU) ./runcom ./pi_10.com > runcom.out, "TEST", "$< on $(TARGET_NAME)")
 
+ifeq ($(SPEED), slow)
+run-test-i386-fprem: test-i386-fprem
+	$(call quiet-command, \
+		$(QEMU) $< > $<.out && \
+		diff -u $(I386_SRC)/$<.ref $<.out, \
+		"TEST", "$< (default) on $(TARGET_NAME)")
+else
+run-test-i386-fprem: test-i386-fprem
+	$(call quiet-command, /bin/true, "SLOW TEST", "$< SKIPPED on $(TARGET_NAME)")
+endif
+
diff --git a/tests/tcg/i386/test-i386-fprem.c b/tests/tcg/i386/test-i386-fprem.c
index 1a71623204..66f5a9657d 100644
--- a/tests/tcg/i386/test-i386-fprem.c
+++ b/tests/tcg/i386/test-i386-fprem.c
@@ -23,7 +23,10 @@
  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#include "qemu/osdep.h"
+#include <stdio.h>
+#include <stdint.h>
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
 
 /*
  * Inspired by <ieee754.h>'s union ieee854_long_double, but with single
@@ -39,7 +42,7 @@ union float80u {
         unsigned int exponent:15;
         unsigned int negative:1;
         unsigned int empty:16;
-    } QEMU_PACKED ieee;
+    } __attribute__((packed)) ieee;
 
     /* This is for NaNs in the IEEE 854 double-extended-precision format.  */
     struct {
@@ -49,7 +52,7 @@ union float80u {
         unsigned int exponent:15;
         unsigned int negative:1;
         unsigned int empty:16;
-    } QEMU_PACKED ieee_nan;
+    } __attribute__((packed)) ieee_nan;
 };
 
 #define IEEE854_LONG_DOUBLE_BIAS 0x3fff
@@ -229,6 +232,7 @@ static void test_fprem_cases(void)
     do_fprem_stack_underflow();
 
     printf("= invalid operation =\n");
+    do_fprem(q_nan.d, 1.0);
     do_fprem(s_nan.d, 1.0);
     do_fprem(1.0, 0.0);
     do_fprem(pos_inf.d, 1.0);
@@ -238,6 +242,8 @@ static void test_fprem_cases(void)
     do_fprem(pos_denorm.d, 1.0);
     do_fprem(1.0, pos_denorm.d);
 
+    do_fprem(smallest_positive_norm.d, smallest_positive_norm.d);
+
     /* printf("= underflow =\n"); */
     /* TODO: Is there a case where FPREM raises underflow? */
 }
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 22/49] tests/tcg/i386: disable i386 version of test-i386-ssse
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (20 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 21/49] tests/tcg/i386: add runner for test-i386-fprem Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 19:56   ` Richard Henderson
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 23/49] tests/tcg/x86_64: add Makefile.target Alex Bennée
                   ` (26 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Paolo Bonzini, Richard Henderson,
	Eduardo Habkost

It doesn't build for i386 easily and we probably need a better more
methodical test for SSE et all in QEMU.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/i386/Makefile.target | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/tcg/i386/Makefile.target b/tests/tcg/i386/Makefile.target
index 94fa50abbc..290073a882 100644
--- a/tests/tcg/i386/Makefile.target
+++ b/tests/tcg/i386/Makefile.target
@@ -9,7 +9,7 @@ I386_SRCS=$(notdir $(wildcard $(I386_SRC)/*.c))
 I386_TESTS=$(I386_SRCS:.c=)
 
 # Update TESTS
-TESTS+=$(I386_TESTS)
+TESTS+=$(I386_ONLY_TESTS)
 
 ifneq ($(TARGET_NAME),x86_64)
 CFLAGS+=-m32
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 23/49] tests/tcg/x86_64: add Makefile.target
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (21 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 22/49] tests/tcg/i386: disable i386 version of test-i386-ssse Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 24/49] tests/tcg/i386/test-i386: use modern vector_size attributes Alex Bennée
                   ` (25 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Paolo Bonzini, Richard Henderson,
	Eduardo Habkost

The sources for x86_64 are shared in the i386 directory which will be
included thanks to TARGET_BASE_ARCH. However not all sources build so
we need to filter out the ones we can't build in the 64 bit world.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

---
v4
  - update MAINTAINERS
---
 MAINTAINERS                      |  1 +
 tests/tcg/i386/Makefile.target   |  2 +-
 tests/tcg/x86_64/Makefile.target | 15 +++++++++++++++
 3 files changed, 17 insertions(+), 1 deletion(-)
 create mode 100644 tests/tcg/x86_64/Makefile.target

diff --git a/MAINTAINERS b/MAINTAINERS
index 688f166d39..17b9fc0fbe 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -284,6 +284,7 @@ M: Eduardo Habkost <ehabkost@redhat.com>
 S: Maintained
 F: target/i386/
 F: tests/tcg/i386/
+F: tests/tcg/x86_64/
 F: hw/i386/
 F: disas/i386.c
 T: git git://github.com/ehabkost/qemu.git x86-next
diff --git a/tests/tcg/i386/Makefile.target b/tests/tcg/i386/Makefile.target
index 290073a882..6d7d4a164e 100644
--- a/tests/tcg/i386/Makefile.target
+++ b/tests/tcg/i386/Makefile.target
@@ -7,7 +7,7 @@ VPATH 		+= $(I386_SRC)
 
 I386_SRCS=$(notdir $(wildcard $(I386_SRC)/*.c))
 I386_TESTS=$(I386_SRCS:.c=)
-
+I386_ONLY_TESTS=$(filter-out test-i386-ssse3, $(I386_TESTS))
 # Update TESTS
 TESTS+=$(I386_ONLY_TESTS)
 
diff --git a/tests/tcg/x86_64/Makefile.target b/tests/tcg/x86_64/Makefile.target
new file mode 100644
index 0000000000..74f170b9ed
--- /dev/null
+++ b/tests/tcg/x86_64/Makefile.target
@@ -0,0 +1,15 @@
+# -*- Mode: makefile -*-
+#
+# x86_64 tests - included from tests/tcg/Makefile.target
+#
+# Currently we only build test-x86_64 and test-i386-ssse3 from
+# $(SRC)/tests/tcg/i386/
+#
+
+X86_64_TESTS=$(filter-out $(I386_ONLY_TESTS), $(TESTS))
+X86_64_TESTS+=test-x86_64
+TESTS:=$(X86_64_TESTS)
+
+test-x86_64: LDFLAGS+=-lm -lc
+test-x86_64: test-i386.c test-i386.h test-i386-shift.h test-i386-muldiv.h
+	$(CC) $(CFLAGS) $< -o $@ $(LDFLAGS)
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 24/49] tests/tcg/i386/test-i386: use modern vector_size attributes
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (22 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 23/49] tests/tcg/x86_64: add Makefile.target Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 25/49] tests/tcg/i386/test-i386: fix printf format Alex Bennée
                   ` (24 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Paolo Bonzini, Richard Henderson,
	Eduardo Habkost

The compiler complains about the old __mode__ style attributes.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 tests/tcg/i386/test-i386.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/tcg/i386/test-i386.c b/tests/tcg/i386/test-i386.c
index cae6a7773a..caef4da176 100644
--- a/tests/tcg/i386/test-i386.c
+++ b/tests/tcg/i386/test-i386.c
@@ -2106,8 +2106,8 @@ static void test_enter(void)
 
 #ifdef TEST_SSE
 
-typedef int __m64 __attribute__ ((__mode__ (__V2SI__)));
-typedef float __m128 __attribute__ ((__mode__(__V4SF__)));
+typedef int __m64 __attribute__ ((vector_size(8)));
+typedef float __m128 __attribute__ ((vector_size(16)));
 
 typedef union {
     double d[2];
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 25/49] tests/tcg/i386/test-i386: fix printf format
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (23 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 24/49] tests/tcg/i386/test-i386: use modern vector_size attributes Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 26/49] tests/tcg: move ARM specific tests into subdir Alex Bennée
                   ` (23 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Paolo Bonzini, Richard Henderson,
	Eduardo Habkost

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 tests/tcg/i386/test-i386.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/tcg/i386/test-i386.c b/tests/tcg/i386/test-i386.c
index caef4da176..a29b41e764 100644
--- a/tests/tcg/i386/test-i386.c
+++ b/tests/tcg/i386/test-i386.c
@@ -2258,7 +2258,7 @@ SSE_OP(a ## sd);
         "pop %0\n"\
         : "=rm" (eflags)\
         : "x" (a.dq), "x" (b.dq));\
-    printf("%-9s: a=%f b=%f cc=%04x\n",\
+    printf("%-9s: a=%f b=%f cc=%04lx\n",\
            #op, a1, b1,\
            eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
 }
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 26/49] tests/tcg: move ARM specific tests into subdir
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (24 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 25/49] tests/tcg/i386/test-i386: fix printf format Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-18 15:26   ` Philippe Mathieu-Daudé
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 27/49] tests/tcg: enable building for ARM Alex Bennée
                   ` (22 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Peter Maydell, open list:ARM

These only need to be built for ARM guests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

---
v2
  - do VPATH manipulation in tests/tcg/arm/Makefile.target
  - merge with fix hello-arm test
v4
  - update MAINTAINERS
---
 MAINTAINERS                           |  1 +
 tests/tcg/README                      |  9 ---------
 tests/tcg/arm/Makefile.target         | 13 +++++++++++++
 tests/tcg/arm/README                  | 11 +++++++++++
 tests/tcg/{ => arm}/hello-arm.c       |  0
 tests/tcg/{ => arm}/test-arm-iwmmxt.s |  0
 6 files changed, 25 insertions(+), 9 deletions(-)
 create mode 100644 tests/tcg/arm/Makefile.target
 create mode 100644 tests/tcg/arm/README
 rename tests/tcg/{ => arm}/hello-arm.c (100%)
 rename tests/tcg/{ => arm}/test-arm-iwmmxt.s (100%)

diff --git a/MAINTAINERS b/MAINTAINERS
index 17b9fc0fbe..4e331c4db4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -135,6 +135,7 @@ M: Peter Maydell <peter.maydell@linaro.org>
 L: qemu-arm@nongnu.org
 S: Maintained
 F: target/arm/
+F: tests/tcg/arm/
 F: hw/arm/
 F: hw/cpu/a*mpcore.c
 F: include/hw/cpu/a*mpcore.h
diff --git a/tests/tcg/README b/tests/tcg/README
index 469504c4cb..625f2326e6 100644
--- a/tests/tcg/README
+++ b/tests/tcg/README
@@ -5,15 +5,6 @@ or they are architecture specific.
 
 
 
-ARM
-===
-
-hello-arm
----------
-
-test-arm-iwmmxt
----------------
-
 MIPS
 ====
 
diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
new file mode 100644
index 0000000000..bc6962ecc6
--- /dev/null
+++ b/tests/tcg/arm/Makefile.target
@@ -0,0 +1,13 @@
+# -*- Mode: makefile -*-
+#
+# ARM - included from tests/tcg/Makefile.target
+#
+
+ARM_SRC=$(SRC_PATH)/tests/tcg/arm
+
+# Set search path for all sources
+VPATH 		+= $(ARM_SRC)
+
+
+hello-arm: CFLAGS+=-marm -ffreestanding
+hello-arm: LDFLAGS+=-nostdlib
diff --git a/tests/tcg/arm/README b/tests/tcg/arm/README
new file mode 100644
index 0000000000..e6307116e2
--- /dev/null
+++ b/tests/tcg/arm/README
@@ -0,0 +1,11 @@
+These are ARM specific guest programs
+
+hello-arm
+---------
+
+A very simple inline assembly, write syscall based hello world
+
+test-arm-iwmmxt
+---------------
+
+A simple test case for older iwmmxt extended ARMs
diff --git a/tests/tcg/hello-arm.c b/tests/tcg/arm/hello-arm.c
similarity index 100%
rename from tests/tcg/hello-arm.c
rename to tests/tcg/arm/hello-arm.c
diff --git a/tests/tcg/test-arm-iwmmxt.s b/tests/tcg/arm/test-arm-iwmmxt.s
similarity index 100%
rename from tests/tcg/test-arm-iwmmxt.s
rename to tests/tcg/arm/test-arm-iwmmxt.s
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 27/49] tests/tcg: enable building for ARM
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (25 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 26/49] tests/tcg: move ARM specific tests into subdir Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-18 15:28   ` Philippe Mathieu-Daudé
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 28/49] tests/tcg/arm: fix up test-arm-iwmmxt test Alex Bennée
                   ` (21 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Peter Maydell, open list:ARM

This allows us to use the docker cross compiler image to build these
tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/arm/Makefile.include | 8 ++++++++
 1 file changed, 8 insertions(+)
 create mode 100644 tests/tcg/arm/Makefile.include

diff --git a/tests/tcg/arm/Makefile.include b/tests/tcg/arm/Makefile.include
new file mode 100644
index 0000000000..8e7eac008f
--- /dev/null
+++ b/tests/tcg/arm/Makefile.include
@@ -0,0 +1,8 @@
+# Makefile.include for all ARM targets
+#
+# We don't have any bigendian build tools so we only use this for armhf
+
+ifeq ($(TARGET_NAME),arm)
+DOCKER_IMAGE=debian-armhf-cross
+DOCKER_CROSS_COMPILER=arm-linux-gnueabihf-gcc
+endif
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 28/49] tests/tcg/arm: fix up test-arm-iwmmxt test
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (26 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 27/49] tests/tcg: enable building for ARM Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 20:15   ` Richard Henderson
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 29/49] tests/tcg/arm: disable -p 32768 mmap test Alex Bennée
                   ` (20 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Peter Maydell, open list:ARM

We need to rename the source file to a .S so we can do a single-line
assemble and link invocation. We also specify the additional CFLAGS
for the compile as it's a non-standard ARM binary.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
[rth: force fpu configuration]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

---
v4
  - include rth's -mfpu=fpv4-sp-d16
---
 tests/tcg/arm/Makefile.target                          | 5 +++++
 tests/tcg/arm/{test-arm-iwmmxt.s => test-arm-iwmmxt.S} | 0
 2 files changed, 5 insertions(+)
 rename tests/tcg/arm/{test-arm-iwmmxt.s => test-arm-iwmmxt.S} (100%)

diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
index bc6962ecc6..1ef5d79fe3 100644
--- a/tests/tcg/arm/Makefile.target
+++ b/tests/tcg/arm/Makefile.target
@@ -8,6 +8,11 @@ ARM_SRC=$(SRC_PATH)/tests/tcg/arm
 # Set search path for all sources
 VPATH 		+= $(ARM_SRC)
 
+TESTS += hello-arm test-arm-iwmmxt
 
 hello-arm: CFLAGS+=-marm -ffreestanding
 hello-arm: LDFLAGS+=-nostdlib
+
+test-arm-iwmmxt: CFLAGS+=-marm -march=iwmmxt -mabi=aapcs -mfpu=fpv4-sp-d16
+test-arm-iwmmxt: test-arm-iwmmxt.S
+	$(CC) $(CFLAGS) $< -o $@ $(LDFLAGS)
diff --git a/tests/tcg/arm/test-arm-iwmmxt.s b/tests/tcg/arm/test-arm-iwmmxt.S
similarity index 100%
rename from tests/tcg/arm/test-arm-iwmmxt.s
rename to tests/tcg/arm/test-arm-iwmmxt.S
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 29/49] tests/tcg/arm: disable -p 32768 mmap test
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (27 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 28/49] tests/tcg/arm: fix up test-arm-iwmmxt test Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 20:20   ` Richard Henderson
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 30/49] tests/tcg: enable building for AArch64 Alex Bennée
                   ` (19 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Peter Maydell, open list:ARM

Broken since I updated to 18.04

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/arm/Makefile.target | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
index 1ef5d79fe3..9d2b551732 100644
--- a/tests/tcg/arm/Makefile.target
+++ b/tests/tcg/arm/Makefile.target
@@ -16,3 +16,11 @@ hello-arm: LDFLAGS+=-nostdlib
 test-arm-iwmmxt: CFLAGS+=-marm -march=iwmmxt -mabi=aapcs -mfpu=fpv4-sp-d16
 test-arm-iwmmxt: test-arm-iwmmxt.S
 	$(CC) $(CFLAGS) $< -o $@ $(LDFLAGS)
+
+# Currently broken for -p 32768
+ifeq ($(TARGET_NAME), arm)
+run-test-mmap: test-mmap
+	$(call quiet-command, $(QEMU) $< > test-mmap.out, "TEST", "$< (default) on $(TARGET_NAME)")
+	$(call quiet-command, $(QEMU) -p 8192 $< 8192 > test-mmap-8192.out, "TEST", "$< (8k pages) on $(TARGET_NAME)")
+	$(call quiet-command, $(QEMU) -p 16384 $< 16384 > test-mmap-16384.out, "TEST", "$< (16k pages) on $(TARGET_NAME)")
+endif
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 30/49] tests/tcg: enable building for AArch64
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (28 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 29/49] tests/tcg/arm: disable -p 32768 mmap test Alex Bennée
@ 2018-05-17 17:46 ` Alex Bennée
  2018-05-17 20:26   ` Richard Henderson
  2018-05-18 14:57   ` Philippe Mathieu-Daudé
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 31/49] tests/tcg/aarch64: add Makefile.target Alex Bennée
                   ` (18 subsequent siblings)
  48 siblings, 2 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:46 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Peter Maydell, open list:ARM

We only have compilers for the (default) little endian variants.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
v4
  - update MAINTAINERS
---
 MAINTAINERS                        | 1 +
 tests/tcg/aarch64/Makefile.include | 8 ++++++++
 2 files changed, 9 insertions(+)
 create mode 100644 tests/tcg/aarch64/Makefile.include

diff --git a/MAINTAINERS b/MAINTAINERS
index 4e331c4db4..ee7f101890 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -136,6 +136,7 @@ L: qemu-arm@nongnu.org
 S: Maintained
 F: target/arm/
 F: tests/tcg/arm/
+F: tests/tcg/aarch64/
 F: hw/arm/
 F: hw/cpu/a*mpcore.c
 F: include/hw/cpu/a*mpcore.h
diff --git a/tests/tcg/aarch64/Makefile.include b/tests/tcg/aarch64/Makefile.include
new file mode 100644
index 0000000000..de32c91235
--- /dev/null
+++ b/tests/tcg/aarch64/Makefile.include
@@ -0,0 +1,8 @@
+# Makefile.include for AArch64 targets
+#
+# We don't have any bigendian build tools so we only use this for AArch64
+
+ifeq ($(TARGET_NAME),aarch64)
+DOCKER_IMAGE=debian-arm64-cross
+DOCKER_CROSS_COMPILER=aarch64-linux-gnu-gcc
+endif
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 31/49] tests/tcg/aarch64: add Makefile.target
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (29 preceding siblings ...)
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 30/49] tests/tcg: enable building for AArch64 Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-17 20:28   ` Richard Henderson
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 32/49] tests/tcg/arm: add fcvt test cases for AArch32/64 Alex Bennée
                   ` (17 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Peter Maydell, open list:ARM

Nothing much here yet.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/aarch64/Makefile.target | 5 +++++
 1 file changed, 5 insertions(+)
 create mode 100644 tests/tcg/aarch64/Makefile.target

diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
new file mode 100644
index 0000000000..4ac8fbe73f
--- /dev/null
+++ b/tests/tcg/aarch64/Makefile.target
@@ -0,0 +1,5 @@
+# -*- Mode: makefile -*-
+#
+# AArch64 specific tweaks
+
+fcvt: LDFLAGS+=-lm
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 32/49] tests/tcg/arm: add fcvt test cases for AArch32/64
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (30 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 31/49] tests/tcg/aarch64: add Makefile.target Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-17 20:30   ` Richard Henderson
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 33/49] tests/tcg: move MIPS specific tests into subdir Alex Bennée
                   ` (16 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Peter Maydell, open list:ARM

This runs through the usual float to float conversions and crucially
also runs with ARM Alternative Half Precision Format.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
[rth: tweak vcvtb.f16.f32/vctb.f32.f16 code and regen]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
v4
  - add fcvt.ref and check results against it
  - fix single_to_half, single_to_double conversions
  - properly toggle AHP mode (fpsr->fpcr)
  - more values around the AHP margins
  - add INF/NAN/SNAN inputs
  - build for ARM and AArch64
  - fix bug for hex literals
  - add float-to-int
  - checkpatch fix
---
 tests/tcg/aarch64/Makefile.target |   14 +
 tests/tcg/aarch64/fcvt.ref        | 3268 +++++++++++++++++++++++++++++
 tests/tcg/arm/Makefile.target     |   15 +-
 tests/tcg/arm/fcvt.c              |  458 ++++
 tests/tcg/arm/fcvt.ref            | 3268 +++++++++++++++++++++++++++++
 5 files changed, 7022 insertions(+), 1 deletion(-)
 create mode 100644 tests/tcg/aarch64/fcvt.ref
 create mode 100644 tests/tcg/arm/fcvt.c
 create mode 100644 tests/tcg/arm/fcvt.ref

diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index 4ac8fbe73f..7dba32138d 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -2,4 +2,18 @@
 #
 # AArch64 specific tweaks
 
+AARCH64_SRC=$(SRC_PATH)/tests/tcg/aarch64
+VPATH 		+= $(AARCH64_SRC)
+
+# we don't build any of the ARM tests
+AARCH64_TESTS=$(filter-out $(ARM_TESTS), $(TESTS))
+AARCH64_TESTS+=fcvt
+TESTS:=$(AARCH64_TESTS)
+
 fcvt: LDFLAGS+=-lm
+
+run-fcvt: fcvt
+	$(call quiet-command, \
+		$(QEMU) $< > fcvt.out && \
+		diff -u $(AARCH64_SRC)/fcvt.ref fcvt.out, \
+		"TEST", "$< (default) on $(TARGET_NAME)")
diff --git a/tests/tcg/aarch64/fcvt.ref b/tests/tcg/aarch64/fcvt.ref
new file mode 100644
index 0000000000..e7af24dc58
--- /dev/null
+++ b/tests/tcg/aarch64/fcvt.ref
@@ -0,0 +1,3268 @@
+#### Enabling IEEE Half Precision
+### Rounding to nearest
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0xff00  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0xfe00  (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x400  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x4170  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4248  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bff  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7bff  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7c00  (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0x7e00  (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0x7f00  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909791e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635273e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289629e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730511e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005935e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015673e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851006e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324219e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635273e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0x7f00  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0xfe00  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0xc000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0xbc00  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0x400  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x3c00  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x3c01  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x3c00  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x4000  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x4170  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x4248  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0x7bff  (0x10 =>    INEXACT )
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0x7bff  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0x7bff  (0x10 =>    INEXACT )
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0x7c00  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0x7e00  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0x7e00  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0x7f00  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766476800000000000e+09 / 0x4f730c3a  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962432000000000000e+09 / 0x4f71605d  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638016000000000000e+08 / 0x4e4c0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026624000000000000e+08 / 0x4e4e0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896320000000000000e+08 / 0x4e61ff00  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912704000000000000e+08 / 0x4e620000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675456000000000000e+09 / 0x4e805bf1  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07853004800000000000e+09 / 0x4e809220  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32540006400000000000e+09 / 0x4e9e0000  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -nan / 0xffffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -nan / 0xffdfe000  (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -nan / 0xffc02000  (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -inf / 0xff800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: inf / 0x7f800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: nan / 0x7fc02000  (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: nan / 0x7fdfe000  (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: nan / 0x7fffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: -nan / 0x00fffffc0000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: -nan / 0x00fffbfc0000000000 (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: -nan / 0x00fff8040000000000 (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: -6.55040000000000000000e+04 / 0x00c0effc0000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: -5.96046447753906250000e-08 / 0x00be70000000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: -0.00000000000000000000e+00 / 0x008000000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 5.96046447753906250000e-08 / 0x003e70000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: nan / 0x007ff8040000000000 (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: nan / 0x007ffbfc0000000000 (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: nan / 0x007ffffc0000000000 (0 => OK)
+### Rounding upwards
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0xff00  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0xfe00  (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x400  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x401  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x4170  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4249  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bff  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7c00  (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0x7e00  (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0x7f00  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909790e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635272e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289628e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730511e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005935e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015673e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851006e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324219e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635273e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0x7f00  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0xfe00  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0xc000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0xbc00  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+15 DOUBLE: 5.96046000000000015662e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0x400  (0x18 =>  UNDERFLOW  INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0x401  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x3c00  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x3c01  (0 => OK)
+20 DOUBLE: 2.22507385850720138310e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282844e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238764e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x3c00  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x4000  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x4170  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x4249  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0x7bff  (0x10 =>    INEXACT )
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0x7bff  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0x7c00  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0x7e00  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0x7e00  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0x7f00  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766502400000000000e+09 / 0x4f730c3b  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962457600000000000e+09 / 0x4f71605e  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638080000000000000e+08 / 0x4e4c0001  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015662e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026624000000000000e+08 / 0x4e4e0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896384000000000000e+08 / 0x4e61ff01  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912768000000000000e+08 / 0x4e620001  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138310e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282844e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238764e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675456000000000000e+09 / 0x4e805bf1  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07853004800000000000e+09 / 0x4e809220  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32540006400000000000e+09 / 0x4e9e0000  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -nan / 0xffffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -nan / 0xffdfe000  (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -nan / 0xffc02000  (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -inf / 0xff800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: inf / 0x7f800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: nan / 0x7fc02000  (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: nan / 0x7fdfe000  (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: nan / 0x7fffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: -nan / 0x00fffffc0000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: -nan / 0x00fffbfc0000000000 (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: -nan / 0x00fff8040000000000 (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: -6.55040000000000000000e+04 / 0x00c0effc0000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: -5.96046447753906250000e-08 / 0x00be70000000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: -0.00000000000000000000e+00 / 0x008000000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 5.96046447753906250000e-08 / 0x003e70000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: nan / 0x007ff8040000000000 (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: nan / 0x007ffbfc0000000000 (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: nan / 0x007ffffc0000000000 (0 => OK)
+### Rounding downwards
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0xff00  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0xfe00  (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730512e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x400  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x416f  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4248  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bfe  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7bff  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7c00  (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0x7e00  (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0x7f00  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909791e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635273e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289629e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730512e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730512e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005934e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015672e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851005e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324218e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635272e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0x7f00  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0xfe00  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+06 DOUBLE: -1.11100000000000007530e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0xc000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0xbc00  (0 => OK)
+10 DOUBLE: -2.22507385850720138310e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0x400  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x3c00  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x3c01  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x3c00  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x4000  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x416f  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x4248  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0x7bfe  (0x10 =>    INEXACT )
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0x7bff  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0x7bff  (0x10 =>    INEXACT )
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0x7c00  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0x7e00  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0x7e00  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0x7f00  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007530e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766476800000000000e+09 / 0x4f730c3a  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962432000000000000e+09 / 0x4f71605d  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138310e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638016000000000000e+08 / 0x4e4c0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026560000000000000e+08 / 0x4e4dffff  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896320000000000000e+08 / 0x4e61ff00  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912704000000000000e+08 / 0x4e620000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675443200000000000e+09 / 0x4e805bf0  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07852992000000000000e+09 / 0x4e80921f  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32539993600000000000e+09 / 0x4e9dffff  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -nan / 0xffffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -nan / 0xffdfe000  (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -nan / 0xffc02000  (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -inf / 0xff800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: inf / 0x7f800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: nan / 0x7fc02000  (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: nan / 0x7fdfe000  (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: nan / 0x7fffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: -nan / 0x00fffffc0000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: -nan / 0x00fffbfc0000000000 (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: -nan / 0x00fff8040000000000 (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: -6.55040000000000000000e+04 / 0x00c0effc0000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: -5.96046447753906250000e-08 / 0x00be70000000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: -0.00000000000000000000e+00 / 0x008000000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 5.96046447753906250000e-08 / 0x003e70000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: nan / 0x007ff8040000000000 (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: nan / 0x007ffbfc0000000000 (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: nan / 0x007ffffc0000000000 (0 => OK)
+### Rounding to zero
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0xff00  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0xfe00  (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x400  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x416f  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4248  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bfe  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7bff  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7c00  (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0x7e00  (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0x7f00  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909790e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635272e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289628e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730511e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005934e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015672e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851005e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324218e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635272e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0x7f00  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0xfe00  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0xc000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0xbc00  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0x400  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x3c00  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x3c01  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x3c00  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x4000  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x416f  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x4248  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0x7bfe  (0x10 =>    INEXACT )
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0x7bff  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0x7bff  (0x10 =>    INEXACT )
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0x7c00  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0x7e00  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0x7e00  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0x7f00  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766476800000000000e+09 / 0x4f730c3a  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962432000000000000e+09 / 0x4f71605d  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638016000000000000e+08 / 0x4e4c0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026560000000000000e+08 / 0x4e4dffff  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896320000000000000e+08 / 0x4e61ff00  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912704000000000000e+08 / 0x4e620000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675443200000000000e+09 / 0x4e805bf0  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07852992000000000000e+09 / 0x4e80921f  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32539993600000000000e+09 / 0x4e9dffff  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -nan / 0xffffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -nan / 0xffdfe000  (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -nan / 0xffc02000  (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -inf / 0xff800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: inf / 0x7f800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: nan / 0x7fc02000  (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: nan / 0x7fdfe000  (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: nan / 0x7fffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: -nan / 0x00fffffc0000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: -nan / 0x00fffbfc0000000000 (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: -nan / 0x00fff8040000000000 (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: -6.55040000000000000000e+04 / 0x00c0effc0000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: -5.96046447753906250000e-08 / 0x00be70000000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: -0.00000000000000000000e+00 / 0x008000000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 5.96046447753906250000e-08 / 0x003e70000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: nan / 0x007ff8040000000000 (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: nan / 0x007ffbfc0000000000 (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: nan / 0x007ffffc0000000000 (0 => OK)
+Converting single-precision to integer
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   INT64:                    0/00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   INT64:                    1/0x000000000000000001 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   INT64:                    2/0x000000000000000002 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   INT64:                    2/0x000000000000000002 (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19   INT64:                    3/0x000000000000000003 (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   INT64:                65503/0x00000000000000ffdf (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   INT64:                65504/0x00000000000000ffe0 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   INT64:                65505/0x00000000000000ffe1 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   INT64:               131007/0x00000000000001ffbf (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   INT64:               131008/0x00000000000001ffc0 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   INT64:               131009/0x00000000000001ffc1 (0 => OK)
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+Converting double-precision to integer
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   INT64:                   -2/0x00fffffffffffffffe (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   INT64:                   -1/0x00ffffffffffffffff (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   INT64:                    0/00000000000000000000 (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   INT64:                    1/0x000000000000000001 (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   INT64:                    1/0x000000000000000001 (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   INT64:                    2/0x000000000000000002 (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   INT64:                    2/0x000000000000000002 (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26   INT64:                    3/0x000000000000000003 (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   INT64:                65503/0x00000000000000ffdf (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   INT64:                65504/0x00000000000000ffe0 (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   INT64:                65505/0x00000000000000ffe1 (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   INT64:               131007/0x00000000000001ffbf (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   INT64:               131008/0x00000000000001ffc0 (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   INT64:               131009/0x00000000000001ffc1 (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   INT64:           2147483647/0x00000000007fffffff (0 => OK)
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+Converting half-precision to integer
+00   HALF: 0xffff  (0 => OK)
+00   INT64:           4294959104/0x0000000000ffffe000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01   INT64:           4292861952/0x0000000000ffdfe000 (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02   INT64:           4290781184/0x0000000000ffc02000 (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03   INT64:           4286578688/0x0000000000ff800000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04   INT64:           3347046400/0x0000000000c77fe000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05   INT64:           3221225472/0x0000000000c0000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06   INT64:           3212836864/0x0000000000bf800000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07   INT64:           3011510272/0x0000000000b3800000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08   INT64:           2147483648/0x000000000080000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09   INT64:                    0/00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10   INT64:            864026624/0x000000000033800000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11   INT64:           1065353216/0x00000000003f800000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12   INT64:           1199562752/0x0000000000477fe000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13   INT64:           2139095040/0x00000000007f800000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14   INT64:           2143297536/0x00000000007fc02000 (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15   INT64:           2145378304/0x00000000007fdfe000 (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16   INT64:           2147475456/0x00000000007fffe000 (0 => OK)
+#### Enabling ARM Alternative Half Precision
+### Rounding to nearest
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0x8000  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0x8000  (0x1 =>     INVALID)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xffff  (0x1 =>     INVALID)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xffff  (0x1 =>     INVALID)
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xffff  (0x1 =>     INVALID)
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xffff  (0x1 =>     INVALID)
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x400  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x4170  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4248  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bff  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7bff  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7fff  (0x10 =>    INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7fff  (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7fff  (0x10 =>    INEXACT )
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7fff  (0x1 =>     INVALID)
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7fff  (0x1 =>     INVALID)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7fff  (0x1 =>     INVALID)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0000  (0x1 =>     INVALID)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0000  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909791e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635273e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289629e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730511e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005935e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015673e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851006e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324219e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635273e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0x8000  (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0xffff  (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0xffff  (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0xffff  (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0xffff  (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0xffff  (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0xffff  (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0xc000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0xbc00  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0x400  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x3c00  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x3c01  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x3c00  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x4000  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x4170  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x4248  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0x7bff  (0x10 =>    INEXACT )
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0x7bff  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0x7bff  (0x10 =>    INEXACT )
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0x7fff  (0x10 =>    INEXACT )
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0x7fff  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0x7fff  (0x10 =>    INEXACT )
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0x7fff  (0x1 =>     INVALID)
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0x7fff  (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0x7fff  (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0x7fff  (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0x7fff  (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0000  (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0000  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766476800000000000e+09 / 0x4f730c3a  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962432000000000000e+09 / 0x4f71605d  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638016000000000000e+08 / 0x4e4c0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026624000000000000e+08 / 0x4e4e0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896320000000000000e+08 / 0x4e61ff00  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912704000000000000e+08 / 0x4e620000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675456000000000000e+09 / 0x4e805bf1  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07853004800000000000e+09 / 0x4e809220  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32540006400000000000e+09 / 0x4e9e0000  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -1.31008000000000000000e+05 / 0xc7ffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -8.18560000000000000000e+04 / 0xc79fe000  (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -6.56000000000000000000e+04 / 0xc7802000  (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -6.55360000000000000000e+04 / 0xc7800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: 6.55360000000000000000e+04 / 0x47800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: 6.56000000000000000000e+04 / 0x47802000  (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: 8.18560000000000000000e+04 / 0x479fe000  (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: -1.31008000000000000000e+05 / 0x00c0fffc0000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: -8.18560000000000000000e+04 / 0x00c0f3fc0000000000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: -6.56000000000000000000e+04 / 0x00c0f0040000000000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: -6.55360000000000000000e+04 / 0x00c0f0000000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: -6.55040000000000000000e+04 / 0x00c0effc0000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: -5.96046447753906250000e-08 / 0x00be70000000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: -0.00000000000000000000e+00 / 0x008000000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 5.96046447753906250000e-08 / 0x003e70000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: 6.55360000000000000000e+04 / 0x0040f0000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: 6.56000000000000000000e+04 / 0x0040f0040000000000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: 8.18560000000000000000e+04 / 0x0040f3fc0000000000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+### Rounding upwards
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0x8000  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0x8000  (0x1 =>     INVALID)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xffff  (0x1 =>     INVALID)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xffff  (0x1 =>     INVALID)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xffff  (0x1 =>     INVALID)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xffff  (0x1 =>     INVALID)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x400  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x401  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x4170  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4249  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bff  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7c00  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7fff  (0x10 =>    INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7fff  (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7fff  (0x1 =>     INVALID)
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7fff  (0x1 =>     INVALID)
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7fff  (0x1 =>     INVALID)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7fff  (0x1 =>     INVALID)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0000  (0x1 =>     INVALID)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0000  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909790e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635272e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289628e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730511e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005935e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015673e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851006e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324219e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635273e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0x8000  (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0xffff  (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0xffff  (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0xffff  (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0xffff  (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0xffff  (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0xffff  (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0xc000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0xbc00  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+15 DOUBLE: 5.96046000000000015662e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0x400  (0x18 =>  UNDERFLOW  INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0x401  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x3c00  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x3c01  (0 => OK)
+20 DOUBLE: 2.22507385850720138310e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282844e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238764e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x3c00  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x4000  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x4170  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x4249  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0x7bff  (0x10 =>    INEXACT )
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0x7bff  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0x7c00  (0x10 =>    INEXACT )
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0x7fff  (0x10 =>    INEXACT )
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0x7fff  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0x7fff  (0x1 =>     INVALID)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0x7fff  (0x1 =>     INVALID)
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0x7fff  (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0x7fff  (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0x7fff  (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0x7fff  (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0000  (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0000  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766502400000000000e+09 / 0x4f730c3b  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962457600000000000e+09 / 0x4f71605e  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638080000000000000e+08 / 0x4e4c0001  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015662e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026624000000000000e+08 / 0x4e4e0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896384000000000000e+08 / 0x4e61ff01  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912768000000000000e+08 / 0x4e620001  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138310e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282844e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238764e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675456000000000000e+09 / 0x4e805bf1  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07853004800000000000e+09 / 0x4e809220  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32540006400000000000e+09 / 0x4e9e0000  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -1.31008000000000000000e+05 / 0xc7ffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -8.18560000000000000000e+04 / 0xc79fe000  (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -6.56000000000000000000e+04 / 0xc7802000  (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -6.55360000000000000000e+04 / 0xc7800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: 6.55360000000000000000e+04 / 0x47800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: 6.56000000000000000000e+04 / 0x47802000  (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: 8.18560000000000000000e+04 / 0x479fe000  (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: -1.31008000000000000000e+05 / 0x00c0fffc0000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: -8.18560000000000000000e+04 / 0x00c0f3fc0000000000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: -6.56000000000000000000e+04 / 0x00c0f0040000000000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: -6.55360000000000000000e+04 / 0x00c0f0000000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: -6.55040000000000000000e+04 / 0x00c0effc0000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: -5.96046447753906250000e-08 / 0x00be70000000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: -0.00000000000000000000e+00 / 0x008000000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 5.96046447753906250000e-08 / 0x003e70000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: 6.55360000000000000000e+04 / 0x0040f0000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: 6.56000000000000000000e+04 / 0x0040f0040000000000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: 8.18560000000000000000e+04 / 0x0040f3fc0000000000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+### Rounding downwards
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0x8000  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0x8000  (0x1 =>     INVALID)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xffff  (0x1 =>     INVALID)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xffff  (0x1 =>     INVALID)
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xffff  (0x1 =>     INVALID)
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xffff  (0x1 =>     INVALID)
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730512e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x400  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x416f  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4248  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bfe  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7bff  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7ffe  (0x10 =>    INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7fff  (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7fff  (0x10 =>    INEXACT )
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7fff  (0x1 =>     INVALID)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7fff  (0x1 =>     INVALID)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7fff  (0x1 =>     INVALID)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0000  (0x1 =>     INVALID)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0000  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909791e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635273e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289629e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730512e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730512e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005934e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015672e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851005e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324218e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635272e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0x8000  (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0xffff  (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0xffff  (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0xffff  (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0xffff  (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007530e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0xffff  (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0xffff  (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0xc000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0xbc00  (0 => OK)
+10 DOUBLE: -2.22507385850720138310e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0x400  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x3c00  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x3c01  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x3c00  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x4000  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x416f  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x4248  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0x7bfe  (0x10 =>    INEXACT )
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0x7bff  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0x7bff  (0x10 =>    INEXACT )
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0x7ffe  (0x10 =>    INEXACT )
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0x7fff  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0x7fff  (0x10 =>    INEXACT )
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0x7fff  (0x1 =>     INVALID)
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0x7fff  (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0x7fff  (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0x7fff  (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0x7fff  (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0000  (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0000  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007530e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766476800000000000e+09 / 0x4f730c3a  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962432000000000000e+09 / 0x4f71605d  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138310e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638016000000000000e+08 / 0x4e4c0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026560000000000000e+08 / 0x4e4dffff  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896320000000000000e+08 / 0x4e61ff00  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912704000000000000e+08 / 0x4e620000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675443200000000000e+09 / 0x4e805bf0  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07852992000000000000e+09 / 0x4e80921f  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32539993600000000000e+09 / 0x4e9dffff  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -1.31008000000000000000e+05 / 0xc7ffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -8.18560000000000000000e+04 / 0xc79fe000  (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -6.56000000000000000000e+04 / 0xc7802000  (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -6.55360000000000000000e+04 / 0xc7800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: 6.55360000000000000000e+04 / 0x47800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: 6.56000000000000000000e+04 / 0x47802000  (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: 8.18560000000000000000e+04 / 0x479fe000  (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: -1.31008000000000000000e+05 / 0x00c0fffc0000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: -8.18560000000000000000e+04 / 0x00c0f3fc0000000000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: -6.56000000000000000000e+04 / 0x00c0f0040000000000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: -6.55360000000000000000e+04 / 0x00c0f0000000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: -6.55040000000000000000e+04 / 0x00c0effc0000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: -5.96046447753906250000e-08 / 0x00be70000000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: -0.00000000000000000000e+00 / 0x008000000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 5.96046447753906250000e-08 / 0x003e70000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: 6.55360000000000000000e+04 / 0x0040f0000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: 6.56000000000000000000e+04 / 0x0040f0040000000000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: 8.18560000000000000000e+04 / 0x0040f3fc0000000000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+### Rounding to zero
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0x8000  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0x8000  (0x1 =>     INVALID)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xffff  (0x1 =>     INVALID)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xffff  (0x1 =>     INVALID)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xffff  (0x1 =>     INVALID)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xffff  (0x1 =>     INVALID)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x400  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x416f  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4248  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bfe  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7bff  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7ffe  (0x10 =>    INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7fff  (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7fff  (0x10 =>    INEXACT )
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7fff  (0x1 =>     INVALID)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7fff  (0x1 =>     INVALID)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7fff  (0x1 =>     INVALID)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0000  (0x1 =>     INVALID)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0000  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909790e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635272e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289628e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730511e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005934e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015672e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851005e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324218e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635272e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0x8000  (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0xffff  (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0xffff  (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0xffff  (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0xffff  (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0xffff  (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0xffff  (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0xc000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0xbc00  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0x400  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x3c00  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x3c01  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x3c00  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x4000  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x416f  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x4248  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0x7bfe  (0x10 =>    INEXACT )
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0x7bff  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0x7bff  (0x10 =>    INEXACT )
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0x7ffe  (0x10 =>    INEXACT )
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0x7fff  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0x7fff  (0x10 =>    INEXACT )
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0x7fff  (0x1 =>     INVALID)
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0x7fff  (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0x7fff  (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0x7fff  (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0x7fff  (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0000  (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0000  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766476800000000000e+09 / 0x4f730c3a  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962432000000000000e+09 / 0x4f71605d  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638016000000000000e+08 / 0x4e4c0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026560000000000000e+08 / 0x4e4dffff  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896320000000000000e+08 / 0x4e61ff00  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912704000000000000e+08 / 0x4e620000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675443200000000000e+09 / 0x4e805bf0  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07852992000000000000e+09 / 0x4e80921f  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32539993600000000000e+09 / 0x4e9dffff  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -1.31008000000000000000e+05 / 0xc7ffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -8.18560000000000000000e+04 / 0xc79fe000  (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -6.56000000000000000000e+04 / 0xc7802000  (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -6.55360000000000000000e+04 / 0xc7800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: 6.55360000000000000000e+04 / 0x47800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: 6.56000000000000000000e+04 / 0x47802000  (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: 8.18560000000000000000e+04 / 0x479fe000  (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: -1.31008000000000000000e+05 / 0x00c0fffc0000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: -8.18560000000000000000e+04 / 0x00c0f3fc0000000000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: -6.56000000000000000000e+04 / 0x00c0f0040000000000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: -6.55360000000000000000e+04 / 0x00c0f0000000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: -6.55040000000000000000e+04 / 0x00c0effc0000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: -5.96046447753906250000e-08 / 0x00be70000000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: -0.00000000000000000000e+00 / 0x008000000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 5.96046447753906250000e-08 / 0x003e70000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: 6.55360000000000000000e+04 / 0x0040f0000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: 6.56000000000000000000e+04 / 0x0040f0040000000000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: 8.18560000000000000000e+04 / 0x0040f3fc0000000000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+Converting single-precision to integer
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   INT64:                    0/00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   INT64:                    1/0x000000000000000001 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   INT64:                    2/0x000000000000000002 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   INT64:                    2/0x000000000000000002 (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19   INT64:                    3/0x000000000000000003 (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   INT64:                65503/0x00000000000000ffdf (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   INT64:                65504/0x00000000000000ffe0 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   INT64:                65505/0x00000000000000ffe1 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   INT64:               131007/0x00000000000001ffbf (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   INT64:               131008/0x00000000000001ffc0 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   INT64:               131009/0x00000000000001ffc1 (0 => OK)
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+Converting double-precision to integer
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   INT64: -9223372036854775808/0x008000000000000000 (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   INT64:                   -2/0x00fffffffffffffffe (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   INT64:                   -1/0x00ffffffffffffffff (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   INT64:                    0/00000000000000000000 (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   INT64:                    1/0x000000000000000001 (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   INT64:                    1/0x000000000000000001 (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   INT64:                    2/0x000000000000000002 (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   INT64:                    2/0x000000000000000002 (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26   INT64:                    3/0x000000000000000003 (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   INT64:                65503/0x00000000000000ffdf (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   INT64:                65504/0x00000000000000ffe0 (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   INT64:                65505/0x00000000000000ffe1 (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   INT64:               131007/0x00000000000001ffbf (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   INT64:               131008/0x00000000000001ffc0 (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   INT64:               131009/0x00000000000001ffc1 (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   INT64:           2147483647/0x00000000007fffffff (0 => OK)
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   INT64:  9223372036854775807/0x007fffffffffffffff (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+Converting half-precision to integer
+00   HALF: 0xffff  (0 => OK)
+00   INT64:           3355435008/0x0000000000c7ffe000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01   INT64:           3349143552/0x0000000000c79fe000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02   INT64:           3347062784/0x0000000000c7802000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03   INT64:           3347054592/0x0000000000c7800000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04   INT64:           3347046400/0x0000000000c77fe000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05   INT64:           3221225472/0x0000000000c0000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06   INT64:           3212836864/0x0000000000bf800000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07   INT64:           3011510272/0x0000000000b3800000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08   INT64:           2147483648/0x000000000080000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09   INT64:                    0/00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10   INT64:            864026624/0x000000000033800000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11   INT64:           1065353216/0x00000000003f800000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12   INT64:           1199562752/0x0000000000477fe000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13   INT64:           1199570944/0x000000000047800000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14   INT64:           1199579136/0x000000000047802000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15   INT64:           1201659904/0x0000000000479fe000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16   INT64:           1207951360/0x000000000047ffe000 (0 => OK)
diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
index 9d2b551732..7bb777f442 100644
--- a/tests/tcg/arm/Makefile.target
+++ b/tests/tcg/arm/Makefile.target
@@ -8,7 +8,9 @@ ARM_SRC=$(SRC_PATH)/tests/tcg/arm
 # Set search path for all sources
 VPATH 		+= $(ARM_SRC)
 
-TESTS += hello-arm test-arm-iwmmxt
+ARM_TESTS=hello-arm test-arm-iwmmxt
+
+TESTS += $(ARM_TESTS) fcvt
 
 hello-arm: CFLAGS+=-marm -ffreestanding
 hello-arm: LDFLAGS+=-nostdlib
@@ -24,3 +26,14 @@ run-test-mmap: test-mmap
 	$(call quiet-command, $(QEMU) -p 8192 $< 8192 > test-mmap-8192.out, "TEST", "$< (8k pages) on $(TARGET_NAME)")
 	$(call quiet-command, $(QEMU) -p 16384 $< 16384 > test-mmap-16384.out, "TEST", "$< (16k pages) on $(TARGET_NAME)")
 endif
+
+ifeq ($(TARGET_NAME), arm)
+fcvt: LDFLAGS+=-lm
+# fcvt: CFLAGS+=-march=armv8.2-a+fp16 -mfpu=neon-fp-armv8
+
+run-fcvt: fcvt
+	$(call quiet-command, \
+		$(QEMU) $< > fcvt.out && \
+		diff -u $(ARM_SRC)/fcvt.ref fcvt.out, \
+		"TEST", "$< (default) on $(TARGET_NAME)")
+endif
diff --git a/tests/tcg/arm/fcvt.c b/tests/tcg/arm/fcvt.c
new file mode 100644
index 0000000000..617626bc63
--- /dev/null
+++ b/tests/tcg/arm/fcvt.c
@@ -0,0 +1,458 @@
+/*
+ * Test Floating Point Conversion
+ */
+
+/* we want additional float type definitions */
+#define __STDC_WANT_IEC_60559_BFP_EXT__
+#define __STDC_WANT_IEC_60559_TYPES_EXT__
+
+#include <stdio.h>
+#include <inttypes.h>
+#include <math.h>
+#include <float.h>
+#include <fenv.h>
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+static char flag_str[256];
+
+static char *get_flag_state(int flags)
+{
+    if (flags) {
+        snprintf(flag_str, sizeof(flag_str), "%s %s %s %s %s",
+                 flags & FE_OVERFLOW ? "OVERFLOW" : "",
+                 flags & FE_UNDERFLOW ? "UNDERFLOW" : "",
+                 flags & FE_DIVBYZERO ? "DIV0" : "",
+                 flags & FE_INEXACT ? "INEXACT" : "",
+                 flags & FE_INVALID ? "INVALID" : "");
+    } else {
+        snprintf(flag_str, sizeof(flag_str), "OK");
+    }
+
+    return flag_str;
+}
+
+static void print_double_number(int i, double num)
+{
+    uint64_t double_as_hex = *(uint64_t *) &num;
+    int flags = fetestexcept(FE_ALL_EXCEPT);
+    char *fstr = get_flag_state(flags);
+
+    printf("%02d DOUBLE: %02.20e / %#020" PRIx64 " (%#x => %s)\n",
+           i, num, double_as_hex, flags, fstr);
+}
+
+static void print_single_number(int i, float num)
+{
+    uint32_t single_as_hex = *(uint32_t *) &num;
+    int flags = fetestexcept(FE_ALL_EXCEPT);
+    char *fstr = get_flag_state(flags);
+
+    printf("%02d SINGLE: %02.20e / %#010x  (%#x => %s)\n",
+           i, num, single_as_hex, flags, fstr);
+}
+
+static void print_half_number(int i, uint16_t num)
+{
+    int flags = fetestexcept(FE_ALL_EXCEPT);
+    char *fstr = get_flag_state(flags);
+
+    printf("%02d   HALF: %#04x  (%#x => %s)\n",
+           i, num, flags, fstr);
+}
+
+static void print_int64(int i, int64_t num)
+{
+    uint64_t int64_as_hex = *(uint64_t *) &num;
+    int flags = fetestexcept(FE_ALL_EXCEPT);
+    char *fstr = get_flag_state(flags);
+
+    printf("%02d   INT64: %20" PRId64 "/%#020" PRIx64 " (%#x => %s)\n",
+           i, num, int64_as_hex, flags, fstr);
+}
+
+#ifndef SNANF
+/* Signaling NaN macros, if supported.  */
+# if __GNUC_PREREQ(3, 3)
+#  define SNANF (__builtin_nansf (""))
+#  define SNAN (__builtin_nans (""))
+#  define SNANL (__builtin_nansl (""))
+# endif
+#endif
+
+float single_numbers[] = { -SNANF,
+                           -NAN,
+                           -INFINITY,
+                           -FLT_MAX,
+                           -1.111E+31,
+                           -1.111E+30,
+                           -1.08700982e-12,
+                           -1.78051176e-20,
+                           -FLT_MIN,
+                           0.0,
+                           FLT_MIN,
+                           2.98023224e-08,
+                           5.96046E-8, /* min positive FP16 subnormal */
+                           6.09756E-5, /* max subnormal FP16 */
+                           6.10352E-5, /* min positive normal FP16 */
+                           1.0,
+                           1.0009765625, /* smallest float after 1.0 FP16 */
+                           2.0,
+                           M_E, M_PI,
+                           65503.0,
+                           65504.0, /* max FP16 */
+                           65505.0,
+                           131007.0,
+                           131008.0, /* max AFP */
+                           131009.0,
+                           1.111E+30,
+                           FLT_MAX,
+                           INFINITY,
+                           NAN,
+                           SNANF };
+
+static void convert_single_to_half(void)
+{
+    int i;
+
+    printf("Converting single-precision to half-precision\n");
+
+    for (i = 0; i < ARRAY_SIZE(single_numbers); ++i) {
+        float input = single_numbers[i];
+
+        feclearexcept(FE_ALL_EXCEPT);
+
+        print_single_number(i, input);
+#if defined(__arm__)
+        uint32_t output;
+        asm("vcvtb.f16.f32 %0, %1" : "=t" (output) : "x" (input));
+#else
+        uint16_t output;
+        asm("fcvt %h0, %s1" : "=w" (output) : "x" (input));
+#endif
+        print_half_number(i, output);
+    }
+}
+
+static void convert_single_to_double(void)
+{
+    int i;
+
+    printf("Converting single-precision to double-precision\n");
+
+    for (i = 0; i < ARRAY_SIZE(single_numbers); ++i) {
+        float input = single_numbers[i];
+        /* uint64_t output; */
+        double output;
+
+        feclearexcept(FE_ALL_EXCEPT);
+
+        print_single_number(i, input);
+#if defined(__arm__)
+        asm("vcvt.f64.f32 %P0, %1" : "=w" (output) : "t" (input));
+#else
+        asm("fcvt %d0, %s1" : "=w" (output) : "x" (input));
+#endif
+        print_double_number(i, output);
+    }
+}
+
+static void convert_single_to_integer(void)
+{
+    int i;
+
+    printf("Converting single-precision to integer\n");
+
+    for (i = 0; i < ARRAY_SIZE(single_numbers); ++i) {
+        float input = single_numbers[i];
+        int64_t output;
+
+        feclearexcept(FE_ALL_EXCEPT);
+
+        print_single_number(i, input);
+#if defined(__arm__)
+        /* asm("vcvt.s32.f32 %s0, %s1" : "=t" (output) : "t" (input)); */
+        output = input;
+#else
+        asm("fcvtzs %0, %s1" : "=r" (output) : "w" (input));
+#endif
+        print_int64(i, output);
+    }
+}
+
+/* This allows us to initialise some doubles as pure hex */
+typedef union {
+    double d;
+    uint64_t h;
+} test_doubles;
+
+test_doubles double_numbers[] = {
+    {SNAN},
+    {-NAN},
+    {-INFINITY},
+    {-DBL_MAX},
+    {-FLT_MAX-1.0},
+    {-FLT_MAX},
+    {-1.111E+31},
+    {-1.111E+30}, /* half prec */
+    {-2.0}, {-1.0},
+    {-DBL_MIN},
+    {-FLT_MIN},
+    {0.0},
+    {FLT_MIN},
+    {2.98023224e-08},
+    {5.96046E-8}, /* min positive FP16 subnormal */
+    {6.09756E-5}, /* max subnormal FP16 */
+    {6.10352E-5}, /* min positive normal FP16 */
+    {1.0},
+    {1.0009765625}, /* smallest float after 1.0 FP16 */
+    {DBL_MIN},
+    {1.3789972848607228e-308},
+    {1.4914738736681624e-308},
+    {1.0}, {2.0},
+    {M_E}, {M_PI},
+    {65503.0},
+    {65504.0}, /* max FP16 */
+    {65505.0},
+    {131007.0},
+    {131008.0}, /* max AFP */
+    {131009.0},
+    {.h = 0x41dfffffffc00000 }, /* to int = 0x7fffffff */
+    {FLT_MAX},
+    {FLT_MAX + 1.0},
+    {DBL_MAX},
+    {INFINITY},
+    {NAN},
+    {.h = 0x7ff0000000000001}, /* SNAN */
+    {SNAN},
+};
+
+static void convert_double_to_half(void)
+{
+    int i;
+
+    printf("Converting double-precision to half-precision\n");
+
+    for (i = 0; i < ARRAY_SIZE(double_numbers); ++i) {
+        double input = double_numbers[i].d;
+        uint16_t output;
+
+        feclearexcept(FE_ALL_EXCEPT);
+
+        print_double_number(i, input);
+
+        /* as we don't have _Float16 support */
+#if defined(__arm__)
+        /* asm("vcvtb.f16.f64 %0, %P1" : "=t" (output) : "x" (input)); */
+        output = input;
+#else
+        asm("fcvt %h0, %d1" : "=w" (output) : "x" (input));
+#endif
+        print_half_number(i, output);
+    }
+}
+
+static void convert_double_to_single(void)
+{
+    int i;
+
+    printf("Converting double-precision to single-precision\n");
+
+    for (i = 0; i < ARRAY_SIZE(double_numbers); ++i) {
+        double input = double_numbers[i].d;
+        uint32_t output;
+
+        feclearexcept(FE_ALL_EXCEPT);
+
+        print_double_number(i, input);
+
+#if defined(__arm__)
+        asm("vcvt.f32.f64 %0, %P1" : "=w" (output) : "x" (input));
+#else
+        asm("fcvt %s0, %d1" : "=w" (output) : "x" (input));
+#endif
+
+        print_single_number(i, output);
+    }
+}
+
+static void convert_double_to_integer(void)
+{
+    int i;
+
+    printf("Converting double-precision to integer\n");
+
+    for (i = 0; i < ARRAY_SIZE(double_numbers); ++i) {
+        double input = double_numbers[i].d;
+        int64_t output;
+
+        feclearexcept(FE_ALL_EXCEPT);
+
+        print_double_number(i, input);
+#if defined(__arm__)
+        /* asm("vcvt.s32.f32 %s0, %s1" : "=t" (output) : "t" (input)); */
+        output = input;
+#else
+        asm("fcvtzs %0, %d1" : "=r" (output) : "w" (input));
+#endif
+        print_int64(i, output);
+    }
+}
+
+/* no handy defines for these numbers */
+uint16_t half_numbers[] = {
+    0xffff, /* -NaN / AHP -Max */
+    0xfcff, /* -NaN / AHP */
+    0xfc01, /* -NaN / AHP */
+    0xfc00, /* -Inf */
+    0xfbff, /* -Max */
+    0xc000, /* -2 */
+    0xbc00, /* -1 */
+    0x8001, /* -MIN subnormal */
+    0x8000, /* -0 */
+    0x0000, /* +0 */
+    0x0001, /* MIN subnormal */
+    0x3c00, /* 1 */
+    0x7bff, /* Max */
+    0x7c00, /* Inf */
+    0x7c01, /* NaN / AHP */
+    0x7cff, /* NaN / AHP */
+    0x7fff, /* NaN / AHP +Max*/
+};
+
+static void convert_half_to_double(void)
+{
+    int i;
+
+    printf("Converting half-precision to double-precision\n");
+
+    for (i = 0; i < ARRAY_SIZE(half_numbers); ++i) {
+        uint16_t input = half_numbers[i];
+        double output;
+
+        feclearexcept(FE_ALL_EXCEPT);
+
+        print_half_number(i, input);
+#if defined(__arm__)
+        /* asm("vcvtb.f64.f16 %P0, %1" : "=w" (output) : "t" (input)); */
+        output = input;
+#else
+        asm("fcvt %d0, %h1" : "=w" (output) : "x" (input));
+#endif
+        print_double_number(i, output);
+    }
+}
+
+static void convert_half_to_single(void)
+{
+    int i;
+
+    printf("Converting half-precision to single-precision\n");
+
+    for (i = 0; i < ARRAY_SIZE(half_numbers); ++i) {
+        uint16_t input = half_numbers[i];
+        float output;
+
+        feclearexcept(FE_ALL_EXCEPT);
+
+        print_half_number(i, input);
+#if defined(__arm__)
+        asm("vcvtb.f32.f16 %0, %1" : "=w" (output) : "x" ((uint32_t)input));
+#else
+        asm("fcvt %s0, %h1" : "=w" (output) : "x" (input));
+#endif
+        print_single_number(i, output);
+    }
+}
+
+static void convert_half_to_integer(void)
+{
+    int i;
+
+    printf("Converting half-precision to integer\n");
+
+    for (i = 0; i < ARRAY_SIZE(half_numbers); ++i) {
+        uint16_t input = half_numbers[i];
+        int64_t output;
+
+        feclearexcept(FE_ALL_EXCEPT);
+
+        print_half_number(i, input);
+#if defined(__arm__)
+        /* asm("vcvt.s32.f16 %0, %1" : "=t" (output) : "t" (input)); v8.2*/
+        output = input;
+#else
+        asm("fcvt %s0, %h1" : "=w" (output) : "x" (input));
+#endif
+        print_int64(i, output);
+    }
+}
+
+typedef struct {
+    int flag;
+    char *desc;
+} float_mapping;
+
+float_mapping round_flags[] = {
+    { FE_TONEAREST, "to nearest" },
+    { FE_UPWARD, "upwards" },
+    { FE_DOWNWARD, "downwards" },
+    { FE_TOWARDZERO, "to zero" }
+};
+
+int main(int argc, char *argv[argc])
+{
+    int i;
+
+    printf("#### Enabling IEEE Half Precision\n");
+
+    for (i = 0; i < ARRAY_SIZE(round_flags); ++i) {
+        fesetround(round_flags[i].flag);
+        printf("### Rounding %s\n", round_flags[i].desc);
+        convert_single_to_half();
+        convert_single_to_double();
+        convert_double_to_half();
+        convert_double_to_single();
+        convert_half_to_single();
+        convert_half_to_double();
+    }
+
+    /* convert to integer */
+    convert_single_to_integer();
+    convert_double_to_integer();
+    convert_half_to_integer();
+
+    /* And now with ARM alternative FP16 */
+#if defined(__arm__)
+    /* See glibc sysdeps/arm/fpu_control.h */
+    asm("mrc p10, 7, r1, cr1, cr0, 0\n\t"
+        "orr r1, r1, %[flags]\n\t"
+        "mcr p10, 7, r1, cr1, cr0, 0\n\t"
+        : /* no output */ : [flags] "n" (1 << 26) : "r1" );
+#else
+    asm("mrs x1, fpcr\n\t"
+        "orr x1, x1, %[flags]\n\t"
+        "msr fpcr, x1\n\t"
+        : /* no output */ : [flags] "n" (1 << 26) : "x1" );
+#endif
+
+    printf("#### Enabling ARM Alternative Half Precision\n");
+
+    for (i = 0; i < ARRAY_SIZE(round_flags); ++i) {
+        fesetround(round_flags[i].flag);
+        printf("### Rounding %s\n", round_flags[i].desc);
+        convert_single_to_half();
+        convert_single_to_double();
+        convert_double_to_half();
+        convert_double_to_single();
+        convert_half_to_single();
+        convert_half_to_double();
+    }
+
+    /* convert to integer */
+    convert_single_to_integer();
+    convert_double_to_integer();
+    convert_half_to_integer();
+
+    return 0;
+}
diff --git a/tests/tcg/arm/fcvt.ref b/tests/tcg/arm/fcvt.ref
new file mode 100644
index 0000000000..f052b6d7e5
--- /dev/null
+++ b/tests/tcg/arm/fcvt.ref
@@ -0,0 +1,3268 @@
+#### Enabling IEEE Half Precision
+### Rounding to nearest
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0xff00  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0xfe00  (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x400  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x4170  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4248  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bff  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7bff  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7c00  (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0x7e00  (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0x7f00  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909791e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635273e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289629e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730511e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005935e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015673e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851006e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324219e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635273e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0000  (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0000  (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0000  (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0000  (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0000  (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0000  (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0000  (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0000  (0x1 =>     INVALID)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0000  (0x1 =>     INVALID)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0000  (0x10 =>    INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0000  (0x10 =>    INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x10 =>    INEXACT )
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0000  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x01  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x01  (0x10 =>    INEXACT )
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x10 =>    INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x10 =>    INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x10 =>    INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x01  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x02  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x02  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x03  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0xffdf  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0xffe0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0xffe1  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0xffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0xffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0xffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0xffff  (0 => OK)
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0xffff  (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0xffff  (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0xffff  (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0xffff  (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0000  (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0000  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766476800000000000e+09 / 0x4f730c3a  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962432000000000000e+09 / 0x4f71605d  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638016000000000000e+08 / 0x4e4c0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026624000000000000e+08 / 0x4e4e0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896320000000000000e+08 / 0x4e61ff00  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912704000000000000e+08 / 0x4e620000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675456000000000000e+09 / 0x4e805bf1  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07853004800000000000e+09 / 0x4e809220  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32540006400000000000e+09 / 0x4e9e0000  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -nan / 0xffffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -nan / 0xffdfe000  (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -nan / 0xffc02000  (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -inf / 0xff800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: inf / 0x7f800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: nan / 0x7fc02000  (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: nan / 0x7fdfe000  (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: nan / 0x7fffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: 6.55350000000000000000e+04 / 0x0040efffe000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: 6.47670000000000000000e+04 / 0x0040ef9fe000000000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: 6.45130000000000000000e+04 / 0x0040ef802000000000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: 6.45120000000000000000e+04 / 0x0040ef800000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: 6.45110000000000000000e+04 / 0x0040ef7fe000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: 4.91520000000000000000e+04 / 0x0040e8000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: 4.81280000000000000000e+04 / 0x0040e7800000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: 3.27690000000000000000e+04 / 0x0040e0002000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: 3.27680000000000000000e+04 / 0x0040e0000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.53600000000000000000e+04 / 0x0040ce000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 3.17430000000000000000e+04 / 0x0040deffc000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: 3.17440000000000000000e+04 / 0x0040df000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: 3.17450000000000000000e+04 / 0x0040df004000000000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: 3.19990000000000000000e+04 / 0x0040df3fc000000000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: 3.27670000000000000000e+04 / 0x0040dfffc000000000 (0 => OK)
+### Rounding upwards
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0xff00  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0xfe00  (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x400  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x401  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x4170  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4249  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bff  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7c00  (0x14 => OVERFLOW   INEXACT )
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7c00  (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0x7e00  (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0x7f00  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909790e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635272e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289628e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730511e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005935e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015673e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851006e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324219e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635273e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0000  (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0000  (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0000  (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0000  (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0000  (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0000  (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0000  (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0000  (0x1 =>     INVALID)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0000  (0x1 =>     INVALID)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0000  (0x10 =>    INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0000  (0x10 =>    INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x10 =>    INEXACT )
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015662e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0000  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x01  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x01  (0x10 =>    INEXACT )
+20 DOUBLE: 2.22507385850720138310e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x10 =>    INEXACT )
+21 DOUBLE: 1.37899728486072282844e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x10 =>    INEXACT )
+22 DOUBLE: 1.49147387366816238764e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x10 =>    INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x01  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x02  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x02  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x03  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0xffdf  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0xffe0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0xffe1  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0xffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0xffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0xffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0xffff  (0 => OK)
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0xffff  (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0xffff  (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0xffff  (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0xffff  (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0000  (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0000  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766502400000000000e+09 / 0x4f730c3b  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962457600000000000e+09 / 0x4f71605e  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638080000000000000e+08 / 0x4e4c0001  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015662e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026624000000000000e+08 / 0x4e4e0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896384000000000000e+08 / 0x4e61ff01  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912768000000000000e+08 / 0x4e620001  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138310e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282844e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238764e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675456000000000000e+09 / 0x4e805bf1  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07853004800000000000e+09 / 0x4e809220  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32540006400000000000e+09 / 0x4e9e0000  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -nan / 0xffffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -nan / 0xffdfe000  (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -nan / 0xffc02000  (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -inf / 0xff800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: inf / 0x7f800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: nan / 0x7fc02000  (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: nan / 0x7fdfe000  (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: nan / 0x7fffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: 6.55350000000000000000e+04 / 0x0040efffe000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: 6.47670000000000000000e+04 / 0x0040ef9fe000000000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: 6.45130000000000000000e+04 / 0x0040ef802000000000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: 6.45120000000000000000e+04 / 0x0040ef800000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: 6.45110000000000000000e+04 / 0x0040ef7fe000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: 4.91520000000000000000e+04 / 0x0040e8000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: 4.81280000000000000000e+04 / 0x0040e7800000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: 3.27690000000000000000e+04 / 0x0040e0002000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: 3.27680000000000000000e+04 / 0x0040e0000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.53600000000000000000e+04 / 0x0040ce000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 3.17430000000000000000e+04 / 0x0040deffc000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: 3.17440000000000000000e+04 / 0x0040df000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: 3.17450000000000000000e+04 / 0x0040df004000000000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: 3.19990000000000000000e+04 / 0x0040df3fc000000000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: 3.27670000000000000000e+04 / 0x0040dfffc000000000 (0 => OK)
+### Rounding downwards
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0xff00  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0xfe00  (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xfc00  (0x14 => OVERFLOW   INEXACT )
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730512e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x400  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x416f  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4248  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bfe  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7bff  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7c00  (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0x7e00  (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0x7f00  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909791e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635273e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289629e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730512e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730512e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005934e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015672e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851005e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324218e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635272e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0000  (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0000  (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0000  (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0000  (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0000  (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007530e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0000  (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0000  (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0000  (0x1 =>     INVALID)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0000  (0x1 =>     INVALID)
+10 DOUBLE: -2.22507385850720138310e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0000  (0x10 =>    INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0000  (0x10 =>    INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x10 =>    INEXACT )
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0000  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x01  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x01  (0x10 =>    INEXACT )
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x10 =>    INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x10 =>    INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x10 =>    INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x01  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x02  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x02  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x03  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0xffdf  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0xffe0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0xffe1  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0xffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0xffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0xffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0xffff  (0 => OK)
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0xffff  (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0xffff  (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0xffff  (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0xffff  (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0000  (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0000  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007530e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766476800000000000e+09 / 0x4f730c3a  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962432000000000000e+09 / 0x4f71605d  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138310e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638016000000000000e+08 / 0x4e4c0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026560000000000000e+08 / 0x4e4dffff  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896320000000000000e+08 / 0x4e61ff00  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912704000000000000e+08 / 0x4e620000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675443200000000000e+09 / 0x4e805bf0  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07852992000000000000e+09 / 0x4e80921f  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32539993600000000000e+09 / 0x4e9dffff  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -nan / 0xffffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -nan / 0xffdfe000  (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -nan / 0xffc02000  (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -inf / 0xff800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: inf / 0x7f800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: nan / 0x7fc02000  (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: nan / 0x7fdfe000  (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: nan / 0x7fffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: 6.55350000000000000000e+04 / 0x0040efffe000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: 6.47670000000000000000e+04 / 0x0040ef9fe000000000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: 6.45130000000000000000e+04 / 0x0040ef802000000000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: 6.45120000000000000000e+04 / 0x0040ef800000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: 6.45110000000000000000e+04 / 0x0040ef7fe000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: 4.91520000000000000000e+04 / 0x0040e8000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: 4.81280000000000000000e+04 / 0x0040e7800000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: 3.27690000000000000000e+04 / 0x0040e0002000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: 3.27680000000000000000e+04 / 0x0040e0000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.53600000000000000000e+04 / 0x0040ce000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 3.17430000000000000000e+04 / 0x0040deffc000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: 3.17440000000000000000e+04 / 0x0040df000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: 3.17450000000000000000e+04 / 0x0040df004000000000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: 3.19990000000000000000e+04 / 0x0040df3fc000000000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: 3.27670000000000000000e+04 / 0x0040dfffc000000000 (0 => OK)
+### Rounding to zero
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0xff00  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0xfe00  (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xfbff  (0x14 => OVERFLOW   INEXACT )
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x400  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x416f  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4248  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bfe  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7bff  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7bff  (0x14 => OVERFLOW   INEXACT )
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7c00  (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0x7e00  (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0x7f00  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909790e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635272e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289628e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730511e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005934e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015672e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851005e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324218e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635272e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0000  (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0000  (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0000  (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0000  (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0000  (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0000  (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0000  (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0000  (0x1 =>     INVALID)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0000  (0x1 =>     INVALID)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0000  (0x10 =>    INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0000  (0x10 =>    INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x10 =>    INEXACT )
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0000  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x01  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x01  (0x10 =>    INEXACT )
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x10 =>    INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x10 =>    INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x10 =>    INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x01  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x02  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x02  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x03  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0xffdf  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0xffe0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0xffe1  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0xffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0xffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0xffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0xffff  (0 => OK)
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0xffff  (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0xffff  (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0xffff  (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0xffff  (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0000  (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0000  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766476800000000000e+09 / 0x4f730c3a  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962432000000000000e+09 / 0x4f71605d  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638016000000000000e+08 / 0x4e4c0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026560000000000000e+08 / 0x4e4dffff  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896320000000000000e+08 / 0x4e61ff00  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912704000000000000e+08 / 0x4e620000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675443200000000000e+09 / 0x4e805bf0  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07852992000000000000e+09 / 0x4e80921f  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32539993600000000000e+09 / 0x4e9dffff  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -nan / 0xffffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -nan / 0xffdfe000  (0x1 =>     INVALID)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -nan / 0xffc02000  (0x1 =>     INVALID)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -inf / 0xff800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: inf / 0x7f800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: nan / 0x7fc02000  (0x1 =>     INVALID)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: nan / 0x7fdfe000  (0x1 =>     INVALID)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: nan / 0x7fffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: 6.55350000000000000000e+04 / 0x0040efffe000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: 6.47670000000000000000e+04 / 0x0040ef9fe000000000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: 6.45130000000000000000e+04 / 0x0040ef802000000000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: 6.45120000000000000000e+04 / 0x0040ef800000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: 6.45110000000000000000e+04 / 0x0040ef7fe000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: 4.91520000000000000000e+04 / 0x0040e8000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: 4.81280000000000000000e+04 / 0x0040e7800000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: 3.27690000000000000000e+04 / 0x0040e0002000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: 3.27680000000000000000e+04 / 0x0040e0000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.53600000000000000000e+04 / 0x0040ce000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 3.17430000000000000000e+04 / 0x0040deffc000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: 3.17440000000000000000e+04 / 0x0040df000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: 3.17450000000000000000e+04 / 0x0040df004000000000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: 3.19990000000000000000e+04 / 0x0040df3fc000000000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: 3.27670000000000000000e+04 / 0x0040dfffc000000000 (0 => OK)
+Converting single-precision to integer
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   INT64:                    1/0x000000000000000001 (0x1 =>     INVALID)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   INT64:                    0/00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   INT64:                    2/0x000000000000000002 (0x10 =>    INEXACT )
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   INT64:                    2/0x000000000000000002 (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19   INT64:                    3/0x000000000000000003 (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   INT64:                65503/0x00000000000000ffdf (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   INT64:                65504/0x00000000000000ffe0 (0x10 =>    INEXACT )
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   INT64:                65505/0x00000000000000ffe1 (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   INT64:               131007/0x00000000000001ffbf (0x10 =>    INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   INT64:               131008/0x00000000000001ffc0 (0x10 =>    INEXACT )
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   INT64:               131009/0x00000000000001ffc1 (0x10 =>    INEXACT )
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26   INT64:                   -1/0x00ffffffffffffffff (0x11 =>    INEXACT INVALID)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27   INT64:                   -1/0x00ffffffffffffffff (0x11 =>    INEXACT INVALID)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   INT64:                   -1/0x00ffffffffffffffff (0x1 =>     INVALID)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+Converting double-precision to integer
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   INT64:                    1/0x000000000000000001 (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   INT64:                   -2/0x00fffffffffffffffe (0x10 =>    INEXACT )
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   INT64:                   -1/0x00ffffffffffffffff (0x10 =>    INEXACT )
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   INT64:                    0/00000000000000000000 (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   INT64:                    0/00000000000000000000 (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   INT64:                    0/00000000000000000000 (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   INT64:                    2/0x000000000000000002 (0x10 =>    INEXACT )
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   INT64:                    2/0x000000000000000002 (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26   INT64:                    3/0x000000000000000003 (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   INT64:                65503/0x00000000000000ffdf (0x10 =>    INEXACT )
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   INT64:                65504/0x00000000000000ffe0 (0x10 =>    INEXACT )
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   INT64:                65505/0x00000000000000ffe1 (0x10 =>    INEXACT )
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   INT64:               131007/0x00000000000001ffbf (0x10 =>    INEXACT )
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   INT64:               131008/0x00000000000001ffc0 (0x10 =>    INEXACT )
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   INT64:               131009/0x00000000000001ffc1 (0x10 =>    INEXACT )
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   INT64:           2147483647/0x00000000007fffffff (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34   INT64:                   -1/0x00ffffffffffffffff (0x11 =>    INEXACT INVALID)
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35   INT64:                   -1/0x00ffffffffffffffff (0x11 =>    INEXACT INVALID)
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36   INT64:                   -1/0x00ffffffffffffffff (0x11 =>    INEXACT INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   INT64:                   -1/0x00ffffffffffffffff (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+Converting half-precision to integer
+00   HALF: 0xffff  (0 => OK)
+00   INT64:                65535/0x00000000000000ffff (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01   INT64:                64767/0x00000000000000fcff (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02   INT64:                64513/0x00000000000000fc01 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03   INT64:                64512/0x00000000000000fc00 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04   INT64:                64511/0x00000000000000fbff (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05   INT64:                49152/0x00000000000000c000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06   INT64:                48128/0x00000000000000bc00 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07   INT64:                32769/0x000000000000008001 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08   INT64:                32768/0x000000000000008000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09   INT64:                    0/00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10   INT64:                    1/0x000000000000000001 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11   INT64:                15360/0x000000000000003c00 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12   INT64:                31743/0x000000000000007bff (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13   INT64:                31744/0x000000000000007c00 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14   INT64:                31745/0x000000000000007c01 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15   INT64:                31999/0x000000000000007cff (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16   INT64:                32767/0x000000000000007fff (0 => OK)
+#### Enabling ARM Alternative Half Precision
+### Rounding to nearest
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0x8000  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0x8000  (0x1 =>     INVALID)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xffff  (0x1 =>     INVALID)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xffff  (0x1 =>     INVALID)
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xffff  (0x1 =>     INVALID)
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xffff  (0x1 =>     INVALID)
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x400  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x4170  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4248  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bff  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7bff  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7fff  (0x10 =>    INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7fff  (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7fff  (0x10 =>    INEXACT )
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7fff  (0x1 =>     INVALID)
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7fff  (0x1 =>     INVALID)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7fff  (0x1 =>     INVALID)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0000  (0x1 =>     INVALID)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0000  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909791e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635273e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289629e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730511e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005935e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015673e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851006e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324219e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635273e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0000  (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0000  (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0000  (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0000  (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0000  (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0000  (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0000  (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0000  (0x1 =>     INVALID)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0000  (0x1 =>     INVALID)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0000  (0x10 =>    INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0000  (0x10 =>    INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x10 =>    INEXACT )
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0000  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x01  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x01  (0x10 =>    INEXACT )
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x10 =>    INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x10 =>    INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x10 =>    INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x01  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x02  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x02  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x03  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0xffdf  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0xffe0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0xffe1  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0xffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0xffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0xffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0xffff  (0 => OK)
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0xffff  (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0xffff  (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0xffff  (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0xffff  (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0000  (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0000  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766476800000000000e+09 / 0x4f730c3a  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962432000000000000e+09 / 0x4f71605d  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638016000000000000e+08 / 0x4e4c0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026624000000000000e+08 / 0x4e4e0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896320000000000000e+08 / 0x4e61ff00  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912704000000000000e+08 / 0x4e620000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675456000000000000e+09 / 0x4e805bf1  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07853004800000000000e+09 / 0x4e809220  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32540006400000000000e+09 / 0x4e9e0000  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -1.31008000000000000000e+05 / 0xc7ffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -8.18560000000000000000e+04 / 0xc79fe000  (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -6.56000000000000000000e+04 / 0xc7802000  (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -6.55360000000000000000e+04 / 0xc7800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: 6.55360000000000000000e+04 / 0x47800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: 6.56000000000000000000e+04 / 0x47802000  (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: 8.18560000000000000000e+04 / 0x479fe000  (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: 6.55350000000000000000e+04 / 0x0040efffe000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: 6.47670000000000000000e+04 / 0x0040ef9fe000000000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: 6.45130000000000000000e+04 / 0x0040ef802000000000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: 6.45120000000000000000e+04 / 0x0040ef800000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: 6.45110000000000000000e+04 / 0x0040ef7fe000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: 4.91520000000000000000e+04 / 0x0040e8000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: 4.81280000000000000000e+04 / 0x0040e7800000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: 3.27690000000000000000e+04 / 0x0040e0002000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: 3.27680000000000000000e+04 / 0x0040e0000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.53600000000000000000e+04 / 0x0040ce000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 3.17430000000000000000e+04 / 0x0040deffc000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: 3.17440000000000000000e+04 / 0x0040df000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: 3.17450000000000000000e+04 / 0x0040df004000000000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: 3.19990000000000000000e+04 / 0x0040df3fc000000000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: 3.27670000000000000000e+04 / 0x0040dfffc000000000 (0 => OK)
+### Rounding upwards
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0x8000  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0x8000  (0x1 =>     INVALID)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xffff  (0x1 =>     INVALID)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xffff  (0x1 =>     INVALID)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xffff  (0x1 =>     INVALID)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xffff  (0x1 =>     INVALID)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0x01  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x400  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x401  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x4170  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4249  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bff  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7c00  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7fff  (0x10 =>    INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7fff  (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7fff  (0x1 =>     INVALID)
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7fff  (0x1 =>     INVALID)
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7fff  (0x1 =>     INVALID)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7fff  (0x1 =>     INVALID)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0000  (0x1 =>     INVALID)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0000  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909790e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635272e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289628e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730511e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750797e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005935e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005935e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015673e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015673e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851006e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851006e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324219e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324219e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635273e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635273e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859812e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0000  (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0000  (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0000  (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0000  (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0000  (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0000  (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0000  (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0000  (0x1 =>     INVALID)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0000  (0x1 =>     INVALID)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0000  (0x10 =>    INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0000  (0x10 =>    INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x10 =>    INEXACT )
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015662e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0000  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x01  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x01  (0x10 =>    INEXACT )
+20 DOUBLE: 2.22507385850720138310e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x10 =>    INEXACT )
+21 DOUBLE: 1.37899728486072282844e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x10 =>    INEXACT )
+22 DOUBLE: 1.49147387366816238764e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x10 =>    INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x01  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x02  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x02  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x03  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0xffdf  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0xffe0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0xffe1  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0xffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0xffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0xffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0xffff  (0 => OK)
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0xffff  (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0xffff  (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0xffff  (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0xffff  (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0000  (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0000  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766502400000000000e+09 / 0x4f730c3b  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962457600000000000e+09 / 0x4f71605e  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750797e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013061e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638080000000000000e+08 / 0x4e4c0001  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015662e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026624000000000000e+08 / 0x4e4e0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994299e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896384000000000000e+08 / 0x4e61ff01  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013665e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912768000000000000e+08 / 0x4e620001  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138310e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282844e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238764e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509080e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675456000000000000e+09 / 0x4e805bf1  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311600e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07853004800000000000e+09 / 0x4e809220  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32540006400000000000e+09 / 0x4e9e0000  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859812e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570815e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -1.31008000000000000000e+05 / 0xc7ffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -8.18560000000000000000e+04 / 0xc79fe000  (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -6.56000000000000000000e+04 / 0xc7802000  (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -6.55360000000000000000e+04 / 0xc7800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: 6.55360000000000000000e+04 / 0x47800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: 6.56000000000000000000e+04 / 0x47802000  (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: 8.18560000000000000000e+04 / 0x479fe000  (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: 6.55350000000000000000e+04 / 0x0040efffe000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: 6.47670000000000000000e+04 / 0x0040ef9fe000000000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: 6.45130000000000000000e+04 / 0x0040ef802000000000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: 6.45120000000000000000e+04 / 0x0040ef800000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: 6.45110000000000000000e+04 / 0x0040ef7fe000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: 4.91520000000000000000e+04 / 0x0040e8000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: 4.81280000000000000000e+04 / 0x0040e7800000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: 3.27690000000000000000e+04 / 0x0040e0002000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: 3.27680000000000000000e+04 / 0x0040e0000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.53600000000000000000e+04 / 0x0040ce000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 3.17430000000000000000e+04 / 0x0040deffc000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: 3.17440000000000000000e+04 / 0x0040df000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: 3.17450000000000000000e+04 / 0x0040df004000000000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: 3.19990000000000000000e+04 / 0x0040df3fc000000000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: 3.27670000000000000000e+04 / 0x0040dfffc000000000 (0 => OK)
+### Rounding downwards
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0x8000  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0x8000  (0x1 =>     INVALID)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xffff  (0x1 =>     INVALID)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xffff  (0x1 =>     INVALID)
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xffff  (0x1 =>     INVALID)
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xffff  (0x1 =>     INVALID)
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730512e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8001  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x400  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x416f  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4248  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bfe  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7bff  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7ffe  (0x10 =>    INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7fff  (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7fff  (0x10 =>    INEXACT )
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7fff  (0x1 =>     INVALID)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7fff  (0x1 =>     INVALID)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7fff  (0x1 =>     INVALID)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0000  (0x1 =>     INVALID)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0000  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909791e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635273e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289629e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730512e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730512e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750797e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005934e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015672e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851005e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324218e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635272e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0000  (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0000  (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0000  (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0000  (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0000  (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007530e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0000  (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0000  (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0000  (0x1 =>     INVALID)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0000  (0x1 =>     INVALID)
+10 DOUBLE: -2.22507385850720138310e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0000  (0x10 =>    INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0000  (0x10 =>    INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x10 =>    INEXACT )
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0000  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x01  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x01  (0x10 =>    INEXACT )
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x10 =>    INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x10 =>    INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x10 =>    INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x01  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x02  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x02  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x03  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0xffdf  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0xffe0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0xffe1  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0xffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0xffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0xffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0xffff  (0 => OK)
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0xffff  (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0xffff  (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0xffff  (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0xffff  (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0000  (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0000  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570815e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859812e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007530e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766476800000000000e+09 / 0x4f730c3a  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999085e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962432000000000000e+09 / 0x4f71605d  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138310e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750797e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638016000000000000e+08 / 0x4e4c0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026560000000000000e+08 / 0x4e4dffff  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896320000000000000e+08 / 0x4e61ff00  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912704000000000000e+08 / 0x4e620000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675443200000000000e+09 / 0x4e805bf0  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07852992000000000000e+09 / 0x4e80921f  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32539993600000000000e+09 / 0x4e9dffff  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -1.31008000000000000000e+05 / 0xc7ffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -8.18560000000000000000e+04 / 0xc79fe000  (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -6.56000000000000000000e+04 / 0xc7802000  (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -6.55360000000000000000e+04 / 0xc7800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: 6.55360000000000000000e+04 / 0x47800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: 6.56000000000000000000e+04 / 0x47802000  (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: 8.18560000000000000000e+04 / 0x479fe000  (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: 6.55350000000000000000e+04 / 0x0040efffe000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: 6.47670000000000000000e+04 / 0x0040ef9fe000000000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: 6.45130000000000000000e+04 / 0x0040ef802000000000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: 6.45120000000000000000e+04 / 0x0040ef800000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: 6.45110000000000000000e+04 / 0x0040ef7fe000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: 4.91520000000000000000e+04 / 0x0040e8000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: 4.81280000000000000000e+04 / 0x0040e7800000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: 3.27690000000000000000e+04 / 0x0040e0002000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: 3.27680000000000000000e+04 / 0x0040e0000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.53600000000000000000e+04 / 0x0040ce000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 3.17430000000000000000e+04 / 0x0040deffc000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: 3.17440000000000000000e+04 / 0x0040df000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: 3.17450000000000000000e+04 / 0x0040df004000000000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: 3.19990000000000000000e+04 / 0x0040df3fc000000000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: 3.27670000000000000000e+04 / 0x0040dfffc000000000 (0 => OK)
+### Rounding to zero
+Converting single-precision to half-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   HALF: 0x8000  (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   HALF: 0x8000  (0x1 =>     INVALID)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   HALF: 0xffff  (0x1 =>     INVALID)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03   HALF: 0xffff  (0x1 =>     INVALID)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04   HALF: 0xffff  (0x1 =>     INVALID)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05   HALF: 0xffff  (0x1 =>     INVALID)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08   HALF: 0x8000  (0x18 =>  UNDERFLOW  INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12   HALF: 0000  (0x18 =>  UNDERFLOW  INEXACT )
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13   HALF: 0x3ff  (0x18 =>  UNDERFLOW  INEXACT )
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14   HALF: 0x400  (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   HALF: 0x3c00  (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   HALF: 0x3c01  (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   HALF: 0x4000  (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   HALF: 0x416f  (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19   HALF: 0x4248  (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   HALF: 0x7bfe  (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   HALF: 0x7bff  (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   HALF: 0x7bff  (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   HALF: 0x7ffe  (0x10 =>    INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   HALF: 0x7fff  (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   HALF: 0x7fff  (0x10 =>    INEXACT )
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26   HALF: 0x7fff  (0x1 =>     INVALID)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27   HALF: 0x7fff  (0x1 =>     INVALID)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   HALF: 0x7fff  (0x1 =>     INVALID)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   HALF: 0000  (0x1 =>     INVALID)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   HALF: 0000  (0x1 =>     INVALID)
+Converting single-precision to double-precision
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04 DOUBLE: -1.11100004769645909790e+31 / 0x00c661874b20000000 (0 => OK)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05 DOUBLE: -1.11100003258488635272e+30 / 0x00c62c0bab60000000 (0 => OK)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06 DOUBLE: -1.08700982243137289628e-12 / 0x00bd731f7500000000 (0 => OK)
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07 DOUBLE: -1.78051176151664730511e-20 / 0x00bbd5054440000000 (0 => OK)
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11 DOUBLE: 2.98023223876953125000e-08 / 0x003e60000000000000 (0 => OK)
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12 DOUBLE: 5.96045985901128005934e-08 / 0x003e6ffffe60000000 (0 => OK)
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13 DOUBLE: 6.09755988989491015672e-05 / 0x003f0ff801a0000000 (0 => OK)
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14 DOUBLE: 6.10351999057456851005e-05 / 0x003f100000c0000000 (0 => OK)
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19 DOUBLE: 3.14159274101257324218e+00 / 0x00400921fb60000000 (0 => OK)
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26 DOUBLE: 1.11100003258488635272e+30 / 0x00462c0bab60000000 (0 => OK)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30 DOUBLE: nan / 0x007ffc000000000000 (0x1 =>     INVALID)
+Converting double-precision to half-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   HALF: 0000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   HALF: 0000  (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   HALF: 0000  (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03   HALF: 0000  (0x1 =>     INVALID)
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   HALF: 0000  (0x1 =>     INVALID)
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   HALF: 0000  (0x1 =>     INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   HALF: 0000  (0x1 =>     INVALID)
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   HALF: 0000  (0x1 =>     INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   HALF: 0000  (0x1 =>     INVALID)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   HALF: 0000  (0x1 =>     INVALID)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   HALF: 0000  (0x10 =>    INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11   HALF: 0000  (0x10 =>    INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   HALF: 0000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13   HALF: 0000  (0x10 =>    INEXACT )
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14   HALF: 0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   HALF: 0000  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   HALF: 0000  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   HALF: 0000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   HALF: 0x01  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   HALF: 0x01  (0x10 =>    INEXACT )
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   HALF: 0000  (0x10 =>    INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   HALF: 0000  (0x10 =>    INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   HALF: 0000  (0x10 =>    INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   HALF: 0x01  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   HALF: 0x02  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   HALF: 0x02  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26   HALF: 0x03  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   HALF: 0xffdf  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   HALF: 0xffe0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   HALF: 0xffe1  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   HALF: 0xffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   HALF: 0xffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   HALF: 0xffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   HALF: 0xffff  (0 => OK)
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34   HALF: 0xffff  (0x1 =>     INVALID)
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35   HALF: 0xffff  (0x1 =>     INVALID)
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36   HALF: 0xffff  (0x1 =>     INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   HALF: 0xffff  (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   HALF: 0000  (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   HALF: 0000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   HALF: 0000  (0x1 =>     INVALID)
+Converting double-precision to single-precision
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01 SINGLE: 4.29077299200000000000e+09 / 0x4f7fc000  (0 => OK)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02 SINGLE: 4.28657868800000000000e+09 / 0x4f7f8000  (0 => OK)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x14 => OVERFLOW   INEXACT )
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05 SINGLE: 4.28657843200000000000e+09 / 0x4f7f7fff  (0x10 =>    INEXACT )
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06 SINGLE: 4.07766476800000000000e+09 / 0x4f730c3a  (0x10 =>    INEXACT )
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07 SINGLE: 4.04962432000000000000e+09 / 0x4f71605d  (0x10 =>    INEXACT )
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08 SINGLE: 3.22122547200000000000e+09 / 0x4f400000  (0 => OK)
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09 SINGLE: 3.21283686400000000000e+09 / 0x4f3f8000  (0 => OK)
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10 SINGLE: 2.14748364800000000000e+09 / 0x4f000000  (0x18 =>  UNDERFLOW  INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11 SINGLE: 2.15587225600000000000e+09 / 0x4f008000  (0 => OK)
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13 SINGLE: 8.38860800000000000000e+06 / 0x4b000000  (0 => OK)
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14 SINGLE: 8.55638016000000000000e+08 / 0x4e4c0000  (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15 SINGLE: 8.64026560000000000000e+08 / 0x4e4dffff  (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16 SINGLE: 9.47896320000000000000e+08 / 0x4e61ff00  (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17 SINGLE: 9.47912704000000000000e+08 / 0x4e620000  (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19 SINGLE: 1.06536140800000000000e+09 / 0x4e7e0080  (0 => OK)
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23 SINGLE: 1.06535321600000000000e+09 / 0x4e7e0000  (0 => OK)
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24 SINGLE: 1.07374182400000000000e+09 / 0x4e800000  (0 => OK)
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25 SINGLE: 1.07675443200000000000e+09 / 0x4e805bf0  (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26 SINGLE: 1.07852992000000000000e+09 / 0x4e80921f  (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27 SINGLE: 1.19956249600000000000e+09 / 0x4e8effbe  (0 => OK)
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28 SINGLE: 1.19956275200000000000e+09 / 0x4e8effc0  (0 => OK)
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29 SINGLE: 1.19956300800000000000e+09 / 0x4e8effc2  (0 => OK)
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30 SINGLE: 1.20795123200000000000e+09 / 0x4e8fffbf  (0 => OK)
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31 SINGLE: 1.20795136000000000000e+09 / 0x4e8fffc0  (0 => OK)
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32 SINGLE: 1.20795148800000000000e+09 / 0x4e8fffc1  (0 => OK)
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33 SINGLE: 1.32539993600000000000e+09 / 0x4e9dffff  (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x10 =>    INEXACT )
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36 SINGLE: 2.13909491200000000000e+09 / 0x4efeffff  (0x14 => OVERFLOW   INEXACT )
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37 SINGLE: 2.13909504000000000000e+09 / 0x4eff0000  (0 => OK)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0 => OK)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39 SINGLE: 2.14328934400000000000e+09 / 0x4eff8000  (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40 SINGLE: 2.14538649600000000000e+09 / 0x4effc000  (0x1 =>     INVALID)
+Converting half-precision to single-precision
+00   HALF: 0xffff  (0 => OK)
+00 SINGLE: -1.31008000000000000000e+05 / 0xc7ffe000  (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 SINGLE: -8.18560000000000000000e+04 / 0xc79fe000  (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 SINGLE: -6.56000000000000000000e+04 / 0xc7802000  (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 SINGLE: -6.55360000000000000000e+04 / 0xc7800000  (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 SINGLE: -6.55040000000000000000e+04 / 0xc77fe000  (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 SINGLE: -2.00000000000000000000e+00 / 0xc0000000  (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 SINGLE: -1.00000000000000000000e+00 / 0xbf800000  (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 SINGLE: -5.96046447753906250000e-08 / 0xb3800000  (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 SINGLE: -0.00000000000000000000e+00 / 0x80000000  (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 SINGLE: 5.96046447753906250000e-08 / 0x33800000  (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 SINGLE: 6.55360000000000000000e+04 / 0x47800000  (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 SINGLE: 6.56000000000000000000e+04 / 0x47802000  (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 SINGLE: 8.18560000000000000000e+04 / 0x479fe000  (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+Converting half-precision to double-precision
+00   HALF: 0xffff  (0 => OK)
+00 DOUBLE: 6.55350000000000000000e+04 / 0x0040efffe000000000 (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01 DOUBLE: 6.47670000000000000000e+04 / 0x0040ef9fe000000000 (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02 DOUBLE: 6.45130000000000000000e+04 / 0x0040ef802000000000 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03 DOUBLE: 6.45120000000000000000e+04 / 0x0040ef800000000000 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04 DOUBLE: 6.45110000000000000000e+04 / 0x0040ef7fe000000000 (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05 DOUBLE: 4.91520000000000000000e+04 / 0x0040e8000000000000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06 DOUBLE: 4.81280000000000000000e+04 / 0x0040e7800000000000 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07 DOUBLE: 3.27690000000000000000e+04 / 0x0040e0002000000000 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08 DOUBLE: 3.27680000000000000000e+04 / 0x0040e0000000000000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11 DOUBLE: 1.53600000000000000000e+04 / 0x0040ce000000000000 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12 DOUBLE: 3.17430000000000000000e+04 / 0x0040deffc000000000 (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13 DOUBLE: 3.17440000000000000000e+04 / 0x0040df000000000000 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14 DOUBLE: 3.17450000000000000000e+04 / 0x0040df004000000000 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15 DOUBLE: 3.19990000000000000000e+04 / 0x0040df3fc000000000 (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16 DOUBLE: 3.27670000000000000000e+04 / 0x0040dfffc000000000 (0 => OK)
+Converting single-precision to integer
+00 SINGLE: -nan / 0xffa00000  (0 => OK)
+00   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+01 SINGLE: -nan / 0xffc00000  (0 => OK)
+01   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+02 SINGLE: -inf / 0xff800000  (0 => OK)
+02   INT64:                    1/0x000000000000000001 (0x1 =>     INVALID)
+03 SINGLE: -3.40282346638528859811e+38 / 0xff7fffff  (0 => OK)
+03   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+04 SINGLE: -1.11100004769645909790e+31 / 0xf30c3a59  (0 => OK)
+04   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+05 SINGLE: -1.11100003258488635272e+30 / 0xf1605d5b  (0 => OK)
+05   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+06 SINGLE: -1.08700982243137289628e-12 / 0xab98fba8  (0 => OK)
+06   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22  (0 => OK)
+07   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+08 SINGLE: -1.17549435082228750796e-38 / 0x80800000  (0 => OK)
+08   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+09 SINGLE: 0.00000000000000000000e+00 / 0000000000  (0 => OK)
+09   INT64:                    0/00000000000000000000 (0 => OK)
+10 SINGLE: 1.17549435082228750796e-38 / 0x00800000  (0 => OK)
+10   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+11 SINGLE: 2.98023223876953125000e-08 / 0x33000000  (0 => OK)
+11   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+12 SINGLE: 5.96045985901128005934e-08 / 0x337ffff3  (0 => OK)
+12   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+13 SINGLE: 6.09755988989491015672e-05 / 0x387fc00d  (0 => OK)
+13   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+14 SINGLE: 6.10351999057456851005e-05 / 0x38800006  (0 => OK)
+14   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+15 SINGLE: 1.00000000000000000000e+00 / 0x3f800000  (0 => OK)
+15   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+16 SINGLE: 1.00097656250000000000e+00 / 0x3f802000  (0 => OK)
+16   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+17 SINGLE: 2.00000000000000000000e+00 / 0x40000000  (0 => OK)
+17   INT64:                    2/0x000000000000000002 (0x10 =>    INEXACT )
+18 SINGLE: 2.71828174591064453125e+00 / 0x402df854  (0 => OK)
+18   INT64:                    2/0x000000000000000002 (0x10 =>    INEXACT )
+19 SINGLE: 3.14159274101257324218e+00 / 0x40490fdb  (0 => OK)
+19   INT64:                    3/0x000000000000000003 (0x10 =>    INEXACT )
+20 SINGLE: 6.55030000000000000000e+04 / 0x477fdf00  (0 => OK)
+20   INT64:                65503/0x00000000000000ffdf (0x10 =>    INEXACT )
+21 SINGLE: 6.55040000000000000000e+04 / 0x477fe000  (0 => OK)
+21   INT64:                65504/0x00000000000000ffe0 (0x10 =>    INEXACT )
+22 SINGLE: 6.55050000000000000000e+04 / 0x477fe100  (0 => OK)
+22   INT64:                65505/0x00000000000000ffe1 (0x10 =>    INEXACT )
+23 SINGLE: 1.31007000000000000000e+05 / 0x47ffdf80  (0 => OK)
+23   INT64:               131007/0x00000000000001ffbf (0x10 =>    INEXACT )
+24 SINGLE: 1.31008000000000000000e+05 / 0x47ffe000  (0 => OK)
+24   INT64:               131008/0x00000000000001ffc0 (0x10 =>    INEXACT )
+25 SINGLE: 1.31009000000000000000e+05 / 0x47ffe080  (0 => OK)
+25   INT64:               131009/0x00000000000001ffc1 (0x10 =>    INEXACT )
+26 SINGLE: 1.11100003258488635272e+30 / 0x71605d5b  (0 => OK)
+26   INT64:                   -1/0x00ffffffffffffffff (0x11 =>    INEXACT INVALID)
+27 SINGLE: 3.40282346638528859811e+38 / 0x7f7fffff  (0 => OK)
+27   INT64:                   -1/0x00ffffffffffffffff (0x11 =>    INEXACT INVALID)
+28 SINGLE: inf / 0x7f800000  (0 => OK)
+28   INT64:                   -1/0x00ffffffffffffffff (0x1 =>     INVALID)
+29 SINGLE: nan / 0x7fc00000  (0 => OK)
+29   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+30 SINGLE: nan / 0x7fa00000  (0 => OK)
+30   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+Converting double-precision to integer
+00 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+00   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
+01   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+02 DOUBLE: -inf / 0x00fff0000000000000 (0 => OK)
+02   INT64:                    1/0x000000000000000001 (0x1 =>     INVALID)
+03 DOUBLE: -1.79769313486231570814e+308 / 0x00ffefffffffffffff (0 => OK)
+03   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+04 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+04   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+05 DOUBLE: -3.40282346638528859811e+38 / 0x00c7efffffe0000000 (0 => OK)
+05   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+06 DOUBLE: -1.11100000000000007529e+31 / 0x00c661874b135ff654 (0 => OK)
+06   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+07 DOUBLE: -1.11099999999999999084e+30 / 0x00c62c0bab523323b9 (0 => OK)
+07   INT64:                    1/0x000000000000000001 (0x11 =>    INEXACT INVALID)
+08 DOUBLE: -2.00000000000000000000e+00 / 0x00c000000000000000 (0 => OK)
+08   INT64:                   -2/0x00fffffffffffffffe (0x10 =>    INEXACT )
+09 DOUBLE: -1.00000000000000000000e+00 / 0x00bff0000000000000 (0 => OK)
+09   INT64:                   -1/0x00ffffffffffffffff (0x10 =>    INEXACT )
+10 DOUBLE: -2.22507385850720138309e-308 / 0x008010000000000000 (0 => OK)
+10   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+11 DOUBLE: -1.17549435082228750796e-38 / 0x00b810000000000000 (0 => OK)
+11   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+12 DOUBLE: 0.00000000000000000000e+00 / 00000000000000000000 (0 => OK)
+12   INT64:                    0/00000000000000000000 (0 => OK)
+13 DOUBLE: 1.17549435082228750796e-38 / 0x003810000000000000 (0 => OK)
+13   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+14 DOUBLE: 2.98023224000000013060e-08 / 0x003e600000001c5f68 (0 => OK)
+14   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+15 DOUBLE: 5.96046000000000015661e-08 / 0x003e6ffffe6cb2fa82 (0 => OK)
+15   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+16 DOUBLE: 6.09755999999999994298e-05 / 0x003f0ff801a9af58a1 (0 => OK)
+16   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+17 DOUBLE: 6.10352000000000013664e-05 / 0x003f100000c06a1ef5 (0 => OK)
+17   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+18   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+19 DOUBLE: 1.00097656250000000000e+00 / 0x003ff0040000000000 (0 => OK)
+19   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+20 DOUBLE: 2.22507385850720138309e-308 / 0x000010000000000000 (0 => OK)
+20   INT64:                    0/00000000000000000000 (0x10 =>    INEXACT )
+21 DOUBLE: 1.37899728486072282843e-308 / 0x000009ea82a2287680 (0 => OK)
+21   INT64:                    0/00000000000000000000 (0x18 =>  UNDERFLOW  INEXACT )
+22 DOUBLE: 1.49147387366816238763e-308 / 0x00000ab98fba843210 (0 => OK)
+22   INT64:                    0/00000000000000000000 (0x18 =>  UNDERFLOW  INEXACT )
+23 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
+23   INT64:                    1/0x000000000000000001 (0x10 =>    INEXACT )
+24 DOUBLE: 2.00000000000000000000e+00 / 0x004000000000000000 (0 => OK)
+24   INT64:                    2/0x000000000000000002 (0x10 =>    INEXACT )
+25 DOUBLE: 2.71828182845904509079e+00 / 0x004005bf0a8b145769 (0 => OK)
+25   INT64:                    2/0x000000000000000002 (0x10 =>    INEXACT )
+26 DOUBLE: 3.14159265358979311599e+00 / 0x00400921fb54442d18 (0 => OK)
+26   INT64:                    3/0x000000000000000003 (0x10 =>    INEXACT )
+27 DOUBLE: 6.55030000000000000000e+04 / 0x0040effbe000000000 (0 => OK)
+27   INT64:                65503/0x00000000000000ffdf (0x10 =>    INEXACT )
+28 DOUBLE: 6.55040000000000000000e+04 / 0x0040effc0000000000 (0 => OK)
+28   INT64:                65504/0x00000000000000ffe0 (0x10 =>    INEXACT )
+29 DOUBLE: 6.55050000000000000000e+04 / 0x0040effc2000000000 (0 => OK)
+29   INT64:                65505/0x00000000000000ffe1 (0x10 =>    INEXACT )
+30 DOUBLE: 1.31007000000000000000e+05 / 0x0040fffbf000000000 (0 => OK)
+30   INT64:               131007/0x00000000000001ffbf (0x10 =>    INEXACT )
+31 DOUBLE: 1.31008000000000000000e+05 / 0x0040fffc0000000000 (0 => OK)
+31   INT64:               131008/0x00000000000001ffc0 (0x10 =>    INEXACT )
+32 DOUBLE: 1.31009000000000000000e+05 / 0x0040fffc1000000000 (0 => OK)
+32   INT64:               131009/0x00000000000001ffc1 (0x10 =>    INEXACT )
+33 DOUBLE: 2.14748364700000000000e+09 / 0x0041dfffffffc00000 (0 => OK)
+33   INT64:           2147483647/0x00000000007fffffff (0x10 =>    INEXACT )
+34 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+34   INT64:                   -1/0x00ffffffffffffffff (0x11 =>    INEXACT INVALID)
+35 DOUBLE: 3.40282346638528859811e+38 / 0x0047efffffe0000000 (0 => OK)
+35   INT64:                   -1/0x00ffffffffffffffff (0x11 =>    INEXACT INVALID)
+36 DOUBLE: 1.79769313486231570814e+308 / 0x007fefffffffffffff (0 => OK)
+36   INT64:                   -1/0x00ffffffffffffffff (0x11 =>    INEXACT INVALID)
+37 DOUBLE: inf / 0x007ff0000000000000 (0 => OK)
+37   INT64:                   -1/0x00ffffffffffffffff (0x1 =>     INVALID)
+38 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
+38   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+39 DOUBLE: nan / 0x007ff0000000000001 (0 => OK)
+39   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+40 DOUBLE: nan / 0x007ff4000000000000 (0 => OK)
+40   INT64:                    0/00000000000000000000 (0x1 =>     INVALID)
+Converting half-precision to integer
+00   HALF: 0xffff  (0 => OK)
+00   INT64:                65535/0x00000000000000ffff (0 => OK)
+01   HALF: 0xfcff  (0 => OK)
+01   INT64:                64767/0x00000000000000fcff (0 => OK)
+02   HALF: 0xfc01  (0 => OK)
+02   INT64:                64513/0x00000000000000fc01 (0 => OK)
+03   HALF: 0xfc00  (0 => OK)
+03   INT64:                64512/0x00000000000000fc00 (0 => OK)
+04   HALF: 0xfbff  (0 => OK)
+04   INT64:                64511/0x00000000000000fbff (0 => OK)
+05   HALF: 0xc000  (0 => OK)
+05   INT64:                49152/0x00000000000000c000 (0 => OK)
+06   HALF: 0xbc00  (0 => OK)
+06   INT64:                48128/0x00000000000000bc00 (0 => OK)
+07   HALF: 0x8001  (0 => OK)
+07   INT64:                32769/0x000000000000008001 (0 => OK)
+08   HALF: 0x8000  (0 => OK)
+08   INT64:                32768/0x000000000000008000 (0 => OK)
+09   HALF: 0000  (0 => OK)
+09   INT64:                    0/00000000000000000000 (0 => OK)
+10   HALF: 0x01  (0 => OK)
+10   INT64:                    1/0x000000000000000001 (0 => OK)
+11   HALF: 0x3c00  (0 => OK)
+11   INT64:                15360/0x000000000000003c00 (0 => OK)
+12   HALF: 0x7bff  (0 => OK)
+12   INT64:                31743/0x000000000000007bff (0 => OK)
+13   HALF: 0x7c00  (0 => OK)
+13   INT64:                31744/0x000000000000007c00 (0 => OK)
+14   HALF: 0x7c01  (0 => OK)
+14   INT64:                31745/0x000000000000007c01 (0 => OK)
+15   HALF: 0x7cff  (0 => OK)
+15   INT64:                31999/0x000000000000007cff (0 => OK)
+16   HALF: 0x7fff  (0 => OK)
+16   INT64:                32767/0x000000000000007fff (0 => OK)
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 33/49] tests/tcg: move MIPS specific tests into subdir
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (31 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 32/49] tests/tcg/arm: add fcvt test cases for AArch32/64 Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 34/49] tests/tcg: enable building for MIPS Alex Bennée
                   ` (15 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Yongbok Kim

These only need to be built for MIPS guests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 tests/tcg/README                  | 11 -----------
 tests/tcg/mips/README             |  7 +++++++
 tests/tcg/{ => mips}/hello-mips.c |  0
 3 files changed, 7 insertions(+), 11 deletions(-)
 create mode 100644 tests/tcg/mips/README
 rename tests/tcg/{ => mips}/hello-mips.c (100%)

diff --git a/tests/tcg/README b/tests/tcg/README
index 625f2326e6..a5643d33e7 100644
--- a/tests/tcg/README
+++ b/tests/tcg/README
@@ -3,17 +3,6 @@ regression testing. Tests are either multi-arch, meaning they can be
 built for all guest architectures that support linux-user executable,
 or they are architecture specific.
 
-
-
-MIPS
-====
-
-hello-mips
-----------
-
-hello-mipsel
-------------
-
 CRIS
 ====
 The testsuite for CRIS is in tests/tcg/cris.  You can run it
diff --git a/tests/tcg/mips/README b/tests/tcg/mips/README
new file mode 100644
index 0000000000..e5bbc58ec5
--- /dev/null
+++ b/tests/tcg/mips/README
@@ -0,0 +1,7 @@
+MIPS
+====
+
+hello-mips
+----------
+
+A very simple inline assembly, write syscall based hello world
diff --git a/tests/tcg/hello-mips.c b/tests/tcg/mips/hello-mips.c
similarity index 100%
rename from tests/tcg/hello-mips.c
rename to tests/tcg/mips/hello-mips.c
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 34/49] tests/tcg: enable building for MIPS
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (32 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 33/49] tests/tcg: move MIPS specific tests into subdir Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-18 14:49   ` Philippe Mathieu-Daudé
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 35/49] tests/tcg/mips: include common mips hello-mips Alex Bennée
                   ` (14 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Yongbok Kim

This doesn't add any additional tests but enables building the
multiarch tests for MIPS using docker cross compilers. We don't have a
cross compiler for mips64 big endian though.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/mips/Makefile.include | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 tests/tcg/mips/Makefile.include

diff --git a/tests/tcg/mips/Makefile.include b/tests/tcg/mips/Makefile.include
new file mode 100644
index 0000000000..a9beceb623
--- /dev/null
+++ b/tests/tcg/mips/Makefile.include
@@ -0,0 +1,17 @@
+#
+# Makefile.include for all MIPs targets
+#
+# As Debian doesn't support mip64 in big endian mode the only way to
+# build BE is to pass a working cross compiler to ./configure
+#
+
+ifeq ($(TARGET_NAME),mips64el)
+DOCKER_IMAGE=debian-mips64el-cross
+DOCKER_CROSS_COMPILER=mips64el-linux-gnuabi64-gcc
+else ifeq ($(TARGET_NAME),mipsel)
+DOCKER_IMAGE=debian-mipsel-cross
+DOCKER_CROSS_COMPILER=mipsel-linux-gnu-gcc
+else ifeq ($(TARGET_NAME),mips)
+DOCKER_IMAGE=debian-mips-cross
+DOCKER_CROSS_COMPILER=mips-linux-gnu-gcc
+endif
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 35/49] tests/tcg/mips: include common mips hello-mips
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (33 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 34/49] tests/tcg: enable building for MIPS Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-18 14:49   ` Philippe Mathieu-Daudé
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 36/49] tests/tcg: enable building for s390x Alex Bennée
                   ` (13 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Yongbok Kim

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/mips/Makefile.target | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 tests/tcg/mips/Makefile.target

diff --git a/tests/tcg/mips/Makefile.target b/tests/tcg/mips/Makefile.target
new file mode 100644
index 0000000000..71f0c2dd53
--- /dev/null
+++ b/tests/tcg/mips/Makefile.target
@@ -0,0 +1,19 @@
+# -*- Mode: makefile -*-
+#
+# MIPS - included from tests/tcg/Makefile.target
+#
+
+MIPS_SRC=$(SRC_PATH)/tests/tcg/mips
+
+# Set search path for all sources
+VPATH 		+= $(MIPS_SRC)
+
+MIPS_TESTS=hello-mips
+
+TESTS += $(MIPS_TESTS)
+
+hello-mips: CFLAGS+=-ffreestanding
+hello-mips: LDFLAGS+=-nostdlib
+
+# For MIPS32 and 64 we have a bunch of extra tests in sub-directories
+# however they are intended for system tests.
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 36/49] tests/tcg: enable building for s390x
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (34 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 35/49] tests/tcg/mips: include common mips hello-mips Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-18 12:04   ` [Qemu-devel] [qemu-s390x] " David Hildenbrand
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 37/49] tests/tcg: enable building for ppc64 Alex Bennée
                   ` (12 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Cornelia Huck, open list:S390

This doesn't add any additional tests but enables building the
multiarch tests for s390x.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 tests/tcg/s390x/Makefile.include | 2 ++
 1 file changed, 2 insertions(+)
 create mode 100644 tests/tcg/s390x/Makefile.include

diff --git a/tests/tcg/s390x/Makefile.include b/tests/tcg/s390x/Makefile.include
new file mode 100644
index 0000000000..1f58115d96
--- /dev/null
+++ b/tests/tcg/s390x/Makefile.include
@@ -0,0 +1,2 @@
+DOCKER_IMAGE=debian-s390x-cross
+DOCKER_CROSS_COMPILER=s390x-linux-gnu-gcc
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 37/49] tests/tcg: enable building for ppc64
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (35 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 36/49] tests/tcg: enable building for s390x Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 38/49] tests/tcg: enable building for Alpha Alex Bennée
                   ` (11 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

Currently this just enables building the multiarch tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 tests/tcg/ppc64le/Makefile.include | 2 ++
 1 file changed, 2 insertions(+)
 create mode 100644 tests/tcg/ppc64le/Makefile.include

diff --git a/tests/tcg/ppc64le/Makefile.include b/tests/tcg/ppc64le/Makefile.include
new file mode 100644
index 0000000000..d71cfc9aa7
--- /dev/null
+++ b/tests/tcg/ppc64le/Makefile.include
@@ -0,0 +1,2 @@
+DOCKER_IMAGE=debian-ppc64el-cross
+DOCKER_CROSS_COMPILER=powerpc64le-linux-gnu-gcc
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 38/49] tests/tcg: enable building for Alpha
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (36 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 37/49] tests/tcg: enable building for ppc64 Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-18 14:21   ` Philippe Mathieu-Daudé
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 39/49] tests/tcg/alpha: add Alpha specific tests Alex Bennée
                   ` (10 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Richard Henderson

We can't use our normal Debian based compilers as Alpha isn't an
officially supported architecture. However it is available as a port
and fortunately cross compilers for all these targets are included in
Debian Sid, the perpetual rolling/unstable/testing version of Debian.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/docker/Makefile.include                 |  1 +
 .../dockerfiles/debian-alpha-cross.docker     | 12 +++++++
 .../dockerfiles/debian-cross-build.docker     | 36 +++++++++++++++++++
 tests/docker/dockerfiles/debian-sid.docker    | 23 ++++++++++++
 tests/tcg/alpha/Makefile.include              |  2 ++
 5 files changed, 74 insertions(+)
 create mode 100644 tests/docker/dockerfiles/debian-alpha-cross.docker
 create mode 100644 tests/docker/dockerfiles/debian-cross-build.docker
 create mode 100644 tests/docker/dockerfiles/debian-sid.docker
 create mode 100644 tests/tcg/alpha/Makefile.include

diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
index 6a5aa9ec71..bcf44e80c4 100644
--- a/tests/docker/Makefile.include
+++ b/tests/docker/Makefile.include
@@ -62,6 +62,7 @@ docker-image-debian-ppc64el-cross: docker-image-debian9
 docker-image-debian-s390x-cross: docker-image-debian9
 docker-image-debian-win32-cross: docker-image-debian8-mxe
 docker-image-debian-win64-cross: docker-image-debian8-mxe
+docker-image-debian-alpha-cross: docker-image-debian-sid
 docker-image-travis: NOUSER=1
 
 # Expand all the pre-requistes for each docker image and test combination
diff --git a/tests/docker/dockerfiles/debian-alpha-cross.docker b/tests/docker/dockerfiles/debian-alpha-cross.docker
new file mode 100644
index 0000000000..e446f7af3f
--- /dev/null
+++ b/tests/docker/dockerfiles/debian-alpha-cross.docker
@@ -0,0 +1,12 @@
+#
+# Docker cross-compiler target
+#
+# This docker target builds on the debian sid base image which
+# contains cross compilers for Debian "ports" targets.
+#
+FROM qemu:debian-sid
+
+RUN DEBIAN_FRONTEND=noninteractive eatmydata \
+    apt-get install -y --no-install-recommends \
+        gcc-alpha-linux-gnu \
+        libc6.1-dev-alpha-cross
diff --git a/tests/docker/dockerfiles/debian-cross-build.docker b/tests/docker/dockerfiles/debian-cross-build.docker
new file mode 100644
index 0000000000..c3611a7d3a
--- /dev/null
+++ b/tests/docker/dockerfiles/debian-cross-build.docker
@@ -0,0 +1,36 @@
+#
+# Docker multiarch cross-compiler target
+#
+# This docker target is builds on Debian cross compiler targets to build distro
+# with a selection of cross compilers for building test binaries.
+#
+# On its own you can't build much but the docker-foo-cross targets
+# build on top of the base debian image.
+#
+FROM debian:stretch
+
+# Duplicate deb line as deb-src
+RUN cat /etc/apt/sources.list | sed "s/^deb\ /deb-src /" >> /etc/apt/sources.list
+
+# Install common build utilities
+RUN apt update
+RUN DEBIAN_FRONTEND=noninteractive apt install -yy eatmydata
+RUN DEBIAN_FRONTEND=noninteractive eatmydata \
+    apt install -y --no-install-recommends \
+        bison \
+        build-essential \
+        ca-certificates \
+        flex \
+        gettext \
+        git \
+        libgmp-dev \
+        libmpfr-dev \
+        libmpc-dev \
+        pkg-config \
+        psmisc \
+        python \
+        texinfo \
+        wget \
+        $(apt-get -s build-dep binutils | egrep ^Inst | cut -d\  -f2) \
+        $(apt-get -s build-dep gcc | egrep ^Inst | cut -d\  -f2) \
+        $(apt-get -s build-dep glibc | egrep ^Inst | cut -d\  -f2)
diff --git a/tests/docker/dockerfiles/debian-sid.docker b/tests/docker/dockerfiles/debian-sid.docker
new file mode 100644
index 0000000000..adeb7134ca
--- /dev/null
+++ b/tests/docker/dockerfiles/debian-sid.docker
@@ -0,0 +1,23 @@
+#
+# A number of our guests exist as ports only. We can either use the ports repo or get everything from SID
+#
+
+FROM debian:sid-slim
+
+# Duplicate deb line as deb-src
+RUN cat /etc/apt/sources.list | sed "s/^deb\ /deb-src /" >> /etc/apt/sources.list
+
+# Install common build utilities
+RUN apt update
+RUN DEBIAN_FRONTEND=noninteractive apt install -yy eatmydata
+RUN DEBIAN_FRONTEND=noninteractive eatmydata \
+    apt install -y --no-install-recommends \
+        bison \
+        build-essential \
+        ca-certificates \
+        flex \
+        git \
+        pkg-config \
+        psmisc \
+        python \
+        texinfo
diff --git a/tests/tcg/alpha/Makefile.include b/tests/tcg/alpha/Makefile.include
new file mode 100644
index 0000000000..c7dc48eadb
--- /dev/null
+++ b/tests/tcg/alpha/Makefile.include
@@ -0,0 +1,2 @@
+DOCKER_IMAGE=debian-alpha-cross
+DOCKER_CROSS_COMPILER=alpha-linux-gnu-gcc
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 39/49] tests/tcg/alpha: add Alpha specific tests
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (37 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 38/49] tests/tcg: enable building for Alpha Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-17 20:41   ` Richard Henderson
  2018-05-18 14:25   ` Philippe Mathieu-Daudé
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 40/49] tests/tcg: enable building for HPPA Alex Bennée
                   ` (9 subsequent siblings)
  48 siblings, 2 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Richard Henderson

These tests did use their own crt.o stub however that is a little
stone age so we drop crt.S and just statically link to the cross
compilers libraries.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
v4
  - drop crt.s
  - drop skipping of threadtest
  - drop write() hack, include unistd.h
---
 tests/tcg/alpha/Makefile        | 35 ---------------------------------
 tests/tcg/alpha/Makefile.target | 15 ++++++++++++++
 tests/tcg/alpha/crt.s           | 26 ------------------------
 tests/tcg/alpha/hello-alpha.c   |  2 ++
 tests/tcg/alpha/test-cond.c     |  1 +
 tests/tcg/alpha/test-ovf.c      |  2 ++
 6 files changed, 20 insertions(+), 61 deletions(-)
 delete mode 100644 tests/tcg/alpha/Makefile
 create mode 100644 tests/tcg/alpha/Makefile.target
 delete mode 100644 tests/tcg/alpha/crt.s

diff --git a/tests/tcg/alpha/Makefile b/tests/tcg/alpha/Makefile
deleted file mode 100644
index 2b1f03d048..0000000000
--- a/tests/tcg/alpha/Makefile
+++ /dev/null
@@ -1,35 +0,0 @@
-CROSS=alpha-linux-gnu-
-CC=$(CROSS)gcc
-AS=$(CROSS)as
-
-SIM=../../alpha-linux-user/qemu-alpha
-
-CFLAGS=-O
-LINK=$(CC) -o $@ crt.o $< -nostdlib
-
-TESTS=test-cond test-cmov
-
-all: hello-alpha $(TESTS)
-
-hello-alpha: hello-alpha.o crt.o
-	$(LINK)
-
-test-cond: test-cond.o crt.o
-	$(LINK)
-
-test-cmov.o: test-cond.c
-	$(CC) -c $(CFLAGS) -DTEST_CMOV -o $@ $<
-
-test-cmov: test-cmov.o crt.o
-	$(LINK)
-
-test-ovf: test-ovf.o crt.o
-	$(LINK)
-
-check: $(TESTS)
-	for f in $(TESTS); do $(SIM) $$f || exit 1; done
-
-clean:
-	$(RM) *.o *~ hello-alpha $(TESTS)
-
-.PHONY: clean all check
diff --git a/tests/tcg/alpha/Makefile.target b/tests/tcg/alpha/Makefile.target
new file mode 100644
index 0000000000..b253cee1fc
--- /dev/null
+++ b/tests/tcg/alpha/Makefile.target
@@ -0,0 +1,15 @@
+# -*- Mode: makefile -*-
+#
+# Alpha specific tweaks
+
+ALPHA_SRC=$(SRC_PATH)/tests/tcg/alpha
+VPATH+=$(ALPHA_SRC)
+
+ALPHA_TESTS=hello-alpha test-cond test-cmov test-ovf
+TESTS+=$(ALPHA_TESTS)
+
+test-cmov: EXTRA_CFLAGS=-DTEST_CMOV
+test-cmov: test-cond.c
+	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
+
+run-test-cmov: test-cmov
diff --git a/tests/tcg/alpha/crt.s b/tests/tcg/alpha/crt.s
deleted file mode 100644
index 31af8825bc..0000000000
--- a/tests/tcg/alpha/crt.s
+++ /dev/null
@@ -1,26 +0,0 @@
-	.text
-
-	.globl _start
-	.ent _start,0
-_start:
-	.frame $15,0,$15
-	br $29,1f
-1:	ldgp $29, 0($29)
-	.prologue 0
-	ldq $27,main($29) !literal!1
-	jsr $26,($27)
-	or $0,$0,$16
-	.end _start
-
-	.globl _exit
-_exit:
-	lda $0,1
-	callsys
-
-	call_pal 0
-
-	.globl write
-write:
-	lda $0,4
-	callsys
-	ret
diff --git a/tests/tcg/alpha/hello-alpha.c b/tests/tcg/alpha/hello-alpha.c
index 79892e6522..84e43b2fc4 100644
--- a/tests/tcg/alpha/hello-alpha.c
+++ b/tests/tcg/alpha/hello-alpha.c
@@ -1,3 +1,5 @@
+#include <unistd.h>
+
 int main (void)
 {
   write (1, "hello\n", 6);
diff --git a/tests/tcg/alpha/test-cond.c b/tests/tcg/alpha/test-cond.c
index 74adffaa69..e625313b3e 100644
--- a/tests/tcg/alpha/test-cond.c
+++ b/tests/tcg/alpha/test-cond.c
@@ -1,3 +1,4 @@
+#include <unistd.h>
 
 #ifdef TEST_CMOV
 
diff --git a/tests/tcg/alpha/test-ovf.c b/tests/tcg/alpha/test-ovf.c
index 01c80e7525..17892f1e89 100644
--- a/tests/tcg/alpha/test-ovf.c
+++ b/tests/tcg/alpha/test-ovf.c
@@ -1,3 +1,5 @@
+#include <unistd.h>
+
 static long test_subqv (long a, long b)
 {
   long res;
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 40/49] tests/tcg: enable building for HPPA
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (38 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 39/49] tests/tcg/alpha: add Alpha specific tests Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 41/49] tests/tcg: enable building for m68k Alex Bennée
                   ` (8 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 tests/docker/Makefile.include                     |  1 +
 tests/docker/dockerfiles/debian-hppa-cross.docker | 12 ++++++++++++
 tests/tcg/hppa/Makefile.include                   |  2 ++
 3 files changed, 15 insertions(+)
 create mode 100644 tests/docker/dockerfiles/debian-hppa-cross.docker
 create mode 100644 tests/tcg/hppa/Makefile.include

diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
index bcf44e80c4..2471c4f30a 100644
--- a/tests/docker/Makefile.include
+++ b/tests/docker/Makefile.include
@@ -63,6 +63,7 @@ docker-image-debian-s390x-cross: docker-image-debian9
 docker-image-debian-win32-cross: docker-image-debian8-mxe
 docker-image-debian-win64-cross: docker-image-debian8-mxe
 docker-image-debian-alpha-cross: docker-image-debian-sid
+docker-image-debian-hppa-cross: docker-image-debian-sid
 docker-image-travis: NOUSER=1
 
 # Expand all the pre-requistes for each docker image and test combination
diff --git a/tests/docker/dockerfiles/debian-hppa-cross.docker b/tests/docker/dockerfiles/debian-hppa-cross.docker
new file mode 100644
index 0000000000..ad443defac
--- /dev/null
+++ b/tests/docker/dockerfiles/debian-hppa-cross.docker
@@ -0,0 +1,12 @@
+#
+# Docker cross-compiler target
+#
+# This docker target builds on the debian sid base image which
+# contains cross compilers for Debian "ports" targets.
+#
+FROM qemu:debian-sid
+
+RUN DEBIAN_FRONTEND=noninteractive eatmydata \
+    apt-get install -y --no-install-recommends \
+        gcc-hppa-linux-gnu \
+        libc6-dev-hppa-cross
diff --git a/tests/tcg/hppa/Makefile.include b/tests/tcg/hppa/Makefile.include
new file mode 100644
index 0000000000..da2353430e
--- /dev/null
+++ b/tests/tcg/hppa/Makefile.include
@@ -0,0 +1,2 @@
+DOCKER_IMAGE=debian-hppa-cross
+DOCKER_CROSS_COMPILER=hppa-linux-gnu-gcc
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 41/49] tests/tcg: enable building for m68k
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (39 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 40/49] tests/tcg: enable building for HPPA Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 42/49] tests/tcg: enable building for sh4 Alex Bennée
                   ` (7 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

As before, using Debian SID compilers.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 tests/docker/Makefile.include                     |  1 +
 tests/docker/dockerfiles/debian-m68k-cross.docker | 12 ++++++++++++
 tests/tcg/m68k/Makefile.include                   |  2 ++
 3 files changed, 15 insertions(+)
 create mode 100644 tests/docker/dockerfiles/debian-m68k-cross.docker
 create mode 100644 tests/tcg/m68k/Makefile.include

diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
index 2471c4f30a..15c52127c7 100644
--- a/tests/docker/Makefile.include
+++ b/tests/docker/Makefile.include
@@ -64,6 +64,7 @@ docker-image-debian-win32-cross: docker-image-debian8-mxe
 docker-image-debian-win64-cross: docker-image-debian8-mxe
 docker-image-debian-alpha-cross: docker-image-debian-sid
 docker-image-debian-hppa-cross: docker-image-debian-sid
+docker-image-debian-m68k-cross: docker-image-debian-sid
 docker-image-travis: NOUSER=1
 
 # Expand all the pre-requistes for each docker image and test combination
diff --git a/tests/docker/dockerfiles/debian-m68k-cross.docker b/tests/docker/dockerfiles/debian-m68k-cross.docker
new file mode 100644
index 0000000000..21ba3b0132
--- /dev/null
+++ b/tests/docker/dockerfiles/debian-m68k-cross.docker
@@ -0,0 +1,12 @@
+#
+# Docker cross-compiler target
+#
+# This docker target builds on the debian sid base image which
+# contains cross compilers for Debian "ports" targets.
+#
+FROM qemu:debian-sid
+
+RUN DEBIAN_FRONTEND=noninteractive eatmydata \
+    apt-get install -y --no-install-recommends \
+        gcc-m68k-linux-gnu \
+        libc6-dev-m68k-cross
diff --git a/tests/tcg/m68k/Makefile.include b/tests/tcg/m68k/Makefile.include
new file mode 100644
index 0000000000..cd7c6bf50d
--- /dev/null
+++ b/tests/tcg/m68k/Makefile.include
@@ -0,0 +1,2 @@
+DOCKER_IMAGE=debian-m68k-cross
+DOCKER_CROSS_COMPILER=m68k-linux-gnu-gcc
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 42/49] tests/tcg: enable building for sh4
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (40 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 41/49] tests/tcg: enable building for m68k Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 43/49] tests/tcg: enable building for sparc64 Alex Bennée
                   ` (6 subsequent siblings)
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

As before, using Debian SID compilers. While the compiler can be
coerced into generating big-endian code it seems the linker can't deal
with it so we only enable the building for little endian SH4.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 tests/docker/Makefile.include                    |  1 +
 tests/docker/dockerfiles/debian-sh4-cross.docker | 12 ++++++++++++
 tests/tcg/sh4/Makefile.include                   |  4 ++++
 3 files changed, 17 insertions(+)
 create mode 100644 tests/docker/dockerfiles/debian-sh4-cross.docker
 create mode 100644 tests/tcg/sh4/Makefile.include

diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
index 15c52127c7..c08f32ca58 100644
--- a/tests/docker/Makefile.include
+++ b/tests/docker/Makefile.include
@@ -65,6 +65,7 @@ docker-image-debian-win64-cross: docker-image-debian8-mxe
 docker-image-debian-alpha-cross: docker-image-debian-sid
 docker-image-debian-hppa-cross: docker-image-debian-sid
 docker-image-debian-m68k-cross: docker-image-debian-sid
+docker-image-debian-sh4-cross: docker-image-debian-sid
 docker-image-travis: NOUSER=1
 
 # Expand all the pre-requistes for each docker image and test combination
diff --git a/tests/docker/dockerfiles/debian-sh4-cross.docker b/tests/docker/dockerfiles/debian-sh4-cross.docker
new file mode 100644
index 0000000000..88a2423094
--- /dev/null
+++ b/tests/docker/dockerfiles/debian-sh4-cross.docker
@@ -0,0 +1,12 @@
+#
+# Docker cross-compiler target
+#
+# This docker target builds on the debian sid base image which
+# contains cross compilers for Debian "ports" targets.
+#
+FROM qemu:debian-sid
+
+RUN DEBIAN_FRONTEND=noninteractive eatmydata \
+    apt-get install -y --no-install-recommends \
+        gcc-sh4-linux-gnu \
+        libc6-dev-sh4-cross
diff --git a/tests/tcg/sh4/Makefile.include b/tests/tcg/sh4/Makefile.include
new file mode 100644
index 0000000000..ad21594d9d
--- /dev/null
+++ b/tests/tcg/sh4/Makefile.include
@@ -0,0 +1,4 @@
+ifneq ($(TARGET_NAME), sh4eb)
+DOCKER_IMAGE=debian-sh4-cross
+DOCKER_CROSS_COMPILER=sh4-linux-gnu-gcc
+endif
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 43/49] tests/tcg: enable building for sparc64
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (41 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 42/49] tests/tcg: enable building for sh4 Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-18 14:28   ` Philippe Mathieu-Daudé
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 44/49] tests/tcg: enable building for mips64 Alex Bennée
                   ` (5 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

As before, using Debian SID compilers.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/docker/Makefile.include                        |  1 +
 tests/docker/dockerfiles/debian-sparc64-cross.docker | 12 ++++++++++++
 tests/tcg/sparc64/Makefile.include                   |  2 ++
 3 files changed, 15 insertions(+)
 create mode 100644 tests/docker/dockerfiles/debian-sparc64-cross.docker
 create mode 100644 tests/tcg/sparc64/Makefile.include

diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
index c08f32ca58..62d1f4dec0 100644
--- a/tests/docker/Makefile.include
+++ b/tests/docker/Makefile.include
@@ -66,6 +66,7 @@ docker-image-debian-alpha-cross: docker-image-debian-sid
 docker-image-debian-hppa-cross: docker-image-debian-sid
 docker-image-debian-m68k-cross: docker-image-debian-sid
 docker-image-debian-sh4-cross: docker-image-debian-sid
+docker-image-debian-sparc64-cross: docker-image-debian-sid
 docker-image-travis: NOUSER=1
 
 # Expand all the pre-requistes for each docker image and test combination
diff --git a/tests/docker/dockerfiles/debian-sparc64-cross.docker b/tests/docker/dockerfiles/debian-sparc64-cross.docker
new file mode 100644
index 0000000000..1e2c809274
--- /dev/null
+++ b/tests/docker/dockerfiles/debian-sparc64-cross.docker
@@ -0,0 +1,12 @@
+#
+# Docker cross-compiler target
+#
+# This docker target builds on the debian sid base image which
+# contains cross compilers for Debian "ports" targets.
+#
+FROM qemu:debian-sid
+
+RUN DEBIAN_FRONTEND=noninteractive eatmydata \
+    apt-get install -y --no-install-recommends \
+        gcc-sparc64-linux-gnu \
+        libc6-dev-sparc64-cross
diff --git a/tests/tcg/sparc64/Makefile.include b/tests/tcg/sparc64/Makefile.include
new file mode 100644
index 0000000000..95fc8dee9f
--- /dev/null
+++ b/tests/tcg/sparc64/Makefile.include
@@ -0,0 +1,2 @@
+DOCKER_IMAGE=debian-sparc64-cross
+DOCKER_CROSS_COMPILER=sparc64-linux-gnu-gcc
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 44/49] tests/tcg: enable building for mips64
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (42 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 43/49] tests/tcg: enable building for sparc64 Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-18 14:26   ` Philippe Mathieu-Daudé
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 45/49] tests/tcg: enable building for RISCV64 Alex Bennée
                   ` (4 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Yongbok Kim

As before, using Debian SID compilers.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/docker/Makefile.include                       |  1 +
 tests/docker/dockerfiles/debian-mips64-cross.docker | 12 ++++++++++++
 tests/tcg/mips/Makefile.include                     |  3 +++
 3 files changed, 16 insertions(+)
 create mode 100644 tests/docker/dockerfiles/debian-mips64-cross.docker

diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
index 62d1f4dec0..f58afb8c5d 100644
--- a/tests/docker/Makefile.include
+++ b/tests/docker/Makefile.include
@@ -67,6 +67,7 @@ docker-image-debian-hppa-cross: docker-image-debian-sid
 docker-image-debian-m68k-cross: docker-image-debian-sid
 docker-image-debian-sh4-cross: docker-image-debian-sid
 docker-image-debian-sparc64-cross: docker-image-debian-sid
+docker-image-debian-mips64-cross: docker-image-debian-sid
 docker-image-travis: NOUSER=1
 
 # Expand all the pre-requistes for each docker image and test combination
diff --git a/tests/docker/dockerfiles/debian-mips64-cross.docker b/tests/docker/dockerfiles/debian-mips64-cross.docker
new file mode 100644
index 0000000000..ed1ce0e919
--- /dev/null
+++ b/tests/docker/dockerfiles/debian-mips64-cross.docker
@@ -0,0 +1,12 @@
+#
+# Docker cross-compiler target
+#
+# This docker target builds on the debian sid base image which
+# contains cross compilers for Debian "ports" targets.
+#
+FROM qemu:debian-sid
+
+RUN DEBIAN_FRONTEND=noninteractive eatmydata \
+    apt-get install -y --no-install-recommends \
+        gcc-mips64-linux-gnuabi64 \
+        libc6-dev-mips64-cross
diff --git a/tests/tcg/mips/Makefile.include b/tests/tcg/mips/Makefile.include
index a9beceb623..4a14fc078d 100644
--- a/tests/tcg/mips/Makefile.include
+++ b/tests/tcg/mips/Makefile.include
@@ -8,6 +8,9 @@
 ifeq ($(TARGET_NAME),mips64el)
 DOCKER_IMAGE=debian-mips64el-cross
 DOCKER_CROSS_COMPILER=mips64el-linux-gnuabi64-gcc
+else ifeq ($(TARGET_NAME),mips64)
+DOCKER_IMAGE=debian-mips64-cross
+DOCKER_CROSS_COMPILER=mips64-linux-gnuabi64-gcc
 else ifeq ($(TARGET_NAME),mipsel)
 DOCKER_IMAGE=debian-mipsel-cross
 DOCKER_CROSS_COMPILER=mipsel-linux-gnu-gcc
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 45/49] tests/tcg: enable building for RISCV64
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (43 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 44/49] tests/tcg: enable building for mips64 Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-18 14:24   ` Philippe Mathieu-Daudé
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 46/49] tests/tcg/Makefile: update to be called from Makefile.target Alex Bennée
                   ` (3 subsequent siblings)
  48 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

As before, using Debian SID compilers.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/docker/Makefile.include                        |  1 +
 tests/docker/dockerfiles/debian-riscv64-cross.docker | 12 ++++++++++++
 tests/tcg/riscv/Makefile.include                     | 10 ++++++++++
 3 files changed, 23 insertions(+)
 create mode 100644 tests/docker/dockerfiles/debian-riscv64-cross.docker
 create mode 100644 tests/tcg/riscv/Makefile.include

diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
index f58afb8c5d..d00887bdf1 100644
--- a/tests/docker/Makefile.include
+++ b/tests/docker/Makefile.include
@@ -68,6 +68,7 @@ docker-image-debian-m68k-cross: docker-image-debian-sid
 docker-image-debian-sh4-cross: docker-image-debian-sid
 docker-image-debian-sparc64-cross: docker-image-debian-sid
 docker-image-debian-mips64-cross: docker-image-debian-sid
+docker-image-debian-riscv64-cross: docker-image-debian-sid
 docker-image-travis: NOUSER=1
 
 # Expand all the pre-requistes for each docker image and test combination
diff --git a/tests/docker/dockerfiles/debian-riscv64-cross.docker b/tests/docker/dockerfiles/debian-riscv64-cross.docker
new file mode 100644
index 0000000000..2b2e64cee6
--- /dev/null
+++ b/tests/docker/dockerfiles/debian-riscv64-cross.docker
@@ -0,0 +1,12 @@
+#
+# Docker cross-compiler target
+#
+# This docker target builds on the debian sid base image which
+# contains cross compilers for Debian "ports" targets.
+#
+FROM qemu:debian-sid
+
+RUN DEBIAN_FRONTEND=noninteractive eatmydata \
+    apt-get install -y --no-install-recommends \
+        gcc-riscv64-linux-gnu \
+        libc6-dev-riscv64-cross
diff --git a/tests/tcg/riscv/Makefile.include b/tests/tcg/riscv/Makefile.include
new file mode 100644
index 0000000000..d92ac6c89f
--- /dev/null
+++ b/tests/tcg/riscv/Makefile.include
@@ -0,0 +1,10 @@
+#
+# Makefile.include for all RISCV targets
+#
+# Debian only really cares about 64 bit going forward
+#
+
+ifeq ($(TARGET_NAME),riscv64)
+DOCKER_IMAGE=debian-riscv64-cross
+DOCKER_CROSS_COMPILER=riscv64-linux-gnu-gcc
+endif
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 46/49] tests/tcg/Makefile: update to be called from Makefile.target
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (44 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 45/49] tests/tcg: enable building for RISCV64 Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-17 20:43   ` Richard Henderson
  2018-05-18 14:49   ` Philippe Mathieu-Daudé
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 47/49] Makefile.target: add (clean-/build-)guest-tests targets Alex Bennée
                   ` (2 subsequent siblings)
  48 siblings, 2 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

This make is now invoked from each individual target make with the
appropriate CC and EXTRA_CFLAGS set for each guest. It then includes
additional Makefile.targets from:

  - tests/tcg/multiarch (always)
  - tests/tcg/$(TARGET_BASE_ARCH) (if available)
  - tests/tcg/$(TARGET_NAME)

The order is important as the later Makefile's may want to suppress
TESTS from its base arch profile. Each included Makefile.target is
responsible for adding TESTS as well as defining any special build
instructions for individual tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
v2
  - cleaner approach to include sub makefiles
  - move TESTS/VPATH manipulation into sub-makefile
  - avoid double inclusion when TARGET_BASE_ARCH==TARGET_NAME
v4
  - add timeout to default runner
  - clean-up comments about build flags
  - update to handle BUILD_STATIC
  - add MAINTAINERS entry
---
 MAINTAINERS        |   5 ++
 tests/tcg/Makefile | 177 ++++++++++++++++++---------------------------
 2 files changed, 74 insertions(+), 108 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index ee7f101890..ae569f9cf6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2107,6 +2107,11 @@ W: https://travis-ci.org/qemu/qemu
 W: https://app.shippable.com/github/qemu/qemu
 W: http://patchew.org/QEMU/
 
+Guest Test Compilation Support
+M: Alex Bennée <alex.bennee@linaro.org>
+F: tests/tcg/Makefile
+L: qemu-devel@nongnu.org
+
 Documentation
 -------------
 Build system architecture
diff --git a/tests/tcg/Makefile b/tests/tcg/Makefile
index e12395117a..f2dcfc730a 100644
--- a/tests/tcg/Makefile
+++ b/tests/tcg/Makefile
@@ -1,125 +1,86 @@
+# -*- Mode: makefile -*-
+#
+# TCG tests
+#
+# These are complicated by the fact we want to build them for guest
+# systems. This requires knowing what guests we are building and which
+# ones we have cross-compilers for or docker images with
+# cross-compilers.
+#
+# The tests themselves should be as minimal as possible as
+# cross-compilers don't always have a large amount of libraries
+# available.
+#
+# We only include the host build system for SRC_PATH and we don't
+# bother with the common rules.mk. We expect the following:
+#
+#   CC - the C compiler command
+#   EXTRA_CFLAGS - any extra CFLAGS
+#   BUILD_STATIC - are we building static binaries
+#
+# By default all tests are statically compiled but some host systems
+# may not package static libraries by default. If an external
+# cross-compiler can only build dynamic libraries the user might need
+# to make extra efforts to ensure ld.so can link at runtime when the
+# tests are run.
+#
+# We also accept SPEED=slow to enable slower running tests
+#
+# We also expect to be in the tests build dir for the FOO-linux-user.
+#
+
 -include ../../config-host.mak
--include $(SRC_PATH)/rules.mak
+-include ../config-target.mak
 
-$(call set-vpath, $(SRC_PATH)/tests/tcg)
+quiet-command = $(if $(V),$1,$(if $(2),@printf "  %-7s %s\n" $2 $3 && $1, @$1))
 
-QEMU=../../i386-linux-user/qemu-i386
-QEMU_X86_64=../../x86_64-linux-user/qemu-x86_64
-CC_X86_64=$(CC_I386) -m64
+# Tests we are building
+TESTS=
 
-QEMU_INCLUDES += -I../..
-CFLAGS=-Wall -O2 -g -fno-strict-aliasing
-#CFLAGS+=-msse2
+# Start with a blank slate, the build targets get to add stuff first
+CFLAGS=
+QEMU_CFLAGS=
 LDFLAGS=
 
-# TODO: automatically detect ARM and MIPS compilers, and run those too
-
-# runcom maps page 0, so it requires root privileges
-# also, pi_10.com runs indefinitely
-
-I386_TESTS=hello-i386 \
-	   sha1-i386 \
-	   test-i386 \
-	   test-i386-fprem \
-	   # runcom
+# The QEMU for this TARGET
+QEMU=../qemu-$(TARGET_NAME)
+TIMEOUT=15
 
-# native i386 compilers sometimes are not biarch.  assume cross-compilers are
-ifneq ($(ARCH),i386)
-I386_TESTS+=run-test-x86_64
+# The order we include is important. We include multiarch, base arch
+# and finally arch if it's not the same as base arch.
+-include $(SRC_PATH)/tests/tcg/multiarch/Makefile.target
+-include $(SRC_PATH)/tests/tcg/$(TARGET_BASE_ARCH)/Makefile.target
+ifneq ($(TARGET_BASE_ARCH),$(TARGET_NAME))
+-include $(SRC_PATH)/tests/tcg/$(TARGET_NAME)/Makefile.target
 endif
 
-TESTS = test_path
-ifneq ($(call find-in-path, $(CC_I386)),)
-TESTS += $(I386_TESTS)
+# Add the common build options
+CFLAGS+=-Wall -O0 -g -fno-strict-aliasing
+ifeq ($(BUILD_STATIC),y)
+LDFLAGS+=-static
 endif
 
-all: $(patsubst %,run-%,$(TESTS))
-test: all
-
-# rules to run tests
-
-.PHONY: $(patsubst %,run-%,$(TESTS))
-
-run-%: %
-	-$(QEMU) ./$*
-
-run-hello-i386: hello-i386
-run-sha1-i386: sha1-i386
-
-run-test-i386: test-i386
-	./test-i386 > test-i386.ref
-	-$(QEMU) test-i386 > test-i386.out
-	@if diff -u test-i386.ref test-i386.out ; then echo "Auto Test OK"; fi
-
-run-test-i386-fprem: test-i386-fprem
-	./test-i386-fprem > test-i386-fprem.ref
-	-$(QEMU) test-i386-fprem > test-i386-fprem.out
-	@if diff -u test-i386-fprem.ref test-i386-fprem.out ; then echo "Auto Test OK"; fi
-
-run-test-x86_64: test-x86_64
-	./test-x86_64 > test-x86_64.ref
-	-$(QEMU_X86_64) test-x86_64 > test-x86_64.out
-	@if diff -u test-x86_64.ref test-x86_64.out ; then echo "Auto Test OK"; fi
-
+%: %.c
+	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
-run-runcom: runcom
-	-$(QEMU) ./runcom $(SRC_PATH)/tests/pi_10.com
+all: $(TESTS)
 
-run-test_path: test_path
-	./test_path
+#
+# Test Runners
+#
+# By default we just run the test with the appropriate QEMU for the
+# target. More advanced tests may want to override the runner in their
+# specific make rules.
+#
 
-# rules to compile tests
+RUN_TESTS=$(patsubst %,run-%, $(TESTS))
 
-hello-i386: hello-i386.c
-	$(CC_I386) -nostdlib $(CFLAGS) -static $(LDFLAGS) -o $@ $<
-	strip $@
-
-# i386/x86_64 emulation test (test various opcodes) */
-test-i386: test-i386.c test-i386-code16.S test-i386-vm86.S \
-           test-i386.h test-i386-shift.h test-i386-muldiv.h
-	$(CC_I386) $(QEMU_INCLUDES) $(CFLAGS) $(LDFLAGS) -o $@ \
-              $(<D)/test-i386.c $(<D)/test-i386-code16.S $(<D)/test-i386-vm86.S -lm
-
-test-i386-fprem: test-i386-fprem.c
-	$(CC_I386) $(QEMU_INCLUDES) $(CFLAGS) $(LDFLAGS) -o $@ $^
-
-test-x86_64: test-i386.c \
-           test-i386.h test-i386-shift.h test-i386-muldiv.h
-	$(CC_X86_64) $(QEMU_INCLUDES) $(CFLAGS) $(LDFLAGS) -o $@ $(<D)/test-i386.c -lm
-
-# vm86 test
-runcom: runcom.c
-	$(CC_I386) $(CFLAGS) $(LDFLAGS) -o $@ $<
-
-# speed test
-sha1-i386: sha1.c
-	$(CC_I386) $(CFLAGS) $(LDFLAGS) -o $@ $<
-
-# arm test
-hello-arm: hello-arm.o
-	arm-linux-ld -o $@ $<
-
-hello-arm.o: hello-arm.c
-	arm-linux-gcc -Wall -g -O2 -c -o $@ $<
-
-test-arm-iwmmxt: test-arm-iwmmxt.s
-	cpp < $< | arm-linux-gnu-gcc -Wall -static -march=iwmmxt -mabi=aapcs -x assembler - -o $@
-
-# MIPS test
-hello-mips: hello-mips.c
-	mips-linux-gnu-gcc -nostdlib -static -mno-abicalls -fno-PIC -mabi=32 -Wall -Wextra -g -O2 -o $@ $<
-
-hello-mipsel: hello-mips.c
-	mipsel-linux-gnu-gcc -nostdlib -static -mno-abicalls -fno-PIC -mabi=32 -Wall -Wextra -g -O2 -o $@ $<
-
-# testsuite for the CRIS port.
-test-cris:
-	$(MAKE) -C cris check
+run-%: %
+	$(call quiet-command, \
+		timeout $(TIMEOUT) $(QEMU) $< > $<.out, \
+		"TEST", "$< on $(TARGET_NAME)")
 
-# testsuite for the LM32 port.
-test-lm32:
-	$(MAKE) -C lm32 check
+.PHONY: run
+run: $(RUN_TESTS)
 
-clean:
-	rm -f *~ *.o test-i386.out test-i386.ref \
-           test-x86_64.log test-x86_64.ref qruncom $(TESTS)
+# There is no clean target, the calling make just rm's the tests build dir
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 47/49] Makefile.target: add (clean-/build-)guest-tests targets
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (45 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 46/49] tests/tcg/Makefile: update to be called from Makefile.target Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 48/49] tests/Makefile.include: add [build|clean|check]-tcg targets Alex Bennée
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 49/49] tests/tcg: override runners for broken tests (!UPSTREAM) Alex Bennée
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

Now all the build infrastructure is in place we can build tests for
each guest that we support. That support mainly depends on having
cross compilers installed or docker setup. To keep all the logic for
that together we put the rules in tests/tcg/Makefile.include and
include it from the main Makefile.target.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
v4
  - pulled Makefile.include bits from next patch
  - added qemu-$(TARGET_NAME) dependency for running tests
  - accept SPEED parameter to run slow tests
  - pass BUILD_STATIC
  - update MAINTAINERS
---
 MAINTAINERS                |  1 +
 Makefile.target            |  5 +++
 tests/tcg/Makefile.include | 88 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 94 insertions(+)
 create mode 100644 tests/tcg/Makefile.include

diff --git a/MAINTAINERS b/MAINTAINERS
index ae569f9cf6..7e02e03358 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2110,6 +2110,7 @@ W: http://patchew.org/QEMU/
 Guest Test Compilation Support
 M: Alex Bennée <alex.bennee@linaro.org>
 F: tests/tcg/Makefile
+F: tests/tcg/Makefile.include
 L: qemu-devel@nongnu.org
 
 Documentation
diff --git a/Makefile.target b/Makefile.target
index d0ec77a307..a30fd40257 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -36,6 +36,11 @@ endif
 PROGS=$(QEMU_PROG) $(QEMU_PROGW)
 STPFILES=
 
+# Makefile Tests
+ifdef CONFIG_USER_ONLY
+include $(SRC_PATH)/tests/tcg/Makefile.include
+endif
+
 config-target.h: config-target.h-timestamp
 config-target.h-timestamp: config-target.mak
 
diff --git a/tests/tcg/Makefile.include b/tests/tcg/Makefile.include
new file mode 100644
index 0000000000..fbefc8b23b
--- /dev/null
+++ b/tests/tcg/Makefile.include
@@ -0,0 +1,88 @@
+# -*- Mode: makefile -*-
+#
+# TCG tests (per-target rules)
+#
+# This Makefile fragement is included from the per-target
+# Makefile.target so will be invoked for each linux-user program we
+# build. We have two options for compiling, either using a configured
+# guest compiler or calling one of our docker images to do it for us.
+#
+
+# The per ARCH makefile, if it exists, holds extra information about
+# useful docker images or alternative compiler flags.
+
+-include $(SRC_PATH)/tests/tcg/$(TARGET_BASE_ARCH)/Makefile.include
+-include $(SRC_PATH)/tests/tcg/$(TARGET_NAME)/Makefile.include
+
+GUEST_BUILD=
+TCG_MAKE=$(SRC_PATH)/tests/tcg/Makefile
+# Support installed Cross Compilers
+
+ifdef CROSS_CC_GUEST
+
+.PHONY: cross-build-guest-tests
+cross-build-guest-tests:
+	$(call quiet-command, \
+	   (mkdir -p tests && cd tests && \
+	    make -f $(TCG_MAKE) CC=$(CROSS_CC_GUEST) \
+				BUILD_STATIC=$(CROSS_CC_GUEST_STATIC) \
+				EXTRA_CFLAGS=$(CROSS_CC_GUEST_CFLAGS)), \
+	"CROSS-BUILD","$(TARGET_NAME) guest-tests with $(CROSS_CC_GUEST)")
+
+GUEST_BUILD=cross-build-guest-tests
+
+endif
+
+# Support building with Docker
+
+ifeq ($(HAVE_USER_DOCKER)$(GUEST_BUILD),y)
+ifneq ($(DOCKER_IMAGE),)
+
+# We also need the Docker make rules to depend on
+include $(SRC_PATH)/tests/docker/Makefile.include
+
+DOCKER_COMPILE_CMD="$(DOCKER_SCRIPT) cc --user $(shell id -u) \
+		--cc $(DOCKER_CROSS_COMPILER) \
+		-i qemu:$(DOCKER_IMAGE) \
+		-s $(SRC_PATH) -- "
+DOCKER_PREREQ=docker-image-$(DOCKER_IMAGE)
+
+.PHONY: docker-build-guest-tests
+docker-build-guest-tests: $(DOCKER_PREREQ)
+	$(call quiet-command, \
+	  (mkdir -p tests && cd tests && \
+	   make -f $(TCG_MAKE) CC=$(DOCKER_COMPILE_CMD) \
+			       BUILD_STATIC=y \
+			       EXTRA_CFLAGS=$(DOCKER_CROSS_COMPILER_CFLAGS)), \
+	"CROSS-BUILD","$(TARGET_NAME) guest-tests with docker qemu:$(DOCKER_IMAGE)")
+
+GUEST_BUILD=docker-build-guest-tests
+
+endif
+endif
+
+# Final targets
+.PHONY: guest-tests
+
+ifneq ($(GUEST_BUILD),)
+guest-tests: $(GUEST_BUILD)
+
+run-guest-tests: guest-tests qemu-$(TARGET_NAME)
+	$(call quiet-command, \
+	(cd tests && make -f $(TCG_MAKE) SPEED=$(SPEED) run), \
+	"RUN-TESTS", "for $(TARGET_NAME)")
+
+else
+guest-tests:
+	$(call quiet-command, /bin/true, "CROSS-BUILD", \
+		"$(TARGET_NAME) guest-tests SKIPPED")
+
+run-guest-tests:
+	$(call quiet-command, /bin/true, "RUN-TESTS", \
+		"for $(TARGET_NAME) SKIPPED")
+endif
+
+# It doesn't mater if these don't exits
+.PHONY: clean-guest-tests
+clean-guest-tests:
+	rm -rf tests || echo "no $(TARGET_NAME) tests to remove"
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 48/49] tests/Makefile.include: add [build|clean|check]-tcg targets
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (46 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 47/49] Makefile.target: add (clean-/build-)guest-tests targets Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 49/49] tests/tcg: override runners for broken tests (!UPSTREAM) Alex Bennée
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée

This will ensure all linux-user targets build their guest test
programs and ensure check-tcg will run the respective tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2
  - use -include instead of complex macro stuff
  - also include TARGET_BASE_ARCH/Makefile
v3
  - add build-tcg, make check-tcg actually run tests
---
 tests/Makefile.include | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/tests/Makefile.include b/tests/Makefile.include
index 3d2f0458ab..310ccefdd9 100644
--- a/tests/Makefile.include
+++ b/tests/Makefile.include
@@ -10,6 +10,7 @@ check-help:
 	@echo " $(MAKE) check-speed          Run qobject speed tests"
 	@echo " $(MAKE) check-qapi-schema    Run QAPI schema tests"
 	@echo " $(MAKE) check-block          Run block tests"
+	@echo " $(MAKE) check-tcg            Run TCG tests"
 	@echo " $(MAKE) check-report.html    Generates an HTML test report"
 	@echo " $(MAKE) check-clean          Clean the tests"
 	@echo
@@ -916,6 +917,30 @@ check-report.xml: $(patsubst %,check-report-qtest-%.xml, $(QTEST_TARGETS)) check
 check-report.html: check-report.xml
 	$(call quiet-command,gtester-report $< > $@,"GEN","$@")
 
+# Per guest TCG tests
+
+LINUX_USER_TARGETS=$(filter %-linux-user,$(TARGET_LIST))
+BUILD_TCG_TARGET_RULES=$(patsubst %,build-tcg-tests-%, $(LINUX_USER_TARGETS))
+CLEAN_TCG_TARGET_RULES=$(patsubst %,clean-tcg-tests-%, $(LINUX_USER_TARGETS))
+RUN_TCG_TARGET_RULES=$(patsubst %,run-tcg-tests-%, $(LINUX_USER_TARGETS))
+
+build-tcg-tests-%:
+	$(call quiet-command,$(MAKE) $(SUBDIR_MAKEFLAGS) -C $* V="$(V)" TARGET_DIR="$*/" guest-tests,)
+
+run-tcg-tests-%: build-tcg-tests-%
+	$(call quiet-command,$(MAKE) $(SUBDIR_MAKEFLAGS) -C $* V="$(V)" TARGET_DIR="$*/" run-guest-tests,)
+
+clean-tcg-tests-%:
+	$(call quiet-command,$(MAKE) $(SUBDIR_MAKEFLAGS) -C $* V="$(V)" TARGET_DIR="$*/" clean-guest-tests,)
+
+.PHONY: build-tcg
+build-tcg: $(BUILD_TCG_TARGET_RULES)
+
+.PHONY: check-tcg
+check-tcg: $(RUN_TCG_TARGET_RULES)
+
+.PHONY: clean-tcg
+clean-tcg: $(CLEAN_TCG_TARGET_RULES)
 
 # Other tests
 
@@ -958,7 +983,6 @@ check-speed: $(patsubst %,check-%, $(check-speed-y))
 check-block: $(patsubst %,check-%, $(check-block-y))
 check: check-qapi-schema check-unit check-qtest check-decodetree
 check-clean:
-	$(MAKE) -C tests/tcg clean
 	rm -rf $(check-unit-y) tests/*.o $(QEMU_IOTESTS_HELPERS-y)
 	rm -rf $(sort $(foreach target,$(SYSEMU_TARGET_LIST), $(check-qtest-$(target)-y)) $(check-qtest-generic-y))
 	rm -f tests/test-qapi-gen-timestamp
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* [Qemu-devel] [PATCH v4 49/49] tests/tcg: override runners for broken tests (!UPSTREAM)
  2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
                   ` (47 preceding siblings ...)
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 48/49] tests/Makefile.include: add [build|clean|check]-tcg targets Alex Bennée
@ 2018-05-17 17:47 ` Alex Bennée
  48 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 17:47 UTC (permalink / raw)
  To: cota, famz, berrange, f4bug, richard.henderson, balrogg, aurelien, agraf
  Cc: qemu-devel, Alex Bennée, Peter Maydell, Paolo Bonzini,
	Richard Henderson, Eduardo Habkost, Yongbok Kim, open list:ARM

To get a clean run of check-tcg these tests are currently skipped:

  - test-mmap -p for i386, hppa, m68k
  - hello-mips for mips
  - linux-test for sparc

For ARM/aarch64
  - fcvt doesn't compare against reference (awaiting fixes in mainline)

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
v4
  - document broken tests in commit
  - temporarily demote fcvt while fixes percolate upstream
---
 tests/tcg/aarch64/Makefile.target | 10 +++++-----
 tests/tcg/arm/Makefile.target     | 10 +++++-----
 tests/tcg/hppa/Makefile.target    |  7 +++++++
 tests/tcg/i386/Makefile.target    |  8 ++++++++
 tests/tcg/m68k/Makefile.target    |  9 +++++++++
 tests/tcg/mips/Makefile.target    |  4 ++++
 tests/tcg/sparc64/Makefile.target |  8 ++++++++
 7 files changed, 46 insertions(+), 10 deletions(-)
 create mode 100644 tests/tcg/hppa/Makefile.target
 create mode 100644 tests/tcg/m68k/Makefile.target
 create mode 100644 tests/tcg/sparc64/Makefile.target

diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index 7dba32138d..d2a6205d7a 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -12,8 +12,8 @@ TESTS:=$(AARCH64_TESTS)
 
 fcvt: LDFLAGS+=-lm
 
-run-fcvt: fcvt
-	$(call quiet-command, \
-		$(QEMU) $< > fcvt.out && \
-		diff -u $(AARCH64_SRC)/fcvt.ref fcvt.out, \
-		"TEST", "$< (default) on $(TARGET_NAME)")
+# run-fcvt: fcvt
+# 	$(call quiet-command, \
+# 		$(QEMU) $< > fcvt.out && \
+# 		diff -u $(AARCH64_SRC)/fcvt.ref fcvt.out, \
+# 		"TEST", "$< (default) on $(TARGET_NAME)")
diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
index 7bb777f442..f42cf80f84 100644
--- a/tests/tcg/arm/Makefile.target
+++ b/tests/tcg/arm/Makefile.target
@@ -31,9 +31,9 @@ ifeq ($(TARGET_NAME), arm)
 fcvt: LDFLAGS+=-lm
 # fcvt: CFLAGS+=-march=armv8.2-a+fp16 -mfpu=neon-fp-armv8
 
-run-fcvt: fcvt
-	$(call quiet-command, \
-		$(QEMU) $< > fcvt.out && \
-		diff -u $(ARM_SRC)/fcvt.ref fcvt.out, \
-		"TEST", "$< (default) on $(TARGET_NAME)")
+# run-fcvt: fcvt
+# 	$(call quiet-command, \
+# 		$(QEMU) $< > fcvt.out && \
+# 		diff -u $(ARM_SRC)/fcvt.ref fcvt.out, \
+# 		"TEST", "$< (default) on $(TARGET_NAME)")
 endif
diff --git a/tests/tcg/hppa/Makefile.target b/tests/tcg/hppa/Makefile.target
new file mode 100644
index 0000000000..15fc0b429f
--- /dev/null
+++ b/tests/tcg/hppa/Makefile.target
@@ -0,0 +1,7 @@
+# -*- Mode: makefile -*-
+#
+# HPPA specific tweaks - specifically masking out broken tests
+
+# Currently broken for -p
+run-test-mmap: test-mmap
+	$(call quiet-command, $(QEMU) $< > test-mmap.out, "TEST", "$< (default) on $(TARGET_NAME)")
diff --git a/tests/tcg/i386/Makefile.target b/tests/tcg/i386/Makefile.target
index 6d7d4a164e..b5a7011b79 100644
--- a/tests/tcg/i386/Makefile.target
+++ b/tests/tcg/i386/Makefile.target
@@ -48,3 +48,11 @@ run-test-i386-fprem: test-i386-fprem
 	$(call quiet-command, /bin/true, "SLOW TEST", "$< SKIPPED on $(TARGET_NAME)")
 endif
 
+# Currently broken tests on i386
+ifeq ($(TARGET_NAME), i386)
+
+# Currently broken for -p
+run-test-mmap: test-mmap
+	$(call quiet-command, $(QEMU) $< > test-mmap.out, "TEST", "$< (default) on $(TARGET_NAME)")
+
+endif
diff --git a/tests/tcg/m68k/Makefile.target b/tests/tcg/m68k/Makefile.target
new file mode 100644
index 0000000000..92774ce5ad
--- /dev/null
+++ b/tests/tcg/m68k/Makefile.target
@@ -0,0 +1,9 @@
+# -*- Mode: makefile -*-
+#
+# m68k specific tweaks - specifically masking out broken tests
+#
+
+# Currently broken for -p
+run-test-mmap: test-mmap
+	$(call quiet-command, $(QEMU) $< > test-mmap.out, "TEST", "$< (default) on $(TARGET_NAME)")
+
diff --git a/tests/tcg/mips/Makefile.target b/tests/tcg/mips/Makefile.target
index 71f0c2dd53..3db4eaf131 100644
--- a/tests/tcg/mips/Makefile.target
+++ b/tests/tcg/mips/Makefile.target
@@ -17,3 +17,7 @@ hello-mips: LDFLAGS+=-nostdlib
 
 # For MIPS32 and 64 we have a bunch of extra tests in sub-directories
 # however they are intended for system tests.
+
+run-hello-mips: hello-mips
+	$(call quiet-command, /bin/true, "BROKEN TEST", "$< SKIPPED on $(TARGET_NAME)")
+
diff --git a/tests/tcg/sparc64/Makefile.target b/tests/tcg/sparc64/Makefile.target
new file mode 100644
index 0000000000..e971a5c818
--- /dev/null
+++ b/tests/tcg/sparc64/Makefile.target
@@ -0,0 +1,8 @@
+# -*- Mode: makefile -*-
+#
+# sparc specific tweaks - specifically masking out broken tests
+
+# different from the other hangs
+# /home/alex/lsrc/qemu/qemu.git/tests/tcg/multiarch/linux-test.c:264: Value too large for defined data type (ret=-1, errno=92/Value too large for defined data type)
+run-linux-test: linux-test
+	$(call quiet-command, /bin/true, "BROKEN TEST", "$< SKIPPED on $(TARGET_NAME)")
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 03/49] configure: add support for --cross-cc-FOO
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 03/49] configure: add support for --cross-cc-FOO Alex Bennée
@ 2018-05-17 18:19   ` Richard Henderson
  0 siblings, 0 replies; 85+ messages in thread
From: Richard Henderson @ 2018-05-17 18:19 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, balrogg, aurelien, agraf
  Cc: qemu-devel

On 05/17/2018 10:46 AM, Alex Bennée wrote:
> +    if ! do_compiler $target_compiler -o $TMPE $TMPC -static ; then
> +        # For host systems we might get away with building without -static
> +        if ! do_compiler $target_compiler -o $TMPE $TMPC ; then
> +            target_compiler=""
> +        else
> +            enabled_cross_compilers="${enabled_cross_compilers} ${target_compiler}"
> +            target_compiler_static="n"
> +        fi
> +    else
> +        enabled_cross_compilers="${enabled_cross_compilers} ${target_compiler}"
> +        target_compiler_static="y"
> +    fi

Better to order this with positive tests?

  if do_compiler $target_compiler -o $TMPE $TMPC -static ; then
     ...
  elif do_compiler $target_compiler -o $TMPE $TMPC ; then
     ...
  else
     ...
  fi

Is there really a benefit to $target_compiler_static above adding -static to
$cross_compiler_flags_FOO?


r~

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 20/49] tests/tcg/i386: fix test-i386
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 20/49] tests/tcg/i386: fix test-i386 Alex Bennée
@ 2018-05-17 19:04   ` Eric Blake
  2018-05-17 19:57     ` Alex Bennée
  0 siblings, 1 reply; 85+ messages in thread
From: Eric Blake @ 2018-05-17 19:04 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, richard.henderson,
	balrogg, aurelien, agraf
  Cc: Paolo Bonzini, qemu-devel, Eduardo Habkost, Richard Henderson

On 05/17/2018 12:46 PM, Alex Bennée wrote:
> The test-i386 test case is a little special as it includes assembler
> files. Add the additional compile magic to assemble these bits and
> link them to the final binary.

The patch says "add"...

> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Thomas Huth <thuth@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   tests/tcg/i386/test-i386.c | 1 -
>   1 file changed, 1 deletion(-)

...but consists only of a single deletion.

-- 
Eric Blake, Principal Software Engineer
Red Hat, Inc.           +1-919-301-3266
Virtualization:  qemu.org | libvirt.org

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 22/49] tests/tcg/i386: disable i386 version of test-i386-ssse
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 22/49] tests/tcg/i386: disable i386 version of test-i386-ssse Alex Bennée
@ 2018-05-17 19:56   ` Richard Henderson
  0 siblings, 0 replies; 85+ messages in thread
From: Richard Henderson @ 2018-05-17 19:56 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, balrogg, aurelien, agraf
  Cc: qemu-devel, Paolo Bonzini, Richard Henderson, Eduardo Habkost

On 05/17/2018 10:46 AM, Alex Bennée wrote:
> It doesn't build for i386 easily and we probably need a better more
> methodical test for SSE et all in QEMU.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/tcg/i386/Makefile.target | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/tests/tcg/i386/Makefile.target b/tests/tcg/i386/Makefile.target
> index 94fa50abbc..290073a882 100644
> --- a/tests/tcg/i386/Makefile.target
> +++ b/tests/tcg/i386/Makefile.target
> @@ -9,7 +9,7 @@ I386_SRCS=$(notdir $(wildcard $(I386_SRC)/*.c))
>  I386_TESTS=$(I386_SRCS:.c=)
>  
>  # Update TESTS
> -TESTS+=$(I386_TESTS)
> +TESTS+=$(I386_ONLY_TESTS)

As I mentioned before, this belongs with the next patch.


r~

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 20/49] tests/tcg/i386: fix test-i386
  2018-05-17 19:04   ` Eric Blake
@ 2018-05-17 19:57     ` Alex Bennée
  0 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 19:57 UTC (permalink / raw)
  To: Eric Blake
  Cc: cota, famz, berrange, f4bug, richard.henderson, balrogg,
	aurelien, agraf, Paolo Bonzini, qemu-devel, Eduardo Habkost,
	Richard Henderson


Eric Blake <eblake@redhat.com> writes:

> On 05/17/2018 12:46 PM, Alex Bennée wrote:
>> The test-i386 test case is a little special as it includes assembler
>> files. Add the additional compile magic to assemble these bits and
>> link them to the final binary.
>
> The patch says "add"...
>
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> Reviewed-by: Thomas Huth <thuth@redhat.com>
>> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   tests/tcg/i386/test-i386.c | 1 -
>>   1 file changed, 1 deletion(-)
>
> ...but consists only of a single deletion.

Oops, yeah it all got merged into the "move to i386 subdir" patch. Maybe
I should just fold that together?

--
Alex Bennée

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 28/49] tests/tcg/arm: fix up test-arm-iwmmxt test
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 28/49] tests/tcg/arm: fix up test-arm-iwmmxt test Alex Bennée
@ 2018-05-17 20:15   ` Richard Henderson
  0 siblings, 0 replies; 85+ messages in thread
From: Richard Henderson @ 2018-05-17 20:15 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, balrogg, aurelien, agraf
  Cc: qemu-devel, Peter Maydell, open list:ARM

On 05/17/2018 10:46 AM, Alex Bennée wrote:
> We need to rename the source file to a .S so we can do a single-line
> assemble and link invocation. We also specify the additional CFLAGS
> for the compile as it's a non-standard ARM binary.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> [rth: force fpu configuration]
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> 
> ---
> v4
>   - include rth's -mfpu=fpv4-sp-d16
> ---

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 29/49] tests/tcg/arm: disable -p 32768 mmap test
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 29/49] tests/tcg/arm: disable -p 32768 mmap test Alex Bennée
@ 2018-05-17 20:20   ` Richard Henderson
  2018-05-17 21:24     ` Alex Bennée
  0 siblings, 1 reply; 85+ messages in thread
From: Richard Henderson @ 2018-05-17 20:20 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, balrogg, aurelien, agraf
  Cc: qemu-devel, Peter Maydell, open list:ARM

On 05/17/2018 10:46 AM, Alex Bennée wrote:
> Broken since I updated to 18.04
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/tcg/arm/Makefile.target | 8 ++++++++
>  1 file changed, 8 insertions(+)

Meh.  Most of these fail for hosts with 64k pages.
So, sure, disable this one, but I don't think that
the others are useful either.


r~

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 30/49] tests/tcg: enable building for AArch64
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 30/49] tests/tcg: enable building for AArch64 Alex Bennée
@ 2018-05-17 20:26   ` Richard Henderson
  2018-05-18 14:57   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 85+ messages in thread
From: Richard Henderson @ 2018-05-17 20:26 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, balrogg, aurelien, agraf
  Cc: qemu-devel, Peter Maydell, open list:ARM

On 05/17/2018 10:46 AM, Alex Bennée wrote:
> We only have compilers for the (default) little endian variants.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> 
> ---
> v4
>   - update MAINTAINERS
> ---
>  MAINTAINERS                        | 1 +
>  tests/tcg/aarch64/Makefile.include | 8 ++++++++
>  2 files changed, 9 insertions(+)
>  create mode 100644 tests/tcg/aarch64/Makefile.include

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 31/49] tests/tcg/aarch64: add Makefile.target
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 31/49] tests/tcg/aarch64: add Makefile.target Alex Bennée
@ 2018-05-17 20:28   ` Richard Henderson
  2018-05-17 21:25     ` Alex Bennée
  0 siblings, 1 reply; 85+ messages in thread
From: Richard Henderson @ 2018-05-17 20:28 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, balrogg, aurelien, agraf
  Cc: qemu-devel, Peter Maydell, open list:ARM

On 05/17/2018 10:47 AM, Alex Bennée wrote:
> Nothing much here yet.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/tcg/aarch64/Makefile.target | 5 +++++
>  1 file changed, 5 insertions(+)
>  create mode 100644 tests/tcg/aarch64/Makefile.target
> 
> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
> new file mode 100644
> index 0000000000..4ac8fbe73f
> --- /dev/null
> +++ b/tests/tcg/aarch64/Makefile.target
> @@ -0,0 +1,5 @@
> +# -*- Mode: makefile -*-
> +#
> +# AArch64 specific tweaks
> +
> +fcvt: LDFLAGS+=-lm
> 

Merge this with adding fcvt, surely.


r~

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 32/49] tests/tcg/arm: add fcvt test cases for AArch32/64
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 32/49] tests/tcg/arm: add fcvt test cases for AArch32/64 Alex Bennée
@ 2018-05-17 20:30   ` Richard Henderson
  2018-05-18  3:45     ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 85+ messages in thread
From: Richard Henderson @ 2018-05-17 20:30 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, balrogg, aurelien, agraf
  Cc: qemu-devel, Peter Maydell, open list:ARM

On 05/17/2018 10:47 AM, Alex Bennée wrote:
> This runs through the usual float to float conversions and crucially
> also runs with ARM Alternative Half Precision Format.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> [rth: tweak vcvtb.f16.f32/vctb.f32.f16 code and regen]
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> 
> ---
> v4
>   - add fcvt.ref and check results against it
>   - fix single_to_half, single_to_double conversions
>   - properly toggle AHP mode (fpsr->fpcr)
>   - more values around the AHP margins
>   - add INF/NAN/SNAN inputs
>   - build for ARM and AArch64
>   - fix bug for hex literals
>   - add float-to-int
>   - checkpatch fix
> ---

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 39/49] tests/tcg/alpha: add Alpha specific tests
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 39/49] tests/tcg/alpha: add Alpha specific tests Alex Bennée
@ 2018-05-17 20:41   ` Richard Henderson
  2018-05-18 14:25   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 85+ messages in thread
From: Richard Henderson @ 2018-05-17 20:41 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, balrogg, aurelien, agraf
  Cc: qemu-devel, Richard Henderson

On 05/17/2018 10:47 AM, Alex Bennée wrote:
> These tests did use their own crt.o stub however that is a little
> stone age so we drop crt.S and just statically link to the cross
> compilers libraries.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> 
> ---
> v4
>   - drop crt.s
>   - drop skipping of threadtest
>   - drop write() hack, include unistd.h
> ---

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 46/49] tests/tcg/Makefile: update to be called from Makefile.target
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 46/49] tests/tcg/Makefile: update to be called from Makefile.target Alex Bennée
@ 2018-05-17 20:43   ` Richard Henderson
  2018-05-18 14:49   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 85+ messages in thread
From: Richard Henderson @ 2018-05-17 20:43 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, balrogg, aurelien, agraf
  Cc: qemu-devel

On 05/17/2018 10:47 AM, Alex Bennée wrote:
> This make is now invoked from each individual target make with the
> appropriate CC and EXTRA_CFLAGS set for each guest. It then includes
> additional Makefile.targets from:
> 
>   - tests/tcg/multiarch (always)
>   - tests/tcg/$(TARGET_BASE_ARCH) (if available)
>   - tests/tcg/$(TARGET_NAME)
> 
> The order is important as the later Makefile's may want to suppress
> TESTS from its base arch profile. Each included Makefile.target is
> responsible for adding TESTS as well as defining any special build
> instructions for individual tests.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> 
> ---
> v2
>   - cleaner approach to include sub makefiles
>   - move TESTS/VPATH manipulation into sub-makefile
>   - avoid double inclusion when TARGET_BASE_ARCH==TARGET_NAME
> v4
>   - add timeout to default runner
>   - clean-up comments about build flags
>   - update to handle BUILD_STATIC
>   - add MAINTAINERS entry
> ---

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 29/49] tests/tcg/arm: disable -p 32768 mmap test
  2018-05-17 20:20   ` Richard Henderson
@ 2018-05-17 21:24     ` Alex Bennée
  2018-05-17 21:34       ` Richard Henderson
  0 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 21:24 UTC (permalink / raw)
  To: Richard Henderson
  Cc: cota, famz, berrange, f4bug, balrogg, aurelien, agraf,
	qemu-devel, Peter Maydell, open list:ARM


Richard Henderson <richard.henderson@linaro.org> writes:

> On 05/17/2018 10:46 AM, Alex Bennée wrote:
>> Broken since I updated to 18.04
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
>>  tests/tcg/arm/Makefile.target | 8 ++++++++
>>  1 file changed, 8 insertions(+)
>
> Meh.  Most of these fail for hosts with 64k pages.
> So, sure, disable this one, but I don't think that
> the others are useful either.

I'm not entirely sure what the point of -p is meant to be. Is it just a
performance hack for linux-user to have bigger pages? We are not using
softmmu but I guess it affects the PageDesc structures?

--
Alex Bennée

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 31/49] tests/tcg/aarch64: add Makefile.target
  2018-05-17 20:28   ` Richard Henderson
@ 2018-05-17 21:25     ` Alex Bennée
  0 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-17 21:25 UTC (permalink / raw)
  To: Richard Henderson
  Cc: cota, famz, berrange, f4bug, balrogg, aurelien, agraf,
	qemu-devel, Peter Maydell, open list:ARM


Richard Henderson <richard.henderson@linaro.org> writes:

> On 05/17/2018 10:47 AM, Alex Bennée wrote:
>> Nothing much here yet.
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
>>  tests/tcg/aarch64/Makefile.target | 5 +++++
>>  1 file changed, 5 insertions(+)
>>  create mode 100644 tests/tcg/aarch64/Makefile.target
>>
>> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
>> new file mode 100644
>> index 0000000000..4ac8fbe73f
>> --- /dev/null
>> +++ b/tests/tcg/aarch64/Makefile.target
>> @@ -0,0 +1,5 @@
>> +# -*- Mode: makefile -*-
>> +#
>> +# AArch64 specific tweaks
>> +
>> +fcvt: LDFLAGS+=-lm
>>
>
> Merge this with adding fcvt, surely.

Yeah... too much shuffling around.
>
>
> r~


--
Alex Bennée

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 29/49] tests/tcg/arm: disable -p 32768 mmap test
  2018-05-17 21:24     ` Alex Bennée
@ 2018-05-17 21:34       ` Richard Henderson
  2018-05-18  3:47         ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 85+ messages in thread
From: Richard Henderson @ 2018-05-17 21:34 UTC (permalink / raw)
  To: Alex Bennée
  Cc: cota, famz, berrange, f4bug, balrogg, aurelien, agraf,
	qemu-devel, Peter Maydell, open list:ARM

On 05/17/2018 02:24 PM, Alex Bennée wrote:
> 
> Richard Henderson <richard.henderson@linaro.org> writes:
> 
>> On 05/17/2018 10:46 AM, Alex Bennée wrote:
>>> Broken since I updated to 18.04
>>>
>>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>>> ---
>>>  tests/tcg/arm/Makefile.target | 8 ++++++++
>>>  1 file changed, 8 insertions(+)
>>
>> Meh.  Most of these fail for hosts with 64k pages.
>> So, sure, disable this one, but I don't think that
>> the others are useful either.
> 
> I'm not entirely sure what the point of -p is meant to be. Is it just a
> performance hack for linux-user to have bigger pages? We are not using
> softmmu but I guess it affects the PageDesc structures?

I think it was just meant for testing, but I really have no idea.

If we actually had better support for mismatched host/guest page sizes, then
one could view -p as a way to choose between legitimate guest page sizes.  E.g.
8k, 16k, 64k are all legitimate for aarch64.


r~

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 32/49] tests/tcg/arm: add fcvt test cases for AArch32/64
  2018-05-17 20:30   ` Richard Henderson
@ 2018-05-18  3:45     ` Philippe Mathieu-Daudé
  2018-05-18  8:16       ` Alex Bennée
  0 siblings, 1 reply; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18  3:45 UTC (permalink / raw)
  To: Richard Henderson, Alex Bennée, cota, famz, berrange,
	balrogg, aurelien, agraf
  Cc: qemu-devel, Peter Maydell, open list:ARM

[-- Attachment #1: Type: text/plain, Size: 2970 bytes --]

On 05/17/2018 05:30 PM, Richard Henderson wrote:
> On 05/17/2018 10:47 AM, Alex Bennée wrote:
>> This runs through the usual float to float conversions and crucially
>> also runs with ARM Alternative Half Precision Format.
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> [rth: tweak vcvtb.f16.f32/vctb.f32.f16 code and regen]
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>
>> ---
>> v4
>>   - add fcvt.ref and check results against it
>>   - fix single_to_half, single_to_double conversions
>>   - properly toggle AHP mode (fpsr->fpcr)
>>   - more values around the AHP margins
>>   - add INF/NAN/SNAN inputs
>>   - build for ARM and AArch64
>>   - fix bug for hex literals
>>   - add float-to-int
>>   - checkpatch fix
>> ---
> 
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Thanks Richard, I was not very motivated to review each line of the
fcvt.ref files =)

> diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
> index 9d2b551732..7bb777f442 100644
> --- a/tests/tcg/arm/Makefile.target
> +++ b/tests/tcg/arm/Makefile.target
> @@ -8,7 +8,9 @@ ARM_SRC=$(SRC_PATH)/tests/tcg/arm
>  # Set search path for all sources
>  VPATH 		+= $(ARM_SRC)
>
> -TESTS += hello-arm test-arm-iwmmxt
> +ARM_TESTS=hello-arm test-arm-iwmmxt
> +
> +TESTS += $(ARM_TESTS) fcvt
>
>  hello-arm: CFLAGS+=-marm -ffreestanding
>  hello-arm: LDFLAGS+=-nostdlib
> @@ -24,3 +26,14 @@ run-test-mmap: test-mmap
>  	$(call quiet-command, $(QEMU) -p 8192 $< 8192 > test-mmap-8192.out,
"TEST", "$< (8k pages) on $(TARGET_NAME)")
>  	$(call quiet-command, $(QEMU) -p 16384 $< 16384 >
test-mmap-16384.out, "TEST", "$< (16k pages) on $(TARGET_NAME)")
>  endif
> +
> +ifeq ($(TARGET_NAME), arm)
> +fcvt: LDFLAGS+=-lm
> +# fcvt: CFLAGS+=-march=armv8.2-a+fp16 -mfpu=neon-fp-armv8

Alex, What is your idea here, enable this later?
Maybe add some TODO comment around..

Except this nit, for both Makefile.target:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> +
> +run-fcvt: fcvt
> +	$(call quiet-command, \
> +		$(QEMU) $< > fcvt.out && \
> +		diff -u $(ARM_SRC)/fcvt.ref fcvt.out, \
> +		"TEST", "$< (default) on $(TARGET_NAME)")
> +endif

$ make -j1 run-tcg-tests-aarch64-linux-user
  BUILD   debian9
  BUILD   debian-arm64-cross
  CROSS-BUILD aarch64 guest-tests with docker qemu:debian-arm64-cross
  BUILD   debian9
  BUILD   debian-arm64-cross
  CROSS-BUILD aarch64 guest-tests with docker qemu:debian-arm64-cross
  RUN-TESTS for aarch64
  TEST    test-mmap (default) on aarch64
  TEST    test-mmap (8k pages) on aarch64
  TEST    test-mmap (16k pages) on aarch64
  TEST    test-mmap (32k pages) on aarch64
  TEST    sha1 on aarch64
  TEST    linux-test on aarch64
  TEST    testthread on aarch64
  TEST    fcvt (default) on aarch64
  TEST    sysregs on aarch64

\o/

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>



[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 29/49] tests/tcg/arm: disable -p 32768 mmap test
  2018-05-17 21:34       ` Richard Henderson
@ 2018-05-18  3:47         ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18  3:47 UTC (permalink / raw)
  To: Richard Henderson, Alex Bennée
  Cc: cota, famz, berrange, balrogg, aurelien, agraf, qemu-devel,
	Peter Maydell, open list:ARM

On 05/17/2018 06:34 PM, Richard Henderson wrote:
> On 05/17/2018 02:24 PM, Alex Bennée wrote:
>>
>> Richard Henderson <richard.henderson@linaro.org> writes:
>>
>>> On 05/17/2018 10:46 AM, Alex Bennée wrote:
>>>> Broken since I updated to 18.04
>>>>
>>>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>>>> ---
>>>>  tests/tcg/arm/Makefile.target | 8 ++++++++
>>>>  1 file changed, 8 insertions(+)
>>>
>>> Meh.  Most of these fail for hosts with 64k pages.
>>> So, sure, disable this one, but I don't think that
>>> the others are useful either.
>>
>> I'm not entirely sure what the point of -p is meant to be. Is it just a
>> performance hack for linux-user to have bigger pages? We are not using
>> softmmu but I guess it affects the PageDesc structures?
> 
> I think it was just meant for testing, but I really have no idea.
> 
> If we actually had better support for mismatched host/guest page sizes, then
> one could view -p as a way to choose between legitimate guest page sizes.  E.g.
> 8k, 16k, 64k are all legitimate for aarch64.

8k + 16k on aarch64:
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 32/49] tests/tcg/arm: add fcvt test cases for AArch32/64
  2018-05-18  3:45     ` Philippe Mathieu-Daudé
@ 2018-05-18  8:16       ` Alex Bennée
  2018-05-18 14:53         ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 85+ messages in thread
From: Alex Bennée @ 2018-05-18  8:16 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Richard Henderson, cota, famz, berrange, balrogg, aurelien,
	agraf, qemu-devel, Peter Maydell, open list:ARM


Philippe Mathieu-Daudé <f4bug@amsat.org> writes:

> On 05/17/2018 05:30 PM, Richard Henderson wrote:
>> On 05/17/2018 10:47 AM, Alex Bennée wrote:
>>> This runs through the usual float to float conversions and crucially
>>> also runs with ARM Alternative Half Precision Format.
>>>
>>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>>> [rth: tweak vcvtb.f16.f32/vctb.f32.f16 code and regen]
>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>>
>>> ---
>>> v4
>>>   - add fcvt.ref and check results against it
>>>   - fix single_to_half, single_to_double conversions
>>>   - properly toggle AHP mode (fpsr->fpcr)
>>>   - more values around the AHP margins
>>>   - add INF/NAN/SNAN inputs
>>>   - build for ARM and AArch64
>>>   - fix bug for hex literals
>>>   - add float-to-int
>>>   - checkpatch fix
>>> ---
>>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
> Thanks Richard, I was not very motivated to review each line of the
> fcvt.ref files =)
>
>> diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
>> index 9d2b551732..7bb777f442 100644
>> --- a/tests/tcg/arm/Makefile.target
>> +++ b/tests/tcg/arm/Makefile.target
>> @@ -8,7 +8,9 @@ ARM_SRC=$(SRC_PATH)/tests/tcg/arm
>>  # Set search path for all sources
>>  VPATH 		+= $(ARM_SRC)
>>
>> -TESTS += hello-arm test-arm-iwmmxt
>> +ARM_TESTS=hello-arm test-arm-iwmmxt
>> +
>> +TESTS += $(ARM_TESTS) fcvt
>>
>>  hello-arm: CFLAGS+=-marm -ffreestanding
>>  hello-arm: LDFLAGS+=-nostdlib
>> @@ -24,3 +26,14 @@ run-test-mmap: test-mmap
>>  	$(call quiet-command, $(QEMU) -p 8192 $< 8192 > test-mmap-8192.out,
> "TEST", "$< (8k pages) on $(TARGET_NAME)")
>>  	$(call quiet-command, $(QEMU) -p 16384 $< 16384 >
> test-mmap-16384.out, "TEST", "$< (16k pages) on $(TARGET_NAME)")
>>  endif
>> +
>> +ifeq ($(TARGET_NAME), arm)
>> +fcvt: LDFLAGS+=-lm
>> +# fcvt: CFLAGS+=-march=armv8.2-a+fp16 -mfpu=neon-fp-armv8
>
> Alex, What is your idea here, enable this later?
> Maybe add some TODO comment around..

How about:

# AArch32 doesn't support all combinations of FP16<->FOO in it's base
# profile. Once the AArch32 profile is caught up we should build an
# additional binary and reference to test the additional combinations.

I backed the change out when I realised the stretch compiler didn't
support the same range as my local (18.04) gcc's.

>
> Except this nit, for both Makefile.target:
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
>> +
>> +run-fcvt: fcvt
>> +	$(call quiet-command, \
>> +		$(QEMU) $< > fcvt.out && \
>> +		diff -u $(ARM_SRC)/fcvt.ref fcvt.out, \
>> +		"TEST", "$< (default) on $(TARGET_NAME)")
>> +endif
>
> $ make -j1 run-tcg-tests-aarch64-linux-user
>   BUILD   debian9
>   BUILD   debian-arm64-cross
>   CROSS-BUILD aarch64 guest-tests with docker qemu:debian-arm64-cross
>   BUILD   debian9
>   BUILD   debian-arm64-cross
>   CROSS-BUILD aarch64 guest-tests with docker qemu:debian-arm64-cross
>   RUN-TESTS for aarch64
>   TEST    test-mmap (default) on aarch64
>   TEST    test-mmap (8k pages) on aarch64
>   TEST    test-mmap (16k pages) on aarch64
>   TEST    test-mmap (32k pages) on aarch64
>   TEST    sha1 on aarch64
>   TEST    linux-test on aarch64
>   TEST    testthread on aarch64
>   TEST    fcvt (default) on aarch64
>   TEST    sysregs on aarch64
>
> \o/
>
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


--
Alex Bennée

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 18/49] tests/tcg: enable building for i386
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 18/49] tests/tcg: enable building for i386 Alex Bennée
@ 2018-05-18 11:28   ` Paolo Bonzini
  0 siblings, 0 replies; 85+ messages in thread
From: Paolo Bonzini @ 2018-05-18 11:28 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, richard.henderson,
	balrogg, aurelien, agraf
  Cc: qemu-devel, Richard Henderson, Eduardo Habkost

On 17/05/2018 19:46, Alex Bennée wrote:
> +
> +# Specialist test runners
> +.PHONY: pi_10.com
> +pi_10.com:
> +	cp $(I386_SRC)/pi_10.com .
> +
> +run-runcom: runcom pi_10.com
> +	$(call quiet-command, $(QEMU) ./runcom ./pi_10.com > runcom.out, "TEST", "$< on $(TARGET_NAME)")
> +

Why not just "$(QEMU) ./runcom $(I386_SRC)/pi_10.com" without the copy rule?

Paolo

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 21/49] tests/tcg/i386: add runner for test-i386-fprem
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 21/49] tests/tcg/i386: add runner for test-i386-fprem Alex Bennée
@ 2018-05-18 11:30   ` Paolo Bonzini
  2018-05-18 12:27     ` Alex Bennée
  0 siblings, 1 reply; 85+ messages in thread
From: Paolo Bonzini @ 2018-05-18 11:30 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, richard.henderson,
	balrogg, aurelien, agraf
  Cc: qemu-devel, Richard Henderson, Eduardo Habkost

On 17/05/2018 19:46, Alex Bennée wrote:
> The runner needs to compare against a reference run. We also only run
> this test when SPEED=slow as it takes a while.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/tcg/i386/Makefile.target   | 11 +++++++++++
>  tests/tcg/i386/test-i386-fprem.c | 12 +++++++++---
>  2 files changed, 20 insertions(+), 3 deletions(-)
> 
> diff --git a/tests/tcg/i386/Makefile.target b/tests/tcg/i386/Makefile.target
> index 39a1627650..94fa50abbc 100644
> --- a/tests/tcg/i386/Makefile.target
> +++ b/tests/tcg/i386/Makefile.target
> @@ -37,3 +37,14 @@ pi_10.com:
>  run-runcom: runcom pi_10.com
>  	$(call quiet-command, $(QEMU) ./runcom ./pi_10.com > runcom.out, "TEST", "$< on $(TARGET_NAME)")
>  
> +ifeq ($(SPEED), slow)
> +run-test-i386-fprem: test-i386-fprem
> +	$(call quiet-command, \
> +		$(QEMU) $< > $<.out && \
> +		diff -u $(I386_SRC)/$<.ref $<.out, \
> +		"TEST", "$< (default) on $(TARGET_NAME)")

Where is the .ref file created?

Thanks,

Paolo

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [qemu-s390x] [PATCH v4 36/49] tests/tcg: enable building for s390x
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 36/49] tests/tcg: enable building for s390x Alex Bennée
@ 2018-05-18 12:04   ` David Hildenbrand
  0 siblings, 0 replies; 85+ messages in thread
From: David Hildenbrand @ 2018-05-18 12:04 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, f4bug, richard.henderson,
	balrogg, aurelien, agraf
  Cc: open list:S390, Cornelia Huck, qemu-devel

On 17.05.2018 19:47, Alex Bennée wrote:
> This doesn't add any additional tests but enables building the
> multiarch tests for s390x.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Acked-by: Cornelia Huck <cohuck@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  tests/tcg/s390x/Makefile.include | 2 ++
>  1 file changed, 2 insertions(+)
>  create mode 100644 tests/tcg/s390x/Makefile.include
> 
> diff --git a/tests/tcg/s390x/Makefile.include b/tests/tcg/s390x/Makefile.include
> new file mode 100644
> index 0000000000..1f58115d96
> --- /dev/null
> +++ b/tests/tcg/s390x/Makefile.include
> @@ -0,0 +1,2 @@
> +DOCKER_IMAGE=debian-s390x-cross
> +DOCKER_CROSS_COMPILER=s390x-linux-gnu-gcc
> 

Reviewed-by: David Hildenbrand <david@redhat.com>

-- 

Thanks,

David / dhildenb

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 21/49] tests/tcg/i386: add runner for test-i386-fprem
  2018-05-18 11:30   ` Paolo Bonzini
@ 2018-05-18 12:27     ` Alex Bennée
  0 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-18 12:27 UTC (permalink / raw)
  To: Paolo Bonzini
  Cc: cota, famz, berrange, f4bug, richard.henderson, balrogg,
	aurelien, agraf, qemu-devel, Richard Henderson, Eduardo Habkost


Paolo Bonzini <pbonzini@redhat.com> writes:

> On 17/05/2018 19:46, Alex Bennée wrote:
>> The runner needs to compare against a reference run. We also only run
>> this test when SPEED=slow as it takes a while.
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
>>  tests/tcg/i386/Makefile.target   | 11 +++++++++++
>>  tests/tcg/i386/test-i386-fprem.c | 12 +++++++++---
>>  2 files changed, 20 insertions(+), 3 deletions(-)
>>
>> diff --git a/tests/tcg/i386/Makefile.target b/tests/tcg/i386/Makefile.target
>> index 39a1627650..94fa50abbc 100644
>> --- a/tests/tcg/i386/Makefile.target
>> +++ b/tests/tcg/i386/Makefile.target
>> @@ -37,3 +37,14 @@ pi_10.com:
>>  run-runcom: runcom pi_10.com
>>  	$(call quiet-command, $(QEMU) ./runcom ./pi_10.com > runcom.out, "TEST", "$< on $(TARGET_NAME)")
>>
>> +ifeq ($(SPEED), slow)
>> +run-test-i386-fprem: test-i386-fprem
>> +	$(call quiet-command, \
>> +		$(QEMU) $< > $<.out && \
>> +		diff -u $(I386_SRC)/$<.ref $<.out, \
>> +		"TEST", "$< (default) on $(TARGET_NAME)")
>
> Where is the .ref file created?

Ooops, forgot to commit that.

I just manually ran it against real hardware ;-)

>
> Thanks,
>
> Paolo


--
Alex Bennée

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 38/49] tests/tcg: enable building for Alpha
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 38/49] tests/tcg: enable building for Alpha Alex Bennée
@ 2018-05-18 14:21   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18 14:21 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, richard.henderson,
	balrogg, aurelien, agraf
  Cc: qemu-devel, Richard Henderson

Hi Alex,

On 05/17/2018 02:47 PM, Alex Bennée wrote:
> We can't use our normal Debian based compilers as Alpha isn't an
> officially supported architecture. However it is available as a port
> and fortunately cross compilers for all these targets are included in
> Debian Sid, the perpetual rolling/unstable/testing version of Debian.

I see 2/3 commits at once here.

> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/docker/Makefile.include                 |  1 +
>  .../dockerfiles/debian-alpha-cross.docker     | 12 +++++++
>  .../dockerfiles/debian-cross-build.docker     | 36 +++++++++++++++++++
>  tests/docker/dockerfiles/debian-sid.docker    | 23 ++++++++++++
>  tests/tcg/alpha/Makefile.include              |  2 ++
>  5 files changed, 74 insertions(+)
>  create mode 100644 tests/docker/dockerfiles/debian-alpha-cross.docker

^ Alpha

>  create mode 100644 tests/docker/dockerfiles/debian-cross-build.docker

^ for guest-tests I presume.

>  create mode 100644 tests/docker/dockerfiles/debian-sid.docker

^ cross base

I'd like to review the debian-sid.docker separately than the Alpha part.

>  create mode 100644 tests/tcg/alpha/Makefile.include
> 
> diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
> index 6a5aa9ec71..bcf44e80c4 100644
> --- a/tests/docker/Makefile.include
> +++ b/tests/docker/Makefile.include
> @@ -62,6 +62,7 @@ docker-image-debian-ppc64el-cross: docker-image-debian9
>  docker-image-debian-s390x-cross: docker-image-debian9
>  docker-image-debian-win32-cross: docker-image-debian8-mxe
>  docker-image-debian-win64-cross: docker-image-debian8-mxe
> +docker-image-debian-alpha-cross: docker-image-debian-sid
>  docker-image-travis: NOUSER=1
>  
>  # Expand all the pre-requistes for each docker image and test combination
> diff --git a/tests/docker/dockerfiles/debian-alpha-cross.docker b/tests/docker/dockerfiles/debian-alpha-cross.docker
> new file mode 100644
> index 0000000000..e446f7af3f
> --- /dev/null
> +++ b/tests/docker/dockerfiles/debian-alpha-cross.docker
> @@ -0,0 +1,12 @@
> +#
> +# Docker cross-compiler target
> +#
> +# This docker target builds on the debian sid base image which
> +# contains cross compilers for Debian "ports" targets.
> +#
> +FROM qemu:debian-sid
> +
> +RUN DEBIAN_FRONTEND=noninteractive eatmydata \
> +    apt-get install -y --no-install-recommends \
> +        gcc-alpha-linux-gnu \
> +        libc6.1-dev-alpha-cross
> diff --git a/tests/docker/dockerfiles/debian-cross-build.docker b/tests/docker/dockerfiles/debian-cross-build.docker
> new file mode 100644
> index 0000000000..c3611a7d3a
> --- /dev/null
> +++ b/tests/docker/dockerfiles/debian-cross-build.docker
> @@ -0,0 +1,36 @@
> +#
> +# Docker multiarch cross-compiler target
> +#
> +# This docker target is builds on Debian cross compiler targets to build distro
> +# with a selection of cross compilers for building test binaries.
> +#
> +# On its own you can't build much but the docker-foo-cross targets
> +# build on top of the base debian image.
> +#
> +FROM debian:stretch
> +
> +# Duplicate deb line as deb-src
> +RUN cat /etc/apt/sources.list | sed "s/^deb\ /deb-src /" >> /etc/apt/sources.list
> +
> +# Install common build utilities
> +RUN apt update
> +RUN DEBIAN_FRONTEND=noninteractive apt install -yy eatmydata
> +RUN DEBIAN_FRONTEND=noninteractive eatmydata \
> +    apt install -y --no-install-recommends \
> +        bison \
> +        build-essential \
> +        ca-certificates \
> +        flex \
> +        gettext \
> +        git \
> +        libgmp-dev \
> +        libmpfr-dev \
> +        libmpc-dev \
> +        pkg-config \
> +        psmisc \
> +        python \
> +        texinfo \
> +        wget \
> +        $(apt-get -s build-dep binutils | egrep ^Inst | cut -d\  -f2) \
> +        $(apt-get -s build-dep gcc | egrep ^Inst | cut -d\  -f2) \
> +        $(apt-get -s build-dep glibc | egrep ^Inst | cut -d\  -f2)
> diff --git a/tests/docker/dockerfiles/debian-sid.docker b/tests/docker/dockerfiles/debian-sid.docker
> new file mode 100644
> index 0000000000..adeb7134ca
> --- /dev/null
> +++ b/tests/docker/dockerfiles/debian-sid.docker
> @@ -0,0 +1,23 @@
> +#
> +# A number of our guests exist as ports only. We can either use the ports repo or get everything from SID
> +#
> +
> +FROM debian:sid-slim
> +
> +# Duplicate deb line as deb-src
> +RUN cat /etc/apt/sources.list | sed "s/^deb\ /deb-src /" >> /etc/apt/sources.list
> +
> +# Install common build utilities
> +RUN apt update
> +RUN DEBIAN_FRONTEND=noninteractive apt install -yy eatmydata
> +RUN DEBIAN_FRONTEND=noninteractive eatmydata \
> +    apt install -y --no-install-recommends \
> +        bison \
> +        build-essential \
> +        ca-certificates \
> +        flex \
> +        git \
> +        pkg-config \
> +        psmisc \
> +        python \
> +        texinfo
> diff --git a/tests/tcg/alpha/Makefile.include b/tests/tcg/alpha/Makefile.include
> new file mode 100644
> index 0000000000..c7dc48eadb
> --- /dev/null
> +++ b/tests/tcg/alpha/Makefile.include
> @@ -0,0 +1,2 @@
> +DOCKER_IMAGE=debian-alpha-cross
> +DOCKER_CROSS_COMPILER=alpha-linux-gnu-gcc
> 

Ignoring the Debian "Sid/unstable" problems (I'll develop this replying
to the cover), and using a snapshot:

-- >8 --
diff --git a/tests/docker/dockerfiles/debian-sid.docker
b/tests/docker/dockerfiles/debian-sid.docker
-# Duplicate deb line as deb-src
-RUN cat /etc/apt/sources.list | sed "s/^deb\ /deb-src /" >>
/etc/apt/sources.list
+# random 'working' snapshot
+RUN echo "deb
http://snapshot.debian.org/archive/debian/20180512T101008Z/ sid main" >
/etc/apt/sources.list && \
+    echo "deb-src
http://snapshot.debian.org/archive/debian/20180512T101008Z/ sid main" >>
/etc/apt/sources.list
--

For the Alpha part:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 45/49] tests/tcg: enable building for RISCV64
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 45/49] tests/tcg: enable building for RISCV64 Alex Bennée
@ 2018-05-18 14:24   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18 14:24 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, richard.henderson,
	balrogg, aurelien, agraf
  Cc: qemu-devel

On 05/17/2018 02:47 PM, Alex Bennée wrote:
> As before, using Debian SID compilers.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/docker/Makefile.include                        |  1 +
>  tests/docker/dockerfiles/debian-riscv64-cross.docker | 12 ++++++++++++
>  tests/tcg/riscv/Makefile.include                     | 10 ++++++++++
>  3 files changed, 23 insertions(+)
>  create mode 100644 tests/docker/dockerfiles/debian-riscv64-cross.docker
>  create mode 100644 tests/tcg/riscv/Makefile.include
> 
> diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
> index f58afb8c5d..d00887bdf1 100644
> --- a/tests/docker/Makefile.include
> +++ b/tests/docker/Makefile.include
> @@ -68,6 +68,7 @@ docker-image-debian-m68k-cross: docker-image-debian-sid
>  docker-image-debian-sh4-cross: docker-image-debian-sid
>  docker-image-debian-sparc64-cross: docker-image-debian-sid
>  docker-image-debian-mips64-cross: docker-image-debian-sid
> +docker-image-debian-riscv64-cross: docker-image-debian-sid
>  docker-image-travis: NOUSER=1
>  
>  # Expand all the pre-requistes for each docker image and test combination
> diff --git a/tests/docker/dockerfiles/debian-riscv64-cross.docker b/tests/docker/dockerfiles/debian-riscv64-cross.docker
> new file mode 100644
> index 0000000000..2b2e64cee6
> --- /dev/null
> +++ b/tests/docker/dockerfiles/debian-riscv64-cross.docker
> @@ -0,0 +1,12 @@
> +#
> +# Docker cross-compiler target
> +#
> +# This docker target builds on the debian sid base image which
> +# contains cross compilers for Debian "ports" targets.
> +#
> +FROM qemu:debian-sid
> +
> +RUN DEBIAN_FRONTEND=noninteractive eatmydata \
> +    apt-get install -y --no-install-recommends \
> +        gcc-riscv64-linux-gnu \
> +        libc6-dev-riscv64-cross
> diff --git a/tests/tcg/riscv/Makefile.include b/tests/tcg/riscv/Makefile.include
> new file mode 100644
> index 0000000000..d92ac6c89f
> --- /dev/null
> +++ b/tests/tcg/riscv/Makefile.include
> @@ -0,0 +1,10 @@
> +#
> +# Makefile.include for all RISCV targets
> +#
> +# Debian only really cares about 64 bit going forward
> +#
> +
> +ifeq ($(TARGET_NAME),riscv64)
> +DOCKER_IMAGE=debian-riscv64-cross
> +DOCKER_CROSS_COMPILER=riscv64-linux-gnu-gcc
> +endif
> 

Using a snapshot:

-- >8 --
diff --git a/tests/docker/dockerfiles/debian-sid.docker
b/tests/docker/dockerfiles/debian-sid.docker
-# Duplicate deb line as deb-src
-RUN cat /etc/apt/sources.list | sed "s/^deb\ /deb-src /" >>
/etc/apt/sources.list
+# random 'working' snapshot
+RUN echo "deb
http://snapshot.debian.org/archive/debian/20180512T101008Z/ sid main" >
/etc/apt/sources.list && \
+    echo "deb-src
http://snapshot.debian.org/archive/debian/20180512T101008Z/ sid main" >>
/etc/apt/sources.list
--

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 39/49] tests/tcg/alpha: add Alpha specific tests
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 39/49] tests/tcg/alpha: add Alpha specific tests Alex Bennée
  2018-05-17 20:41   ` Richard Henderson
@ 2018-05-18 14:25   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18 14:25 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, richard.henderson,
	balrogg, aurelien, agraf
  Cc: qemu-devel, Richard Henderson

On 05/17/2018 02:47 PM, Alex Bennée wrote:
> These tests did use their own crt.o stub however that is a little
> stone age so we drop crt.S and just statically link to the cross
> compilers libraries.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> 
> ---
> v4
>   - drop crt.s
>   - drop skipping of threadtest
>   - drop write() hack, include unistd.h
> ---
>  tests/tcg/alpha/Makefile        | 35 ---------------------------------
>  tests/tcg/alpha/Makefile.target | 15 ++++++++++++++
>  tests/tcg/alpha/crt.s           | 26 ------------------------
>  tests/tcg/alpha/hello-alpha.c   |  2 ++
>  tests/tcg/alpha/test-cond.c     |  1 +
>  tests/tcg/alpha/test-ovf.c      |  2 ++
>  6 files changed, 20 insertions(+), 61 deletions(-)
>  delete mode 100644 tests/tcg/alpha/Makefile
>  create mode 100644 tests/tcg/alpha/Makefile.target
>  delete mode 100644 tests/tcg/alpha/crt.s
> 
> diff --git a/tests/tcg/alpha/Makefile b/tests/tcg/alpha/Makefile
> deleted file mode 100644
> index 2b1f03d048..0000000000
> --- a/tests/tcg/alpha/Makefile
> +++ /dev/null
> @@ -1,35 +0,0 @@
> -CROSS=alpha-linux-gnu-
> -CC=$(CROSS)gcc
> -AS=$(CROSS)as
> -
> -SIM=../../alpha-linux-user/qemu-alpha
> -
> -CFLAGS=-O
> -LINK=$(CC) -o $@ crt.o $< -nostdlib
> -
> -TESTS=test-cond test-cmov
> -
> -all: hello-alpha $(TESTS)
> -
> -hello-alpha: hello-alpha.o crt.o
> -	$(LINK)
> -
> -test-cond: test-cond.o crt.o
> -	$(LINK)
> -
> -test-cmov.o: test-cond.c
> -	$(CC) -c $(CFLAGS) -DTEST_CMOV -o $@ $<
> -
> -test-cmov: test-cmov.o crt.o
> -	$(LINK)
> -
> -test-ovf: test-ovf.o crt.o
> -	$(LINK)
> -
> -check: $(TESTS)
> -	for f in $(TESTS); do $(SIM) $$f || exit 1; done
> -
> -clean:
> -	$(RM) *.o *~ hello-alpha $(TESTS)
> -
> -.PHONY: clean all check
> diff --git a/tests/tcg/alpha/Makefile.target b/tests/tcg/alpha/Makefile.target
> new file mode 100644
> index 0000000000..b253cee1fc
> --- /dev/null
> +++ b/tests/tcg/alpha/Makefile.target
> @@ -0,0 +1,15 @@
> +# -*- Mode: makefile -*-
> +#
> +# Alpha specific tweaks
> +
> +ALPHA_SRC=$(SRC_PATH)/tests/tcg/alpha
> +VPATH+=$(ALPHA_SRC)
> +
> +ALPHA_TESTS=hello-alpha test-cond test-cmov test-ovf
> +TESTS+=$(ALPHA_TESTS)
> +
> +test-cmov: EXTRA_CFLAGS=-DTEST_CMOV
> +test-cmov: test-cond.c
> +	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
> +
> +run-test-cmov: test-cmov
> diff --git a/tests/tcg/alpha/crt.s b/tests/tcg/alpha/crt.s
> deleted file mode 100644
> index 31af8825bc..0000000000
> --- a/tests/tcg/alpha/crt.s
> +++ /dev/null
> @@ -1,26 +0,0 @@
> -	.text
> -
> -	.globl _start
> -	.ent _start,0
> -_start:
> -	.frame $15,0,$15
> -	br $29,1f
> -1:	ldgp $29, 0($29)
> -	.prologue 0
> -	ldq $27,main($29) !literal!1
> -	jsr $26,($27)
> -	or $0,$0,$16
> -	.end _start
> -
> -	.globl _exit
> -_exit:
> -	lda $0,1
> -	callsys
> -
> -	call_pal 0
> -
> -	.globl write
> -write:
> -	lda $0,4
> -	callsys
> -	ret
> diff --git a/tests/tcg/alpha/hello-alpha.c b/tests/tcg/alpha/hello-alpha.c
> index 79892e6522..84e43b2fc4 100644
> --- a/tests/tcg/alpha/hello-alpha.c
> +++ b/tests/tcg/alpha/hello-alpha.c
> @@ -1,3 +1,5 @@
> +#include <unistd.h>
> +
>  int main (void)
>  {
>    write (1, "hello\n", 6);
> diff --git a/tests/tcg/alpha/test-cond.c b/tests/tcg/alpha/test-cond.c
> index 74adffaa69..e625313b3e 100644
> --- a/tests/tcg/alpha/test-cond.c
> +++ b/tests/tcg/alpha/test-cond.c
> @@ -1,3 +1,4 @@
> +#include <unistd.h>
>  
>  #ifdef TEST_CMOV
>  
> diff --git a/tests/tcg/alpha/test-ovf.c b/tests/tcg/alpha/test-ovf.c
> index 01c80e7525..17892f1e89 100644
> --- a/tests/tcg/alpha/test-ovf.c
> +++ b/tests/tcg/alpha/test-ovf.c
> @@ -1,3 +1,5 @@
> +#include <unistd.h>
> +
>  static long test_subqv (long a, long b)
>  {
>    long res;
> 

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 44/49] tests/tcg: enable building for mips64
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 44/49] tests/tcg: enable building for mips64 Alex Bennée
@ 2018-05-18 14:26   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18 14:26 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, richard.henderson,
	balrogg, aurelien, agraf
  Cc: qemu-devel, Yongbok Kim

On 05/17/2018 02:47 PM, Alex Bennée wrote:
> As before, using Debian SID compilers.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/docker/Makefile.include                       |  1 +
>  tests/docker/dockerfiles/debian-mips64-cross.docker | 12 ++++++++++++
>  tests/tcg/mips/Makefile.include                     |  3 +++
>  3 files changed, 16 insertions(+)
>  create mode 100644 tests/docker/dockerfiles/debian-mips64-cross.docker
> 
> diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
> index 62d1f4dec0..f58afb8c5d 100644
> --- a/tests/docker/Makefile.include
> +++ b/tests/docker/Makefile.include
> @@ -67,6 +67,7 @@ docker-image-debian-hppa-cross: docker-image-debian-sid
>  docker-image-debian-m68k-cross: docker-image-debian-sid
>  docker-image-debian-sh4-cross: docker-image-debian-sid
>  docker-image-debian-sparc64-cross: docker-image-debian-sid
> +docker-image-debian-mips64-cross: docker-image-debian-sid
>  docker-image-travis: NOUSER=1
>  
>  # Expand all the pre-requistes for each docker image and test combination
> diff --git a/tests/docker/dockerfiles/debian-mips64-cross.docker b/tests/docker/dockerfiles/debian-mips64-cross.docker
> new file mode 100644
> index 0000000000..ed1ce0e919
> --- /dev/null
> +++ b/tests/docker/dockerfiles/debian-mips64-cross.docker
> @@ -0,0 +1,12 @@
> +#
> +# Docker cross-compiler target
> +#
> +# This docker target builds on the debian sid base image which
> +# contains cross compilers for Debian "ports" targets.
> +#
> +FROM qemu:debian-sid
> +
> +RUN DEBIAN_FRONTEND=noninteractive eatmydata \
> +    apt-get install -y --no-install-recommends \
> +        gcc-mips64-linux-gnuabi64 \
> +        libc6-dev-mips64-cross
> diff --git a/tests/tcg/mips/Makefile.include b/tests/tcg/mips/Makefile.include
> index a9beceb623..4a14fc078d 100644
> --- a/tests/tcg/mips/Makefile.include
> +++ b/tests/tcg/mips/Makefile.include
> @@ -8,6 +8,9 @@
>  ifeq ($(TARGET_NAME),mips64el)
>  DOCKER_IMAGE=debian-mips64el-cross
>  DOCKER_CROSS_COMPILER=mips64el-linux-gnuabi64-gcc
> +else ifeq ($(TARGET_NAME),mips64)
> +DOCKER_IMAGE=debian-mips64-cross
> +DOCKER_CROSS_COMPILER=mips64-linux-gnuabi64-gcc
>  else ifeq ($(TARGET_NAME),mipsel)
>  DOCKER_IMAGE=debian-mipsel-cross
>  DOCKER_CROSS_COMPILER=mipsel-linux-gnu-gcc
> 

Using a snapshot:

-- >8 --
diff --git a/tests/docker/dockerfiles/debian-sid.docker
b/tests/docker/dockerfiles/debian-sid.docker
-# Duplicate deb line as deb-src
-RUN cat /etc/apt/sources.list | sed "s/^deb\ /deb-src /" >>
/etc/apt/sources.list
+# random 'working' snapshot
+RUN echo "deb
http://snapshot.debian.org/archive/debian/20180512T101008Z/ sid main" >
/etc/apt/sources.list && \
+    echo "deb-src
http://snapshot.debian.org/archive/debian/20180512T101008Z/ sid main" >>
/etc/apt/sources.list
--

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 43/49] tests/tcg: enable building for sparc64
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 43/49] tests/tcg: enable building for sparc64 Alex Bennée
@ 2018-05-18 14:28   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18 14:28 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, richard.henderson,
	balrogg, aurelien, agraf
  Cc: qemu-devel

On 05/17/2018 02:47 PM, Alex Bennée wrote:
> As before, using Debian SID compilers.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/docker/Makefile.include                        |  1 +
>  tests/docker/dockerfiles/debian-sparc64-cross.docker | 12 ++++++++++++
>  tests/tcg/sparc64/Makefile.include                   |  2 ++
>  3 files changed, 15 insertions(+)
>  create mode 100644 tests/docker/dockerfiles/debian-sparc64-cross.docker
>  create mode 100644 tests/tcg/sparc64/Makefile.include
> 
> diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
> index c08f32ca58..62d1f4dec0 100644
> --- a/tests/docker/Makefile.include
> +++ b/tests/docker/Makefile.include
> @@ -66,6 +66,7 @@ docker-image-debian-alpha-cross: docker-image-debian-sid
>  docker-image-debian-hppa-cross: docker-image-debian-sid
>  docker-image-debian-m68k-cross: docker-image-debian-sid
>  docker-image-debian-sh4-cross: docker-image-debian-sid
> +docker-image-debian-sparc64-cross: docker-image-debian-sid
>  docker-image-travis: NOUSER=1
>  
>  # Expand all the pre-requistes for each docker image and test combination
> diff --git a/tests/docker/dockerfiles/debian-sparc64-cross.docker b/tests/docker/dockerfiles/debian-sparc64-cross.docker
> new file mode 100644
> index 0000000000..1e2c809274
> --- /dev/null
> +++ b/tests/docker/dockerfiles/debian-sparc64-cross.docker
> @@ -0,0 +1,12 @@
> +#
> +# Docker cross-compiler target
> +#
> +# This docker target builds on the debian sid base image which
> +# contains cross compilers for Debian "ports" targets.
> +#
> +FROM qemu:debian-sid
> +
> +RUN DEBIAN_FRONTEND=noninteractive eatmydata \
> +    apt-get install -y --no-install-recommends \
> +        gcc-sparc64-linux-gnu \
> +        libc6-dev-sparc64-cross
> diff --git a/tests/tcg/sparc64/Makefile.include b/tests/tcg/sparc64/Makefile.include
> new file mode 100644
> index 0000000000..95fc8dee9f
> --- /dev/null
> +++ b/tests/tcg/sparc64/Makefile.include
> @@ -0,0 +1,2 @@
> +DOCKER_IMAGE=debian-sparc64-cross
> +DOCKER_CROSS_COMPILER=sparc64-linux-gnu-gcc
> 

Using a snapshot:

-- >8 --
diff --git a/tests/docker/dockerfiles/debian-sid.docker
b/tests/docker/dockerfiles/debian-sid.docker
-# Duplicate deb line as deb-src
-RUN cat /etc/apt/sources.list | sed "s/^deb\ /deb-src /" >>
/etc/apt/sources.list
+# random 'working' snapshot
+RUN echo "deb
http://snapshot.debian.org/archive/debian/20180512T101008Z/ sid main" >
/etc/apt/sources.list && \
+    echo "deb-src
http://snapshot.debian.org/archive/debian/20180512T101008Z/ sid main" >>
/etc/apt/sources.list
--

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 34/49] tests/tcg: enable building for MIPS
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 34/49] tests/tcg: enable building for MIPS Alex Bennée
@ 2018-05-18 14:49   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18 14:49 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, richard.henderson,
	balrogg, aurelien, agraf
  Cc: qemu-devel, Yongbok Kim

On 05/17/2018 02:47 PM, Alex Bennée wrote:
> This doesn't add any additional tests but enables building the
> multiarch tests for MIPS using docker cross compilers. We don't have a
> cross compiler for mips64 big endian though.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/tcg/mips/Makefile.include | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>  create mode 100644 tests/tcg/mips/Makefile.include
> 
> diff --git a/tests/tcg/mips/Makefile.include b/tests/tcg/mips/Makefile.include
> new file mode 100644
> index 0000000000..a9beceb623
> --- /dev/null
> +++ b/tests/tcg/mips/Makefile.include
> @@ -0,0 +1,17 @@
> +#
> +# Makefile.include for all MIPs targets
> +#
> +# As Debian doesn't support mip64 in big endian mode the only way to
> +# build BE is to pass a working cross compiler to ./configure
> +#
> +
> +ifeq ($(TARGET_NAME),mips64el)
> +DOCKER_IMAGE=debian-mips64el-cross
> +DOCKER_CROSS_COMPILER=mips64el-linux-gnuabi64-gcc
> +else ifeq ($(TARGET_NAME),mipsel)
> +DOCKER_IMAGE=debian-mipsel-cross
> +DOCKER_CROSS_COMPILER=mipsel-linux-gnu-gcc
> +else ifeq ($(TARGET_NAME),mips)
> +DOCKER_IMAGE=debian-mips-cross
> +DOCKER_CROSS_COMPILER=mips-linux-gnu-gcc
> +endif
> 

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 35/49] tests/tcg/mips: include common mips hello-mips
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 35/49] tests/tcg/mips: include common mips hello-mips Alex Bennée
@ 2018-05-18 14:49   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18 14:49 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, richard.henderson,
	balrogg, aurelien, agraf
  Cc: qemu-devel, Yongbok Kim

On 05/17/2018 02:47 PM, Alex Bennée wrote:
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/tcg/mips/Makefile.target | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>  create mode 100644 tests/tcg/mips/Makefile.target
> 
> diff --git a/tests/tcg/mips/Makefile.target b/tests/tcg/mips/Makefile.target
> new file mode 100644
> index 0000000000..71f0c2dd53
> --- /dev/null
> +++ b/tests/tcg/mips/Makefile.target
> @@ -0,0 +1,19 @@
> +# -*- Mode: makefile -*-
> +#
> +# MIPS - included from tests/tcg/Makefile.target
> +#
> +
> +MIPS_SRC=$(SRC_PATH)/tests/tcg/mips
> +
> +# Set search path for all sources
> +VPATH 		+= $(MIPS_SRC)
> +
> +MIPS_TESTS=hello-mips
> +
> +TESTS += $(MIPS_TESTS)
> +
> +hello-mips: CFLAGS+=-ffreestanding
> +hello-mips: LDFLAGS+=-nostdlib
> +
> +# For MIPS32 and 64 we have a bunch of extra tests in sub-directories
> +# however they are intended for system tests.
> 

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 46/49] tests/tcg/Makefile: update to be called from Makefile.target
  2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 46/49] tests/tcg/Makefile: update to be called from Makefile.target Alex Bennée
  2018-05-17 20:43   ` Richard Henderson
@ 2018-05-18 14:49   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18 14:49 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, richard.henderson,
	balrogg, aurelien, agraf
  Cc: qemu-devel

On 05/17/2018 02:47 PM, Alex Bennée wrote:
> This make is now invoked from each individual target make with the
> appropriate CC and EXTRA_CFLAGS set for each guest. It then includes
> additional Makefile.targets from:
> 
>   - tests/tcg/multiarch (always)
>   - tests/tcg/$(TARGET_BASE_ARCH) (if available)
>   - tests/tcg/$(TARGET_NAME)
> 
> The order is important as the later Makefile's may want to suppress
> TESTS from its base arch profile. Each included Makefile.target is
> responsible for adding TESTS as well as defining any special build
> instructions for individual tests.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> 
> ---
> v2
>   - cleaner approach to include sub makefiles
>   - move TESTS/VPATH manipulation into sub-makefile
>   - avoid double inclusion when TARGET_BASE_ARCH==TARGET_NAME
> v4
>   - add timeout to default runner
>   - clean-up comments about build flags
>   - update to handle BUILD_STATIC
>   - add MAINTAINERS entry
> ---
>  MAINTAINERS        |   5 ++
>  tests/tcg/Makefile | 177 ++++++++++++++++++---------------------------
>  2 files changed, 74 insertions(+), 108 deletions(-)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index ee7f101890..ae569f9cf6 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2107,6 +2107,11 @@ W: https://travis-ci.org/qemu/qemu
>  W: https://app.shippable.com/github/qemu/qemu
>  W: http://patchew.org/QEMU/
>  
> +Guest Test Compilation Support
> +M: Alex Bennée <alex.bennee@linaro.org>
> +F: tests/tcg/Makefile
> +L: qemu-devel@nongnu.org
> +
>  Documentation
>  -------------
>  Build system architecture
> diff --git a/tests/tcg/Makefile b/tests/tcg/Makefile
> index e12395117a..f2dcfc730a 100644
> --- a/tests/tcg/Makefile
> +++ b/tests/tcg/Makefile
> @@ -1,125 +1,86 @@
> +# -*- Mode: makefile -*-
> +#
> +# TCG tests
> +#
> +# These are complicated by the fact we want to build them for guest
> +# systems. This requires knowing what guests we are building and which
> +# ones we have cross-compilers for or docker images with
> +# cross-compilers.
> +#
> +# The tests themselves should be as minimal as possible as
> +# cross-compilers don't always have a large amount of libraries
> +# available.
> +#
> +# We only include the host build system for SRC_PATH and we don't
> +# bother with the common rules.mk. We expect the following:
> +#
> +#   CC - the C compiler command
> +#   EXTRA_CFLAGS - any extra CFLAGS
> +#   BUILD_STATIC - are we building static binaries
> +#
> +# By default all tests are statically compiled but some host systems
> +# may not package static libraries by default. If an external
> +# cross-compiler can only build dynamic libraries the user might need
> +# to make extra efforts to ensure ld.so can link at runtime when the
> +# tests are run.
> +#
> +# We also accept SPEED=slow to enable slower running tests
> +#
> +# We also expect to be in the tests build dir for the FOO-linux-user.
> +#
> +
>  -include ../../config-host.mak
> --include $(SRC_PATH)/rules.mak
> +-include ../config-target.mak
>  
> -$(call set-vpath, $(SRC_PATH)/tests/tcg)
> +quiet-command = $(if $(V),$1,$(if $(2),@printf "  %-7s %s\n" $2 $3 && $1, @$1))
>  
> -QEMU=../../i386-linux-user/qemu-i386
> -QEMU_X86_64=../../x86_64-linux-user/qemu-x86_64
> -CC_X86_64=$(CC_I386) -m64
> +# Tests we are building
> +TESTS=
>  
> -QEMU_INCLUDES += -I../..
> -CFLAGS=-Wall -O2 -g -fno-strict-aliasing
> -#CFLAGS+=-msse2
> +# Start with a blank slate, the build targets get to add stuff first
> +CFLAGS=
> +QEMU_CFLAGS=
>  LDFLAGS=
>  
> -# TODO: automatically detect ARM and MIPS compilers, and run those too
> -
> -# runcom maps page 0, so it requires root privileges
> -# also, pi_10.com runs indefinitely
> -
> -I386_TESTS=hello-i386 \
> -	   sha1-i386 \
> -	   test-i386 \
> -	   test-i386-fprem \
> -	   # runcom
> +# The QEMU for this TARGET
> +QEMU=../qemu-$(TARGET_NAME)
> +TIMEOUT=15
>  
> -# native i386 compilers sometimes are not biarch.  assume cross-compilers are
> -ifneq ($(ARCH),i386)
> -I386_TESTS+=run-test-x86_64
> +# The order we include is important. We include multiarch, base arch
> +# and finally arch if it's not the same as base arch.
> +-include $(SRC_PATH)/tests/tcg/multiarch/Makefile.target
> +-include $(SRC_PATH)/tests/tcg/$(TARGET_BASE_ARCH)/Makefile.target
> +ifneq ($(TARGET_BASE_ARCH),$(TARGET_NAME))
> +-include $(SRC_PATH)/tests/tcg/$(TARGET_NAME)/Makefile.target
>  endif
>  
> -TESTS = test_path
> -ifneq ($(call find-in-path, $(CC_I386)),)
> -TESTS += $(I386_TESTS)
> +# Add the common build options
> +CFLAGS+=-Wall -O0 -g -fno-strict-aliasing
> +ifeq ($(BUILD_STATIC),y)
> +LDFLAGS+=-static
>  endif
>  
> -all: $(patsubst %,run-%,$(TESTS))
> -test: all
> -
> -# rules to run tests
> -
> -.PHONY: $(patsubst %,run-%,$(TESTS))
> -
> -run-%: %
> -	-$(QEMU) ./$*
> -
> -run-hello-i386: hello-i386
> -run-sha1-i386: sha1-i386
> -
> -run-test-i386: test-i386
> -	./test-i386 > test-i386.ref
> -	-$(QEMU) test-i386 > test-i386.out
> -	@if diff -u test-i386.ref test-i386.out ; then echo "Auto Test OK"; fi
> -
> -run-test-i386-fprem: test-i386-fprem
> -	./test-i386-fprem > test-i386-fprem.ref
> -	-$(QEMU) test-i386-fprem > test-i386-fprem.out
> -	@if diff -u test-i386-fprem.ref test-i386-fprem.out ; then echo "Auto Test OK"; fi
> -
> -run-test-x86_64: test-x86_64
> -	./test-x86_64 > test-x86_64.ref
> -	-$(QEMU_X86_64) test-x86_64 > test-x86_64.out
> -	@if diff -u test-x86_64.ref test-x86_64.out ; then echo "Auto Test OK"; fi
> -
> +%: %.c
> +	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
>  
> -run-runcom: runcom
> -	-$(QEMU) ./runcom $(SRC_PATH)/tests/pi_10.com
> +all: $(TESTS)
>  
> -run-test_path: test_path
> -	./test_path
> +#
> +# Test Runners
> +#
> +# By default we just run the test with the appropriate QEMU for the
> +# target. More advanced tests may want to override the runner in their
> +# specific make rules.
> +#
>  
> -# rules to compile tests
> +RUN_TESTS=$(patsubst %,run-%, $(TESTS))
>  
> -hello-i386: hello-i386.c
> -	$(CC_I386) -nostdlib $(CFLAGS) -static $(LDFLAGS) -o $@ $<
> -	strip $@
> -
> -# i386/x86_64 emulation test (test various opcodes) */
> -test-i386: test-i386.c test-i386-code16.S test-i386-vm86.S \
> -           test-i386.h test-i386-shift.h test-i386-muldiv.h
> -	$(CC_I386) $(QEMU_INCLUDES) $(CFLAGS) $(LDFLAGS) -o $@ \
> -              $(<D)/test-i386.c $(<D)/test-i386-code16.S $(<D)/test-i386-vm86.S -lm
> -
> -test-i386-fprem: test-i386-fprem.c
> -	$(CC_I386) $(QEMU_INCLUDES) $(CFLAGS) $(LDFLAGS) -o $@ $^
> -
> -test-x86_64: test-i386.c \
> -           test-i386.h test-i386-shift.h test-i386-muldiv.h
> -	$(CC_X86_64) $(QEMU_INCLUDES) $(CFLAGS) $(LDFLAGS) -o $@ $(<D)/test-i386.c -lm
> -
> -# vm86 test
> -runcom: runcom.c
> -	$(CC_I386) $(CFLAGS) $(LDFLAGS) -o $@ $<
> -
> -# speed test
> -sha1-i386: sha1.c
> -	$(CC_I386) $(CFLAGS) $(LDFLAGS) -o $@ $<
> -
> -# arm test
> -hello-arm: hello-arm.o
> -	arm-linux-ld -o $@ $<
> -
> -hello-arm.o: hello-arm.c
> -	arm-linux-gcc -Wall -g -O2 -c -o $@ $<
> -
> -test-arm-iwmmxt: test-arm-iwmmxt.s
> -	cpp < $< | arm-linux-gnu-gcc -Wall -static -march=iwmmxt -mabi=aapcs -x assembler - -o $@
> -
> -# MIPS test
> -hello-mips: hello-mips.c
> -	mips-linux-gnu-gcc -nostdlib -static -mno-abicalls -fno-PIC -mabi=32 -Wall -Wextra -g -O2 -o $@ $<
> -
> -hello-mipsel: hello-mips.c
> -	mipsel-linux-gnu-gcc -nostdlib -static -mno-abicalls -fno-PIC -mabi=32 -Wall -Wextra -g -O2 -o $@ $<
> -
> -# testsuite for the CRIS port.
> -test-cris:
> -	$(MAKE) -C cris check
> +run-%: %
> +	$(call quiet-command, \
> +		timeout $(TIMEOUT) $(QEMU) $< > $<.out, \
> +		"TEST", "$< on $(TARGET_NAME)")
>  
> -# testsuite for the LM32 port.
> -test-lm32:
> -	$(MAKE) -C lm32 check
> +.PHONY: run
> +run: $(RUN_TESTS)
>  
> -clean:
> -	rm -f *~ *.o test-i386.out test-i386.ref \
> -           test-x86_64.log test-x86_64.ref qruncom $(TESTS)
> +# There is no clean target, the calling make just rm's the tests build dir
> 

Nice cleanup/rewrite :)

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 32/49] tests/tcg/arm: add fcvt test cases for AArch32/64
  2018-05-18  8:16       ` Alex Bennée
@ 2018-05-18 14:53         ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18 14:53 UTC (permalink / raw)
  To: Alex Bennée
  Cc: Richard Henderson, cota, famz, berrange, balrogg, aurelien,
	agraf, qemu-devel, Peter Maydell, open list:ARM

On 05/18/2018 05:16 AM, Alex Bennée wrote:
> 
> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> 
>> On 05/17/2018 05:30 PM, Richard Henderson wrote:
>>> On 05/17/2018 10:47 AM, Alex Bennée wrote:
>>>> This runs through the usual float to float conversions and crucially
>>>> also runs with ARM Alternative Half Precision Format.
>>>>
>>>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>>>> [rth: tweak vcvtb.f16.f32/vctb.f32.f16 code and regen]
>>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>>>
>>>> ---
>>>> v4
>>>>   - add fcvt.ref and check results against it
>>>>   - fix single_to_half, single_to_double conversions
>>>>   - properly toggle AHP mode (fpsr->fpcr)
>>>>   - more values around the AHP margins
>>>>   - add INF/NAN/SNAN inputs
>>>>   - build for ARM and AArch64
>>>>   - fix bug for hex literals
>>>>   - add float-to-int
>>>>   - checkpatch fix
>>>> ---
>>>
>>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>>
>> Thanks Richard, I was not very motivated to review each line of the
>> fcvt.ref files =)
>>
>>> diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
>>> index 9d2b551732..7bb777f442 100644
>>> --- a/tests/tcg/arm/Makefile.target
>>> +++ b/tests/tcg/arm/Makefile.target
>>> @@ -8,7 +8,9 @@ ARM_SRC=$(SRC_PATH)/tests/tcg/arm
>>>  # Set search path for all sources
>>>  VPATH 		+= $(ARM_SRC)
>>>
>>> -TESTS += hello-arm test-arm-iwmmxt
>>> +ARM_TESTS=hello-arm test-arm-iwmmxt
>>> +
>>> +TESTS += $(ARM_TESTS) fcvt
>>>
>>>  hello-arm: CFLAGS+=-marm -ffreestanding
>>>  hello-arm: LDFLAGS+=-nostdlib
>>> @@ -24,3 +26,14 @@ run-test-mmap: test-mmap
>>>  	$(call quiet-command, $(QEMU) -p 8192 $< 8192 > test-mmap-8192.out,
>> "TEST", "$< (8k pages) on $(TARGET_NAME)")
>>>  	$(call quiet-command, $(QEMU) -p 16384 $< 16384 >
>> test-mmap-16384.out, "TEST", "$< (16k pages) on $(TARGET_NAME)")
>>>  endif
>>> +
>>> +ifeq ($(TARGET_NAME), arm)
>>> +fcvt: LDFLAGS+=-lm
>>> +# fcvt: CFLAGS+=-march=armv8.2-a+fp16 -mfpu=neon-fp-armv8
>>
>> Alex, What is your idea here, enable this later?
>> Maybe add some TODO comment around..
> 
> How about:
> 
> # AArch32 doesn't support all combinations of FP16<->FOO in it's base
> # profile. Once the AArch32 profile is caught up we should build an
> # additional binary and reference to test the additional combinations.
> 
> I backed the change out when I realised the stretch compiler didn't
> support the same range as my local (18.04) gcc's.

Fine by me, thanks.

>>
>> Except this nit, for both Makefile.target:
>> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 30/49] tests/tcg: enable building for AArch64
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 30/49] tests/tcg: enable building for AArch64 Alex Bennée
  2018-05-17 20:26   ` Richard Henderson
@ 2018-05-18 14:57   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18 14:57 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, richard.henderson,
	balrogg, aurelien, agraf
  Cc: qemu-devel, Peter Maydell, open list:ARM

On 05/17/2018 02:46 PM, Alex Bennée wrote:
> We only have compilers for the (default) little endian variants.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> 
> ---
> v4
>   - update MAINTAINERS
> ---
>  MAINTAINERS                        | 1 +
>  tests/tcg/aarch64/Makefile.include | 8 ++++++++
>  2 files changed, 9 insertions(+)
>  create mode 100644 tests/tcg/aarch64/Makefile.include
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4e331c4db4..ee7f101890 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -136,6 +136,7 @@ L: qemu-arm@nongnu.org
>  S: Maintained
>  F: target/arm/
>  F: tests/tcg/arm/
> +F: tests/tcg/aarch64/
>  F: hw/arm/
>  F: hw/cpu/a*mpcore.c
>  F: include/hw/cpu/a*mpcore.h
> diff --git a/tests/tcg/aarch64/Makefile.include b/tests/tcg/aarch64/Makefile.include
> new file mode 100644
> index 0000000000..de32c91235
> --- /dev/null
> +++ b/tests/tcg/aarch64/Makefile.include
> @@ -0,0 +1,8 @@
> +# Makefile.include for AArch64 targets
> +#
> +# We don't have any bigendian build tools so we only use this for AArch64
> +
> +ifeq ($(TARGET_NAME),aarch64)
> +DOCKER_IMAGE=debian-arm64-cross
> +DOCKER_CROSS_COMPILER=aarch64-linux-gnu-gcc
> +endif
> 

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 26/49] tests/tcg: move ARM specific tests into subdir
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 26/49] tests/tcg: move ARM specific tests into subdir Alex Bennée
@ 2018-05-18 15:26   ` Philippe Mathieu-Daudé
  2018-05-18 15:58     ` Alex Bennée
  0 siblings, 1 reply; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18 15:26 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, richard.henderson,
	balrogg, aurelien, agraf, Peter Maydell
  Cc: qemu-devel, open list:ARM

On 05/17/2018 02:46 PM, Alex Bennée wrote:
> These only need to be built for ARM guests.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Thomas Huth <thuth@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> 
> ---
> v2
>   - do VPATH manipulation in tests/tcg/arm/Makefile.target
>   - merge with fix hello-arm test
> v4
>   - update MAINTAINERS
> ---
>  MAINTAINERS                           |  1 +
>  tests/tcg/README                      |  9 ---------
>  tests/tcg/arm/Makefile.target         | 13 +++++++++++++
>  tests/tcg/arm/README                  | 11 +++++++++++
>  tests/tcg/{ => arm}/hello-arm.c       |  0
>  tests/tcg/{ => arm}/test-arm-iwmmxt.s |  0
>  6 files changed, 25 insertions(+), 9 deletions(-)
>  create mode 100644 tests/tcg/arm/Makefile.target
>  create mode 100644 tests/tcg/arm/README
>  rename tests/tcg/{ => arm}/hello-arm.c (100%)
>  rename tests/tcg/{ => arm}/test-arm-iwmmxt.s (100%)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 17b9fc0fbe..4e331c4db4 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -135,6 +135,7 @@ M: Peter Maydell <peter.maydell@linaro.org>
>  L: qemu-arm@nongnu.org
>  S: Maintained
>  F: target/arm/
> +F: tests/tcg/arm/
>  F: hw/arm/
>  F: hw/cpu/a*mpcore.c
>  F: include/hw/cpu/a*mpcore.h
> diff --git a/tests/tcg/README b/tests/tcg/README
> index 469504c4cb..625f2326e6 100644
> --- a/tests/tcg/README
> +++ b/tests/tcg/README
> @@ -5,15 +5,6 @@ or they are architecture specific.
>  
>  
>  
> -ARM
> -===
> -
> -hello-arm
> ----------
> -
> -test-arm-iwmmxt
> ----------------
> -
>  MIPS
>  ====
>  
> diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
> new file mode 100644
> index 0000000000..bc6962ecc6
> --- /dev/null
> +++ b/tests/tcg/arm/Makefile.target
> @@ -0,0 +1,13 @@
> +# -*- Mode: makefile -*-
> +#
> +# ARM - included from tests/tcg/Makefile.target
> +#
> +
> +ARM_SRC=$(SRC_PATH)/tests/tcg/arm
> +
> +# Set search path for all sources
> +VPATH 		+= $(ARM_SRC)
> +
> +
> +hello-arm: CFLAGS+=-marm -ffreestanding

So we are only testing the ARMv7, but linux-user provides ARMv5 and
ARMv6 cpus.

There are still boards shipped with those cpus, so I think QEMU will
still be useful nowadays with those older archs.
Can we consider add tests for them?
If so, I volunteer to prepare Docker cross images :)

arm-linux-user/tests$ ../qemu-arm -cpu arm926 -d in_asm,op sha1
----------------
IN:
0x000102ec:  f04f 0b00  mov.w    fp, #0

OP:
 ld_i32 tmp5,env,$0xffffffffffffffec
 movi_i32 tmp6,$0x0
 brcond_i32 tmp5,tmp6,lt,$L0

 ---- 000102ec 00000000 00000000
 movi_i32 pc,$0x102ec
 movi_i32 tmp5,$0x1
 movi_i32 tmp6,$0x2000000
 movi_i32 tmp7,$0x1
 call exception_with_syndrome,$0x0,$0,env,tmp5,tmp6,tmp7
 set_label $L0
 exit_tb $0x563aed6cc043

qemu: uncaught target signal 4 (Illegal instruction) - core dumped
Illegal instruction

> +hello-arm: LDFLAGS+=-nostdlib
> diff --git a/tests/tcg/arm/README b/tests/tcg/arm/README
> new file mode 100644
> index 0000000000..e6307116e2
> --- /dev/null
> +++ b/tests/tcg/arm/README
> @@ -0,0 +1,11 @@
> +These are ARM specific guest programs
> +
> +hello-arm
> +---------
> +
> +A very simple inline assembly, write syscall based hello world
> +
> +test-arm-iwmmxt
> +---------------
> +
> +A simple test case for older iwmmxt extended ARMs
> diff --git a/tests/tcg/hello-arm.c b/tests/tcg/arm/hello-arm.c
> similarity index 100%
> rename from tests/tcg/hello-arm.c
> rename to tests/tcg/arm/hello-arm.c
> diff --git a/tests/tcg/test-arm-iwmmxt.s b/tests/tcg/arm/test-arm-iwmmxt.s
> similarity index 100%
> rename from tests/tcg/test-arm-iwmmxt.s
> rename to tests/tcg/arm/test-arm-iwmmxt.s
> 

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 27/49] tests/tcg: enable building for ARM
  2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 27/49] tests/tcg: enable building for ARM Alex Bennée
@ 2018-05-18 15:28   ` Philippe Mathieu-Daudé
  2018-05-18 15:48     ` Alex Bennée
  0 siblings, 1 reply; 85+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-05-18 15:28 UTC (permalink / raw)
  To: Alex Bennée, cota, famz, berrange, richard.henderson,
	balrogg, aurelien, agraf, Peter Maydell
  Cc: qemu-devel, open list:ARM

On 05/17/2018 02:46 PM, Alex Bennée wrote:
> This allows us to use the docker cross compiler image to build these
> tests.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/tcg/arm/Makefile.include | 8 ++++++++
>  1 file changed, 8 insertions(+)
>  create mode 100644 tests/tcg/arm/Makefile.include
> 
> diff --git a/tests/tcg/arm/Makefile.include b/tests/tcg/arm/Makefile.include
> new file mode 100644
> index 0000000000..8e7eac008f
> --- /dev/null
> +++ b/tests/tcg/arm/Makefile.include
> @@ -0,0 +1,8 @@
> +# Makefile.include for all ARM targets
> +#
> +# We don't have any bigendian build tools so we only use this for armhf
> +
> +ifeq ($(TARGET_NAME),arm)
> +DOCKER_IMAGE=debian-armhf-cross

[Note for a later series:]
Since this image comes with ARMv7 libraries, I find clearer to rename as
arm32v7, following new Docker scheme. This will ease to add arm32v6 (and
arm32v5 if possible...)

> +DOCKER_CROSS_COMPILER=arm-linux-gnueabihf-gcc
> +endif
> 

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 27/49] tests/tcg: enable building for ARM
  2018-05-18 15:28   ` Philippe Mathieu-Daudé
@ 2018-05-18 15:48     ` Alex Bennée
  0 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-18 15:48 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: cota, famz, berrange, richard.henderson, balrogg, aurelien,
	agraf, Peter Maydell, qemu-devel, open list:ARM


Philippe Mathieu-Daudé <f4bug@amsat.org> writes:

> On 05/17/2018 02:46 PM, Alex Bennée wrote:
>> This allows us to use the docker cross compiler image to build these
>> tests.
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
>>  tests/tcg/arm/Makefile.include | 8 ++++++++
>>  1 file changed, 8 insertions(+)
>>  create mode 100644 tests/tcg/arm/Makefile.include
>>
>> diff --git a/tests/tcg/arm/Makefile.include b/tests/tcg/arm/Makefile.include
>> new file mode 100644
>> index 0000000000..8e7eac008f
>> --- /dev/null
>> +++ b/tests/tcg/arm/Makefile.include
>> @@ -0,0 +1,8 @@
>> +# Makefile.include for all ARM targets
>> +#
>> +# We don't have any bigendian build tools so we only use this for armhf
>> +
>> +ifeq ($(TARGET_NAME),arm)
>> +DOCKER_IMAGE=debian-armhf-cross
>
> [Note for a later series:]
> Since this image comes with ARMv7 libraries, I find clearer to rename as
> arm32v7, following new Docker scheme. This will ease to add arm32v6 (and
> arm32v5 if possible...)

I'm not sure if that is worthwhile. Any linux-user build will be ARMv7
or v8 AArch32 and the compilers can always be set to older CPU types.
Testing that we have correct UNDEF behaviour for older CPUs is probably
better handled by things like RISU?

>
>> +DOCKER_CROSS_COMPILER=arm-linux-gnueabihf-gcc
>> +endif
>>
>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


--
Alex Bennée

^ permalink raw reply	[flat|nested] 85+ messages in thread

* Re: [Qemu-devel] [PATCH v4 26/49] tests/tcg: move ARM specific tests into subdir
  2018-05-18 15:26   ` Philippe Mathieu-Daudé
@ 2018-05-18 15:58     ` Alex Bennée
  0 siblings, 0 replies; 85+ messages in thread
From: Alex Bennée @ 2018-05-18 15:58 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: cota, famz, berrange, balrogg, aurelien, agraf, Peter Maydell,
	Richard Henderson, qemu-devel, open list:ARM


Philippe Mathieu-Daudé <f4bug@amsat.org> writes:

> On 05/17/2018 02:46 PM, Alex Bennée wrote:
>> These only need to be built for ARM guests.
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> Reviewed-by: Thomas Huth <thuth@redhat.com>
>> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>>
>> ---
>> v2
>>   - do VPATH manipulation in tests/tcg/arm/Makefile.target
>>   - merge with fix hello-arm test
>> v4
>>   - update MAINTAINERS
>> ---
>>  MAINTAINERS                           |  1 +
>>  tests/tcg/README                      |  9 ---------
>>  tests/tcg/arm/Makefile.target         | 13 +++++++++++++
>>  tests/tcg/arm/README                  | 11 +++++++++++
>>  tests/tcg/{ => arm}/hello-arm.c       |  0
>>  tests/tcg/{ => arm}/test-arm-iwmmxt.s |  0
>>  6 files changed, 25 insertions(+), 9 deletions(-)
>>  create mode 100644 tests/tcg/arm/Makefile.target
>>  create mode 100644 tests/tcg/arm/README
>>  rename tests/tcg/{ => arm}/hello-arm.c (100%)
>>  rename tests/tcg/{ => arm}/test-arm-iwmmxt.s (100%)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 17b9fc0fbe..4e331c4db4 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -135,6 +135,7 @@ M: Peter Maydell <peter.maydell@linaro.org>
>>  L: qemu-arm@nongnu.org
>>  S: Maintained
>>  F: target/arm/
>> +F: tests/tcg/arm/
>>  F: hw/arm/
>>  F: hw/cpu/a*mpcore.c
>>  F: include/hw/cpu/a*mpcore.h
>> diff --git a/tests/tcg/README b/tests/tcg/README
>> index 469504c4cb..625f2326e6 100644
>> --- a/tests/tcg/README
>> +++ b/tests/tcg/README
>> @@ -5,15 +5,6 @@ or they are architecture specific.
>>
>>
>>
>> -ARM
>> -===
>> -
>> -hello-arm
>> ----------
>> -
>> -test-arm-iwmmxt
>> ----------------
>> -
>>  MIPS
>>  ====
>>
>> diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
>> new file mode 100644
>> index 0000000000..bc6962ecc6
>> --- /dev/null
>> +++ b/tests/tcg/arm/Makefile.target
>> @@ -0,0 +1,13 @@
>> +# -*- Mode: makefile -*-
>> +#
>> +# ARM - included from tests/tcg/Makefile.target
>> +#
>> +
>> +ARM_SRC=$(SRC_PATH)/tests/tcg/arm
>> +
>> +# Set search path for all sources
>> +VPATH 		+= $(ARM_SRC)
>> +
>> +
>> +hello-arm: CFLAGS+=-marm -ffreestanding
>
> So we are only testing the ARMv7, but linux-user provides ARMv5 and
> ARMv6 cpus.
>
> There are still boards shipped with those cpus, so I think QEMU will
> still be useful nowadays with those older archs.
> Can we consider add tests for them?
> If so, I volunteer to prepare Docker cross images :)

Hmm OK but we'd a bunch of new tests and something like this:

modified   tests/tcg/arm/Makefile.target
@@ -8,13 +8,23 @@ ARM_SRC=$(SRC_PATH)/tests/tcg/arm
 # Set search path for all sources
 VPATH 		+= $(ARM_SRC)

-ARM_TESTS=hello-arm test-arm-iwmmxt
+ARM_TESTS=hello-arm hello-arm-v6 test-arm-iwmmxt

 TESTS += $(ARM_TESTS) fcvt

 hello-arm: CFLAGS+=-marm -ffreestanding
 hello-arm: LDFLAGS+=-nostdlib

+hello-arm-v6: CFLAGS+=-march=armv6 -ffreestanding
+hello-arm-v6: LDFLAGS+=-nostdlib
+hello-arm-v6: hello-arm.c
+	$(CC) $(CFLAGS) $< -o $@ $(LDFLAGS)
+
+run-hello-arm-v6: hello-arm-v6
+	$(call quiet-command, \
+		timeout $(TIMEOUT) $(QEMU) -cpu arm926 $< > $<.out, \
+		"TEST", "$< on $(TARGET_NAME)")
+

Of course that fails because:

/home/alex/lsrc/qemu/qemu.git/tests/tcg/arm/hello-arm.c:106:1: sorry, unimplemented: Thumb-1 hard-float VFP ABI
 _syscall1(int,exit1,int,status);
 ^~~~~~~~~

I think using external tests like risu is probably better for this sort
of coverage.

>
> arm-linux-user/tests$ ../qemu-arm -cpu arm926 -d in_asm,op sha1
> ----------------
> IN:
> 0x000102ec:  f04f 0b00  mov.w    fp, #0
>
> OP:
>  ld_i32 tmp5,env,$0xffffffffffffffec
>  movi_i32 tmp6,$0x0
>  brcond_i32 tmp5,tmp6,lt,$L0
>
>  ---- 000102ec 00000000 00000000
>  movi_i32 pc,$0x102ec
>  movi_i32 tmp5,$0x1
>  movi_i32 tmp6,$0x2000000
>  movi_i32 tmp7,$0x1
>  call exception_with_syndrome,$0x0,$0,env,tmp5,tmp6,tmp7
>  set_label $L0
>  exit_tb $0x563aed6cc043
>
> qemu: uncaught target signal 4 (Illegal instruction) - core dumped
> Illegal instruction
>
>> +hello-arm: LDFLAGS+=-nostdlib
>> diff --git a/tests/tcg/arm/README b/tests/tcg/arm/README
>> new file mode 100644
>> index 0000000000..e6307116e2
>> --- /dev/null
>> +++ b/tests/tcg/arm/README
>> @@ -0,0 +1,11 @@
>> +These are ARM specific guest programs
>> +
>> +hello-arm
>> +---------
>> +
>> +A very simple inline assembly, write syscall based hello world
>> +
>> +test-arm-iwmmxt
>> +---------------
>> +
>> +A simple test case for older iwmmxt extended ARMs
>> diff --git a/tests/tcg/hello-arm.c b/tests/tcg/arm/hello-arm.c
>> similarity index 100%
>> rename from tests/tcg/hello-arm.c
>> rename to tests/tcg/arm/hello-arm.c
>> diff --git a/tests/tcg/test-arm-iwmmxt.s b/tests/tcg/arm/test-arm-iwmmxt.s
>> similarity index 100%
>> rename from tests/tcg/test-arm-iwmmxt.s
>> rename to tests/tcg/arm/test-arm-iwmmxt.s
>>


--
Alex Bennée

^ permalink raw reply	[flat|nested] 85+ messages in thread

end of thread, other threads:[~2018-05-18 15:58 UTC | newest]

Thread overview: 85+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-05-17 17:46 [Qemu-devel] [PATCH v4 00/49] fix building of tests/tcg Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 01/49] docker: add "probe" command for configure Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 02/49] configure: add test for docker availability Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 03/49] configure: add support for --cross-cc-FOO Alex Bennée
2018-05-17 18:19   ` Richard Henderson
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 04/49] configure: move i386_cc to cross_cc_i386 Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 05/49] configure: allow user to specify --cross-cc-cflags-foo= Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 06/49] configure: set cross_cc_FOO for host compiler Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 07/49] Makefile: Rename TARGET_DIRS to TARGET_LIST Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 08/49] docker: Add "cc" subcommand Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 09/49] docker: extend "cc" command to accept compiler Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 10/49] docker: allow "cc" command to run in user context Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 11/49] docker: Makefile.include introduce DOCKER_SCRIPT Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 12/49] tests/tcg: move architecture independent tests into subdir Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 13/49] tests/tcg/multiarch: Build fix for linux-test Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 14/49] tests/tcg/multiarch: enable additional linux-test tests Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 15/49] tests/tcg/multiarch: move most output to stdout Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 16/49] tests/tcg: move i386 specific tests into subdir Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 17/49] docker: Add fedora-i386-cross image Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 18/49] tests/tcg: enable building for i386 Alex Bennée
2018-05-18 11:28   ` Paolo Bonzini
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 19/49] tests/tcg/i386: Build fix for hello-i386 Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 20/49] tests/tcg/i386: fix test-i386 Alex Bennée
2018-05-17 19:04   ` Eric Blake
2018-05-17 19:57     ` Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 21/49] tests/tcg/i386: add runner for test-i386-fprem Alex Bennée
2018-05-18 11:30   ` Paolo Bonzini
2018-05-18 12:27     ` Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 22/49] tests/tcg/i386: disable i386 version of test-i386-ssse Alex Bennée
2018-05-17 19:56   ` Richard Henderson
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 23/49] tests/tcg/x86_64: add Makefile.target Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 24/49] tests/tcg/i386/test-i386: use modern vector_size attributes Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 25/49] tests/tcg/i386/test-i386: fix printf format Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 26/49] tests/tcg: move ARM specific tests into subdir Alex Bennée
2018-05-18 15:26   ` Philippe Mathieu-Daudé
2018-05-18 15:58     ` Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 27/49] tests/tcg: enable building for ARM Alex Bennée
2018-05-18 15:28   ` Philippe Mathieu-Daudé
2018-05-18 15:48     ` Alex Bennée
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 28/49] tests/tcg/arm: fix up test-arm-iwmmxt test Alex Bennée
2018-05-17 20:15   ` Richard Henderson
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 29/49] tests/tcg/arm: disable -p 32768 mmap test Alex Bennée
2018-05-17 20:20   ` Richard Henderson
2018-05-17 21:24     ` Alex Bennée
2018-05-17 21:34       ` Richard Henderson
2018-05-18  3:47         ` Philippe Mathieu-Daudé
2018-05-17 17:46 ` [Qemu-devel] [PATCH v4 30/49] tests/tcg: enable building for AArch64 Alex Bennée
2018-05-17 20:26   ` Richard Henderson
2018-05-18 14:57   ` Philippe Mathieu-Daudé
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 31/49] tests/tcg/aarch64: add Makefile.target Alex Bennée
2018-05-17 20:28   ` Richard Henderson
2018-05-17 21:25     ` Alex Bennée
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 32/49] tests/tcg/arm: add fcvt test cases for AArch32/64 Alex Bennée
2018-05-17 20:30   ` Richard Henderson
2018-05-18  3:45     ` Philippe Mathieu-Daudé
2018-05-18  8:16       ` Alex Bennée
2018-05-18 14:53         ` Philippe Mathieu-Daudé
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 33/49] tests/tcg: move MIPS specific tests into subdir Alex Bennée
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 34/49] tests/tcg: enable building for MIPS Alex Bennée
2018-05-18 14:49   ` Philippe Mathieu-Daudé
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 35/49] tests/tcg/mips: include common mips hello-mips Alex Bennée
2018-05-18 14:49   ` Philippe Mathieu-Daudé
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 36/49] tests/tcg: enable building for s390x Alex Bennée
2018-05-18 12:04   ` [Qemu-devel] [qemu-s390x] " David Hildenbrand
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 37/49] tests/tcg: enable building for ppc64 Alex Bennée
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 38/49] tests/tcg: enable building for Alpha Alex Bennée
2018-05-18 14:21   ` Philippe Mathieu-Daudé
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 39/49] tests/tcg/alpha: add Alpha specific tests Alex Bennée
2018-05-17 20:41   ` Richard Henderson
2018-05-18 14:25   ` Philippe Mathieu-Daudé
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 40/49] tests/tcg: enable building for HPPA Alex Bennée
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 41/49] tests/tcg: enable building for m68k Alex Bennée
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 42/49] tests/tcg: enable building for sh4 Alex Bennée
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 43/49] tests/tcg: enable building for sparc64 Alex Bennée
2018-05-18 14:28   ` Philippe Mathieu-Daudé
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 44/49] tests/tcg: enable building for mips64 Alex Bennée
2018-05-18 14:26   ` Philippe Mathieu-Daudé
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 45/49] tests/tcg: enable building for RISCV64 Alex Bennée
2018-05-18 14:24   ` Philippe Mathieu-Daudé
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 46/49] tests/tcg/Makefile: update to be called from Makefile.target Alex Bennée
2018-05-17 20:43   ` Richard Henderson
2018-05-18 14:49   ` Philippe Mathieu-Daudé
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 47/49] Makefile.target: add (clean-/build-)guest-tests targets Alex Bennée
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 48/49] tests/Makefile.include: add [build|clean|check]-tcg targets Alex Bennée
2018-05-17 17:47 ` [Qemu-devel] [PATCH v4 49/49] tests/tcg: override runners for broken tests (!UPSTREAM) Alex Bennée

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