* [PATCH v3] ARM: dts: aspeed: add Nuvia DC-SCM BMC
@ 2022-03-25 19:02 ` Jae Hyun Yoo
0 siblings, 0 replies; 10+ messages in thread
From: Jae Hyun Yoo @ 2022-03-25 19:02 UTC (permalink / raw)
To: Rob Herring, Joel Stanley, Andrew Jeffery, Andrew Lunn
Cc: Jamie Iles, Graeme Gregory, devicetree, linux-arm-kernel,
linux-aspeed, Jae Hyun Yoo
From: Graeme Gregory <quic_ggregory@quicinc.com>
Add initial version of device tree for Nuvia DC-SCM BMC which is
equipped with Aspeed AST2600 BMC SoC.
Signed-off-by: Graeme Gregory <quic_ggregory@quicinc.com>
Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
---
Changes in v3:
* Added 'stdout-path'. (Krzysztof)
Changes in v2:
* Added a comment to explain 'rgmii' phy mode setting. (Andrew)
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts | 190 ++++++++++++++++++
2 files changed, 191 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7c16f8a2b738..e63cd6ed0faa 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1546,6 +1546,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-lenovo-hr855xg2.dtb \
aspeed-bmc-microsoft-olympus.dtb \
+ aspeed-bmc-nuvia-dc-scm.dtb \
aspeed-bmc-opp-lanyang.dtb \
aspeed-bmc-opp-mihawk.dtb \
aspeed-bmc-opp-mowgli.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts b/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
new file mode 100644
index 000000000000..f4a97cfb0f23
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+
+/dts-v1/;
+
+#include "aspeed-g6.dtsi"
+
+/ {
+ model = "Nuvia DC-SCM BMC";
+ compatible = "nuvia,dc-scm-bmc", "aspeed,ast2600";
+
+ aliases {
+ serial4 = &uart5;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+};
+
+&mdio3 {
+ status = "okay";
+
+ ethphy3: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mac2 {
+ status = "okay";
+
+ /* Bootloader sets up the MAC to insert delay */
+ phy-mode = "rgmii";
+ phy-handle = <ðphy3>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii3_default>;
+};
+
+&mac3 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii4_default>;
+
+ use-ncsi;
+};
+
+&rtc {
+ status = "okay";
+};
+
+&fmc {
+ status = "okay";
+
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "bmc";
+ spi-max-frequency = <133000000>;
+#include "openbmc-flash-layout-64.dtsi"
+ };
+
+ flash@1 {
+ status = "okay";
+ m25p,fast-read;
+ label = "alt-bmc";
+ spi-max-frequency = <133000000>;
+#include "openbmc-flash-layout-64-alt.dtsi"
+ };
+};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default>;
+
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "bios";
+ spi-max-frequency = <133000000>;
+ };
+};
+
+&gpio0 {
+ gpio-line-names =
+ /*A0-A7*/ "","","","","","","","",
+ /*B0-B7*/ "BMC_FLASH_MUX_SEL","","","","","","","",
+ /*C0-C7*/ "","","","","","","","",
+ /*D0-D7*/ "","","","","","","","",
+ /*E0-E7*/ "","","","","","","","",
+ /*F0-F7*/ "","","","","","","","",
+ /*G0-G7*/ "","","","","","","","",
+ /*H0-H7*/ "","","","","","","","",
+ /*I0-I7*/ "","","","","","","","",
+ /*J0-J7*/ "","","","","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "","","","","","","","",
+ /*M0-M7*/ "","","","","","","","",
+ /*N0-N7*/ "BMC_FWSPI_RST_N","","GPIO_1_BMC_3V3","","","","","",
+ /*O0-O7*/ "JTAG_MUX_A","JTAG_MUX_B","","","","","","",
+ /*P0-P7*/ "","","","","","","","",
+ /*Q0-Q7*/ "","","","","","","","",
+ /*R0-R7*/ "","","","","","","","",
+ /*S0-S7*/ "","","","","","","","",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","","","","","","",
+ /*V0-V7*/ "","","","SCMFPGA_SPARE_GPIO1_3V3",
+ "SCMFPGA_SPARE_GPIO2_3V3","SCMFPGA_SPARE_GPIO3_3V3",
+ "SCMFPGA_SPARE_GPIO4_3V3","SCMFPGA_SPARE_GPIO5_3V3",
+ /*W0-W7*/ "","","","","","","","",
+ /*X0-X7*/ "","","","","","","","",
+ /*Y0-Y7*/ "","","","","","","","",
+ /*Z0-Z7*/ "","","","","","","","",
+ /*AA0-AA7*/ "","","","","","","","",
+ /*AB0-AB7*/ "","","","","","","","",
+ /*AC0-AC7*/ "","","","","","","","";
+};
+
+&gpio1 {
+ gpio-line-names =
+ /*A0-A7*/ "GPI_1_BMC_1V8","","","","","",
+ "SCMFPGA_SPARE_GPIO1_1V8","SCMFPGA_SPARE_GPIO2_1V8",
+ /*B0-B7*/ "SCMFPGA_SPARE_GPIO3_1V8","SCMFPGA_SPARE_GPIO4_1V8",
+ "SCMFPGA_SPARE_GPIO5_1V8","","","","","",
+ /*C0-C7*/ "","","","","","","","",
+ /*D0-D7*/ "","BMC_SPI1_RST_N","BIOS_FLASH_MUX_SEL","",
+ "","TPM2_PIRQ_N","TPM2_RST_N","",
+ /*E0-E7*/ "","","","","","","","";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+};
+
+&i2c7 {
+ status = "okay";
+};
+
+&i2c8 {
+ status = "okay";
+};
+
+&i2c9 {
+ status = "okay";
+};
+
+&i2c10 {
+ status = "okay";
+};
+
+&i2c12 {
+ status = "okay";
+};
+
+&i2c13 {
+ status = "okay";
+};
+
+&i2c14 {
+ status = "okay";
+};
+
+&i2c15 {
+ status = "okay";
+};
+
+&vhub {
+ status = "okay";
+};
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3] ARM: dts: aspeed: add Nuvia DC-SCM BMC
@ 2022-03-25 19:02 ` Jae Hyun Yoo
0 siblings, 0 replies; 10+ messages in thread
From: Jae Hyun Yoo @ 2022-03-25 19:02 UTC (permalink / raw)
To: Rob Herring, Joel Stanley, Andrew Jeffery, Andrew Lunn
Cc: Jamie Iles, Graeme Gregory, devicetree, linux-arm-kernel,
linux-aspeed, Jae Hyun Yoo
From: Graeme Gregory <quic_ggregory@quicinc.com>
Add initial version of device tree for Nuvia DC-SCM BMC which is
equipped with Aspeed AST2600 BMC SoC.
Signed-off-by: Graeme Gregory <quic_ggregory@quicinc.com>
Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
---
Changes in v3:
* Added 'stdout-path'. (Krzysztof)
Changes in v2:
* Added a comment to explain 'rgmii' phy mode setting. (Andrew)
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts | 190 ++++++++++++++++++
2 files changed, 191 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7c16f8a2b738..e63cd6ed0faa 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1546,6 +1546,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-lenovo-hr855xg2.dtb \
aspeed-bmc-microsoft-olympus.dtb \
+ aspeed-bmc-nuvia-dc-scm.dtb \
aspeed-bmc-opp-lanyang.dtb \
aspeed-bmc-opp-mihawk.dtb \
aspeed-bmc-opp-mowgli.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts b/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
new file mode 100644
index 000000000000..f4a97cfb0f23
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+
+/dts-v1/;
+
+#include "aspeed-g6.dtsi"
+
+/ {
+ model = "Nuvia DC-SCM BMC";
+ compatible = "nuvia,dc-scm-bmc", "aspeed,ast2600";
+
+ aliases {
+ serial4 = &uart5;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+};
+
+&mdio3 {
+ status = "okay";
+
+ ethphy3: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mac2 {
+ status = "okay";
+
+ /* Bootloader sets up the MAC to insert delay */
+ phy-mode = "rgmii";
+ phy-handle = <ðphy3>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii3_default>;
+};
+
+&mac3 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii4_default>;
+
+ use-ncsi;
+};
+
+&rtc {
+ status = "okay";
+};
+
+&fmc {
+ status = "okay";
+
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "bmc";
+ spi-max-frequency = <133000000>;
+#include "openbmc-flash-layout-64.dtsi"
+ };
+
+ flash@1 {
+ status = "okay";
+ m25p,fast-read;
+ label = "alt-bmc";
+ spi-max-frequency = <133000000>;
+#include "openbmc-flash-layout-64-alt.dtsi"
+ };
+};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default>;
+
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "bios";
+ spi-max-frequency = <133000000>;
+ };
+};
+
+&gpio0 {
+ gpio-line-names =
+ /*A0-A7*/ "","","","","","","","",
+ /*B0-B7*/ "BMC_FLASH_MUX_SEL","","","","","","","",
+ /*C0-C7*/ "","","","","","","","",
+ /*D0-D7*/ "","","","","","","","",
+ /*E0-E7*/ "","","","","","","","",
+ /*F0-F7*/ "","","","","","","","",
+ /*G0-G7*/ "","","","","","","","",
+ /*H0-H7*/ "","","","","","","","",
+ /*I0-I7*/ "","","","","","","","",
+ /*J0-J7*/ "","","","","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "","","","","","","","",
+ /*M0-M7*/ "","","","","","","","",
+ /*N0-N7*/ "BMC_FWSPI_RST_N","","GPIO_1_BMC_3V3","","","","","",
+ /*O0-O7*/ "JTAG_MUX_A","JTAG_MUX_B","","","","","","",
+ /*P0-P7*/ "","","","","","","","",
+ /*Q0-Q7*/ "","","","","","","","",
+ /*R0-R7*/ "","","","","","","","",
+ /*S0-S7*/ "","","","","","","","",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","","","","","","",
+ /*V0-V7*/ "","","","SCMFPGA_SPARE_GPIO1_3V3",
+ "SCMFPGA_SPARE_GPIO2_3V3","SCMFPGA_SPARE_GPIO3_3V3",
+ "SCMFPGA_SPARE_GPIO4_3V3","SCMFPGA_SPARE_GPIO5_3V3",
+ /*W0-W7*/ "","","","","","","","",
+ /*X0-X7*/ "","","","","","","","",
+ /*Y0-Y7*/ "","","","","","","","",
+ /*Z0-Z7*/ "","","","","","","","",
+ /*AA0-AA7*/ "","","","","","","","",
+ /*AB0-AB7*/ "","","","","","","","",
+ /*AC0-AC7*/ "","","","","","","","";
+};
+
+&gpio1 {
+ gpio-line-names =
+ /*A0-A7*/ "GPI_1_BMC_1V8","","","","","",
+ "SCMFPGA_SPARE_GPIO1_1V8","SCMFPGA_SPARE_GPIO2_1V8",
+ /*B0-B7*/ "SCMFPGA_SPARE_GPIO3_1V8","SCMFPGA_SPARE_GPIO4_1V8",
+ "SCMFPGA_SPARE_GPIO5_1V8","","","","","",
+ /*C0-C7*/ "","","","","","","","",
+ /*D0-D7*/ "","BMC_SPI1_RST_N","BIOS_FLASH_MUX_SEL","",
+ "","TPM2_PIRQ_N","TPM2_RST_N","",
+ /*E0-E7*/ "","","","","","","","";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+};
+
+&i2c7 {
+ status = "okay";
+};
+
+&i2c8 {
+ status = "okay";
+};
+
+&i2c9 {
+ status = "okay";
+};
+
+&i2c10 {
+ status = "okay";
+};
+
+&i2c12 {
+ status = "okay";
+};
+
+&i2c13 {
+ status = "okay";
+};
+
+&i2c14 {
+ status = "okay";
+};
+
+&i2c15 {
+ status = "okay";
+};
+
+&vhub {
+ status = "okay";
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v3] ARM: dts: aspeed: add Nuvia DC-SCM BMC
2022-03-25 19:02 ` Jae Hyun Yoo
@ 2022-03-27 18:55 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-27 18:55 UTC (permalink / raw)
To: Jae Hyun Yoo, Rob Herring, Joel Stanley, Andrew Jeffery, Andrew Lunn
Cc: Jamie Iles, Graeme Gregory, devicetree, linux-arm-kernel, linux-aspeed
On 25/03/2022 20:02, Jae Hyun Yoo wrote:
> From: Graeme Gregory <quic_ggregory@quicinc.com>
>
> Add initial version of device tree for Nuvia DC-SCM BMC which is
> equipped with Aspeed AST2600 BMC SoC.
>
> Signed-off-by: Graeme Gregory <quic_ggregory@quicinc.com>
> Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
> ---
> Changes in v3:
> * Added 'stdout-path'. (Krzysztof)
>
> Changes in v2:
> * Added a comment to explain 'rgmii' phy mode setting. (Andrew)
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts | 190 ++++++++++++++++++
> 2 files changed, 191 insertions(+)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 7c16f8a2b738..e63cd6ed0faa 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1546,6 +1546,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-lenovo-hr630.dtb \
> aspeed-bmc-lenovo-hr855xg2.dtb \
> aspeed-bmc-microsoft-olympus.dtb \
> + aspeed-bmc-nuvia-dc-scm.dtb \
> aspeed-bmc-opp-lanyang.dtb \
> aspeed-bmc-opp-mihawk.dtb \
> aspeed-bmc-opp-mowgli.dtb \
> diff --git a/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts b/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
> new file mode 100644
> index 000000000000..f4a97cfb0f23
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
> @@ -0,0 +1,190 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +// Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
> +
> +/dts-v1/;
> +
> +#include "aspeed-g6.dtsi"
> +
> +/ {
> + model = "Nuvia DC-SCM BMC";
> + compatible = "nuvia,dc-scm-bmc", "aspeed,ast2600";
> +
> + aliases {
> + serial4 = &uart5;
> + };
> +
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=ttyS4,115200n8";
After adding stdout-path, please remove bootargs.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3] ARM: dts: aspeed: add Nuvia DC-SCM BMC
@ 2022-03-27 18:55 ` Krzysztof Kozlowski
0 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-27 18:55 UTC (permalink / raw)
To: Jae Hyun Yoo, Rob Herring, Joel Stanley, Andrew Jeffery, Andrew Lunn
Cc: Jamie Iles, Graeme Gregory, devicetree, linux-arm-kernel, linux-aspeed
On 25/03/2022 20:02, Jae Hyun Yoo wrote:
> From: Graeme Gregory <quic_ggregory@quicinc.com>
>
> Add initial version of device tree for Nuvia DC-SCM BMC which is
> equipped with Aspeed AST2600 BMC SoC.
>
> Signed-off-by: Graeme Gregory <quic_ggregory@quicinc.com>
> Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
> ---
> Changes in v3:
> * Added 'stdout-path'. (Krzysztof)
>
> Changes in v2:
> * Added a comment to explain 'rgmii' phy mode setting. (Andrew)
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts | 190 ++++++++++++++++++
> 2 files changed, 191 insertions(+)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 7c16f8a2b738..e63cd6ed0faa 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1546,6 +1546,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-lenovo-hr630.dtb \
> aspeed-bmc-lenovo-hr855xg2.dtb \
> aspeed-bmc-microsoft-olympus.dtb \
> + aspeed-bmc-nuvia-dc-scm.dtb \
> aspeed-bmc-opp-lanyang.dtb \
> aspeed-bmc-opp-mihawk.dtb \
> aspeed-bmc-opp-mowgli.dtb \
> diff --git a/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts b/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
> new file mode 100644
> index 000000000000..f4a97cfb0f23
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
> @@ -0,0 +1,190 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +// Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
> +
> +/dts-v1/;
> +
> +#include "aspeed-g6.dtsi"
> +
> +/ {
> + model = "Nuvia DC-SCM BMC";
> + compatible = "nuvia,dc-scm-bmc", "aspeed,ast2600";
> +
> + aliases {
> + serial4 = &uart5;
> + };
> +
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=ttyS4,115200n8";
After adding stdout-path, please remove bootargs.
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3] ARM: dts: aspeed: add Nuvia DC-SCM BMC
2022-03-27 18:55 ` Krzysztof Kozlowski
@ 2022-03-27 20:24 ` Jae Hyun Yoo
-1 siblings, 0 replies; 10+ messages in thread
From: Jae Hyun Yoo @ 2022-03-27 20:24 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Joel Stanley, Andrew Jeffery,
Andrew Lunn
Cc: Jamie Iles, Graeme Gregory, devicetree, linux-arm-kernel, linux-aspeed
[...]
>> + chosen {
>> + stdout-path = &uart5;
>> + bootargs = "console=ttyS4,115200n8";
>
> After adding stdout-path, please remove bootargs.
Can I keep the default bootargs for a case if CONFIG_CMDLINE_FORCE
is enabled?
Best Regards,
Jae
>
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3] ARM: dts: aspeed: add Nuvia DC-SCM BMC
@ 2022-03-27 20:24 ` Jae Hyun Yoo
0 siblings, 0 replies; 10+ messages in thread
From: Jae Hyun Yoo @ 2022-03-27 20:24 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Joel Stanley, Andrew Jeffery,
Andrew Lunn
Cc: Jamie Iles, Graeme Gregory, devicetree, linux-arm-kernel, linux-aspeed
[...]
>> + chosen {
>> + stdout-path = &uart5;
>> + bootargs = "console=ttyS4,115200n8";
>
> After adding stdout-path, please remove bootargs.
Can I keep the default bootargs for a case if CONFIG_CMDLINE_FORCE
is enabled?
Best Regards,
Jae
>
> Best regards,
> Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3] ARM: dts: aspeed: add Nuvia DC-SCM BMC
2022-03-27 20:24 ` Jae Hyun Yoo
@ 2022-03-28 7:13 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-28 7:13 UTC (permalink / raw)
To: Jae Hyun Yoo, Rob Herring, Joel Stanley, Andrew Jeffery, Andrew Lunn
Cc: Jamie Iles, Graeme Gregory, devicetree, linux-arm-kernel, linux-aspeed
On 27/03/2022 22:24, Jae Hyun Yoo wrote:
>
> [...]
>
>>> + chosen {
>>> + stdout-path = &uart5;
>>> + bootargs = "console=ttyS4,115200n8";
>>
>> After adding stdout-path, please remove bootargs.
>
> Can I keep the default bootargs for a case if CONFIG_CMDLINE_FORCE
> is enabled?
No, because you control the config, so just disable CMDLINE_FORCE if you
don't want it and such bootargs are not part of hardware description.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3] ARM: dts: aspeed: add Nuvia DC-SCM BMC
@ 2022-03-28 7:13 ` Krzysztof Kozlowski
0 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-28 7:13 UTC (permalink / raw)
To: Jae Hyun Yoo, Rob Herring, Joel Stanley, Andrew Jeffery, Andrew Lunn
Cc: Jamie Iles, Graeme Gregory, devicetree, linux-arm-kernel, linux-aspeed
On 27/03/2022 22:24, Jae Hyun Yoo wrote:
>
> [...]
>
>>> + chosen {
>>> + stdout-path = &uart5;
>>> + bootargs = "console=ttyS4,115200n8";
>>
>> After adding stdout-path, please remove bootargs.
>
> Can I keep the default bootargs for a case if CONFIG_CMDLINE_FORCE
> is enabled?
No, because you control the config, so just disable CMDLINE_FORCE if you
don't want it and such bootargs are not part of hardware description.
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3] ARM: dts: aspeed: add Nuvia DC-SCM BMC
2022-03-28 7:13 ` Krzysztof Kozlowski
@ 2022-03-28 14:15 ` Jae Hyun Yoo
-1 siblings, 0 replies; 10+ messages in thread
From: Jae Hyun Yoo @ 2022-03-28 14:15 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Joel Stanley, Andrew Jeffery,
Andrew Lunn
Cc: Jamie Iles, Graeme Gregory, devicetree, linux-arm-kernel, linux-aspeed
On 3/28/2022 12:13 AM, Krzysztof Kozlowski wrote:
> On 27/03/2022 22:24, Jae Hyun Yoo wrote:
>>
>> [...]
>>
>>>> + chosen {
>>>> + stdout-path = &uart5;
>>>> + bootargs = "console=ttyS4,115200n8";
>>>
>>> After adding stdout-path, please remove bootargs.
>>
>> Can I keep the default bootargs for a case if CONFIG_CMDLINE_FORCE
>> is enabled?
>
> No, because you control the config, so just disable CMDLINE_FORCE if you
> don't want it and such bootargs are not part of hardware description.
Okay, I'll remove bootargs in v4. Thanks!
Best Regards,
Jae
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3] ARM: dts: aspeed: add Nuvia DC-SCM BMC
@ 2022-03-28 14:15 ` Jae Hyun Yoo
0 siblings, 0 replies; 10+ messages in thread
From: Jae Hyun Yoo @ 2022-03-28 14:15 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Joel Stanley, Andrew Jeffery,
Andrew Lunn
Cc: Jamie Iles, Graeme Gregory, devicetree, linux-arm-kernel, linux-aspeed
On 3/28/2022 12:13 AM, Krzysztof Kozlowski wrote:
> On 27/03/2022 22:24, Jae Hyun Yoo wrote:
>>
>> [...]
>>
>>>> + chosen {
>>>> + stdout-path = &uart5;
>>>> + bootargs = "console=ttyS4,115200n8";
>>>
>>> After adding stdout-path, please remove bootargs.
>>
>> Can I keep the default bootargs for a case if CONFIG_CMDLINE_FORCE
>> is enabled?
>
> No, because you control the config, so just disable CMDLINE_FORCE if you
> don't want it and such bootargs are not part of hardware description.
Okay, I'll remove bootargs in v4. Thanks!
Best Regards,
Jae
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2022-03-28 14:16 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-25 19:02 [PATCH v3] ARM: dts: aspeed: add Nuvia DC-SCM BMC Jae Hyun Yoo
2022-03-25 19:02 ` Jae Hyun Yoo
2022-03-27 18:55 ` Krzysztof Kozlowski
2022-03-27 18:55 ` Krzysztof Kozlowski
2022-03-27 20:24 ` Jae Hyun Yoo
2022-03-27 20:24 ` Jae Hyun Yoo
2022-03-28 7:13 ` Krzysztof Kozlowski
2022-03-28 7:13 ` Krzysztof Kozlowski
2022-03-28 14:15 ` Jae Hyun Yoo
2022-03-28 14:15 ` Jae Hyun Yoo
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