* [Intel-gfx] [PATCH] drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names @ 2021-02-22 21:04 Imre Deak 2021-02-22 21:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork ` (3 more replies) 0 siblings, 4 replies; 8+ messages in thread From: Imre Deak @ 2021-02-22 21:04 UTC (permalink / raw) To: intel-gfx In Bspec the TGL TypeC ports are TC1-6, the AUX power well request flags are USBC1-6/TBT1-6, so for clarity use these names in the port power domain names instead of the D-I terminology (which Bspec uses only for the ICL TypeC ports). No functional change. Cc: Souza Jose <jose.souza@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> --- .../drm/i915/display/intel_display_power.c | 212 ++++++++---------- .../drm/i915/display/intel_display_power.h | 32 +++ 2 files changed, 130 insertions(+), 114 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index f00c1750febd..7e0eaa872350 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -2886,24 +2886,24 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, BIT_ULL(POWER_DOMAIN_PIPE_B) | \ BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) | \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_F_LANES) | \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_G_LANES) | \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_H_LANES) | \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_I_LANES) | \ - BIT_ULL(POWER_DOMAIN_AUX_D) | \ - BIT_ULL(POWER_DOMAIN_AUX_E) | \ - BIT_ULL(POWER_DOMAIN_AUX_F) | \ - BIT_ULL(POWER_DOMAIN_AUX_G) | \ - BIT_ULL(POWER_DOMAIN_AUX_H) | \ - BIT_ULL(POWER_DOMAIN_AUX_I) | \ - BIT_ULL(POWER_DOMAIN_AUX_D_TBT) | \ - BIT_ULL(POWER_DOMAIN_AUX_E_TBT) | \ - BIT_ULL(POWER_DOMAIN_AUX_F_TBT) | \ - BIT_ULL(POWER_DOMAIN_AUX_G_TBT) | \ - BIT_ULL(POWER_DOMAIN_AUX_H_TBT) | \ - BIT_ULL(POWER_DOMAIN_AUX_I_TBT) | \ + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC1) | \ + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC2) | \ + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC3) | \ + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC4) | \ + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC5) | \ + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC6) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC1) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC2) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC3) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC4) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC5) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC6) | \ + BIT_ULL(POWER_DOMAIN_AUX_TBT1) | \ + BIT_ULL(POWER_DOMAIN_AUX_TBT2) | \ + BIT_ULL(POWER_DOMAIN_AUX_TBT3) | \ + BIT_ULL(POWER_DOMAIN_AUX_TBT4) | \ + BIT_ULL(POWER_DOMAIN_AUX_TBT5) | \ + BIT_ULL(POWER_DOMAIN_AUX_TBT6) | \ BIT_ULL(POWER_DOMAIN_VGA) | \ BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL(POWER_DOMAIN_INIT)) @@ -2921,18 +2921,12 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL(POWER_DOMAIN_INIT)) -#define TGL_DDI_IO_D_TC1_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_D_IO)) -#define TGL_DDI_IO_E_TC2_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_E_IO)) -#define TGL_DDI_IO_F_TC3_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO)) -#define TGL_DDI_IO_G_TC4_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_G_IO)) -#define TGL_DDI_IO_H_TC5_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_H_IO)) -#define TGL_DDI_IO_I_TC6_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_I_IO)) +#define TGL_DDI_IO_TC1_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC1) +#define TGL_DDI_IO_TC2_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC2) +#define TGL_DDI_IO_TC3_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC3) +#define TGL_DDI_IO_TC4_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC4) +#define TGL_DDI_IO_TC5_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC5) +#define TGL_DDI_IO_TC6_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC6) #define TGL_AUX_A_IO_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ @@ -2941,44 +2935,34 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, BIT_ULL(POWER_DOMAIN_AUX_B)) #define TGL_AUX_C_IO_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_C)) -#define TGL_AUX_D_TC1_IO_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_D)) -#define TGL_AUX_E_TC2_IO_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_E)) -#define TGL_AUX_F_TC3_IO_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_F)) -#define TGL_AUX_G_TC4_IO_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_G)) -#define TGL_AUX_H_TC5_IO_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_H)) -#define TGL_AUX_I_TC6_IO_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_I)) -#define TGL_AUX_D_TBT1_IO_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_D_TBT)) -#define TGL_AUX_E_TBT2_IO_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_E_TBT)) -#define TGL_AUX_F_TBT3_IO_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_F_TBT)) -#define TGL_AUX_G_TBT4_IO_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_G_TBT)) -#define TGL_AUX_H_TBT5_IO_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_H_TBT)) -#define TGL_AUX_I_TBT6_IO_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_I_TBT)) + +#define TGL_AUX_IO_USBC1_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC1) +#define TGL_AUX_IO_USBC2_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC2) +#define TGL_AUX_IO_USBC3_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC3) +#define TGL_AUX_IO_USBC4_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC4) +#define TGL_AUX_IO_USBC5_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC5) +#define TGL_AUX_IO_USBC6_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC6) + +#define TGL_AUX_IO_TBT1_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT1) +#define TGL_AUX_IO_TBT2_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT2) +#define TGL_AUX_IO_TBT3_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT3) +#define TGL_AUX_IO_TBT4_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT4) +#define TGL_AUX_IO_TBT5_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT5) +#define TGL_AUX_IO_TBT6_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT6) #define TGL_TC_COLD_OFF_POWER_DOMAINS ( \ - BIT_ULL(POWER_DOMAIN_AUX_D) | \ - BIT_ULL(POWER_DOMAIN_AUX_E) | \ - BIT_ULL(POWER_DOMAIN_AUX_F) | \ - BIT_ULL(POWER_DOMAIN_AUX_G) | \ - BIT_ULL(POWER_DOMAIN_AUX_H) | \ - BIT_ULL(POWER_DOMAIN_AUX_I) | \ - BIT_ULL(POWER_DOMAIN_AUX_D_TBT) | \ - BIT_ULL(POWER_DOMAIN_AUX_E_TBT) | \ - BIT_ULL(POWER_DOMAIN_AUX_F_TBT) | \ - BIT_ULL(POWER_DOMAIN_AUX_G_TBT) | \ - BIT_ULL(POWER_DOMAIN_AUX_H_TBT) | \ - BIT_ULL(POWER_DOMAIN_AUX_I_TBT) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC1) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC2) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC3) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC4) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC5) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC6) | \ + BIT_ULL(POWER_DOMAIN_AUX_TBT1) | \ + BIT_ULL(POWER_DOMAIN_AUX_TBT2) | \ + BIT_ULL(POWER_DOMAIN_AUX_TBT3) | \ + BIT_ULL(POWER_DOMAIN_AUX_TBT4) | \ + BIT_ULL(POWER_DOMAIN_AUX_TBT5) | \ + BIT_ULL(POWER_DOMAIN_AUX_TBT6) | \ BIT_ULL(POWER_DOMAIN_TC_COLD_OFF)) #define RKL_PW_4_POWER_DOMAINS ( \ @@ -2994,10 +2978,10 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL(POWER_DOMAIN_VGA) | \ BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ - BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) | \ - BIT_ULL(POWER_DOMAIN_AUX_D) | \ - BIT_ULL(POWER_DOMAIN_AUX_E) | \ + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC1) | \ + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC2) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC1) | \ + BIT_ULL(POWER_DOMAIN_AUX_USBC2) | \ BIT_ULL(POWER_DOMAIN_INIT)) /* @@ -4145,8 +4129,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { } }, { - .name = "DDI D TC1 IO", - .domains = TGL_DDI_IO_D_TC1_POWER_DOMAINS, + .name = "DDI IO TC1", + .domains = TGL_DDI_IO_TC1_POWER_DOMAINS, .ops = &hsw_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4155,8 +4139,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "DDI E TC2 IO", - .domains = TGL_DDI_IO_E_TC2_POWER_DOMAINS, + .name = "DDI IO TC2", + .domains = TGL_DDI_IO_TC2_POWER_DOMAINS, .ops = &hsw_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4165,8 +4149,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "DDI F TC3 IO", - .domains = TGL_DDI_IO_F_TC3_POWER_DOMAINS, + .name = "DDI IO TC3", + .domains = TGL_DDI_IO_TC3_POWER_DOMAINS, .ops = &hsw_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4175,8 +4159,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "DDI G TC4 IO", - .domains = TGL_DDI_IO_G_TC4_POWER_DOMAINS, + .name = "DDI IO TC4", + .domains = TGL_DDI_IO_TC4_POWER_DOMAINS, .ops = &hsw_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4185,8 +4169,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "DDI H TC5 IO", - .domains = TGL_DDI_IO_H_TC5_POWER_DOMAINS, + .name = "DDI IO TC5", + .domains = TGL_DDI_IO_TC5_POWER_DOMAINS, .ops = &hsw_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4195,8 +4179,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "DDI I TC6 IO", - .domains = TGL_DDI_IO_I_TC6_POWER_DOMAINS, + .name = "DDI IO TC6", + .domains = TGL_DDI_IO_TC6_POWER_DOMAINS, .ops = &hsw_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4241,8 +4225,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "AUX D TC1", - .domains = TGL_AUX_D_TC1_IO_POWER_DOMAINS, + .name = "AUX USBC1", + .domains = TGL_AUX_IO_USBC1_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4252,8 +4236,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "AUX E TC2", - .domains = TGL_AUX_E_TC2_IO_POWER_DOMAINS, + .name = "AUX USBC2", + .domains = TGL_AUX_IO_USBC2_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4263,8 +4247,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "AUX F TC3", - .domains = TGL_AUX_F_TC3_IO_POWER_DOMAINS, + .name = "AUX USBC3", + .domains = TGL_AUX_IO_USBC3_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4274,8 +4258,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "AUX G TC4", - .domains = TGL_AUX_G_TC4_IO_POWER_DOMAINS, + .name = "AUX USBC4", + .domains = TGL_AUX_IO_USBC4_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4285,8 +4269,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "AUX H TC5", - .domains = TGL_AUX_H_TC5_IO_POWER_DOMAINS, + .name = "AUX USBC5", + .domains = TGL_AUX_IO_USBC5_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4296,8 +4280,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "AUX I TC6", - .domains = TGL_AUX_I_TC6_IO_POWER_DOMAINS, + .name = "AUX USBC6", + .domains = TGL_AUX_IO_USBC6_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4307,8 +4291,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "AUX D TBT1", - .domains = TGL_AUX_D_TBT1_IO_POWER_DOMAINS, + .name = "AUX TBT1", + .domains = TGL_AUX_IO_TBT1_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4318,8 +4302,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "AUX E TBT2", - .domains = TGL_AUX_E_TBT2_IO_POWER_DOMAINS, + .name = "AUX TBT2", + .domains = TGL_AUX_IO_TBT2_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4329,8 +4313,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "AUX F TBT3", - .domains = TGL_AUX_F_TBT3_IO_POWER_DOMAINS, + .name = "AUX TBT3", + .domains = TGL_AUX_IO_TBT3_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4340,8 +4324,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "AUX G TBT4", - .domains = TGL_AUX_G_TBT4_IO_POWER_DOMAINS, + .name = "AUX TBT4", + .domains = TGL_AUX_IO_TBT4_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4351,8 +4335,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "AUX H TBT5", - .domains = TGL_AUX_H_TBT5_IO_POWER_DOMAINS, + .name = "AUX TBT5", + .domains = TGL_AUX_IO_TBT5_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4362,8 +4346,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { }, }, { - .name = "AUX I TBT6", - .domains = TGL_AUX_I_TBT6_IO_POWER_DOMAINS, + .name = "AUX TBT6", + .domains = TGL_AUX_IO_TBT6_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4471,8 +4455,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { } }, { - .name = "DDI D TC1 IO", - .domains = TGL_DDI_IO_D_TC1_POWER_DOMAINS, + .name = "DDI IO TC1", + .domains = TGL_DDI_IO_TC1_POWER_DOMAINS, .ops = &hsw_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4481,8 +4465,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { }, }, { - .name = "DDI E TC2 IO", - .domains = TGL_DDI_IO_E_TC2_POWER_DOMAINS, + .name = "DDI IO TC2", + .domains = TGL_DDI_IO_TC2_POWER_DOMAINS, .ops = &hsw_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4511,8 +4495,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { }, }, { - .name = "AUX D TC1", - .domains = TGL_AUX_D_TC1_IO_POWER_DOMAINS, + .name = "AUX USBC1", + .domains = TGL_AUX_IO_USBC1_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { @@ -4521,8 +4505,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { }, }, { - .name = "AUX E TC2", - .domains = TGL_AUX_E_TC2_IO_POWER_DOMAINS, + .name = "AUX USBC2", + .domains = TGL_AUX_IO_USBC2_POWER_DOMAINS, .ops = &icl_aux_power_well_ops, .id = DISP_PW_ID_NONE, { diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h index bc30c479be53..f3ca5d5c9778 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.h +++ b/drivers/gpu/drm/i915/display/intel_display_power.h @@ -41,6 +41,14 @@ enum intel_display_power_domain { POWER_DOMAIN_PORT_DDI_G_LANES, POWER_DOMAIN_PORT_DDI_H_LANES, POWER_DOMAIN_PORT_DDI_I_LANES, + + POWER_DOMAIN_PORT_DDI_LANES_TC1 = POWER_DOMAIN_PORT_DDI_D_LANES, /* tgl+ */ + POWER_DOMAIN_PORT_DDI_LANES_TC2, + POWER_DOMAIN_PORT_DDI_LANES_TC3, + POWER_DOMAIN_PORT_DDI_LANES_TC4, + POWER_DOMAIN_PORT_DDI_LANES_TC5, + POWER_DOMAIN_PORT_DDI_LANES_TC6, + POWER_DOMAIN_PORT_DDI_A_IO, POWER_DOMAIN_PORT_DDI_B_IO, POWER_DOMAIN_PORT_DDI_C_IO, @@ -50,6 +58,14 @@ enum intel_display_power_domain { POWER_DOMAIN_PORT_DDI_G_IO, POWER_DOMAIN_PORT_DDI_H_IO, POWER_DOMAIN_PORT_DDI_I_IO, + + POWER_DOMAIN_PORT_DDI_IO_TC1 = POWER_DOMAIN_PORT_DDI_D_IO, /* tgl+ */ + POWER_DOMAIN_PORT_DDI_IO_TC2, + POWER_DOMAIN_PORT_DDI_IO_TC3, + POWER_DOMAIN_PORT_DDI_IO_TC4, + POWER_DOMAIN_PORT_DDI_IO_TC5, + POWER_DOMAIN_PORT_DDI_IO_TC6, + POWER_DOMAIN_PORT_DSI, POWER_DOMAIN_PORT_CRT, POWER_DOMAIN_PORT_OTHER, @@ -64,6 +80,14 @@ enum intel_display_power_domain { POWER_DOMAIN_AUX_G, POWER_DOMAIN_AUX_H, POWER_DOMAIN_AUX_I, + + POWER_DOMAIN_AUX_USBC1 = POWER_DOMAIN_AUX_D, /* tgl+ */ + POWER_DOMAIN_AUX_USBC2, + POWER_DOMAIN_AUX_USBC3, + POWER_DOMAIN_AUX_USBC4, + POWER_DOMAIN_AUX_USBC5, + POWER_DOMAIN_AUX_USBC6, + POWER_DOMAIN_AUX_IO_A, POWER_DOMAIN_AUX_C_TBT, POWER_DOMAIN_AUX_D_TBT, @@ -72,6 +96,14 @@ enum intel_display_power_domain { POWER_DOMAIN_AUX_G_TBT, POWER_DOMAIN_AUX_H_TBT, POWER_DOMAIN_AUX_I_TBT, + + POWER_DOMAIN_AUX_TBT1 = POWER_DOMAIN_AUX_D_TBT, /* tgl+ */ + POWER_DOMAIN_AUX_TBT2, + POWER_DOMAIN_AUX_TBT3, + POWER_DOMAIN_AUX_TBT4, + POWER_DOMAIN_AUX_TBT5, + POWER_DOMAIN_AUX_TBT6, + POWER_DOMAIN_GMBUS, POWER_DOMAIN_MODESET, POWER_DOMAIN_GT_IRQ, -- 2.25.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names 2021-02-22 21:04 [Intel-gfx] [PATCH] drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names Imre Deak @ 2021-02-22 21:41 ` Patchwork 2021-02-22 22:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork ` (2 subsequent siblings) 3 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2021-02-22 21:41 UTC (permalink / raw) To: Imre Deak; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 3543 bytes --] == Series Details == Series: drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names URL : https://patchwork.freedesktop.org/series/87299/ State : success == Summary == CI Bug Log - changes from CI_DRM_9795 -> Patchwork_19717 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/index.html Known issues ------------ Here are the changes found in Patchwork_19717 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_mmap_gtt@basic: - fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402]) +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/fi-tgl-y/igt@gem_mmap_gtt@basic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/fi-tgl-y/igt@gem_mmap_gtt@basic.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - fi-snb-2600: NOTRUN -> [SKIP][3] ([fdo#109271]) +34 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/fi-snb-2600/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html * igt@kms_chamelium@hdmi-crc-fast: - fi-snb-2600: NOTRUN -> [SKIP][4] ([fdo#109271] / [fdo#111827]) +8 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/fi-snb-2600/igt@kms_chamelium@hdmi-crc-fast.html #### Possible fixes #### * igt@gem_flink_basic@basic: - fi-tgl-y: [DMESG-WARN][5] ([i915#402]) -> [PASS][6] +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/fi-tgl-y/igt@gem_flink_basic@basic.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/fi-tgl-y/igt@gem_flink_basic@basic.html * igt@i915_module_load@reload: - fi-kbl-7500u: [DMESG-WARN][7] ([i915#2605]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/fi-kbl-7500u/igt@i915_module_load@reload.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/fi-kbl-7500u/igt@i915_module_load@reload.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][9] ([i915#2128]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#2128]: https://gitlab.freedesktop.org/drm/intel/issues/2128 [i915#2605]: https://gitlab.freedesktop.org/drm/intel/issues/2605 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 Participating hosts (44 -> 41) ------------------------------ Additional (1): fi-snb-2600 Missing (4): fi-ctg-p8600 fi-ilk-m540 fi-bdw-samus fi-hsw-4200u Build changes ------------- * Linux: CI_DRM_9795 -> Patchwork_19717 CI-20190529: 20190529 CI_DRM_9795: 5f1072de87a90be6d0ba8f4e4cffdbbe13166f03 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6011: 8c8499c29dd2aa189c3d687e057ba4df326b1732 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_19717: ce01ee7c643ef06a2951fba4cbbbf7622c0f3772 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == ce01ee7c643e drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/index.html [-- Attachment #1.2: Type: text/html, Size: 4427 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names 2021-02-22 21:04 [Intel-gfx] [PATCH] drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names Imre Deak 2021-02-22 21:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork @ 2021-02-22 22:55 ` Patchwork 2021-02-24 12:13 ` Imre Deak 2021-02-23 13:56 ` [Intel-gfx] [PATCH] " Souza, Jose 2021-02-24 17:13 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork 3 siblings, 1 reply; 8+ messages in thread From: Patchwork @ 2021-02-22 22:55 UTC (permalink / raw) To: Imre Deak; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 30290 bytes --] == Series Details == Series: drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names URL : https://patchwork.freedesktop.org/series/87299/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9795_full -> Patchwork_19717_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_19717_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_19717_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_19717_full: ### IGT changes ### #### Possible regressions #### * igt@i915_pm_rc6_residency@rc6-idle: - shard-glk: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk7/igt@i915_pm_rc6_residency@rc6-idle.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk1/igt@i915_pm_rc6_residency@rc6-idle.html #### Warnings #### * igt@runner@aborted: - shard-kbl: ([FAIL][3], [FAIL][4], [FAIL][5]) ([i915#2426] / [i915#2505] / [i915#2724] / [i915#3002]) -> ([FAIL][6], [FAIL][7], [FAIL][8], [FAIL][9], [FAIL][10]) ([i915#1814] / [i915#2292] / [i915#2505] / [i915#3002]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl4/igt@runner@aborted.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl1/igt@runner@aborted.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl6/igt@runner@aborted.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@runner@aborted.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl6/igt@runner@aborted.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@runner@aborted.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@runner@aborted.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@runner@aborted.html - shard-apl: ([FAIL][11], [FAIL][12], [FAIL][13]) ([i915#3002]) -> ([FAIL][14], [FAIL][15], [FAIL][16], [FAIL][17]) ([i915#2724] / [i915#3002]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl1/igt@runner@aborted.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl1/igt@runner@aborted.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl3/igt@runner@aborted.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@runner@aborted.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@runner@aborted.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl1/igt@runner@aborted.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl1/igt@runner@aborted.html Known issues ------------ Here are the changes found in Patchwork_19717_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@feature_discovery@psr2: - shard-iclb: [PASS][18] -> [SKIP][19] ([i915#658]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb2/igt@feature_discovery@psr2.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb6/igt@feature_discovery@psr2.html * igt@gem_create@create-massive: - shard-snb: NOTRUN -> [DMESG-WARN][20] ([i915#3002]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb6/igt@gem_create@create-massive.html - shard-kbl: NOTRUN -> [DMESG-WARN][21] ([i915#3002]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@gem_create@create-massive.html * igt@gem_ctx_persistence@file: - shard-hsw: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#1099]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@gem_ctx_persistence@file.html * igt@gem_ctx_persistence@legacy-engines-mixed: - shard-snb: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#1099]) +6 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb2/igt@gem_ctx_persistence@legacy-engines-mixed.html * igt@gem_eio@unwedge-stress: - shard-iclb: [PASS][24] -> [TIMEOUT][25] ([i915#2481] / [i915#3070]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb5/igt@gem_eio@unwedge-stress.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb8/igt@gem_eio@unwedge-stress.html * igt@gem_exec_create@forked: - shard-glk: [PASS][26] -> [DMESG-WARN][27] ([i915#118] / [i915#95]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk6/igt@gem_exec_create@forked.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk7/igt@gem_exec_create@forked.html * igt@gem_exec_fair@basic-deadline: - shard-apl: NOTRUN -> [FAIL][28] ([i915#2846]) [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-none-vip@rcs0: - shard-glk: NOTRUN -> [FAIL][29] ([i915#2842]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@gem_exec_fair@basic-none-vip@rcs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-glk: [PASS][30] -> [FAIL][31] ([i915#2842]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk7/igt@gem_exec_fair@basic-throttle@rcs0.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk1/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gem_exec_reloc@basic-many-active@rcs0: - shard-snb: NOTRUN -> [FAIL][32] ([i915#2389]) +2 similar issues [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb6/igt@gem_exec_reloc@basic-many-active@rcs0.html * igt@gem_exec_reloc@basic-many-active@vcs0: - shard-kbl: NOTRUN -> [FAIL][33] ([i915#2389]) +9 similar issues [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@gem_exec_reloc@basic-many-active@vcs0.html * igt@gem_exec_schedule@u-fairslice@rcs0: - shard-skl: [PASS][34] -> [DMESG-WARN][35] ([i915#2803]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl2/igt@gem_exec_schedule@u-fairslice@rcs0.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl2/igt@gem_exec_schedule@u-fairslice@rcs0.html * igt@gem_exec_schedule@u-fairslice@vcs0: - shard-tglb: [PASS][36] -> [DMESG-WARN][37] ([i915#2803]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb7/igt@gem_exec_schedule@u-fairslice@vcs0.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb3/igt@gem_exec_schedule@u-fairslice@vcs0.html * igt@gem_pread@exhaustion: - shard-kbl: NOTRUN -> [WARN][38] ([i915#2658]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@gem_pread@exhaustion.html * igt@gem_userptr_blits@process-exit-mmap-busy@uc: - shard-kbl: NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#1699]) +3 similar issues [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@gem_userptr_blits@process-exit-mmap-busy@uc.html * igt@gem_userptr_blits@vma-merge: - shard-apl: NOTRUN -> [INCOMPLETE][40] ([i915#2502] / [i915#2667]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@gem_userptr_blits@vma-merge.html * igt@i915_pm_dc@dc6-dpms: - shard-kbl: NOTRUN -> [FAIL][41] ([i915#454]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@i915_pm_dc@dc6-dpms.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [PASS][42] -> [FAIL][43] ([i915#454]) [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb7/igt@i915_pm_dc@dc6-psr.html [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb4/igt@i915_pm_dc@dc6-psr.html * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp: - shard-kbl: NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#1937]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html * igt@i915_pm_rc6_residency@rc6-idle: - shard-hsw: [PASS][45] -> [WARN][46] ([i915#1519]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-hsw5/igt@i915_pm_rc6_residency@rc6-idle.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw4/igt@i915_pm_rc6_residency@rc6-idle.html * igt@i915_pm_rpm@modeset-lpsp-stress: - shard-apl: NOTRUN -> [SKIP][47] ([fdo#109271]) +183 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@i915_pm_rpm@modeset-lpsp-stress.html * igt@i915_suspend@fence-restore-untiled: - shard-apl: [PASS][48] -> [DMESG-WARN][49] ([i915#180]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl8/igt@i915_suspend@fence-restore-untiled.html [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl1/igt@i915_suspend@fence-restore-untiled.html * igt@kms_async_flips@alternate-sync-async-flip: - shard-snb: [PASS][50] -> [FAIL][51] ([i915#2521]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-snb2/igt@kms_async_flips@alternate-sync-async-flip.html [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb2/igt@kms_async_flips@alternate-sync-async-flip.html * igt@kms_big_fb@yf-tiled-8bpp-rotate-270: - shard-glk: NOTRUN -> [SKIP][52] ([fdo#109271]) +29 similar issues [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_big_fb@yf-tiled-8bpp-rotate-270.html * igt@kms_big_joiner@basic: - shard-kbl: NOTRUN -> [SKIP][53] ([fdo#109271] / [i915#2705]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_big_joiner@basic.html * igt@kms_big_joiner@invalid-modeset: - shard-apl: NOTRUN -> [SKIP][54] ([fdo#109271] / [i915#2705]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@kms_big_joiner@invalid-modeset.html - shard-glk: NOTRUN -> [SKIP][55] ([fdo#109271] / [i915#2705]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_big_joiner@invalid-modeset.html * igt@kms_chamelium@hdmi-frame-dump: - shard-hsw: NOTRUN -> [SKIP][56] ([fdo#109271] / [fdo#111827]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@kms_chamelium@hdmi-frame-dump.html * igt@kms_chamelium@vga-hpd-for-each-pipe: - shard-kbl: NOTRUN -> [SKIP][57] ([fdo#109271] / [fdo#111827]) +26 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_chamelium@vga-hpd-for-each-pipe.html * igt@kms_color@pipe-d-ctm-0-5: - shard-skl: NOTRUN -> [SKIP][58] ([fdo#109271]) +10 similar issues [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl10/igt@kms_color@pipe-d-ctm-0-5.html * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red: - shard-snb: NOTRUN -> [SKIP][59] ([fdo#109271] / [fdo#111827]) +23 similar issues [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb6/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html * igt@kms_color_chamelium@pipe-a-ctm-limited-range: - shard-apl: NOTRUN -> [SKIP][60] ([fdo#109271] / [fdo#111827]) +21 similar issues [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html * igt@kms_color_chamelium@pipe-c-ctm-0-5: - shard-glk: NOTRUN -> [SKIP][61] ([fdo#109271] / [fdo#111827]) +2 similar issues [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_color_chamelium@pipe-c-ctm-0-5.html * igt@kms_content_protection@atomic: - shard-kbl: NOTRUN -> [TIMEOUT][62] ([i915#1319]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@kms_content_protection@atomic.html * igt@kms_content_protection@srm: - shard-apl: NOTRUN -> [TIMEOUT][63] ([i915#1319]) +1 similar issue [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@kms_content_protection@srm.html * igt@kms_content_protection@uevent: - shard-kbl: NOTRUN -> [FAIL][64] ([i915#2105]) [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_content_protection@uevent.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-kbl: [PASS][65] -> [DMESG-WARN][66] ([i915#180]) +1 similar issue [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html * igt@kms_cursor_crc@pipe-c-cursor-64x21-random: - shard-skl: [PASS][67] -> [FAIL][68] ([i915#54]) +5 similar issues [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl5/igt@kms_cursor_crc@pipe-c-cursor-64x21-random.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl9/igt@kms_cursor_crc@pipe-c-cursor-64x21-random.html * igt@kms_cursor_crc@pipe-d-cursor-suspend: - shard-kbl: NOTRUN -> [SKIP][69] ([fdo#109271]) +260 similar issues [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_cursor_crc@pipe-d-cursor-suspend.html * igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge: - shard-snb: NOTRUN -> [SKIP][70] ([fdo#109271]) +386 similar issues [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb6/igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic: - shard-skl: [PASS][71] -> [FAIL][72] ([i915#2346]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1: - shard-skl: [PASS][73] -> [FAIL][74] ([i915#79]) +1 similar issue [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs: - shard-kbl: NOTRUN -> [FAIL][75] ([i915#2641]) +1 similar issue [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html - shard-apl: NOTRUN -> [FAIL][76] ([i915#2641]) [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs: - shard-kbl: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#2672]) +1 similar issue [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile: - shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#2642]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile: - shard-kbl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#2642]) [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-pwrite: - shard-hsw: NOTRUN -> [SKIP][80] ([fdo#109271]) +27 similar issues [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-pwrite.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [PASS][81] -> [FAIL][82] ([i915#1188]) [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - shard-skl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#533]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl10/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html * igt@kms_pipe_crc_basic@hang-read-crc-pipe-d: - shard-kbl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#533]) +1 similar issue [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-glk: NOTRUN -> [FAIL][85] ([fdo#108145] / [i915#265]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html - shard-apl: NOTRUN -> [FAIL][86] ([fdo#108145] / [i915#265]) +2 similar issues [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html * igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb: - shard-apl: NOTRUN -> [FAIL][87] ([i915#265]) [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl8/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: - shard-kbl: NOTRUN -> [FAIL][88] ([fdo#108145] / [i915#265]) +1 similar issue [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [PASS][89] -> [FAIL][90] ([fdo#108145] / [i915#265]) +1 similar issue [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@kms_plane_multiple@atomic-pipe-d-tiling-none: - shard-hsw: NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#533]) +3 similar issues [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@kms_plane_multiple@atomic-pipe-d-tiling-none.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5: - shard-apl: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#658]) +5 similar issues [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5.html * igt@kms_psr2_sf@plane-move-sf-dmg-area-0: - shard-glk: NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#658]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_psr2_sf@plane-move-sf-dmg-area-0.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5: - shard-kbl: NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#658]) +7 similar issues [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html * igt@kms_psr@psr2_suspend: - shard-iclb: [PASS][95] -> [SKIP][96] ([fdo#109441]) +2 similar issues [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb2/igt@kms_psr@psr2_suspend.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb6/igt@kms_psr@psr2_suspend.html * igt@kms_writeback@writeback-fb-id: - shard-glk: NOTRUN -> [SKIP][97] ([fdo#109271] / [i915#2437]) [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_writeback@writeback-fb-id.html - shard-apl: NOTRUN -> [SKIP][98] ([fdo#109271] / [i915#2437]) [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@kms_writeback@writeback-fb-id.html * igt@kms_writeback@writeback-invalid-parameters: - shard-kbl: NOTRUN -> [SKIP][99] ([fdo#109271] / [i915#2437]) +1 similar issue [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@kms_writeback@writeback-invalid-parameters.html * igt@perf@non-sampling-read-error: - shard-skl: [PASS][100] -> [DMESG-WARN][101] ([i915#1982]) +2 similar issues [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl2/igt@perf@non-sampling-read-error.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl2/igt@perf@non-sampling-read-error.html * igt@perf@polling-parameterized: - shard-skl: [PASS][102] -> [FAIL][103] ([i915#1542]) [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl3/igt@perf@polling-parameterized.html [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl1/igt@perf@polling-parameterized.html * igt@perf_pmu@rc6-suspend: - shard-kbl: NOTRUN -> [DMESG-WARN][104] ([i915#180]) [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@perf_pmu@rc6-suspend.html * igt@sysfs_clients@recycle: - shard-hsw: [PASS][105] -> [FAIL][106] ([i915#3028]) [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-hsw1/igt@sysfs_clients@recycle.html [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw7/igt@sysfs_clients@recycle.html * igt@sysfs_clients@recycle-many: - shard-kbl: NOTRUN -> [FAIL][107] ([i915#3028]) [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@sysfs_clients@recycle-many.html - shard-tglb: [PASS][108] -> [FAIL][109] ([i915#3028]) [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb5/igt@sysfs_clients@recycle-many.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb7/igt@sysfs_clients@recycle-many.html * igt@sysfs_clients@split-10@bcs0: - shard-kbl: NOTRUN -> [SKIP][110] ([fdo#109271] / [i915#3026]) [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@sysfs_clients@split-10@bcs0.html #### Possible fixes #### * igt@gem_ctx_persistence@close-replace-race: - shard-glk: [TIMEOUT][111] ([i915#2918]) -> [PASS][112] [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk4/igt@gem_ctx_persistence@close-replace-race.html [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk9/igt@gem_ctx_persistence@close-replace-race.html * igt@gem_eio@unwedge-stress: - shard-tglb: [TIMEOUT][113] ([i915#3063]) -> [PASS][114] [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb3/igt@gem_eio@unwedge-stress.html [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb3/igt@gem_eio@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-tglb: [FAIL][115] ([i915#2846]) -> [PASS][116] [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb8/igt@gem_exec_fair@basic-deadline.html [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb1/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [FAIL][117] ([i915#2842]) -> [PASS][118] [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@gem_exec_fair@basic-none@vcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [FAIL][119] ([i915#2842]) -> [PASS][120] [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_reloc@basic-many-active@rcs0: - shard-hsw: [FAIL][121] ([i915#2389]) -> [PASS][122] [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-hsw7/igt@gem_exec_reloc@basic-many-active@rcs0.html [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@gem_exec_reloc@basic-many-active@rcs0.html * igt@gem_exec_schedule@u-fairslice@vcs1: - shard-kbl: [DMESG-WARN][123] ([i915#1610] / [i915#2803]) -> [PASS][124] [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl6/igt@gem_exec_schedule@u-fairslice@vcs1.html [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@gem_exec_schedule@u-fairslice@vcs1.html * igt@gem_fenced_exec_thrash@no-spare-fences-busy: - shard-hsw: [INCOMPLETE][125] ([i915#2055]) -> [PASS][126] [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-hsw5/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html * igt@gem_huc_copy@huc-copy: - shard-tglb: [SKIP][127] ([i915#2190]) -> [PASS][128] [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb6/igt@gem_huc_copy@huc-copy.html [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb8/igt@gem_huc_copy@huc-copy.html * igt@kms_async_flips@test-time-stamp: - shard-tglb: [FAIL][129] ([i915#2597]) -> [PASS][130] [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb5/igt@kms_async_flips@test-time-stamp.html [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb2/igt@kms_async_flips@test-time-stamp.html * igt@kms_big_fb@x-tiled-16bpp-rotate-180: - shard-iclb: [DMESG-WARN][131] ([i915#1226]) -> [PASS][132] [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb2/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb6/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html * igt@kms_color@pipe-b-ctm-red-to-blue: - shard-skl: [FAIL][133] ([i915#129]) -> [PASS][134] [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl2/igt@kms_color@pipe-b-ctm-red-to-blue.html [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl2/igt@kms_color@pipe-b-ctm-red-to-blue.html * igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen: - shard-skl: [FAIL][135] ([i915#54]) -> [PASS][136] +9 similar issues [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl3/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-skl: [INCOMPLETE][137] ([i915#300]) -> [PASS][138] [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html * igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@a-edp1: - shard-skl: [DMESG-WARN][139] ([i915#1982]) -> [PASS][140] [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl9/igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@a-edp1.html [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl1/igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@a-edp1.html * igt@kms_flip@flip-vs-suspend@c-dp1: - shard-apl: [DMESG-WARN][141] ([i915#180]) -> [PASS][142] [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@kms_flip@flip-vs-suspend@c-dp1.html * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1: - shard-skl: [FAIL][143] ([i915#2122]) -> [PASS][144] [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html * igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary: - shard-iclb: [SKIP][145] ([i915#668]) -> [PASS][146] [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [FAIL][147] ([fdo#108145] / [i915#265]) -> [PASS][148] [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html * igt@kms_psr@psr2_sprite_plane_onoff: - shard-iclb: [SKIP][149] ([fdo#109441]) -> [PASS][150] [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb3/igt@kms_psr@psr2_sprite_plane_ == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/index.html [-- Attachment #1.2: Type: text/html, Size: 34043 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names 2021-02-22 22:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork @ 2021-02-24 12:13 ` Imre Deak 0 siblings, 0 replies; 8+ messages in thread From: Imre Deak @ 2021-02-24 12:13 UTC (permalink / raw) To: intel-gfx, Jose Souza; +Cc: Lakshminarayana Vudum On Mon, Feb 22, 2021 at 10:55:17PM +0000, Patchwork wrote: > == Series Details == > > Series: drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names > URL : https://patchwork.freedesktop.org/series/87299/ > State : failure Thanks for the review pushed to -din. The failure is unrelated to the patch, as it has no functional change. > > == Summary == > > CI Bug Log - changes from CI_DRM_9795_full -> Patchwork_19717_full > ==================================================== > > Summary > ------- > > **FAILURE** > > Serious unknown changes coming with Patchwork_19717_full absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_19717_full, please notify your bug team to allow them > to document this new failure mode, which will reduce false positives in CI. > > > > Possible new issues > ------------------- > > Here are the unknown changes that may have been introduced in Patchwork_19717_full: > > ### IGT changes ### > > #### Possible regressions #### > > * igt@i915_pm_rc6_residency@rc6-idle: > - shard-glk: [PASS][1] -> [FAIL][2] > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk7/igt@i915_pm_rc6_residency@rc6-idle.html > [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk1/igt@i915_pm_rc6_residency@rc6-idle.html > > > #### Warnings #### > > * igt@runner@aborted: > - shard-kbl: ([FAIL][3], [FAIL][4], [FAIL][5]) ([i915#2426] / [i915#2505] / [i915#2724] / [i915#3002]) -> ([FAIL][6], [FAIL][7], [FAIL][8], [FAIL][9], [FAIL][10]) ([i915#1814] / [i915#2292] / [i915#2505] / [i915#3002]) > [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl4/igt@runner@aborted.html > [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl1/igt@runner@aborted.html > [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl6/igt@runner@aborted.html > [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@runner@aborted.html > [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl6/igt@runner@aborted.html > [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@runner@aborted.html > [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@runner@aborted.html > [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@runner@aborted.html > - shard-apl: ([FAIL][11], [FAIL][12], [FAIL][13]) ([i915#3002]) -> ([FAIL][14], [FAIL][15], [FAIL][16], [FAIL][17]) ([i915#2724] / [i915#3002]) > [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl1/igt@runner@aborted.html > [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl1/igt@runner@aborted.html > [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl3/igt@runner@aborted.html > [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@runner@aborted.html > [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@runner@aborted.html > [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl1/igt@runner@aborted.html > [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl1/igt@runner@aborted.html > > > Known issues > ------------ > > Here are the changes found in Patchwork_19717_full that come from known issues: > > ### IGT changes ### > > #### Issues hit #### > > * igt@feature_discovery@psr2: > - shard-iclb: [PASS][18] -> [SKIP][19] ([i915#658]) > [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb2/igt@feature_discovery@psr2.html > [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb6/igt@feature_discovery@psr2.html > > * igt@gem_create@create-massive: > - shard-snb: NOTRUN -> [DMESG-WARN][20] ([i915#3002]) > [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb6/igt@gem_create@create-massive.html > - shard-kbl: NOTRUN -> [DMESG-WARN][21] ([i915#3002]) > [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@gem_create@create-massive.html > > * igt@gem_ctx_persistence@file: > - shard-hsw: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#1099]) > [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@gem_ctx_persistence@file.html > > * igt@gem_ctx_persistence@legacy-engines-mixed: > - shard-snb: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#1099]) +6 similar issues > [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb2/igt@gem_ctx_persistence@legacy-engines-mixed.html > > * igt@gem_eio@unwedge-stress: > - shard-iclb: [PASS][24] -> [TIMEOUT][25] ([i915#2481] / [i915#3070]) > [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb5/igt@gem_eio@unwedge-stress.html > [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb8/igt@gem_eio@unwedge-stress.html > > * igt@gem_exec_create@forked: > - shard-glk: [PASS][26] -> [DMESG-WARN][27] ([i915#118] / [i915#95]) > [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk6/igt@gem_exec_create@forked.html > [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk7/igt@gem_exec_create@forked.html > > * igt@gem_exec_fair@basic-deadline: > - shard-apl: NOTRUN -> [FAIL][28] ([i915#2846]) > [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@gem_exec_fair@basic-deadline.html > > * igt@gem_exec_fair@basic-none-vip@rcs0: > - shard-glk: NOTRUN -> [FAIL][29] ([i915#2842]) > [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@gem_exec_fair@basic-none-vip@rcs0.html > > * igt@gem_exec_fair@basic-throttle@rcs0: > - shard-glk: [PASS][30] -> [FAIL][31] ([i915#2842]) > [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk7/igt@gem_exec_fair@basic-throttle@rcs0.html > [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk1/igt@gem_exec_fair@basic-throttle@rcs0.html > > * igt@gem_exec_reloc@basic-many-active@rcs0: > - shard-snb: NOTRUN -> [FAIL][32] ([i915#2389]) +2 similar issues > [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb6/igt@gem_exec_reloc@basic-many-active@rcs0.html > > * igt@gem_exec_reloc@basic-many-active@vcs0: > - shard-kbl: NOTRUN -> [FAIL][33] ([i915#2389]) +9 similar issues > [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@gem_exec_reloc@basic-many-active@vcs0.html > > * igt@gem_exec_schedule@u-fairslice@rcs0: > - shard-skl: [PASS][34] -> [DMESG-WARN][35] ([i915#2803]) > [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl2/igt@gem_exec_schedule@u-fairslice@rcs0.html > [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl2/igt@gem_exec_schedule@u-fairslice@rcs0.html > > * igt@gem_exec_schedule@u-fairslice@vcs0: > - shard-tglb: [PASS][36] -> [DMESG-WARN][37] ([i915#2803]) > [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb7/igt@gem_exec_schedule@u-fairslice@vcs0.html > [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb3/igt@gem_exec_schedule@u-fairslice@vcs0.html > > * igt@gem_pread@exhaustion: > - shard-kbl: NOTRUN -> [WARN][38] ([i915#2658]) > [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@gem_pread@exhaustion.html > > * igt@gem_userptr_blits@process-exit-mmap-busy@uc: > - shard-kbl: NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#1699]) +3 similar issues > [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@gem_userptr_blits@process-exit-mmap-busy@uc.html > > * igt@gem_userptr_blits@vma-merge: > - shard-apl: NOTRUN -> [INCOMPLETE][40] ([i915#2502] / [i915#2667]) > [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@gem_userptr_blits@vma-merge.html > > * igt@i915_pm_dc@dc6-dpms: > - shard-kbl: NOTRUN -> [FAIL][41] ([i915#454]) > [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@i915_pm_dc@dc6-dpms.html > > * igt@i915_pm_dc@dc6-psr: > - shard-iclb: [PASS][42] -> [FAIL][43] ([i915#454]) > [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb7/igt@i915_pm_dc@dc6-psr.html > [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb4/igt@i915_pm_dc@dc6-psr.html > > * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp: > - shard-kbl: NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#1937]) > [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html > > * igt@i915_pm_rc6_residency@rc6-idle: > - shard-hsw: [PASS][45] -> [WARN][46] ([i915#1519]) > [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-hsw5/igt@i915_pm_rc6_residency@rc6-idle.html > [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw4/igt@i915_pm_rc6_residency@rc6-idle.html > > * igt@i915_pm_rpm@modeset-lpsp-stress: > - shard-apl: NOTRUN -> [SKIP][47] ([fdo#109271]) +183 similar issues > [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@i915_pm_rpm@modeset-lpsp-stress.html > > * igt@i915_suspend@fence-restore-untiled: > - shard-apl: [PASS][48] -> [DMESG-WARN][49] ([i915#180]) > [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl8/igt@i915_suspend@fence-restore-untiled.html > [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl1/igt@i915_suspend@fence-restore-untiled.html > > * igt@kms_async_flips@alternate-sync-async-flip: > - shard-snb: [PASS][50] -> [FAIL][51] ([i915#2521]) > [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-snb2/igt@kms_async_flips@alternate-sync-async-flip.html > [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb2/igt@kms_async_flips@alternate-sync-async-flip.html > > * igt@kms_big_fb@yf-tiled-8bpp-rotate-270: > - shard-glk: NOTRUN -> [SKIP][52] ([fdo#109271]) +29 similar issues > [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_big_fb@yf-tiled-8bpp-rotate-270.html > > * igt@kms_big_joiner@basic: > - shard-kbl: NOTRUN -> [SKIP][53] ([fdo#109271] / [i915#2705]) > [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_big_joiner@basic.html > > * igt@kms_big_joiner@invalid-modeset: > - shard-apl: NOTRUN -> [SKIP][54] ([fdo#109271] / [i915#2705]) > [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@kms_big_joiner@invalid-modeset.html > - shard-glk: NOTRUN -> [SKIP][55] ([fdo#109271] / [i915#2705]) > [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_big_joiner@invalid-modeset.html > > * igt@kms_chamelium@hdmi-frame-dump: > - shard-hsw: NOTRUN -> [SKIP][56] ([fdo#109271] / [fdo#111827]) > [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@kms_chamelium@hdmi-frame-dump.html > > * igt@kms_chamelium@vga-hpd-for-each-pipe: > - shard-kbl: NOTRUN -> [SKIP][57] ([fdo#109271] / [fdo#111827]) +26 similar issues > [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_chamelium@vga-hpd-for-each-pipe.html > > * igt@kms_color@pipe-d-ctm-0-5: > - shard-skl: NOTRUN -> [SKIP][58] ([fdo#109271]) +10 similar issues > [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl10/igt@kms_color@pipe-d-ctm-0-5.html > > * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red: > - shard-snb: NOTRUN -> [SKIP][59] ([fdo#109271] / [fdo#111827]) +23 similar issues > [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb6/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html > > * igt@kms_color_chamelium@pipe-a-ctm-limited-range: > - shard-apl: NOTRUN -> [SKIP][60] ([fdo#109271] / [fdo#111827]) +21 similar issues > [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html > > * igt@kms_color_chamelium@pipe-c-ctm-0-5: > - shard-glk: NOTRUN -> [SKIP][61] ([fdo#109271] / [fdo#111827]) +2 similar issues > [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_color_chamelium@pipe-c-ctm-0-5.html > > * igt@kms_content_protection@atomic: > - shard-kbl: NOTRUN -> [TIMEOUT][62] ([i915#1319]) > [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@kms_content_protection@atomic.html > > * igt@kms_content_protection@srm: > - shard-apl: NOTRUN -> [TIMEOUT][63] ([i915#1319]) +1 similar issue > [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@kms_content_protection@srm.html > > * igt@kms_content_protection@uevent: > - shard-kbl: NOTRUN -> [FAIL][64] ([i915#2105]) > [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_content_protection@uevent.html > > * igt@kms_cursor_crc@pipe-a-cursor-suspend: > - shard-kbl: [PASS][65] -> [DMESG-WARN][66] ([i915#180]) +1 similar issue > [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html > [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html > > * igt@kms_cursor_crc@pipe-c-cursor-64x21-random: > - shard-skl: [PASS][67] -> [FAIL][68] ([i915#54]) +5 similar issues > [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl5/igt@kms_cursor_crc@pipe-c-cursor-64x21-random.html > [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl9/igt@kms_cursor_crc@pipe-c-cursor-64x21-random.html > > * igt@kms_cursor_crc@pipe-d-cursor-suspend: > - shard-kbl: NOTRUN -> [SKIP][69] ([fdo#109271]) +260 similar issues > [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_cursor_crc@pipe-d-cursor-suspend.html > > * igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge: > - shard-snb: NOTRUN -> [SKIP][70] ([fdo#109271]) +386 similar issues > [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb6/igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge.html > > * igt@kms_cursor_legacy@flip-vs-cursor-atomic: > - shard-skl: [PASS][71] -> [FAIL][72] ([i915#2346]) > [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html > [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html > > * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1: > - shard-skl: [PASS][73] -> [FAIL][74] ([i915#79]) +1 similar issue > [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html > [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html > > * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs: > - shard-kbl: NOTRUN -> [FAIL][75] ([i915#2641]) +1 similar issue > [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html > - shard-apl: NOTRUN -> [FAIL][76] ([i915#2641]) > [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html > > * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs: > - shard-kbl: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#2672]) +1 similar issue > [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html > > * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile: > - shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#2642]) > [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html > > * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile: > - shard-kbl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#2642]) > [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html > > * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-pwrite: > - shard-hsw: NOTRUN -> [SKIP][80] ([fdo#109271]) +27 similar issues > [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-pwrite.html > > * igt@kms_hdr@bpc-switch-dpms: > - shard-skl: [PASS][81] -> [FAIL][82] ([i915#1188]) > [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html > [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html > > * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: > - shard-skl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#533]) > [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl10/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html > > * igt@kms_pipe_crc_basic@hang-read-crc-pipe-d: > - shard-kbl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#533]) +1 similar issue > [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html > > * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: > - shard-glk: NOTRUN -> [FAIL][85] ([fdo#108145] / [i915#265]) > [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html > - shard-apl: NOTRUN -> [FAIL][86] ([fdo#108145] / [i915#265]) +2 similar issues > [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html > > * igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb: > - shard-apl: NOTRUN -> [FAIL][87] ([i915#265]) > [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl8/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html > > * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: > - shard-kbl: NOTRUN -> [FAIL][88] ([fdo#108145] / [i915#265]) +1 similar issue > [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html > > * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: > - shard-skl: [PASS][89] -> [FAIL][90] ([fdo#108145] / [i915#265]) +1 similar issue > [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html > [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html > > * igt@kms_plane_multiple@atomic-pipe-d-tiling-none: > - shard-hsw: NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#533]) +3 similar issues > [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@kms_plane_multiple@atomic-pipe-d-tiling-none.html > > * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5: > - shard-apl: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#658]) +5 similar issues > [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5.html > > * igt@kms_psr2_sf@plane-move-sf-dmg-area-0: > - shard-glk: NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#658]) > [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_psr2_sf@plane-move-sf-dmg-area-0.html > > * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5: > - shard-kbl: NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#658]) +7 similar issues > [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html > > * igt@kms_psr@psr2_suspend: > - shard-iclb: [PASS][95] -> [SKIP][96] ([fdo#109441]) +2 similar issues > [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb2/igt@kms_psr@psr2_suspend.html > [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb6/igt@kms_psr@psr2_suspend.html > > * igt@kms_writeback@writeback-fb-id: > - shard-glk: NOTRUN -> [SKIP][97] ([fdo#109271] / [i915#2437]) > [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_writeback@writeback-fb-id.html > - shard-apl: NOTRUN -> [SKIP][98] ([fdo#109271] / [i915#2437]) > [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@kms_writeback@writeback-fb-id.html > > * igt@kms_writeback@writeback-invalid-parameters: > - shard-kbl: NOTRUN -> [SKIP][99] ([fdo#109271] / [i915#2437]) +1 similar issue > [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@kms_writeback@writeback-invalid-parameters.html > > * igt@perf@non-sampling-read-error: > - shard-skl: [PASS][100] -> [DMESG-WARN][101] ([i915#1982]) +2 similar issues > [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl2/igt@perf@non-sampling-read-error.html > [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl2/igt@perf@non-sampling-read-error.html > > * igt@perf@polling-parameterized: > - shard-skl: [PASS][102] -> [FAIL][103] ([i915#1542]) > [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl3/igt@perf@polling-parameterized.html > [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl1/igt@perf@polling-parameterized.html > > * igt@perf_pmu@rc6-suspend: > - shard-kbl: NOTRUN -> [DMESG-WARN][104] ([i915#180]) > [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@perf_pmu@rc6-suspend.html > > * igt@sysfs_clients@recycle: > - shard-hsw: [PASS][105] -> [FAIL][106] ([i915#3028]) > [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-hsw1/igt@sysfs_clients@recycle.html > [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw7/igt@sysfs_clients@recycle.html > > * igt@sysfs_clients@recycle-many: > - shard-kbl: NOTRUN -> [FAIL][107] ([i915#3028]) > [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@sysfs_clients@recycle-many.html > - shard-tglb: [PASS][108] -> [FAIL][109] ([i915#3028]) > [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb5/igt@sysfs_clients@recycle-many.html > [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb7/igt@sysfs_clients@recycle-many.html > > * igt@sysfs_clients@split-10@bcs0: > - shard-kbl: NOTRUN -> [SKIP][110] ([fdo#109271] / [i915#3026]) > [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@sysfs_clients@split-10@bcs0.html > > > #### Possible fixes #### > > * igt@gem_ctx_persistence@close-replace-race: > - shard-glk: [TIMEOUT][111] ([i915#2918]) -> [PASS][112] > [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk4/igt@gem_ctx_persistence@close-replace-race.html > [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk9/igt@gem_ctx_persistence@close-replace-race.html > > * igt@gem_eio@unwedge-stress: > - shard-tglb: [TIMEOUT][113] ([i915#3063]) -> [PASS][114] > [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb3/igt@gem_eio@unwedge-stress.html > [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb3/igt@gem_eio@unwedge-stress.html > > * igt@gem_exec_fair@basic-deadline: > - shard-tglb: [FAIL][115] ([i915#2846]) -> [PASS][116] > [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb8/igt@gem_exec_fair@basic-deadline.html > [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb1/igt@gem_exec_fair@basic-deadline.html > > * igt@gem_exec_fair@basic-none@vcs0: > - shard-kbl: [FAIL][117] ([i915#2842]) -> [PASS][118] > [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html > [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@gem_exec_fair@basic-none@vcs0.html > > * igt@gem_exec_fair@basic-pace-share@rcs0: > - shard-glk: [FAIL][119] ([i915#2842]) -> [PASS][120] > [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html > [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html > > * igt@gem_exec_reloc@basic-many-active@rcs0: > - shard-hsw: [FAIL][121] ([i915#2389]) -> [PASS][122] > [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-hsw7/igt@gem_exec_reloc@basic-many-active@rcs0.html > [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@gem_exec_reloc@basic-many-active@rcs0.html > > * igt@gem_exec_schedule@u-fairslice@vcs1: > - shard-kbl: [DMESG-WARN][123] ([i915#1610] / [i915#2803]) -> [PASS][124] > [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl6/igt@gem_exec_schedule@u-fairslice@vcs1.html > [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@gem_exec_schedule@u-fairslice@vcs1.html > > * igt@gem_fenced_exec_thrash@no-spare-fences-busy: > - shard-hsw: [INCOMPLETE][125] ([i915#2055]) -> [PASS][126] > [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-hsw5/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html > [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html > > * igt@gem_huc_copy@huc-copy: > - shard-tglb: [SKIP][127] ([i915#2190]) -> [PASS][128] > [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb6/igt@gem_huc_copy@huc-copy.html > [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb8/igt@gem_huc_copy@huc-copy.html > > * igt@kms_async_flips@test-time-stamp: > - shard-tglb: [FAIL][129] ([i915#2597]) -> [PASS][130] > [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb5/igt@kms_async_flips@test-time-stamp.html > [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb2/igt@kms_async_flips@test-time-stamp.html > > * igt@kms_big_fb@x-tiled-16bpp-rotate-180: > - shard-iclb: [DMESG-WARN][131] ([i915#1226]) -> [PASS][132] > [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb2/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html > [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb6/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html > > * igt@kms_color@pipe-b-ctm-red-to-blue: > - shard-skl: [FAIL][133] ([i915#129]) -> [PASS][134] > [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl2/igt@kms_color@pipe-b-ctm-red-to-blue.html > [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl2/igt@kms_color@pipe-b-ctm-red-to-blue.html > > * igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen: > - shard-skl: [FAIL][135] ([i915#54]) -> [PASS][136] +9 similar issues > [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl3/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html > [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html > > * igt@kms_cursor_crc@pipe-a-cursor-suspend: > - shard-skl: [INCOMPLETE][137] ([i915#300]) -> [PASS][138] > [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html > [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html > > * igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@a-edp1: > - shard-skl: [DMESG-WARN][139] ([i915#1982]) -> [PASS][140] > [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl9/igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@a-edp1.html > [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl1/igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@a-edp1.html > > * igt@kms_flip@flip-vs-suspend@c-dp1: > - shard-apl: [DMESG-WARN][141] ([i915#180]) -> [PASS][142] > [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html > [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@kms_flip@flip-vs-suspend@c-dp1.html > > * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1: > - shard-skl: [FAIL][143] ([i915#2122]) -> [PASS][144] > [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html > [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html > > * igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary: > - shard-iclb: [SKIP][145] ([i915#668]) -> [PASS][146] > [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html > [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html > > * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: > - shard-skl: [FAIL][147] ([fdo#108145] / [i915#265]) -> [PASS][148] > [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html > [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html > > * igt@kms_psr@psr2_sprite_plane_onoff: > - shard-iclb: [SKIP][149] ([fdo#109441]) -> [PASS][150] > [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb3/igt@kms_psr@psr2_sprite_plane_ > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names 2021-02-22 21:04 [Intel-gfx] [PATCH] drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names Imre Deak 2021-02-22 21:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork 2021-02-22 22:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork @ 2021-02-23 13:56 ` Souza, Jose 2021-02-23 14:51 ` Imre Deak 2021-02-24 17:13 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork 3 siblings, 1 reply; 8+ messages in thread From: Souza, Jose @ 2021-02-23 13:56 UTC (permalink / raw) To: intel-gfx, Deak, Imre On Mon, 2021-02-22 at 23:04 +0200, Imre Deak wrote: > In Bspec the TGL TypeC ports are TC1-6, the AUX power well request flags > are USBC1-6/TBT1-6, so for clarity use these names in the port power > domain names instead of the D-I terminology (which Bspec uses only for > the ICL TypeC ports). > > No functional change. > > Cc: Souza Jose <jose.souza@intel.com> > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- > .../drm/i915/display/intel_display_power.c | 212 ++++++++---------- > .../drm/i915/display/intel_display_power.h | 32 +++ > 2 files changed, 130 insertions(+), 114 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c > index f00c1750febd..7e0eaa872350 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > @@ -2886,24 +2886,24 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, > BIT_ULL(POWER_DOMAIN_PIPE_B) | \ > BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ > BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) | \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_F_LANES) | \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_G_LANES) | \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_H_LANES) | \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_I_LANES) | \ > - BIT_ULL(POWER_DOMAIN_AUX_D) | \ > - BIT_ULL(POWER_DOMAIN_AUX_E) | \ > - BIT_ULL(POWER_DOMAIN_AUX_F) | \ > - BIT_ULL(POWER_DOMAIN_AUX_G) | \ > - BIT_ULL(POWER_DOMAIN_AUX_H) | \ > - BIT_ULL(POWER_DOMAIN_AUX_I) | \ > - BIT_ULL(POWER_DOMAIN_AUX_D_TBT) | \ > - BIT_ULL(POWER_DOMAIN_AUX_E_TBT) | \ > - BIT_ULL(POWER_DOMAIN_AUX_F_TBT) | \ > - BIT_ULL(POWER_DOMAIN_AUX_G_TBT) | \ > - BIT_ULL(POWER_DOMAIN_AUX_H_TBT) | \ > - BIT_ULL(POWER_DOMAIN_AUX_I_TBT) | \ > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC1) | \ > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC2) | \ > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC3) | \ > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC4) | \ > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC5) | \ > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC6) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC1) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC2) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC3) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC4) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC5) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC6) | \ > + BIT_ULL(POWER_DOMAIN_AUX_TBT1) | \ > + BIT_ULL(POWER_DOMAIN_AUX_TBT2) | \ > + BIT_ULL(POWER_DOMAIN_AUX_TBT3) | \ > + BIT_ULL(POWER_DOMAIN_AUX_TBT4) | \ > + BIT_ULL(POWER_DOMAIN_AUX_TBT5) | \ > + BIT_ULL(POWER_DOMAIN_AUX_TBT6) | \ > BIT_ULL(POWER_DOMAIN_VGA) | \ > BIT_ULL(POWER_DOMAIN_AUDIO) | \ > BIT_ULL(POWER_DOMAIN_INIT)) > @@ -2921,18 +2921,12 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, > BIT_ULL(POWER_DOMAIN_AUX_C) | \ > BIT_ULL(POWER_DOMAIN_INIT)) > > > -#define TGL_DDI_IO_D_TC1_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_D_IO)) > -#define TGL_DDI_IO_E_TC2_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_E_IO)) > -#define TGL_DDI_IO_F_TC3_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO)) > -#define TGL_DDI_IO_G_TC4_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_G_IO)) > -#define TGL_DDI_IO_H_TC5_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_H_IO)) > -#define TGL_DDI_IO_I_TC6_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_I_IO)) > +#define TGL_DDI_IO_TC1_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC1) > +#define TGL_DDI_IO_TC2_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC2) > +#define TGL_DDI_IO_TC3_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC3) > +#define TGL_DDI_IO_TC4_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC4) > +#define TGL_DDI_IO_TC5_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC5) > +#define TGL_DDI_IO_TC6_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC6) > > > #define TGL_AUX_A_IO_POWER_DOMAINS ( \ > BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ > @@ -2941,44 +2935,34 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, > BIT_ULL(POWER_DOMAIN_AUX_B)) > #define TGL_AUX_C_IO_POWER_DOMAINS ( \ > BIT_ULL(POWER_DOMAIN_AUX_C)) > -#define TGL_AUX_D_TC1_IO_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_D)) > -#define TGL_AUX_E_TC2_IO_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_E)) > -#define TGL_AUX_F_TC3_IO_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_F)) > -#define TGL_AUX_G_TC4_IO_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_G)) > -#define TGL_AUX_H_TC5_IO_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_H)) > -#define TGL_AUX_I_TC6_IO_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_I)) > -#define TGL_AUX_D_TBT1_IO_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_D_TBT)) > -#define TGL_AUX_E_TBT2_IO_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_E_TBT)) > -#define TGL_AUX_F_TBT3_IO_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_F_TBT)) > -#define TGL_AUX_G_TBT4_IO_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_G_TBT)) > -#define TGL_AUX_H_TBT5_IO_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_H_TBT)) > -#define TGL_AUX_I_TBT6_IO_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_I_TBT)) > + > +#define TGL_AUX_IO_USBC1_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC1) > +#define TGL_AUX_IO_USBC2_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC2) > +#define TGL_AUX_IO_USBC3_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC3) > +#define TGL_AUX_IO_USBC4_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC4) > +#define TGL_AUX_IO_USBC5_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC5) > +#define TGL_AUX_IO_USBC6_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC6) > + > +#define TGL_AUX_IO_TBT1_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT1) > +#define TGL_AUX_IO_TBT2_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT2) > +#define TGL_AUX_IO_TBT3_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT3) > +#define TGL_AUX_IO_TBT4_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT4) > +#define TGL_AUX_IO_TBT5_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT5) > +#define TGL_AUX_IO_TBT6_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT6) > > > #define TGL_TC_COLD_OFF_POWER_DOMAINS ( \ > - BIT_ULL(POWER_DOMAIN_AUX_D) | \ > - BIT_ULL(POWER_DOMAIN_AUX_E) | \ > - BIT_ULL(POWER_DOMAIN_AUX_F) | \ > - BIT_ULL(POWER_DOMAIN_AUX_G) | \ > - BIT_ULL(POWER_DOMAIN_AUX_H) | \ > - BIT_ULL(POWER_DOMAIN_AUX_I) | \ > - BIT_ULL(POWER_DOMAIN_AUX_D_TBT) | \ > - BIT_ULL(POWER_DOMAIN_AUX_E_TBT) | \ > - BIT_ULL(POWER_DOMAIN_AUX_F_TBT) | \ > - BIT_ULL(POWER_DOMAIN_AUX_G_TBT) | \ > - BIT_ULL(POWER_DOMAIN_AUX_H_TBT) | \ > - BIT_ULL(POWER_DOMAIN_AUX_I_TBT) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC1) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC2) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC3) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC4) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC5) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC6) | \ > + BIT_ULL(POWER_DOMAIN_AUX_TBT1) | \ > + BIT_ULL(POWER_DOMAIN_AUX_TBT2) | \ > + BIT_ULL(POWER_DOMAIN_AUX_TBT3) | \ > + BIT_ULL(POWER_DOMAIN_AUX_TBT4) | \ > + BIT_ULL(POWER_DOMAIN_AUX_TBT5) | \ > + BIT_ULL(POWER_DOMAIN_AUX_TBT6) | \ > BIT_ULL(POWER_DOMAIN_TC_COLD_OFF)) > > > #define RKL_PW_4_POWER_DOMAINS ( \ > @@ -2994,10 +2978,10 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, > BIT_ULL(POWER_DOMAIN_AUDIO) | \ > BIT_ULL(POWER_DOMAIN_VGA) | \ > BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ > - BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) | \ > - BIT_ULL(POWER_DOMAIN_AUX_D) | \ > - BIT_ULL(POWER_DOMAIN_AUX_E) | \ > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC1) | \ > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC2) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC1) | \ > + BIT_ULL(POWER_DOMAIN_AUX_USBC2) | \ > BIT_ULL(POWER_DOMAIN_INIT)) > > > /* > @@ -4145,8 +4129,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > } > }, > { > - .name = "DDI D TC1 IO", > - .domains = TGL_DDI_IO_D_TC1_POWER_DOMAINS, > + .name = "DDI IO TC1", > + .domains = TGL_DDI_IO_TC1_POWER_DOMAINS, > .ops = &hsw_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4155,8 +4139,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "DDI E TC2 IO", > - .domains = TGL_DDI_IO_E_TC2_POWER_DOMAINS, > + .name = "DDI IO TC2", > + .domains = TGL_DDI_IO_TC2_POWER_DOMAINS, > .ops = &hsw_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4165,8 +4149,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "DDI F TC3 IO", > - .domains = TGL_DDI_IO_F_TC3_POWER_DOMAINS, > + .name = "DDI IO TC3", > + .domains = TGL_DDI_IO_TC3_POWER_DOMAINS, > .ops = &hsw_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4175,8 +4159,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "DDI G TC4 IO", > - .domains = TGL_DDI_IO_G_TC4_POWER_DOMAINS, > + .name = "DDI IO TC4", > + .domains = TGL_DDI_IO_TC4_POWER_DOMAINS, > .ops = &hsw_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4185,8 +4169,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "DDI H TC5 IO", > - .domains = TGL_DDI_IO_H_TC5_POWER_DOMAINS, > + .name = "DDI IO TC5", > + .domains = TGL_DDI_IO_TC5_POWER_DOMAINS, > .ops = &hsw_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4195,8 +4179,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "DDI I TC6 IO", > - .domains = TGL_DDI_IO_I_TC6_POWER_DOMAINS, > + .name = "DDI IO TC6", > + .domains = TGL_DDI_IO_TC6_POWER_DOMAINS, > .ops = &hsw_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4241,8 +4225,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "AUX D TC1", > - .domains = TGL_AUX_D_TC1_IO_POWER_DOMAINS, > + .name = "AUX USBC1", > + .domains = TGL_AUX_IO_USBC1_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4252,8 +4236,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "AUX E TC2", > - .domains = TGL_AUX_E_TC2_IO_POWER_DOMAINS, > + .name = "AUX USBC2", > + .domains = TGL_AUX_IO_USBC2_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4263,8 +4247,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "AUX F TC3", > - .domains = TGL_AUX_F_TC3_IO_POWER_DOMAINS, > + .name = "AUX USBC3", > + .domains = TGL_AUX_IO_USBC3_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4274,8 +4258,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "AUX G TC4", > - .domains = TGL_AUX_G_TC4_IO_POWER_DOMAINS, > + .name = "AUX USBC4", > + .domains = TGL_AUX_IO_USBC4_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4285,8 +4269,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "AUX H TC5", > - .domains = TGL_AUX_H_TC5_IO_POWER_DOMAINS, > + .name = "AUX USBC5", > + .domains = TGL_AUX_IO_USBC5_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4296,8 +4280,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "AUX I TC6", > - .domains = TGL_AUX_I_TC6_IO_POWER_DOMAINS, > + .name = "AUX USBC6", > + .domains = TGL_AUX_IO_USBC6_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4307,8 +4291,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "AUX D TBT1", > - .domains = TGL_AUX_D_TBT1_IO_POWER_DOMAINS, > + .name = "AUX TBT1", > + .domains = TGL_AUX_IO_TBT1_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4318,8 +4302,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "AUX E TBT2", > - .domains = TGL_AUX_E_TBT2_IO_POWER_DOMAINS, > + .name = "AUX TBT2", > + .domains = TGL_AUX_IO_TBT2_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4329,8 +4313,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "AUX F TBT3", > - .domains = TGL_AUX_F_TBT3_IO_POWER_DOMAINS, > + .name = "AUX TBT3", > + .domains = TGL_AUX_IO_TBT3_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4340,8 +4324,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "AUX G TBT4", > - .domains = TGL_AUX_G_TBT4_IO_POWER_DOMAINS, > + .name = "AUX TBT4", > + .domains = TGL_AUX_IO_TBT4_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4351,8 +4335,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "AUX H TBT5", > - .domains = TGL_AUX_H_TBT5_IO_POWER_DOMAINS, > + .name = "AUX TBT5", > + .domains = TGL_AUX_IO_TBT5_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4362,8 +4346,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > }, > }, > { > - .name = "AUX I TBT6", > - .domains = TGL_AUX_I_TBT6_IO_POWER_DOMAINS, > + .name = "AUX TBT6", > + .domains = TGL_AUX_IO_TBT6_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4471,8 +4455,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { > } > }, > { > - .name = "DDI D TC1 IO", > - .domains = TGL_DDI_IO_D_TC1_POWER_DOMAINS, > + .name = "DDI IO TC1", > + .domains = TGL_DDI_IO_TC1_POWER_DOMAINS, > .ops = &hsw_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4481,8 +4465,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { > }, > }, > { > - .name = "DDI E TC2 IO", > - .domains = TGL_DDI_IO_E_TC2_POWER_DOMAINS, > + .name = "DDI IO TC2", > + .domains = TGL_DDI_IO_TC2_POWER_DOMAINS, > .ops = &hsw_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4511,8 +4495,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { > }, > }, > { > - .name = "AUX D TC1", > - .domains = TGL_AUX_D_TC1_IO_POWER_DOMAINS, > + .name = "AUX USBC1", > + .domains = TGL_AUX_IO_USBC1_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > @@ -4521,8 +4505,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { > }, > }, > { > - .name = "AUX E TC2", > - .domains = TGL_AUX_E_TC2_IO_POWER_DOMAINS, > + .name = "AUX USBC2", > + .domains = TGL_AUX_IO_USBC2_POWER_DOMAINS, > .ops = &icl_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h > index bc30c479be53..f3ca5d5c9778 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.h > +++ b/drivers/gpu/drm/i915/display/intel_display_power.h > @@ -41,6 +41,14 @@ enum intel_display_power_domain { > POWER_DOMAIN_PORT_DDI_G_LANES, > POWER_DOMAIN_PORT_DDI_H_LANES, > POWER_DOMAIN_PORT_DDI_I_LANES, > + > + POWER_DOMAIN_PORT_DDI_LANES_TC1 = POWER_DOMAIN_PORT_DDI_D_LANES, /* tgl+ */ To follow others it should be POWER_DOMAIN_PORT_DDI_TC1_LANES > + POWER_DOMAIN_PORT_DDI_LANES_TC2, > + POWER_DOMAIN_PORT_DDI_LANES_TC3, > + POWER_DOMAIN_PORT_DDI_LANES_TC4, > + POWER_DOMAIN_PORT_DDI_LANES_TC5, > + POWER_DOMAIN_PORT_DDI_LANES_TC6, > + > POWER_DOMAIN_PORT_DDI_A_IO, > POWER_DOMAIN_PORT_DDI_B_IO, > POWER_DOMAIN_PORT_DDI_C_IO, > @@ -50,6 +58,14 @@ enum intel_display_power_domain { > POWER_DOMAIN_PORT_DDI_G_IO, > POWER_DOMAIN_PORT_DDI_H_IO, > POWER_DOMAIN_PORT_DDI_I_IO, > + > + POWER_DOMAIN_PORT_DDI_IO_TC1 = POWER_DOMAIN_PORT_DDI_D_IO, /* tgl+ */ Same as comment above: POWER_DOMAIN_PORT_DDI_TC1_IO With this 2 renames, looks good to me. Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > + POWER_DOMAIN_PORT_DDI_IO_TC2, > + POWER_DOMAIN_PORT_DDI_IO_TC3, > + POWER_DOMAIN_PORT_DDI_IO_TC4, > + POWER_DOMAIN_PORT_DDI_IO_TC5, > + POWER_DOMAIN_PORT_DDI_IO_TC6, > + > POWER_DOMAIN_PORT_DSI, > POWER_DOMAIN_PORT_CRT, > POWER_DOMAIN_PORT_OTHER, > @@ -64,6 +80,14 @@ enum intel_display_power_domain { > POWER_DOMAIN_AUX_G, > POWER_DOMAIN_AUX_H, > POWER_DOMAIN_AUX_I, > + > + POWER_DOMAIN_AUX_USBC1 = POWER_DOMAIN_AUX_D, /* tgl+ */ > + POWER_DOMAIN_AUX_USBC2, > + POWER_DOMAIN_AUX_USBC3, > + POWER_DOMAIN_AUX_USBC4, > + POWER_DOMAIN_AUX_USBC5, > + POWER_DOMAIN_AUX_USBC6, > + > POWER_DOMAIN_AUX_IO_A, > POWER_DOMAIN_AUX_C_TBT, > POWER_DOMAIN_AUX_D_TBT, > @@ -72,6 +96,14 @@ enum intel_display_power_domain { > POWER_DOMAIN_AUX_G_TBT, > POWER_DOMAIN_AUX_H_TBT, > POWER_DOMAIN_AUX_I_TBT, > + > + POWER_DOMAIN_AUX_TBT1 = POWER_DOMAIN_AUX_D_TBT, /* tgl+ */ > + POWER_DOMAIN_AUX_TBT2, > + POWER_DOMAIN_AUX_TBT3, > + POWER_DOMAIN_AUX_TBT4, > + POWER_DOMAIN_AUX_TBT5, > + POWER_DOMAIN_AUX_TBT6, > + > POWER_DOMAIN_GMBUS, > POWER_DOMAIN_MODESET, > POWER_DOMAIN_GT_IRQ, _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names 2021-02-23 13:56 ` [Intel-gfx] [PATCH] " Souza, Jose @ 2021-02-23 14:51 ` Imre Deak 2021-02-23 15:52 ` Souza, Jose 0 siblings, 1 reply; 8+ messages in thread From: Imre Deak @ 2021-02-23 14:51 UTC (permalink / raw) To: Souza, Jose; +Cc: intel-gfx On Tue, Feb 23, 2021 at 03:56:12PM +0200, Souza, Jose wrote: > On Mon, 2021-02-22 at 23:04 +0200, Imre Deak wrote: > > In Bspec the TGL TypeC ports are TC1-6, the AUX power well request flags > > are USBC1-6/TBT1-6, so for clarity use these names in the port power > > domain names instead of the D-I terminology (which Bspec uses only for > > the ICL TypeC ports). > > > > No functional change. > > > > Cc: Souza Jose <jose.souza@intel.com> > > Signed-off-by: Imre Deak <imre.deak@intel.com> > > --- > > .../drm/i915/display/intel_display_power.c | 212 ++++++++---------- > > .../drm/i915/display/intel_display_power.h | 32 +++ > > 2 files changed, 130 insertions(+), 114 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c > > index f00c1750febd..7e0eaa872350 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > > @@ -2886,24 +2886,24 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, > > BIT_ULL(POWER_DOMAIN_PIPE_B) | \ > > BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ > > BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) | \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_F_LANES) | \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_G_LANES) | \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_H_LANES) | \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_I_LANES) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_D) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_E) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_F) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_G) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_H) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_I) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_D_TBT) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_E_TBT) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_F_TBT) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_G_TBT) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_H_TBT) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_I_TBT) | \ > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC1) | \ > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC2) | \ > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC3) | \ > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC4) | \ > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC5) | \ > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC6) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC1) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC2) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC3) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC4) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC5) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC6) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_TBT1) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_TBT2) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_TBT3) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_TBT4) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_TBT5) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_TBT6) | \ > > BIT_ULL(POWER_DOMAIN_VGA) | \ > > BIT_ULL(POWER_DOMAIN_AUDIO) | \ > > BIT_ULL(POWER_DOMAIN_INIT)) > > @@ -2921,18 +2921,12 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, > > BIT_ULL(POWER_DOMAIN_AUX_C) | \ > > BIT_ULL(POWER_DOMAIN_INIT)) > > > > > > -#define TGL_DDI_IO_D_TC1_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_D_IO)) > > -#define TGL_DDI_IO_E_TC2_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_E_IO)) > > -#define TGL_DDI_IO_F_TC3_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO)) > > -#define TGL_DDI_IO_G_TC4_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_G_IO)) > > -#define TGL_DDI_IO_H_TC5_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_H_IO)) > > -#define TGL_DDI_IO_I_TC6_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_I_IO)) > > +#define TGL_DDI_IO_TC1_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC1) > > +#define TGL_DDI_IO_TC2_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC2) > > +#define TGL_DDI_IO_TC3_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC3) > > +#define TGL_DDI_IO_TC4_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC4) > > +#define TGL_DDI_IO_TC5_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC5) > > +#define TGL_DDI_IO_TC6_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC6) > > > > > > #define TGL_AUX_A_IO_POWER_DOMAINS ( \ > > BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ > > @@ -2941,44 +2935,34 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, > > BIT_ULL(POWER_DOMAIN_AUX_B)) > > #define TGL_AUX_C_IO_POWER_DOMAINS ( \ > > BIT_ULL(POWER_DOMAIN_AUX_C)) > > -#define TGL_AUX_D_TC1_IO_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_D)) > > -#define TGL_AUX_E_TC2_IO_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_E)) > > -#define TGL_AUX_F_TC3_IO_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_F)) > > -#define TGL_AUX_G_TC4_IO_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_G)) > > -#define TGL_AUX_H_TC5_IO_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_H)) > > -#define TGL_AUX_I_TC6_IO_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_I)) > > -#define TGL_AUX_D_TBT1_IO_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_D_TBT)) > > -#define TGL_AUX_E_TBT2_IO_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_E_TBT)) > > -#define TGL_AUX_F_TBT3_IO_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_F_TBT)) > > -#define TGL_AUX_G_TBT4_IO_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_G_TBT)) > > -#define TGL_AUX_H_TBT5_IO_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_H_TBT)) > > -#define TGL_AUX_I_TBT6_IO_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_I_TBT)) > > + > > +#define TGL_AUX_IO_USBC1_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC1) > > +#define TGL_AUX_IO_USBC2_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC2) > > +#define TGL_AUX_IO_USBC3_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC3) > > +#define TGL_AUX_IO_USBC4_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC4) > > +#define TGL_AUX_IO_USBC5_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC5) > > +#define TGL_AUX_IO_USBC6_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC6) > > + > > +#define TGL_AUX_IO_TBT1_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT1) > > +#define TGL_AUX_IO_TBT2_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT2) > > +#define TGL_AUX_IO_TBT3_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT3) > > +#define TGL_AUX_IO_TBT4_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT4) > > +#define TGL_AUX_IO_TBT5_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT5) > > +#define TGL_AUX_IO_TBT6_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT6) > > > > > > #define TGL_TC_COLD_OFF_POWER_DOMAINS ( \ > > - BIT_ULL(POWER_DOMAIN_AUX_D) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_E) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_F) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_G) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_H) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_I) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_D_TBT) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_E_TBT) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_F_TBT) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_G_TBT) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_H_TBT) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_I_TBT) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC1) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC2) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC3) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC4) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC5) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC6) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_TBT1) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_TBT2) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_TBT3) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_TBT4) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_TBT5) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_TBT6) | \ > > BIT_ULL(POWER_DOMAIN_TC_COLD_OFF)) > > > > > > #define RKL_PW_4_POWER_DOMAINS ( \ > > @@ -2994,10 +2978,10 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, > > BIT_ULL(POWER_DOMAIN_AUDIO) | \ > > BIT_ULL(POWER_DOMAIN_VGA) | \ > > BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_D) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_E) | \ > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC1) | \ > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC2) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC1) | \ > > + BIT_ULL(POWER_DOMAIN_AUX_USBC2) | \ > > BIT_ULL(POWER_DOMAIN_INIT)) > > > > > > /* > > @@ -4145,8 +4129,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > } > > }, > > { > > - .name = "DDI D TC1 IO", > > - .domains = TGL_DDI_IO_D_TC1_POWER_DOMAINS, > > + .name = "DDI IO TC1", > > + .domains = TGL_DDI_IO_TC1_POWER_DOMAINS, > > .ops = &hsw_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4155,8 +4139,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "DDI E TC2 IO", > > - .domains = TGL_DDI_IO_E_TC2_POWER_DOMAINS, > > + .name = "DDI IO TC2", > > + .domains = TGL_DDI_IO_TC2_POWER_DOMAINS, > > .ops = &hsw_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4165,8 +4149,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "DDI F TC3 IO", > > - .domains = TGL_DDI_IO_F_TC3_POWER_DOMAINS, > > + .name = "DDI IO TC3", > > + .domains = TGL_DDI_IO_TC3_POWER_DOMAINS, > > .ops = &hsw_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4175,8 +4159,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "DDI G TC4 IO", > > - .domains = TGL_DDI_IO_G_TC4_POWER_DOMAINS, > > + .name = "DDI IO TC4", > > + .domains = TGL_DDI_IO_TC4_POWER_DOMAINS, > > .ops = &hsw_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4185,8 +4169,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "DDI H TC5 IO", > > - .domains = TGL_DDI_IO_H_TC5_POWER_DOMAINS, > > + .name = "DDI IO TC5", > > + .domains = TGL_DDI_IO_TC5_POWER_DOMAINS, > > .ops = &hsw_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4195,8 +4179,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "DDI I TC6 IO", > > - .domains = TGL_DDI_IO_I_TC6_POWER_DOMAINS, > > + .name = "DDI IO TC6", > > + .domains = TGL_DDI_IO_TC6_POWER_DOMAINS, > > .ops = &hsw_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4241,8 +4225,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX D TC1", > > - .domains = TGL_AUX_D_TC1_IO_POWER_DOMAINS, > > + .name = "AUX USBC1", > > + .domains = TGL_AUX_IO_USBC1_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4252,8 +4236,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX E TC2", > > - .domains = TGL_AUX_E_TC2_IO_POWER_DOMAINS, > > + .name = "AUX USBC2", > > + .domains = TGL_AUX_IO_USBC2_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4263,8 +4247,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX F TC3", > > - .domains = TGL_AUX_F_TC3_IO_POWER_DOMAINS, > > + .name = "AUX USBC3", > > + .domains = TGL_AUX_IO_USBC3_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4274,8 +4258,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX G TC4", > > - .domains = TGL_AUX_G_TC4_IO_POWER_DOMAINS, > > + .name = "AUX USBC4", > > + .domains = TGL_AUX_IO_USBC4_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4285,8 +4269,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX H TC5", > > - .domains = TGL_AUX_H_TC5_IO_POWER_DOMAINS, > > + .name = "AUX USBC5", > > + .domains = TGL_AUX_IO_USBC5_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4296,8 +4280,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX I TC6", > > - .domains = TGL_AUX_I_TC6_IO_POWER_DOMAINS, > > + .name = "AUX USBC6", > > + .domains = TGL_AUX_IO_USBC6_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4307,8 +4291,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX D TBT1", > > - .domains = TGL_AUX_D_TBT1_IO_POWER_DOMAINS, > > + .name = "AUX TBT1", > > + .domains = TGL_AUX_IO_TBT1_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4318,8 +4302,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX E TBT2", > > - .domains = TGL_AUX_E_TBT2_IO_POWER_DOMAINS, > > + .name = "AUX TBT2", > > + .domains = TGL_AUX_IO_TBT2_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4329,8 +4313,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX F TBT3", > > - .domains = TGL_AUX_F_TBT3_IO_POWER_DOMAINS, > > + .name = "AUX TBT3", > > + .domains = TGL_AUX_IO_TBT3_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4340,8 +4324,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX G TBT4", > > - .domains = TGL_AUX_G_TBT4_IO_POWER_DOMAINS, > > + .name = "AUX TBT4", > > + .domains = TGL_AUX_IO_TBT4_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4351,8 +4335,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX H TBT5", > > - .domains = TGL_AUX_H_TBT5_IO_POWER_DOMAINS, > > + .name = "AUX TBT5", > > + .domains = TGL_AUX_IO_TBT5_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4362,8 +4346,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX I TBT6", > > - .domains = TGL_AUX_I_TBT6_IO_POWER_DOMAINS, > > + .name = "AUX TBT6", > > + .domains = TGL_AUX_IO_TBT6_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4471,8 +4455,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { > > } > > }, > > { > > - .name = "DDI D TC1 IO", > > - .domains = TGL_DDI_IO_D_TC1_POWER_DOMAINS, > > + .name = "DDI IO TC1", > > + .domains = TGL_DDI_IO_TC1_POWER_DOMAINS, > > .ops = &hsw_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4481,8 +4465,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { > > }, > > }, > > { > > - .name = "DDI E TC2 IO", > > - .domains = TGL_DDI_IO_E_TC2_POWER_DOMAINS, > > + .name = "DDI IO TC2", > > + .domains = TGL_DDI_IO_TC2_POWER_DOMAINS, > > .ops = &hsw_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4511,8 +4495,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX D TC1", > > - .domains = TGL_AUX_D_TC1_IO_POWER_DOMAINS, > > + .name = "AUX USBC1", > > + .domains = TGL_AUX_IO_USBC1_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > @@ -4521,8 +4505,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { > > }, > > }, > > { > > - .name = "AUX E TC2", > > - .domains = TGL_AUX_E_TC2_IO_POWER_DOMAINS, > > + .name = "AUX USBC2", > > + .domains = TGL_AUX_IO_USBC2_POWER_DOMAINS, > > .ops = &icl_aux_power_well_ops, > > .id = DISP_PW_ID_NONE, > > { > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h > > index bc30c479be53..f3ca5d5c9778 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_power.h > > +++ b/drivers/gpu/drm/i915/display/intel_display_power.h > > @@ -41,6 +41,14 @@ enum intel_display_power_domain { > > POWER_DOMAIN_PORT_DDI_G_LANES, > > POWER_DOMAIN_PORT_DDI_H_LANES, > > POWER_DOMAIN_PORT_DDI_I_LANES, > > + > > + POWER_DOMAIN_PORT_DDI_LANES_TC1 = POWER_DOMAIN_PORT_DDI_D_LANES, /* tgl+ */ > > To follow others it should be POWER_DOMAIN_PORT_DDI_TC1_LANES > > > + POWER_DOMAIN_PORT_DDI_LANES_TC2, > > + POWER_DOMAIN_PORT_DDI_LANES_TC3, > > + POWER_DOMAIN_PORT_DDI_LANES_TC4, > > + POWER_DOMAIN_PORT_DDI_LANES_TC5, > > + POWER_DOMAIN_PORT_DDI_LANES_TC6, > > + > > POWER_DOMAIN_PORT_DDI_A_IO, > > POWER_DOMAIN_PORT_DDI_B_IO, > > POWER_DOMAIN_PORT_DDI_C_IO, > > @@ -50,6 +58,14 @@ enum intel_display_power_domain { > > POWER_DOMAIN_PORT_DDI_G_IO, > > POWER_DOMAIN_PORT_DDI_H_IO, > > POWER_DOMAIN_PORT_DDI_I_IO, > > + > > + POWER_DOMAIN_PORT_DDI_IO_TC1 = POWER_DOMAIN_PORT_DDI_D_IO, /* tgl+ */ > > Same as comment above: POWER_DOMAIN_PORT_DDI_TC1_IO > > With this 2 renames, looks good to me. I think in the end all the domain names should follow the <domain>_<pipe/transcoder/port/aux_ch> pattern. I thought unifying the current domain names could be done as a follow-up but adding new domains should already follow this pattern. Does that make sense? > Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > > > + POWER_DOMAIN_PORT_DDI_IO_TC2, > > + POWER_DOMAIN_PORT_DDI_IO_TC3, > > + POWER_DOMAIN_PORT_DDI_IO_TC4, > > + POWER_DOMAIN_PORT_DDI_IO_TC5, > > + POWER_DOMAIN_PORT_DDI_IO_TC6, > > + > > POWER_DOMAIN_PORT_DSI, > > POWER_DOMAIN_PORT_CRT, > > POWER_DOMAIN_PORT_OTHER, > > @@ -64,6 +80,14 @@ enum intel_display_power_domain { > > POWER_DOMAIN_AUX_G, > > POWER_DOMAIN_AUX_H, > > POWER_DOMAIN_AUX_I, > > + > > + POWER_DOMAIN_AUX_USBC1 = POWER_DOMAIN_AUX_D, /* tgl+ */ > > + POWER_DOMAIN_AUX_USBC2, > > + POWER_DOMAIN_AUX_USBC3, > > + POWER_DOMAIN_AUX_USBC4, > > + POWER_DOMAIN_AUX_USBC5, > > + POWER_DOMAIN_AUX_USBC6, > > + > > POWER_DOMAIN_AUX_IO_A, > > POWER_DOMAIN_AUX_C_TBT, > > POWER_DOMAIN_AUX_D_TBT, > > @@ -72,6 +96,14 @@ enum intel_display_power_domain { > > POWER_DOMAIN_AUX_G_TBT, > > POWER_DOMAIN_AUX_H_TBT, > > POWER_DOMAIN_AUX_I_TBT, > > + > > + POWER_DOMAIN_AUX_TBT1 = POWER_DOMAIN_AUX_D_TBT, /* tgl+ */ > > + POWER_DOMAIN_AUX_TBT2, > > + POWER_DOMAIN_AUX_TBT3, > > + POWER_DOMAIN_AUX_TBT4, > > + POWER_DOMAIN_AUX_TBT5, > > + POWER_DOMAIN_AUX_TBT6, > > + > > POWER_DOMAIN_GMBUS, > > POWER_DOMAIN_MODESET, > > POWER_DOMAIN_GT_IRQ, > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names 2021-02-23 14:51 ` Imre Deak @ 2021-02-23 15:52 ` Souza, Jose 0 siblings, 0 replies; 8+ messages in thread From: Souza, Jose @ 2021-02-23 15:52 UTC (permalink / raw) To: Deak, Imre; +Cc: intel-gfx On Tue, 2021-02-23 at 16:51 +0200, Imre Deak wrote: > On Tue, Feb 23, 2021 at 03:56:12PM +0200, Souza, Jose wrote: > > On Mon, 2021-02-22 at 23:04 +0200, Imre Deak wrote: > > > In Bspec the TGL TypeC ports are TC1-6, the AUX power well request flags > > > are USBC1-6/TBT1-6, so for clarity use these names in the port power > > > domain names instead of the D-I terminology (which Bspec uses only for > > > the ICL TypeC ports). > > > > > > No functional change. > > > > > > Cc: Souza Jose <jose.souza@intel.com> > > > Signed-off-by: Imre Deak <imre.deak@intel.com> > > > --- > > > .../drm/i915/display/intel_display_power.c | 212 ++++++++---------- > > > .../drm/i915/display/intel_display_power.h | 32 +++ > > > 2 files changed, 130 insertions(+), 114 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c > > > index f00c1750febd..7e0eaa872350 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > > > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > > > @@ -2886,24 +2886,24 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, > > > BIT_ULL(POWER_DOMAIN_PIPE_B) | \ > > > BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ > > > BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) | \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_F_LANES) | \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_G_LANES) | \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_H_LANES) | \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_I_LANES) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_D) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_E) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_F) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_G) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_H) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_I) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_D_TBT) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_E_TBT) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_F_TBT) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_G_TBT) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_H_TBT) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_I_TBT) | \ > > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC1) | \ > > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC2) | \ > > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC3) | \ > > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC4) | \ > > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC5) | \ > > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC6) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC1) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC2) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC3) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC4) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC5) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC6) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_TBT1) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_TBT2) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_TBT3) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_TBT4) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_TBT5) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_TBT6) | \ > > > BIT_ULL(POWER_DOMAIN_VGA) | \ > > > BIT_ULL(POWER_DOMAIN_AUDIO) | \ > > > BIT_ULL(POWER_DOMAIN_INIT)) > > > @@ -2921,18 +2921,12 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, > > > BIT_ULL(POWER_DOMAIN_AUX_C) | \ > > > BIT_ULL(POWER_DOMAIN_INIT)) > > > > > > > > > > > > -#define TGL_DDI_IO_D_TC1_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_D_IO)) > > > -#define TGL_DDI_IO_E_TC2_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_E_IO)) > > > -#define TGL_DDI_IO_F_TC3_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO)) > > > -#define TGL_DDI_IO_G_TC4_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_G_IO)) > > > -#define TGL_DDI_IO_H_TC5_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_H_IO)) > > > -#define TGL_DDI_IO_I_TC6_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_I_IO)) > > > +#define TGL_DDI_IO_TC1_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC1) > > > +#define TGL_DDI_IO_TC2_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC2) > > > +#define TGL_DDI_IO_TC3_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC3) > > > +#define TGL_DDI_IO_TC4_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC4) > > > +#define TGL_DDI_IO_TC5_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC5) > > > +#define TGL_DDI_IO_TC6_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_PORT_DDI_IO_TC6) > > > > > > > > > > > > #define TGL_AUX_A_IO_POWER_DOMAINS ( \ > > > BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ > > > @@ -2941,44 +2935,34 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, > > > BIT_ULL(POWER_DOMAIN_AUX_B)) > > > #define TGL_AUX_C_IO_POWER_DOMAINS ( \ > > > BIT_ULL(POWER_DOMAIN_AUX_C)) > > > -#define TGL_AUX_D_TC1_IO_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_D)) > > > -#define TGL_AUX_E_TC2_IO_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_E)) > > > -#define TGL_AUX_F_TC3_IO_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_F)) > > > -#define TGL_AUX_G_TC4_IO_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_G)) > > > -#define TGL_AUX_H_TC5_IO_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_H)) > > > -#define TGL_AUX_I_TC6_IO_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_I)) > > > -#define TGL_AUX_D_TBT1_IO_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_D_TBT)) > > > -#define TGL_AUX_E_TBT2_IO_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_E_TBT)) > > > -#define TGL_AUX_F_TBT3_IO_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_F_TBT)) > > > -#define TGL_AUX_G_TBT4_IO_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_G_TBT)) > > > -#define TGL_AUX_H_TBT5_IO_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_H_TBT)) > > > -#define TGL_AUX_I_TBT6_IO_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_I_TBT)) > > > + > > > +#define TGL_AUX_IO_USBC1_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC1) > > > +#define TGL_AUX_IO_USBC2_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC2) > > > +#define TGL_AUX_IO_USBC3_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC3) > > > +#define TGL_AUX_IO_USBC4_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC4) > > > +#define TGL_AUX_IO_USBC5_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC5) > > > +#define TGL_AUX_IO_USBC6_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_USBC6) > > > + > > > +#define TGL_AUX_IO_TBT1_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT1) > > > +#define TGL_AUX_IO_TBT2_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT2) > > > +#define TGL_AUX_IO_TBT3_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT3) > > > +#define TGL_AUX_IO_TBT4_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT4) > > > +#define TGL_AUX_IO_TBT5_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT5) > > > +#define TGL_AUX_IO_TBT6_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_TBT6) > > > > > > > > > > > > #define TGL_TC_COLD_OFF_POWER_DOMAINS ( \ > > > - BIT_ULL(POWER_DOMAIN_AUX_D) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_E) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_F) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_G) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_H) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_I) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_D_TBT) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_E_TBT) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_F_TBT) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_G_TBT) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_H_TBT) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_I_TBT) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC1) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC2) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC3) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC4) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC5) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC6) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_TBT1) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_TBT2) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_TBT3) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_TBT4) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_TBT5) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_TBT6) | \ > > > BIT_ULL(POWER_DOMAIN_TC_COLD_OFF)) > > > > > > > > > > > > #define RKL_PW_4_POWER_DOMAINS ( \ > > > @@ -2994,10 +2978,10 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, > > > BIT_ULL(POWER_DOMAIN_AUDIO) | \ > > > BIT_ULL(POWER_DOMAIN_VGA) | \ > > > BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ > > > - BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_D) | \ > > > - BIT_ULL(POWER_DOMAIN_AUX_E) | \ > > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC1) | \ > > > + BIT_ULL(POWER_DOMAIN_PORT_DDI_LANES_TC2) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC1) | \ > > > + BIT_ULL(POWER_DOMAIN_AUX_USBC2) | \ > > > BIT_ULL(POWER_DOMAIN_INIT)) > > > > > > > > > > > > /* > > > @@ -4145,8 +4129,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > } > > > }, > > > { > > > - .name = "DDI D TC1 IO", > > > - .domains = TGL_DDI_IO_D_TC1_POWER_DOMAINS, > > > + .name = "DDI IO TC1", > > > + .domains = TGL_DDI_IO_TC1_POWER_DOMAINS, > > > .ops = &hsw_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4155,8 +4139,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "DDI E TC2 IO", > > > - .domains = TGL_DDI_IO_E_TC2_POWER_DOMAINS, > > > + .name = "DDI IO TC2", > > > + .domains = TGL_DDI_IO_TC2_POWER_DOMAINS, > > > .ops = &hsw_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4165,8 +4149,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "DDI F TC3 IO", > > > - .domains = TGL_DDI_IO_F_TC3_POWER_DOMAINS, > > > + .name = "DDI IO TC3", > > > + .domains = TGL_DDI_IO_TC3_POWER_DOMAINS, > > > .ops = &hsw_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4175,8 +4159,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "DDI G TC4 IO", > > > - .domains = TGL_DDI_IO_G_TC4_POWER_DOMAINS, > > > + .name = "DDI IO TC4", > > > + .domains = TGL_DDI_IO_TC4_POWER_DOMAINS, > > > .ops = &hsw_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4185,8 +4169,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "DDI H TC5 IO", > > > - .domains = TGL_DDI_IO_H_TC5_POWER_DOMAINS, > > > + .name = "DDI IO TC5", > > > + .domains = TGL_DDI_IO_TC5_POWER_DOMAINS, > > > .ops = &hsw_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4195,8 +4179,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "DDI I TC6 IO", > > > - .domains = TGL_DDI_IO_I_TC6_POWER_DOMAINS, > > > + .name = "DDI IO TC6", > > > + .domains = TGL_DDI_IO_TC6_POWER_DOMAINS, > > > .ops = &hsw_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4241,8 +4225,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX D TC1", > > > - .domains = TGL_AUX_D_TC1_IO_POWER_DOMAINS, > > > + .name = "AUX USBC1", > > > + .domains = TGL_AUX_IO_USBC1_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4252,8 +4236,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX E TC2", > > > - .domains = TGL_AUX_E_TC2_IO_POWER_DOMAINS, > > > + .name = "AUX USBC2", > > > + .domains = TGL_AUX_IO_USBC2_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4263,8 +4247,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX F TC3", > > > - .domains = TGL_AUX_F_TC3_IO_POWER_DOMAINS, > > > + .name = "AUX USBC3", > > > + .domains = TGL_AUX_IO_USBC3_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4274,8 +4258,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX G TC4", > > > - .domains = TGL_AUX_G_TC4_IO_POWER_DOMAINS, > > > + .name = "AUX USBC4", > > > + .domains = TGL_AUX_IO_USBC4_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4285,8 +4269,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX H TC5", > > > - .domains = TGL_AUX_H_TC5_IO_POWER_DOMAINS, > > > + .name = "AUX USBC5", > > > + .domains = TGL_AUX_IO_USBC5_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4296,8 +4280,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX I TC6", > > > - .domains = TGL_AUX_I_TC6_IO_POWER_DOMAINS, > > > + .name = "AUX USBC6", > > > + .domains = TGL_AUX_IO_USBC6_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4307,8 +4291,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX D TBT1", > > > - .domains = TGL_AUX_D_TBT1_IO_POWER_DOMAINS, > > > + .name = "AUX TBT1", > > > + .domains = TGL_AUX_IO_TBT1_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4318,8 +4302,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX E TBT2", > > > - .domains = TGL_AUX_E_TBT2_IO_POWER_DOMAINS, > > > + .name = "AUX TBT2", > > > + .domains = TGL_AUX_IO_TBT2_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4329,8 +4313,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX F TBT3", > > > - .domains = TGL_AUX_F_TBT3_IO_POWER_DOMAINS, > > > + .name = "AUX TBT3", > > > + .domains = TGL_AUX_IO_TBT3_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4340,8 +4324,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX G TBT4", > > > - .domains = TGL_AUX_G_TBT4_IO_POWER_DOMAINS, > > > + .name = "AUX TBT4", > > > + .domains = TGL_AUX_IO_TBT4_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4351,8 +4335,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX H TBT5", > > > - .domains = TGL_AUX_H_TBT5_IO_POWER_DOMAINS, > > > + .name = "AUX TBT5", > > > + .domains = TGL_AUX_IO_TBT5_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4362,8 +4346,8 @@ static const struct i915_power_well_desc tgl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX I TBT6", > > > - .domains = TGL_AUX_I_TBT6_IO_POWER_DOMAINS, > > > + .name = "AUX TBT6", > > > + .domains = TGL_AUX_IO_TBT6_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4471,8 +4455,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { > > > } > > > }, > > > { > > > - .name = "DDI D TC1 IO", > > > - .domains = TGL_DDI_IO_D_TC1_POWER_DOMAINS, > > > + .name = "DDI IO TC1", > > > + .domains = TGL_DDI_IO_TC1_POWER_DOMAINS, > > > .ops = &hsw_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4481,8 +4465,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "DDI E TC2 IO", > > > - .domains = TGL_DDI_IO_E_TC2_POWER_DOMAINS, > > > + .name = "DDI IO TC2", > > > + .domains = TGL_DDI_IO_TC2_POWER_DOMAINS, > > > .ops = &hsw_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4511,8 +4495,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX D TC1", > > > - .domains = TGL_AUX_D_TC1_IO_POWER_DOMAINS, > > > + .name = "AUX USBC1", > > > + .domains = TGL_AUX_IO_USBC1_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > @@ -4521,8 +4505,8 @@ static const struct i915_power_well_desc rkl_power_wells[] = { > > > }, > > > }, > > > { > > > - .name = "AUX E TC2", > > > - .domains = TGL_AUX_E_TC2_IO_POWER_DOMAINS, > > > + .name = "AUX USBC2", > > > + .domains = TGL_AUX_IO_USBC2_POWER_DOMAINS, > > > .ops = &icl_aux_power_well_ops, > > > .id = DISP_PW_ID_NONE, > > > { > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h > > > index bc30c479be53..f3ca5d5c9778 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_display_power.h > > > +++ b/drivers/gpu/drm/i915/display/intel_display_power.h > > > @@ -41,6 +41,14 @@ enum intel_display_power_domain { > > > POWER_DOMAIN_PORT_DDI_G_LANES, > > > POWER_DOMAIN_PORT_DDI_H_LANES, > > > POWER_DOMAIN_PORT_DDI_I_LANES, > > > + > > > + POWER_DOMAIN_PORT_DDI_LANES_TC1 = POWER_DOMAIN_PORT_DDI_D_LANES, /* tgl+ */ > > > > To follow others it should be POWER_DOMAIN_PORT_DDI_TC1_LANES > > > > > + POWER_DOMAIN_PORT_DDI_LANES_TC2, > > > + POWER_DOMAIN_PORT_DDI_LANES_TC3, > > > + POWER_DOMAIN_PORT_DDI_LANES_TC4, > > > + POWER_DOMAIN_PORT_DDI_LANES_TC5, > > > + POWER_DOMAIN_PORT_DDI_LANES_TC6, > > > + > > > POWER_DOMAIN_PORT_DDI_A_IO, > > > POWER_DOMAIN_PORT_DDI_B_IO, > > > POWER_DOMAIN_PORT_DDI_C_IO, > > > @@ -50,6 +58,14 @@ enum intel_display_power_domain { > > > POWER_DOMAIN_PORT_DDI_G_IO, > > > POWER_DOMAIN_PORT_DDI_H_IO, > > > POWER_DOMAIN_PORT_DDI_I_IO, > > > + > > > + POWER_DOMAIN_PORT_DDI_IO_TC1 = POWER_DOMAIN_PORT_DDI_D_IO, /* tgl+ */ > > > > Same as comment above: POWER_DOMAIN_PORT_DDI_TC1_IO > > > > With this 2 renames, looks good to me. > > I think in the end all the domain names should follow the > <domain>_<pipe/transcoder/port/aux_ch> pattern. I thought unifying the > current domain names could be done as a follow-up but adding new domains > should already follow this pattern. Does that make sense? sounds good to me, maybe add this to the commit message before push it? That you will follow-up with the remaining rename. > > > Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > > > > > + POWER_DOMAIN_PORT_DDI_IO_TC2, > > > + POWER_DOMAIN_PORT_DDI_IO_TC3, > > > + POWER_DOMAIN_PORT_DDI_IO_TC4, > > > + POWER_DOMAIN_PORT_DDI_IO_TC5, > > > + POWER_DOMAIN_PORT_DDI_IO_TC6, > > > + > > > POWER_DOMAIN_PORT_DSI, > > > POWER_DOMAIN_PORT_CRT, > > > POWER_DOMAIN_PORT_OTHER, > > > @@ -64,6 +80,14 @@ enum intel_display_power_domain { > > > POWER_DOMAIN_AUX_G, > > > POWER_DOMAIN_AUX_H, > > > POWER_DOMAIN_AUX_I, > > > + > > > + POWER_DOMAIN_AUX_USBC1 = POWER_DOMAIN_AUX_D, /* tgl+ */ > > > + POWER_DOMAIN_AUX_USBC2, > > > + POWER_DOMAIN_AUX_USBC3, > > > + POWER_DOMAIN_AUX_USBC4, > > > + POWER_DOMAIN_AUX_USBC5, > > > + POWER_DOMAIN_AUX_USBC6, > > > + > > > POWER_DOMAIN_AUX_IO_A, > > > POWER_DOMAIN_AUX_C_TBT, > > > POWER_DOMAIN_AUX_D_TBT, > > > @@ -72,6 +96,14 @@ enum intel_display_power_domain { > > > POWER_DOMAIN_AUX_G_TBT, > > > POWER_DOMAIN_AUX_H_TBT, > > > POWER_DOMAIN_AUX_I_TBT, > > > + > > > + POWER_DOMAIN_AUX_TBT1 = POWER_DOMAIN_AUX_D_TBT, /* tgl+ */ > > > + POWER_DOMAIN_AUX_TBT2, > > > + POWER_DOMAIN_AUX_TBT3, > > > + POWER_DOMAIN_AUX_TBT4, > > > + POWER_DOMAIN_AUX_TBT5, > > > + POWER_DOMAIN_AUX_TBT6, > > > + > > > POWER_DOMAIN_GMBUS, > > > POWER_DOMAIN_MODESET, > > > POWER_DOMAIN_GT_IRQ, > > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names 2021-02-22 21:04 [Intel-gfx] [PATCH] drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names Imre Deak ` (2 preceding siblings ...) 2021-02-23 13:56 ` [Intel-gfx] [PATCH] " Souza, Jose @ 2021-02-24 17:13 ` Patchwork 3 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2021-02-24 17:13 UTC (permalink / raw) To: Imre Deak; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 30290 bytes --] == Series Details == Series: drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names URL : https://patchwork.freedesktop.org/series/87299/ State : success == Summary == CI Bug Log - changes from CI_DRM_9795_full -> Patchwork_19717_full ==================================================== Summary ------- **WARNING** Minor unknown changes coming with Patchwork_19717_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_19717_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_19717_full: ### IGT changes ### #### Warnings #### * igt@runner@aborted: - shard-kbl: ([FAIL][1], [FAIL][2], [FAIL][3]) ([i915#2426] / [i915#2505] / [i915#2724] / [i915#3002]) -> ([FAIL][4], [FAIL][5], [FAIL][6], [FAIL][7], [FAIL][8]) ([i915#1814] / [i915#2292] / [i915#2505] / [i915#3002]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl4/igt@runner@aborted.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl1/igt@runner@aborted.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl6/igt@runner@aborted.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@runner@aborted.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl6/igt@runner@aborted.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@runner@aborted.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@runner@aborted.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@runner@aborted.html - shard-apl: ([FAIL][9], [FAIL][10], [FAIL][11]) ([i915#180] / [i915#3002]) -> ([FAIL][12], [FAIL][13], [FAIL][14], [FAIL][15]) ([i915#2724] / [i915#3002]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl1/igt@runner@aborted.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl1/igt@runner@aborted.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl3/igt@runner@aborted.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@runner@aborted.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@runner@aborted.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl1/igt@runner@aborted.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl1/igt@runner@aborted.html Known issues ------------ Here are the changes found in Patchwork_19717_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@feature_discovery@psr2: - shard-iclb: [PASS][16] -> [SKIP][17] ([i915#658]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb2/igt@feature_discovery@psr2.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb6/igt@feature_discovery@psr2.html * igt@gem_create@create-massive: - shard-snb: NOTRUN -> [DMESG-WARN][18] ([i915#3002]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb6/igt@gem_create@create-massive.html - shard-kbl: NOTRUN -> [DMESG-WARN][19] ([i915#3002]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@gem_create@create-massive.html * igt@gem_ctx_persistence@file: - shard-hsw: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#1099]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@gem_ctx_persistence@file.html * igt@gem_ctx_persistence@legacy-engines-mixed: - shard-snb: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#1099]) +6 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb2/igt@gem_ctx_persistence@legacy-engines-mixed.html * igt@gem_eio@unwedge-stress: - shard-iclb: [PASS][22] -> [TIMEOUT][23] ([i915#2481] / [i915#3070]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb5/igt@gem_eio@unwedge-stress.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb8/igt@gem_eio@unwedge-stress.html * igt@gem_exec_create@forked: - shard-glk: [PASS][24] -> [DMESG-WARN][25] ([i915#118] / [i915#95]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk6/igt@gem_exec_create@forked.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk7/igt@gem_exec_create@forked.html * igt@gem_exec_fair@basic-deadline: - shard-apl: NOTRUN -> [FAIL][26] ([i915#2846]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-none-vip@rcs0: - shard-glk: NOTRUN -> [FAIL][27] ([i915#2842]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@gem_exec_fair@basic-none-vip@rcs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-glk: [PASS][28] -> [FAIL][29] ([i915#2842]) [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk7/igt@gem_exec_fair@basic-throttle@rcs0.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk1/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gem_exec_reloc@basic-many-active@rcs0: - shard-snb: NOTRUN -> [FAIL][30] ([i915#2389]) +2 similar issues [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb6/igt@gem_exec_reloc@basic-many-active@rcs0.html * igt@gem_exec_reloc@basic-many-active@vcs0: - shard-kbl: NOTRUN -> [FAIL][31] ([i915#2389]) +9 similar issues [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@gem_exec_reloc@basic-many-active@vcs0.html * igt@gem_exec_schedule@u-fairslice@rcs0: - shard-skl: [PASS][32] -> [DMESG-WARN][33] ([i915#2803]) [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl2/igt@gem_exec_schedule@u-fairslice@rcs0.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl2/igt@gem_exec_schedule@u-fairslice@rcs0.html * igt@gem_exec_schedule@u-fairslice@vcs0: - shard-tglb: [PASS][34] -> [DMESG-WARN][35] ([i915#2803]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb7/igt@gem_exec_schedule@u-fairslice@vcs0.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb3/igt@gem_exec_schedule@u-fairslice@vcs0.html * igt@gem_pread@exhaustion: - shard-kbl: NOTRUN -> [WARN][36] ([i915#2658]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@gem_pread@exhaustion.html * igt@gem_userptr_blits@process-exit-mmap-busy@uc: - shard-kbl: NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#1699]) +3 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@gem_userptr_blits@process-exit-mmap-busy@uc.html * igt@gem_userptr_blits@vma-merge: - shard-apl: NOTRUN -> [INCOMPLETE][38] ([i915#2502] / [i915#2667]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@gem_userptr_blits@vma-merge.html * igt@i915_pm_dc@dc6-dpms: - shard-kbl: NOTRUN -> [FAIL][39] ([i915#454]) [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@i915_pm_dc@dc6-dpms.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [PASS][40] -> [FAIL][41] ([i915#454]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb7/igt@i915_pm_dc@dc6-psr.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb4/igt@i915_pm_dc@dc6-psr.html * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp: - shard-kbl: NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#1937]) [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html * igt@i915_pm_rc6_residency@rc6-idle: - shard-glk: [PASS][43] -> [FAIL][44] ([i915#3122]) [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk7/igt@i915_pm_rc6_residency@rc6-idle.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk1/igt@i915_pm_rc6_residency@rc6-idle.html - shard-hsw: [PASS][45] -> [WARN][46] ([i915#1519]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-hsw5/igt@i915_pm_rc6_residency@rc6-idle.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw4/igt@i915_pm_rc6_residency@rc6-idle.html * igt@i915_pm_rpm@modeset-lpsp-stress: - shard-apl: NOTRUN -> [SKIP][47] ([fdo#109271]) +183 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@i915_pm_rpm@modeset-lpsp-stress.html * igt@i915_suspend@fence-restore-untiled: - shard-apl: [PASS][48] -> [DMESG-WARN][49] ([i915#180]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl8/igt@i915_suspend@fence-restore-untiled.html [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl1/igt@i915_suspend@fence-restore-untiled.html * igt@kms_async_flips@alternate-sync-async-flip: - shard-snb: [PASS][50] -> [FAIL][51] ([i915#2521]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-snb2/igt@kms_async_flips@alternate-sync-async-flip.html [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb2/igt@kms_async_flips@alternate-sync-async-flip.html * igt@kms_big_fb@yf-tiled-8bpp-rotate-270: - shard-glk: NOTRUN -> [SKIP][52] ([fdo#109271]) +29 similar issues [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_big_fb@yf-tiled-8bpp-rotate-270.html * igt@kms_big_joiner@basic: - shard-kbl: NOTRUN -> [SKIP][53] ([fdo#109271] / [i915#2705]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_big_joiner@basic.html * igt@kms_big_joiner@invalid-modeset: - shard-apl: NOTRUN -> [SKIP][54] ([fdo#109271] / [i915#2705]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@kms_big_joiner@invalid-modeset.html - shard-glk: NOTRUN -> [SKIP][55] ([fdo#109271] / [i915#2705]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_big_joiner@invalid-modeset.html * igt@kms_chamelium@hdmi-frame-dump: - shard-hsw: NOTRUN -> [SKIP][56] ([fdo#109271] / [fdo#111827]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@kms_chamelium@hdmi-frame-dump.html * igt@kms_chamelium@vga-hpd-for-each-pipe: - shard-kbl: NOTRUN -> [SKIP][57] ([fdo#109271] / [fdo#111827]) +26 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_chamelium@vga-hpd-for-each-pipe.html * igt@kms_color@pipe-d-ctm-0-5: - shard-skl: NOTRUN -> [SKIP][58] ([fdo#109271]) +10 similar issues [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl10/igt@kms_color@pipe-d-ctm-0-5.html * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red: - shard-snb: NOTRUN -> [SKIP][59] ([fdo#109271] / [fdo#111827]) +23 similar issues [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb6/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html * igt@kms_color_chamelium@pipe-a-ctm-limited-range: - shard-apl: NOTRUN -> [SKIP][60] ([fdo#109271] / [fdo#111827]) +21 similar issues [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html * igt@kms_color_chamelium@pipe-c-ctm-0-5: - shard-glk: NOTRUN -> [SKIP][61] ([fdo#109271] / [fdo#111827]) +2 similar issues [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_color_chamelium@pipe-c-ctm-0-5.html * igt@kms_content_protection@atomic: - shard-kbl: NOTRUN -> [TIMEOUT][62] ([i915#1319]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@kms_content_protection@atomic.html * igt@kms_content_protection@srm: - shard-apl: NOTRUN -> [TIMEOUT][63] ([i915#1319]) +1 similar issue [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@kms_content_protection@srm.html * igt@kms_content_protection@uevent: - shard-kbl: NOTRUN -> [FAIL][64] ([i915#2105]) [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_content_protection@uevent.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-kbl: [PASS][65] -> [DMESG-WARN][66] ([i915#180]) +1 similar issue [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html * igt@kms_cursor_crc@pipe-c-cursor-64x21-random: - shard-skl: [PASS][67] -> [FAIL][68] ([i915#54]) +5 similar issues [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl5/igt@kms_cursor_crc@pipe-c-cursor-64x21-random.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl9/igt@kms_cursor_crc@pipe-c-cursor-64x21-random.html * igt@kms_cursor_crc@pipe-d-cursor-suspend: - shard-kbl: NOTRUN -> [SKIP][69] ([fdo#109271]) +260 similar issues [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_cursor_crc@pipe-d-cursor-suspend.html * igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge: - shard-snb: NOTRUN -> [SKIP][70] ([fdo#109271]) +386 similar issues [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-snb6/igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic: - shard-skl: [PASS][71] -> [FAIL][72] ([i915#2346]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1: - shard-skl: [PASS][73] -> [FAIL][74] ([i915#79]) +1 similar issue [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs: - shard-kbl: NOTRUN -> [FAIL][75] ([i915#2641]) +1 similar issue [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html - shard-apl: NOTRUN -> [FAIL][76] ([i915#2641]) [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs: - shard-kbl: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#2672]) +1 similar issue [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile: - shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#2642]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile: - shard-kbl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#2642]) [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-pwrite: - shard-hsw: NOTRUN -> [SKIP][80] ([fdo#109271]) +27 similar issues [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-pwrite.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [PASS][81] -> [FAIL][82] ([i915#1188]) [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - shard-skl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#533]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl10/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html * igt@kms_pipe_crc_basic@hang-read-crc-pipe-d: - shard-kbl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#533]) +1 similar issue [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-glk: NOTRUN -> [FAIL][85] ([fdo#108145] / [i915#265]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html - shard-apl: NOTRUN -> [FAIL][86] ([fdo#108145] / [i915#265]) +2 similar issues [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html * igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb: - shard-apl: NOTRUN -> [FAIL][87] ([i915#265]) [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl8/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: - shard-kbl: NOTRUN -> [FAIL][88] ([fdo#108145] / [i915#265]) +1 similar issue [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [PASS][89] -> [FAIL][90] ([fdo#108145] / [i915#265]) +1 similar issue [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@kms_plane_multiple@atomic-pipe-d-tiling-none: - shard-hsw: NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#533]) +3 similar issues [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@kms_plane_multiple@atomic-pipe-d-tiling-none.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5: - shard-apl: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#658]) +5 similar issues [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5.html * igt@kms_psr2_sf@plane-move-sf-dmg-area-0: - shard-glk: NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#658]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_psr2_sf@plane-move-sf-dmg-area-0.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5: - shard-kbl: NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#658]) +7 similar issues [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html * igt@kms_psr@psr2_suspend: - shard-iclb: [PASS][95] -> [SKIP][96] ([fdo#109441]) +2 similar issues [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb2/igt@kms_psr@psr2_suspend.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb6/igt@kms_psr@psr2_suspend.html * igt@kms_writeback@writeback-fb-id: - shard-glk: NOTRUN -> [SKIP][97] ([fdo#109271] / [i915#2437]) [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk6/igt@kms_writeback@writeback-fb-id.html - shard-apl: NOTRUN -> [SKIP][98] ([fdo#109271] / [i915#2437]) [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl6/igt@kms_writeback@writeback-fb-id.html * igt@kms_writeback@writeback-invalid-parameters: - shard-kbl: NOTRUN -> [SKIP][99] ([fdo#109271] / [i915#2437]) +1 similar issue [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@kms_writeback@writeback-invalid-parameters.html * igt@perf@non-sampling-read-error: - shard-skl: [PASS][100] -> [DMESG-WARN][101] ([i915#1982]) +2 similar issues [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl2/igt@perf@non-sampling-read-error.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl2/igt@perf@non-sampling-read-error.html * igt@perf@polling-parameterized: - shard-skl: [PASS][102] -> [FAIL][103] ([i915#1542]) [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl3/igt@perf@polling-parameterized.html [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl1/igt@perf@polling-parameterized.html * igt@perf_pmu@rc6-suspend: - shard-kbl: NOTRUN -> [DMESG-WARN][104] ([i915#180]) [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl4/igt@perf_pmu@rc6-suspend.html * igt@sysfs_clients@recycle: - shard-hsw: [PASS][105] -> [FAIL][106] ([i915#3028]) [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-hsw1/igt@sysfs_clients@recycle.html [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw7/igt@sysfs_clients@recycle.html * igt@sysfs_clients@recycle-many: - shard-kbl: NOTRUN -> [FAIL][107] ([i915#3028]) [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@sysfs_clients@recycle-many.html - shard-tglb: [PASS][108] -> [FAIL][109] ([i915#3028]) [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb5/igt@sysfs_clients@recycle-many.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb7/igt@sysfs_clients@recycle-many.html * igt@sysfs_clients@split-10@bcs0: - shard-kbl: NOTRUN -> [SKIP][110] ([fdo#109271] / [i915#3026]) [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@sysfs_clients@split-10@bcs0.html #### Possible fixes #### * igt@gem_ctx_persistence@close-replace-race: - shard-glk: [TIMEOUT][111] ([i915#2918]) -> [PASS][112] [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk4/igt@gem_ctx_persistence@close-replace-race.html [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk9/igt@gem_ctx_persistence@close-replace-race.html * igt@gem_eio@unwedge-stress: - shard-tglb: [TIMEOUT][113] ([i915#3063]) -> [PASS][114] [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb3/igt@gem_eio@unwedge-stress.html [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb3/igt@gem_eio@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-tglb: [FAIL][115] ([i915#2846]) -> [PASS][116] [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb8/igt@gem_exec_fair@basic-deadline.html [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb1/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [FAIL][117] ([i915#2842]) -> [PASS][118] [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl7/igt@gem_exec_fair@basic-none@vcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [FAIL][119] ([i915#2842]) -> [PASS][120] [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_reloc@basic-many-active@rcs0: - shard-hsw: [FAIL][121] ([i915#2389]) -> [PASS][122] [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-hsw7/igt@gem_exec_reloc@basic-many-active@rcs0.html [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@gem_exec_reloc@basic-many-active@rcs0.html * igt@gem_exec_schedule@u-fairslice@vcs1: - shard-kbl: [DMESG-WARN][123] ([i915#1610] / [i915#2803]) -> [PASS][124] [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-kbl6/igt@gem_exec_schedule@u-fairslice@vcs1.html [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-kbl1/igt@gem_exec_schedule@u-fairslice@vcs1.html * igt@gem_fenced_exec_thrash@no-spare-fences-busy: - shard-hsw: [INCOMPLETE][125] ([i915#2055]) -> [PASS][126] [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-hsw5/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-hsw1/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html * igt@gem_huc_copy@huc-copy: - shard-tglb: [SKIP][127] ([i915#2190]) -> [PASS][128] [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb6/igt@gem_huc_copy@huc-copy.html [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb8/igt@gem_huc_copy@huc-copy.html * igt@kms_async_flips@test-time-stamp: - shard-tglb: [FAIL][129] ([i915#2597]) -> [PASS][130] [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-tglb5/igt@kms_async_flips@test-time-stamp.html [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-tglb2/igt@kms_async_flips@test-time-stamp.html * igt@kms_big_fb@x-tiled-16bpp-rotate-180: - shard-iclb: [DMESG-WARN][131] ([i915#1226]) -> [PASS][132] [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb2/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb6/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html * igt@kms_color@pipe-b-ctm-red-to-blue: - shard-skl: [FAIL][133] ([i915#129]) -> [PASS][134] [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl2/igt@kms_color@pipe-b-ctm-red-to-blue.html [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl2/igt@kms_color@pipe-b-ctm-red-to-blue.html * igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen: - shard-skl: [FAIL][135] ([i915#54]) -> [PASS][136] +9 similar issues [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl3/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-skl: [INCOMPLETE][137] ([i915#300]) -> [PASS][138] [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html * igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@a-edp1: - shard-skl: [DMESG-WARN][139] ([i915#1982]) -> [PASS][140] [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl9/igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@a-edp1.html [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl1/igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@a-edp1.html * igt@kms_flip@flip-vs-suspend@c-dp1: - shard-apl: [DMESG-WARN][141] ([i915#180]) -> [PASS][142] [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-apl2/igt@kms_flip@flip-vs-suspend@c-dp1.html * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1: - shard-skl: [FAIL][143] ([i915#2122]) -> [PASS][144] [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html * igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary: - shard-iclb: [SKIP][145] ([i915#668]) -> [PASS][146] [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [FAIL][147] ([fdo#108145] / [i915#265]) -> [PASS][148] [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html * igt@kms_psr@psr2_sprite_plane_onoff: - shard-iclb: [SKIP][149] ([fdo#109441]) -> [PASS][150] [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9795/shard-iclb3/igt@kms_psr@psr2_sprite_plane_onoff.html [150]: https://intel-gfx-ci.01.org/tree/drm-tip/ == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19717/index.html [-- Attachment #1.2: Type: text/html, Size: 34035 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2021-02-24 17:13 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-02-22 21:04 [Intel-gfx] [PATCH] drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names Imre Deak 2021-02-22 21:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork 2021-02-22 22:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2021-02-24 12:13 ` Imre Deak 2021-02-23 13:56 ` [Intel-gfx] [PATCH] " Souza, Jose 2021-02-23 14:51 ` Imre Deak 2021-02-23 15:52 ` Souza, Jose 2021-02-24 17:13 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork
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