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* [PATCH 2/2] arm64: dts: rockchip: add VPU node for rk3568
@ 2021-07-19 22:58 Ezequiel Garcia
  2021-07-20  9:14 ` Heiko Stübner
  0 siblings, 1 reply; 2+ messages in thread
From: Ezequiel Garcia @ 2021-07-19 22:58 UTC (permalink / raw)
  To: linux-rockchip; +Cc: Heiko Stuebner, Peter Geis, Kever Yang, Ezequiel Garcia

Rockchip SoCs RK3566 and RK3568 several hardware
CODEC accelerators. This commit adds the Hantro G1
compatible one, which Rockchip labels as VDPU2.

The variant matches the RK3328 one.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3568.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 59844dfaeb86..d9214f520400 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -398,6 +398,28 @@ gpu: gpu@fde60000 {
 		status = "disabled";
 	};
 
+	vpu: video-codec@fdea0400 {
+		compatible = "rockchip,rk3328-vpu";
+		reg = <0x0 0xfdea0000 0x0 0x800>;
+		interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vdpu";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk", "hclk";
+		iommus = <&vdpu_mmu>;
+		power-domains = <&power RK3568_PD_VPU>;
+	};
+
+	vdpu_mmu: iommu@fdea0800 {
+		compatible = "rockchip,rk3568-iommu";
+		reg = <0x0 0xfdea0800 0x0 0x40>;
+		interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vdpu_mmu";
+		clock-names = "aclk", "iface";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		power-domains = <&power RK3568_PD_VPU>;
+		#iommu-cells = <0>;
+	};
+
 	sdmmc2: mmc@fe000000 {
 		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xfe000000 0x0 0x4000>;
-- 
2.32.0


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^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH 2/2] arm64: dts: rockchip: add VPU node for rk3568
  2021-07-19 22:58 [PATCH 2/2] arm64: dts: rockchip: add VPU node for rk3568 Ezequiel Garcia
@ 2021-07-20  9:14 ` Heiko Stübner
  0 siblings, 0 replies; 2+ messages in thread
From: Heiko Stübner @ 2021-07-20  9:14 UTC (permalink / raw)
  To: linux-rockchip, Ezequiel Garcia; +Cc: Peter Geis, Kever Yang, Ezequiel Garcia

Am Dienstag, 20. Juli 2021, 00:58:06 CEST schrieb Ezequiel Garcia:
> Rockchip SoCs RK3566 and RK3568 several hardware
> CODEC accelerators. This commit adds the Hantro G1
> compatible one, which Rockchip labels as VDPU2.
> 
> The variant matches the RK3328 one.
> 
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3568.dtsi | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> index 59844dfaeb86..d9214f520400 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> @@ -398,6 +398,28 @@ gpu: gpu@fde60000 {
>  		status = "disabled";
>  	};
>  
> +	vpu: video-codec@fdea0400 {
> +		compatible = "rockchip,rk3328-vpu";

Do we want a 

		compatible = "rockchip,rk3568-vpu", "rockchip,rk3328-vpu";

here?

> +		reg = <0x0 0xfdea0000 0x0 0x800>;
> +		interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "vdpu";
> +		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
> +		clock-names = "aclk", "hclk";
> +		iommus = <&vdpu_mmu>;
> +		power-domains = <&power RK3568_PD_VPU>;
> +	};
> +
> +	vdpu_mmu: iommu@fdea0800 {
> +		compatible = "rockchip,rk3568-iommu";
> +		reg = <0x0 0xfdea0800 0x0 0x40>;
> +		interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "vdpu_mmu";
> +		clock-names = "aclk", "iface";
> +		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
> +		power-domains = <&power RK3568_PD_VPU>;
> +		#iommu-cells = <0>;
> +	};
> +
>  	sdmmc2: mmc@fe000000 {
>  		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
>  		reg = <0x0 0xfe000000 0x0 0x4000>;
> 





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http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply	[flat|nested] 2+ messages in thread

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