[U-Boot] Patch for OLinuXino Lime boards: default DRAM settings

[U-Boot] Patch for OLinuXino Lime boards: default DRAM settings

[Josh Marshall]

We have a number of OlinuXino Lime2 boards (both NAND and eMMC versions)
which were experiencing sporadic hangs. After testing with some heavy
benchmarking and help from the Armbian forum, it was pinned down as the
DRAM settings for the board. The default is 480MHz, but this is unstable,
and even the build instructions from the vendor Olimex themselves say to
set the DRAM clock to 384. (See line 96 at:
https://github.com/OLIMEX/OLINUXINO/blob/master/SOFTWARE/A20/A20-build-3.4.103-release-2/BUILD_DESCRIPTION_A20_Olimex_kernel_3.4.103%2B_Jessie_rel_2.txt
)

I?ve attached a patch against master to change this default:

diff --git a/configs/A20-OLinuXino-Lime2_defconfig
b/configs/A20-OLinuXino-Lime2_defconfig
index 54343de..21c792a 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_MACH_SUN7I=y
-CONFIG_DRAM_CLK=480
+CONFIG_DRAM_CLK=384
 CONFIG_MMC0_CD_PIN="PH1"
 CONFIG_USB0_VBUS_PIN="PC17"
 CONFIG_USB0_VBUS_DET="PH5"
diff --git a/configs/A20-OLinuXino-Lime_defconfig
b/configs/A20-OLinuXino-Lime_defconfig
index c4f6e1a..024dc2d 100644
--- a/configs/A20-OLinuXino-Lime_defconfig
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_MACH_SUN7I=y
-CONFIG_DRAM_CLK=480
+CONFIG_DRAM_CLK=384
 CONFIG_MMC0_CD_PIN="PH1"
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set

[U-Boot] Patch for OLinuXino Lime boards: default DRAM settings

[Hans de Goede]

Hi,

On 30-09-16 07:19, Josh Marshall wrote:
> We have a number of OlinuXino Lime2 boards (both NAND and eMMC versions)
> which were experiencing sporadic hangs. After testing with some heavy
> benchmarking and help from the Armbian forum, it was pinned down as the
> DRAM settings for the board. The default is 480MHz, but this is unstable,
> and even the build instructions from the vendor Olimex themselves say to
> set the DRAM clock to 384. (See line 96 at:
> https://github.com/OLIMEX/OLINUXINO/blob/master/SOFTWARE/A20/A20-build-3.4.103-release-2/BUILD_DESCRIPTION_A20_Olimex_kernel_3.4.103%2B_Jessie_rel_2.txt
> )
>
> I?ve attached a patch against master to change this default:

Thank you for the patch. I've applied this patch to my local
tree and it will be part of the pull-request I'm about to send
out.

Regards,

Hans


>
> diff --git a/configs/A20-OLinuXino-Lime2_defconfig
> b/configs/A20-OLinuXino-Lime2_defconfig
> index 54343de..21c792a 100644
> --- a/configs/A20-OLinuXino-Lime2_defconfig
> +++ b/configs/A20-OLinuXino-Lime2_defconfig
> @@ -2,7 +2,7 @@ CONFIG_ARM=y
>  CONFIG_ARCH_SUNXI=y
>  CONFIG_SPL_I2C_SUPPORT=y
>  CONFIG_MACH_SUN7I=y
> -CONFIG_DRAM_CLK=480
> +CONFIG_DRAM_CLK=384
>  CONFIG_MMC0_CD_PIN="PH1"
>  CONFIG_USB0_VBUS_PIN="PC17"
>  CONFIG_USB0_VBUS_DET="PH5"
> diff --git a/configs/A20-OLinuXino-Lime_defconfig
> b/configs/A20-OLinuXino-Lime_defconfig
> index c4f6e1a..024dc2d 100644
> --- a/configs/A20-OLinuXino-Lime_defconfig
> +++ b/configs/A20-OLinuXino-Lime_defconfig
> @@ -2,7 +2,7 @@ CONFIG_ARM=y
>  CONFIG_ARCH_SUNXI=y
>  CONFIG_SPL_I2C_SUPPORT=y
>  CONFIG_MACH_SUN7I=y
> -CONFIG_DRAM_CLK=480
> +CONFIG_DRAM_CLK=384
>  CONFIG_MMC0_CD_PIN="PH1"
>  CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime"
>  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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